lpfc_sli.c 105 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_ASYNC_STATUS:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. rc, pmbox->mbxCommand,
  216. pmbox->mbxStatus, i);
  217. phba->link_state = LPFC_HBA_ERROR;
  218. ret = -ENXIO;
  219. break;
  220. }
  221. }
  222. mempool_free(pmb, phba->mbox_mem_pool);
  223. return ret;
  224. }
  225. static int
  226. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  227. struct lpfc_iocbq *piocb)
  228. {
  229. list_add_tail(&piocb->list, &pring->txcmplq);
  230. pring->txcmplq_cnt++;
  231. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  232. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  233. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  234. if (!piocb->vport)
  235. BUG();
  236. else
  237. mod_timer(&piocb->vport->els_tmofunc,
  238. jiffies + HZ * (phba->fc_ratov << 1));
  239. }
  240. return 0;
  241. }
  242. static struct lpfc_iocbq *
  243. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  244. {
  245. struct lpfc_iocbq *cmd_iocb;
  246. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  247. if (cmd_iocb != NULL)
  248. pring->txq_cnt--;
  249. return cmd_iocb;
  250. }
  251. static IOCB_t *
  252. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  253. {
  254. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  255. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  256. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  257. uint32_t max_cmd_idx = pring->numCiocb;
  258. if ((pring->next_cmdidx == pring->cmdidx) &&
  259. (++pring->next_cmdidx >= max_cmd_idx))
  260. pring->next_cmdidx = 0;
  261. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  262. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  263. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  264. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  265. "0315 Ring %d issue: portCmdGet %d "
  266. "is bigger then cmd ring %d\n",
  267. pring->ringno,
  268. pring->local_getidx, max_cmd_idx);
  269. phba->link_state = LPFC_HBA_ERROR;
  270. /*
  271. * All error attention handlers are posted to
  272. * worker thread
  273. */
  274. phba->work_ha |= HA_ERATT;
  275. phba->work_hs = HS_FFER3;
  276. /* hbalock should already be held */
  277. if (phba->work_wait)
  278. lpfc_worker_wake_up(phba);
  279. return NULL;
  280. }
  281. if (pring->local_getidx == pring->next_cmdidx)
  282. return NULL;
  283. }
  284. return lpfc_cmd_iocb(phba, pring);
  285. }
  286. uint16_t
  287. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  288. {
  289. struct lpfc_iocbq **new_arr;
  290. struct lpfc_iocbq **old_arr;
  291. size_t new_len;
  292. struct lpfc_sli *psli = &phba->sli;
  293. uint16_t iotag;
  294. spin_lock_irq(&phba->hbalock);
  295. iotag = psli->last_iotag;
  296. if(++iotag < psli->iocbq_lookup_len) {
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(&phba->hbalock);
  300. iocbq->iotag = iotag;
  301. return iotag;
  302. } else if (psli->iocbq_lookup_len < (0xffff
  303. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  304. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  305. spin_unlock_irq(&phba->hbalock);
  306. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  307. GFP_KERNEL);
  308. if (new_arr) {
  309. spin_lock_irq(&phba->hbalock);
  310. old_arr = psli->iocbq_lookup;
  311. if (new_len <= psli->iocbq_lookup_len) {
  312. /* highly unprobable case */
  313. kfree(new_arr);
  314. iotag = psli->last_iotag;
  315. if(++iotag < psli->iocbq_lookup_len) {
  316. psli->last_iotag = iotag;
  317. psli->iocbq_lookup[iotag] = iocbq;
  318. spin_unlock_irq(&phba->hbalock);
  319. iocbq->iotag = iotag;
  320. return iotag;
  321. }
  322. spin_unlock_irq(&phba->hbalock);
  323. return 0;
  324. }
  325. if (psli->iocbq_lookup)
  326. memcpy(new_arr, old_arr,
  327. ((psli->last_iotag + 1) *
  328. sizeof (struct lpfc_iocbq *)));
  329. psli->iocbq_lookup = new_arr;
  330. psli->iocbq_lookup_len = new_len;
  331. psli->last_iotag = iotag;
  332. psli->iocbq_lookup[iotag] = iocbq;
  333. spin_unlock_irq(&phba->hbalock);
  334. iocbq->iotag = iotag;
  335. kfree(old_arr);
  336. return iotag;
  337. }
  338. } else
  339. spin_unlock_irq(&phba->hbalock);
  340. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  341. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  342. psli->last_iotag);
  343. return 0;
  344. }
  345. static void
  346. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  347. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  348. {
  349. /*
  350. * Set up an iotag
  351. */
  352. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  353. if (pring->ringno == LPFC_ELS_RING) {
  354. lpfc_debugfs_slow_ring_trc(phba,
  355. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  356. *(((uint32_t *) &nextiocb->iocb) + 4),
  357. *(((uint32_t *) &nextiocb->iocb) + 6),
  358. *(((uint32_t *) &nextiocb->iocb) + 7));
  359. }
  360. /*
  361. * Issue iocb command to adapter
  362. */
  363. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  364. wmb();
  365. pring->stats.iocb_cmd++;
  366. /*
  367. * If there is no completion routine to call, we can release the
  368. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  369. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  370. */
  371. if (nextiocb->iocb_cmpl)
  372. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  373. else
  374. __lpfc_sli_release_iocbq(phba, nextiocb);
  375. /*
  376. * Let the HBA know what IOCB slot will be the next one the
  377. * driver will put a command into.
  378. */
  379. pring->cmdidx = pring->next_cmdidx;
  380. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  381. }
  382. static void
  383. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  384. {
  385. int ringno = pring->ringno;
  386. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  387. wmb();
  388. /*
  389. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  390. * The HBA will tell us when an IOCB entry is available.
  391. */
  392. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  393. readl(phba->CAregaddr); /* flush */
  394. pring->stats.iocb_cmd_full++;
  395. }
  396. static void
  397. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  398. {
  399. int ringno = pring->ringno;
  400. /*
  401. * Tell the HBA that there is work to do in this ring.
  402. */
  403. wmb();
  404. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  405. readl(phba->CAregaddr); /* flush */
  406. }
  407. static void
  408. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  409. {
  410. IOCB_t *iocb;
  411. struct lpfc_iocbq *nextiocb;
  412. /*
  413. * Check to see if:
  414. * (a) there is anything on the txq to send
  415. * (b) link is up
  416. * (c) link attention events can be processed (fcp ring only)
  417. * (d) IOCB processing is not blocked by the outstanding mbox command.
  418. */
  419. if (pring->txq_cnt &&
  420. lpfc_is_link_up(phba) &&
  421. (pring->ringno != phba->sli.fcp_ring ||
  422. phba->sli.sli_flag & LPFC_PROCESS_LA)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. struct lpfc_hbq_entry *
  434. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  435. {
  436. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  437. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  438. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  439. hbqp->next_hbqPutIdx = 0;
  440. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  441. uint32_t raw_index = phba->hbq_get[hbqno];
  442. uint32_t getidx = le32_to_cpu(raw_index);
  443. hbqp->local_hbqGetIdx = getidx;
  444. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  445. lpfc_printf_log(phba, KERN_ERR,
  446. LOG_SLI | LOG_VPORT,
  447. "1802 HBQ %d: local_hbqGetIdx "
  448. "%u is > than hbqp->entry_count %u\n",
  449. hbqno, hbqp->local_hbqGetIdx,
  450. hbqp->entry_count);
  451. phba->link_state = LPFC_HBA_ERROR;
  452. return NULL;
  453. }
  454. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  455. return NULL;
  456. }
  457. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  458. hbqp->hbqPutIdx;
  459. }
  460. void
  461. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  462. {
  463. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  464. struct hbq_dmabuf *hbq_buf;
  465. int i, hbq_count;
  466. hbq_count = lpfc_sli_hbq_count();
  467. /* Return all memory used by all HBQs */
  468. for (i = 0; i < hbq_count; ++i) {
  469. list_for_each_entry_safe(dmabuf, next_dmabuf,
  470. &phba->hbqs[i].hbq_buffer_list, list) {
  471. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  472. list_del(&hbq_buf->dbuf.list);
  473. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  474. }
  475. }
  476. }
  477. static struct lpfc_hbq_entry *
  478. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  479. struct hbq_dmabuf *hbq_buf)
  480. {
  481. struct lpfc_hbq_entry *hbqe;
  482. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  483. /* Get next HBQ entry slot to use */
  484. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  485. if (hbqe) {
  486. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  487. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  488. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  489. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  490. hbqe->bde.tus.f.bdeFlags = 0;
  491. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  492. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  493. /* Sync SLIM */
  494. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  495. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  496. /* flush */
  497. readl(phba->hbq_put + hbqno);
  498. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  499. }
  500. return hbqe;
  501. }
  502. static struct lpfc_hbq_init lpfc_els_hbq = {
  503. .rn = 1,
  504. .entry_count = 200,
  505. .mask_count = 0,
  506. .profile = 0,
  507. .ring_mask = (1 << LPFC_ELS_RING),
  508. .buffer_count = 0,
  509. .init_count = 20,
  510. .add_count = 5,
  511. };
  512. static struct lpfc_hbq_init lpfc_extra_hbq = {
  513. .rn = 1,
  514. .entry_count = 200,
  515. .mask_count = 0,
  516. .profile = 0,
  517. .ring_mask = (1 << LPFC_EXTRA_RING),
  518. .buffer_count = 0,
  519. .init_count = 0,
  520. .add_count = 5,
  521. };
  522. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  523. &lpfc_els_hbq,
  524. &lpfc_extra_hbq,
  525. };
  526. static int
  527. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  528. {
  529. uint32_t i, start, end;
  530. struct hbq_dmabuf *hbq_buffer;
  531. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  532. return 0;
  533. }
  534. start = lpfc_hbq_defs[hbqno]->buffer_count;
  535. end = count + lpfc_hbq_defs[hbqno]->buffer_count;
  536. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  537. end = lpfc_hbq_defs[hbqno]->entry_count;
  538. }
  539. /* Populate HBQ entries */
  540. for (i = start; i < end; i++) {
  541. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  542. if (!hbq_buffer)
  543. return 1;
  544. hbq_buffer->tag = (i | (hbqno << 16));
  545. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  546. lpfc_hbq_defs[hbqno]->buffer_count++;
  547. else
  548. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  549. }
  550. return 0;
  551. }
  552. int
  553. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  554. {
  555. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  556. lpfc_hbq_defs[qno]->add_count));
  557. }
  558. int
  559. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  560. {
  561. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  562. lpfc_hbq_defs[qno]->init_count));
  563. }
  564. struct hbq_dmabuf *
  565. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  566. {
  567. struct lpfc_dmabuf *d_buf;
  568. struct hbq_dmabuf *hbq_buf;
  569. uint32_t hbqno;
  570. hbqno = tag >> 16;
  571. if (hbqno >= LPFC_MAX_HBQS)
  572. return NULL;
  573. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  574. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  575. if (hbq_buf->tag == tag) {
  576. return hbq_buf;
  577. }
  578. }
  579. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  580. "1803 Bad hbq tag. Data: x%x x%x\n",
  581. tag, lpfc_hbq_defs[tag >> 16]->buffer_count);
  582. return NULL;
  583. }
  584. void
  585. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  586. {
  587. uint32_t hbqno;
  588. if (hbq_buffer) {
  589. hbqno = hbq_buffer->tag >> 16;
  590. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  591. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  592. }
  593. }
  594. }
  595. static int
  596. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  597. {
  598. uint8_t ret;
  599. switch (mbxCommand) {
  600. case MBX_LOAD_SM:
  601. case MBX_READ_NV:
  602. case MBX_WRITE_NV:
  603. case MBX_RUN_BIU_DIAG:
  604. case MBX_INIT_LINK:
  605. case MBX_DOWN_LINK:
  606. case MBX_CONFIG_LINK:
  607. case MBX_CONFIG_RING:
  608. case MBX_RESET_RING:
  609. case MBX_READ_CONFIG:
  610. case MBX_READ_RCONFIG:
  611. case MBX_READ_SPARM:
  612. case MBX_READ_STATUS:
  613. case MBX_READ_RPI:
  614. case MBX_READ_XRI:
  615. case MBX_READ_REV:
  616. case MBX_READ_LNK_STAT:
  617. case MBX_REG_LOGIN:
  618. case MBX_UNREG_LOGIN:
  619. case MBX_READ_LA:
  620. case MBX_CLEAR_LA:
  621. case MBX_DUMP_MEMORY:
  622. case MBX_DUMP_CONTEXT:
  623. case MBX_RUN_DIAGS:
  624. case MBX_RESTART:
  625. case MBX_UPDATE_CFG:
  626. case MBX_DOWN_LOAD:
  627. case MBX_DEL_LD_ENTRY:
  628. case MBX_RUN_PROGRAM:
  629. case MBX_SET_MASK:
  630. case MBX_SET_SLIM:
  631. case MBX_UNREG_D_ID:
  632. case MBX_KILL_BOARD:
  633. case MBX_CONFIG_FARP:
  634. case MBX_BEACON:
  635. case MBX_LOAD_AREA:
  636. case MBX_RUN_BIU_DIAG64:
  637. case MBX_CONFIG_PORT:
  638. case MBX_READ_SPARM64:
  639. case MBX_READ_RPI64:
  640. case MBX_REG_LOGIN64:
  641. case MBX_READ_LA64:
  642. case MBX_FLASH_WR_ULA:
  643. case MBX_SET_DEBUG:
  644. case MBX_LOAD_EXP_ROM:
  645. case MBX_ASYNCEVT_ENABLE:
  646. case MBX_REG_VPI:
  647. case MBX_UNREG_VPI:
  648. case MBX_HEARTBEAT:
  649. ret = mbxCommand;
  650. break;
  651. default:
  652. ret = MBX_SHUTDOWN;
  653. break;
  654. }
  655. return ret;
  656. }
  657. static void
  658. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  659. {
  660. wait_queue_head_t *pdone_q;
  661. unsigned long drvr_flag;
  662. /*
  663. * If pdone_q is empty, the driver thread gave up waiting and
  664. * continued running.
  665. */
  666. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  667. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  668. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  669. if (pdone_q)
  670. wake_up_interruptible(pdone_q);
  671. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  672. return;
  673. }
  674. void
  675. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  676. {
  677. struct lpfc_dmabuf *mp;
  678. uint16_t rpi;
  679. int rc;
  680. mp = (struct lpfc_dmabuf *) (pmb->context1);
  681. if (mp) {
  682. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  683. kfree(mp);
  684. }
  685. /*
  686. * If a REG_LOGIN succeeded after node is destroyed or node
  687. * is in re-discovery driver need to cleanup the RPI.
  688. */
  689. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  690. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  691. !pmb->mb.mbxStatus) {
  692. rpi = pmb->mb.un.varWords[0];
  693. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  694. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  695. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  696. if (rc != MBX_NOT_FINISHED)
  697. return;
  698. }
  699. mempool_free(pmb, phba->mbox_mem_pool);
  700. return;
  701. }
  702. int
  703. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  704. {
  705. MAILBOX_t *pmbox;
  706. LPFC_MBOXQ_t *pmb;
  707. int rc;
  708. LIST_HEAD(cmplq);
  709. phba->sli.slistat.mbox_event++;
  710. /* Get all completed mailboxe buffers into the cmplq */
  711. spin_lock_irq(&phba->hbalock);
  712. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  713. spin_unlock_irq(&phba->hbalock);
  714. /* Get a Mailbox buffer to setup mailbox commands for callback */
  715. do {
  716. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  717. if (pmb == NULL)
  718. break;
  719. pmbox = &pmb->mb;
  720. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  721. if (pmb->vport) {
  722. lpfc_debugfs_disc_trc(pmb->vport,
  723. LPFC_DISC_TRC_MBOX_VPORT,
  724. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  725. (uint32_t)pmbox->mbxCommand,
  726. pmbox->un.varWords[0],
  727. pmbox->un.varWords[1]);
  728. }
  729. else {
  730. lpfc_debugfs_disc_trc(phba->pport,
  731. LPFC_DISC_TRC_MBOX,
  732. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  733. (uint32_t)pmbox->mbxCommand,
  734. pmbox->un.varWords[0],
  735. pmbox->un.varWords[1]);
  736. }
  737. }
  738. /*
  739. * It is a fatal error if unknown mbox command completion.
  740. */
  741. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  742. MBX_SHUTDOWN) {
  743. /* Unknow mailbox command compl */
  744. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  745. "(%d):0323 Unknown Mailbox command "
  746. "%x Cmpl\n",
  747. pmb->vport ? pmb->vport->vpi : 0,
  748. pmbox->mbxCommand);
  749. phba->link_state = LPFC_HBA_ERROR;
  750. phba->work_hs = HS_FFER3;
  751. lpfc_handle_eratt(phba);
  752. continue;
  753. }
  754. if (pmbox->mbxStatus) {
  755. phba->sli.slistat.mbox_stat_err++;
  756. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  757. /* Mbox cmd cmpl error - RETRYing */
  758. lpfc_printf_log(phba, KERN_INFO,
  759. LOG_MBOX | LOG_SLI,
  760. "(%d):0305 Mbox cmd cmpl "
  761. "error - RETRYing Data: x%x "
  762. "x%x x%x x%x\n",
  763. pmb->vport ? pmb->vport->vpi :0,
  764. pmbox->mbxCommand,
  765. pmbox->mbxStatus,
  766. pmbox->un.varWords[0],
  767. pmb->vport->port_state);
  768. pmbox->mbxStatus = 0;
  769. pmbox->mbxOwner = OWN_HOST;
  770. spin_lock_irq(&phba->hbalock);
  771. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  772. spin_unlock_irq(&phba->hbalock);
  773. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  774. if (rc == MBX_SUCCESS)
  775. continue;
  776. }
  777. }
  778. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  779. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  780. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  781. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  782. pmb->vport ? pmb->vport->vpi : 0,
  783. pmbox->mbxCommand,
  784. pmb->mbox_cmpl,
  785. *((uint32_t *) pmbox),
  786. pmbox->un.varWords[0],
  787. pmbox->un.varWords[1],
  788. pmbox->un.varWords[2],
  789. pmbox->un.varWords[3],
  790. pmbox->un.varWords[4],
  791. pmbox->un.varWords[5],
  792. pmbox->un.varWords[6],
  793. pmbox->un.varWords[7]);
  794. if (pmb->mbox_cmpl)
  795. pmb->mbox_cmpl(phba,pmb);
  796. } while (1);
  797. return 0;
  798. }
  799. static struct lpfc_dmabuf *
  800. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  801. {
  802. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  803. uint32_t hbqno;
  804. void *virt; /* virtual address ptr */
  805. dma_addr_t phys; /* mapped address */
  806. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  807. if (hbq_entry == NULL)
  808. return NULL;
  809. list_del(&hbq_entry->dbuf.list);
  810. hbqno = tag >> 16;
  811. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  812. if (new_hbq_entry == NULL)
  813. return &hbq_entry->dbuf;
  814. new_hbq_entry->tag = -1;
  815. phys = new_hbq_entry->dbuf.phys;
  816. virt = new_hbq_entry->dbuf.virt;
  817. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  818. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  819. hbq_entry->dbuf.phys = phys;
  820. hbq_entry->dbuf.virt = virt;
  821. lpfc_sli_free_hbq(phba, hbq_entry);
  822. return &new_hbq_entry->dbuf;
  823. }
  824. static int
  825. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  826. struct lpfc_iocbq *saveq)
  827. {
  828. IOCB_t * irsp;
  829. WORD5 * w5p;
  830. uint32_t Rctl, Type;
  831. uint32_t match, i;
  832. match = 0;
  833. irsp = &(saveq->iocb);
  834. if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
  835. if (pring->lpfc_sli_rcv_async_status)
  836. pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
  837. else
  838. lpfc_printf_log(phba,
  839. KERN_WARNING,
  840. LOG_SLI,
  841. "0316 Ring %d handler: unexpected "
  842. "ASYNC_STATUS iocb received evt_code "
  843. "0x%x\n",
  844. pring->ringno,
  845. irsp->un.asyncstat.evt_code);
  846. return 1;
  847. }
  848. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  849. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  850. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  851. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  852. Rctl = FC_ELS_REQ;
  853. Type = FC_ELS_DATA;
  854. } else {
  855. w5p =
  856. (WORD5 *) & (saveq->iocb.un.
  857. ulpWord[5]);
  858. Rctl = w5p->hcsw.Rctl;
  859. Type = w5p->hcsw.Type;
  860. /* Firmware Workaround */
  861. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  862. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  863. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  864. Rctl = FC_ELS_REQ;
  865. Type = FC_ELS_DATA;
  866. w5p->hcsw.Rctl = Rctl;
  867. w5p->hcsw.Type = Type;
  868. }
  869. }
  870. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  871. if (irsp->ulpBdeCount != 0)
  872. saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
  873. irsp->un.ulpWord[3]);
  874. if (irsp->ulpBdeCount == 2)
  875. saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
  876. irsp->unsli3.sli3Words[7]);
  877. }
  878. /* unSolicited Responses */
  879. if (pring->prt[0].profile) {
  880. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  881. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  882. saveq);
  883. match = 1;
  884. } else {
  885. /* We must search, based on rctl / type
  886. for the right routine */
  887. for (i = 0; i < pring->num_mask;
  888. i++) {
  889. if ((pring->prt[i].rctl ==
  890. Rctl)
  891. && (pring->prt[i].
  892. type == Type)) {
  893. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  894. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  895. (phba, pring, saveq);
  896. match = 1;
  897. break;
  898. }
  899. }
  900. }
  901. if (match == 0) {
  902. /* Unexpected Rctl / Type received */
  903. /* Ring <ringno> handler: unexpected
  904. Rctl <Rctl> Type <Type> received */
  905. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  906. "0313 Ring %d handler: unexpected Rctl x%x "
  907. "Type x%x received\n",
  908. pring->ringno, Rctl, Type);
  909. }
  910. return 1;
  911. }
  912. static struct lpfc_iocbq *
  913. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  914. struct lpfc_sli_ring *pring,
  915. struct lpfc_iocbq *prspiocb)
  916. {
  917. struct lpfc_iocbq *cmd_iocb = NULL;
  918. uint16_t iotag;
  919. iotag = prspiocb->iocb.ulpIoTag;
  920. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  921. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  922. list_del_init(&cmd_iocb->list);
  923. pring->txcmplq_cnt--;
  924. return cmd_iocb;
  925. }
  926. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  927. "0317 iotag x%x is out off "
  928. "range: max iotag x%x wd0 x%x\n",
  929. iotag, phba->sli.last_iotag,
  930. *(((uint32_t *) &prspiocb->iocb) + 7));
  931. return NULL;
  932. }
  933. static int
  934. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  935. struct lpfc_iocbq *saveq)
  936. {
  937. struct lpfc_iocbq *cmdiocbp;
  938. int rc = 1;
  939. unsigned long iflag;
  940. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  941. spin_lock_irqsave(&phba->hbalock, iflag);
  942. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  943. spin_unlock_irqrestore(&phba->hbalock, iflag);
  944. if (cmdiocbp) {
  945. if (cmdiocbp->iocb_cmpl) {
  946. /*
  947. * Post all ELS completions to the worker thread.
  948. * All other are passed to the completion callback.
  949. */
  950. if (pring->ringno == LPFC_ELS_RING) {
  951. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  952. cmdiocbp->iocb_flag &=
  953. ~LPFC_DRIVER_ABORTED;
  954. saveq->iocb.ulpStatus =
  955. IOSTAT_LOCAL_REJECT;
  956. saveq->iocb.un.ulpWord[4] =
  957. IOERR_SLI_ABORTED;
  958. }
  959. }
  960. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  961. } else
  962. lpfc_sli_release_iocbq(phba, cmdiocbp);
  963. } else {
  964. /*
  965. * Unknown initiating command based on the response iotag.
  966. * This could be the case on the ELS ring because of
  967. * lpfc_els_abort().
  968. */
  969. if (pring->ringno != LPFC_ELS_RING) {
  970. /*
  971. * Ring <ringno> handler: unexpected completion IoTag
  972. * <IoTag>
  973. */
  974. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  975. "0322 Ring %d handler: "
  976. "unexpected completion IoTag x%x "
  977. "Data: x%x x%x x%x x%x\n",
  978. pring->ringno,
  979. saveq->iocb.ulpIoTag,
  980. saveq->iocb.ulpStatus,
  981. saveq->iocb.un.ulpWord[4],
  982. saveq->iocb.ulpCommand,
  983. saveq->iocb.ulpContext);
  984. }
  985. }
  986. return rc;
  987. }
  988. static void
  989. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  990. {
  991. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  992. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  993. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  994. /*
  995. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  996. * rsp ring <portRspMax>
  997. */
  998. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  999. "0312 Ring %d handler: portRspPut %d "
  1000. "is bigger then rsp ring %d\n",
  1001. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1002. pring->numRiocb);
  1003. phba->link_state = LPFC_HBA_ERROR;
  1004. /*
  1005. * All error attention handlers are posted to
  1006. * worker thread
  1007. */
  1008. phba->work_ha |= HA_ERATT;
  1009. phba->work_hs = HS_FFER3;
  1010. /* hbalock should already be held */
  1011. if (phba->work_wait)
  1012. lpfc_worker_wake_up(phba);
  1013. return;
  1014. }
  1015. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1016. {
  1017. struct lpfc_sli *psli = &phba->sli;
  1018. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1019. IOCB_t *irsp = NULL;
  1020. IOCB_t *entry = NULL;
  1021. struct lpfc_iocbq *cmdiocbq = NULL;
  1022. struct lpfc_iocbq rspiocbq;
  1023. struct lpfc_pgp *pgp;
  1024. uint32_t status;
  1025. uint32_t portRspPut, portRspMax;
  1026. int type;
  1027. uint32_t rsp_cmpl = 0;
  1028. uint32_t ha_copy;
  1029. unsigned long iflags;
  1030. pring->stats.iocb_event++;
  1031. pgp = (phba->sli_rev == 3) ?
  1032. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1033. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1034. /*
  1035. * The next available response entry should never exceed the maximum
  1036. * entries. If it does, treat it as an adapter hardware error.
  1037. */
  1038. portRspMax = pring->numRiocb;
  1039. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1040. if (unlikely(portRspPut >= portRspMax)) {
  1041. lpfc_sli_rsp_pointers_error(phba, pring);
  1042. return;
  1043. }
  1044. rmb();
  1045. while (pring->rspidx != portRspPut) {
  1046. entry = lpfc_resp_iocb(phba, pring);
  1047. if (++pring->rspidx >= portRspMax)
  1048. pring->rspidx = 0;
  1049. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1050. (uint32_t *) &rspiocbq.iocb,
  1051. phba->iocb_rsp_size);
  1052. irsp = &rspiocbq.iocb;
  1053. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1054. pring->stats.iocb_rsp++;
  1055. rsp_cmpl++;
  1056. if (unlikely(irsp->ulpStatus)) {
  1057. /* Rsp ring <ringno> error: IOCB */
  1058. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1059. "0326 Rsp Ring %d error: IOCB Data: "
  1060. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1061. pring->ringno,
  1062. irsp->un.ulpWord[0],
  1063. irsp->un.ulpWord[1],
  1064. irsp->un.ulpWord[2],
  1065. irsp->un.ulpWord[3],
  1066. irsp->un.ulpWord[4],
  1067. irsp->un.ulpWord[5],
  1068. *(((uint32_t *) irsp) + 6),
  1069. *(((uint32_t *) irsp) + 7));
  1070. }
  1071. switch (type) {
  1072. case LPFC_ABORT_IOCB:
  1073. case LPFC_SOL_IOCB:
  1074. /*
  1075. * Idle exchange closed via ABTS from port. No iocb
  1076. * resources need to be recovered.
  1077. */
  1078. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1079. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1080. "0314 IOCB cmd 0x%x "
  1081. "processed. Skipping "
  1082. "completion",
  1083. irsp->ulpCommand);
  1084. break;
  1085. }
  1086. spin_lock_irqsave(&phba->hbalock, iflags);
  1087. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1088. &rspiocbq);
  1089. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1090. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1091. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1092. &rspiocbq);
  1093. }
  1094. break;
  1095. default:
  1096. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1097. char adaptermsg[LPFC_MAX_ADPTMSG];
  1098. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1099. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1100. MAX_MSG_DATA);
  1101. dev_warn(&((phba->pcidev)->dev),
  1102. "lpfc%d: %s\n",
  1103. phba->brd_no, adaptermsg);
  1104. } else {
  1105. /* Unknown IOCB command */
  1106. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1107. "0321 Unknown IOCB command "
  1108. "Data: x%x, x%x x%x x%x x%x\n",
  1109. type, irsp->ulpCommand,
  1110. irsp->ulpStatus,
  1111. irsp->ulpIoTag,
  1112. irsp->ulpContext);
  1113. }
  1114. break;
  1115. }
  1116. /*
  1117. * The response IOCB has been processed. Update the ring
  1118. * pointer in SLIM. If the port response put pointer has not
  1119. * been updated, sync the pgp->rspPutInx and fetch the new port
  1120. * response put pointer.
  1121. */
  1122. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1123. if (pring->rspidx == portRspPut)
  1124. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1125. }
  1126. ha_copy = readl(phba->HAregaddr);
  1127. ha_copy >>= (LPFC_FCP_RING * 4);
  1128. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1129. spin_lock_irqsave(&phba->hbalock, iflags);
  1130. pring->stats.iocb_rsp_full++;
  1131. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1132. writel(status, phba->CAregaddr);
  1133. readl(phba->CAregaddr);
  1134. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1135. }
  1136. if ((ha_copy & HA_R0CE_RSP) &&
  1137. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1138. spin_lock_irqsave(&phba->hbalock, iflags);
  1139. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1140. pring->stats.iocb_cmd_empty++;
  1141. /* Force update of the local copy of cmdGetInx */
  1142. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1143. lpfc_sli_resume_iocb(phba, pring);
  1144. if ((pring->lpfc_sli_cmd_available))
  1145. (pring->lpfc_sli_cmd_available) (phba, pring);
  1146. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1147. }
  1148. return;
  1149. }
  1150. /*
  1151. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1152. * to check it explicitly.
  1153. */
  1154. static int
  1155. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1156. struct lpfc_sli_ring *pring, uint32_t mask)
  1157. {
  1158. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1159. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1160. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1161. IOCB_t *irsp = NULL;
  1162. IOCB_t *entry = NULL;
  1163. struct lpfc_iocbq *cmdiocbq = NULL;
  1164. struct lpfc_iocbq rspiocbq;
  1165. uint32_t status;
  1166. uint32_t portRspPut, portRspMax;
  1167. int rc = 1;
  1168. lpfc_iocb_type type;
  1169. unsigned long iflag;
  1170. uint32_t rsp_cmpl = 0;
  1171. spin_lock_irqsave(&phba->hbalock, iflag);
  1172. pring->stats.iocb_event++;
  1173. /*
  1174. * The next available response entry should never exceed the maximum
  1175. * entries. If it does, treat it as an adapter hardware error.
  1176. */
  1177. portRspMax = pring->numRiocb;
  1178. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1179. if (unlikely(portRspPut >= portRspMax)) {
  1180. lpfc_sli_rsp_pointers_error(phba, pring);
  1181. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1182. return 1;
  1183. }
  1184. rmb();
  1185. while (pring->rspidx != portRspPut) {
  1186. /*
  1187. * Fetch an entry off the ring and copy it into a local data
  1188. * structure. The copy involves a byte-swap since the
  1189. * network byte order and pci byte orders are different.
  1190. */
  1191. entry = lpfc_resp_iocb(phba, pring);
  1192. phba->last_completion_time = jiffies;
  1193. if (++pring->rspidx >= portRspMax)
  1194. pring->rspidx = 0;
  1195. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1196. (uint32_t *) &rspiocbq.iocb,
  1197. phba->iocb_rsp_size);
  1198. INIT_LIST_HEAD(&(rspiocbq.list));
  1199. irsp = &rspiocbq.iocb;
  1200. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1201. pring->stats.iocb_rsp++;
  1202. rsp_cmpl++;
  1203. if (unlikely(irsp->ulpStatus)) {
  1204. /*
  1205. * If resource errors reported from HBA, reduce
  1206. * queuedepths of the SCSI device.
  1207. */
  1208. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1209. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1210. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1211. lpfc_adjust_queue_depth(phba);
  1212. spin_lock_irqsave(&phba->hbalock, iflag);
  1213. }
  1214. /* Rsp ring <ringno> error: IOCB */
  1215. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1216. "0336 Rsp Ring %d error: IOCB Data: "
  1217. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1218. pring->ringno,
  1219. irsp->un.ulpWord[0],
  1220. irsp->un.ulpWord[1],
  1221. irsp->un.ulpWord[2],
  1222. irsp->un.ulpWord[3],
  1223. irsp->un.ulpWord[4],
  1224. irsp->un.ulpWord[5],
  1225. *(((uint32_t *) irsp) + 6),
  1226. *(((uint32_t *) irsp) + 7));
  1227. }
  1228. switch (type) {
  1229. case LPFC_ABORT_IOCB:
  1230. case LPFC_SOL_IOCB:
  1231. /*
  1232. * Idle exchange closed via ABTS from port. No iocb
  1233. * resources need to be recovered.
  1234. */
  1235. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1236. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1237. "0333 IOCB cmd 0x%x"
  1238. " processed. Skipping"
  1239. " completion\n",
  1240. irsp->ulpCommand);
  1241. break;
  1242. }
  1243. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1244. &rspiocbq);
  1245. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1246. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1247. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1248. &rspiocbq);
  1249. } else {
  1250. spin_unlock_irqrestore(&phba->hbalock,
  1251. iflag);
  1252. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1253. &rspiocbq);
  1254. spin_lock_irqsave(&phba->hbalock,
  1255. iflag);
  1256. }
  1257. }
  1258. break;
  1259. case LPFC_UNSOL_IOCB:
  1260. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1261. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1262. spin_lock_irqsave(&phba->hbalock, iflag);
  1263. break;
  1264. default:
  1265. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1266. char adaptermsg[LPFC_MAX_ADPTMSG];
  1267. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1268. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1269. MAX_MSG_DATA);
  1270. dev_warn(&((phba->pcidev)->dev),
  1271. "lpfc%d: %s\n",
  1272. phba->brd_no, adaptermsg);
  1273. } else {
  1274. /* Unknown IOCB command */
  1275. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1276. "0334 Unknown IOCB command "
  1277. "Data: x%x, x%x x%x x%x x%x\n",
  1278. type, irsp->ulpCommand,
  1279. irsp->ulpStatus,
  1280. irsp->ulpIoTag,
  1281. irsp->ulpContext);
  1282. }
  1283. break;
  1284. }
  1285. /*
  1286. * The response IOCB has been processed. Update the ring
  1287. * pointer in SLIM. If the port response put pointer has not
  1288. * been updated, sync the pgp->rspPutInx and fetch the new port
  1289. * response put pointer.
  1290. */
  1291. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1292. if (pring->rspidx == portRspPut)
  1293. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1294. }
  1295. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1296. pring->stats.iocb_rsp_full++;
  1297. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1298. writel(status, phba->CAregaddr);
  1299. readl(phba->CAregaddr);
  1300. }
  1301. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1302. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1303. pring->stats.iocb_cmd_empty++;
  1304. /* Force update of the local copy of cmdGetInx */
  1305. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1306. lpfc_sli_resume_iocb(phba, pring);
  1307. if ((pring->lpfc_sli_cmd_available))
  1308. (pring->lpfc_sli_cmd_available) (phba, pring);
  1309. }
  1310. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1311. return rc;
  1312. }
  1313. int
  1314. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1315. struct lpfc_sli_ring *pring, uint32_t mask)
  1316. {
  1317. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1318. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1319. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1320. IOCB_t *entry;
  1321. IOCB_t *irsp = NULL;
  1322. struct lpfc_iocbq *rspiocbp = NULL;
  1323. struct lpfc_iocbq *next_iocb;
  1324. struct lpfc_iocbq *cmdiocbp;
  1325. struct lpfc_iocbq *saveq;
  1326. uint8_t iocb_cmd_type;
  1327. lpfc_iocb_type type;
  1328. uint32_t status, free_saveq;
  1329. uint32_t portRspPut, portRspMax;
  1330. int rc = 1;
  1331. unsigned long iflag;
  1332. spin_lock_irqsave(&phba->hbalock, iflag);
  1333. pring->stats.iocb_event++;
  1334. /*
  1335. * The next available response entry should never exceed the maximum
  1336. * entries. If it does, treat it as an adapter hardware error.
  1337. */
  1338. portRspMax = pring->numRiocb;
  1339. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1340. if (portRspPut >= portRspMax) {
  1341. /*
  1342. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1343. * rsp ring <portRspMax>
  1344. */
  1345. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1346. "0303 Ring %d handler: portRspPut %d "
  1347. "is bigger then rsp ring %d\n",
  1348. pring->ringno, portRspPut, portRspMax);
  1349. phba->link_state = LPFC_HBA_ERROR;
  1350. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1351. phba->work_hs = HS_FFER3;
  1352. lpfc_handle_eratt(phba);
  1353. return 1;
  1354. }
  1355. rmb();
  1356. while (pring->rspidx != portRspPut) {
  1357. /*
  1358. * Build a completion list and call the appropriate handler.
  1359. * The process is to get the next available response iocb, get
  1360. * a free iocb from the list, copy the response data into the
  1361. * free iocb, insert to the continuation list, and update the
  1362. * next response index to slim. This process makes response
  1363. * iocb's in the ring available to DMA as fast as possible but
  1364. * pays a penalty for a copy operation. Since the iocb is
  1365. * only 32 bytes, this penalty is considered small relative to
  1366. * the PCI reads for register values and a slim write. When
  1367. * the ulpLe field is set, the entire Command has been
  1368. * received.
  1369. */
  1370. entry = lpfc_resp_iocb(phba, pring);
  1371. phba->last_completion_time = jiffies;
  1372. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1373. if (rspiocbp == NULL) {
  1374. printk(KERN_ERR "%s: out of buffers! Failing "
  1375. "completion.\n", __FUNCTION__);
  1376. break;
  1377. }
  1378. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1379. phba->iocb_rsp_size);
  1380. irsp = &rspiocbp->iocb;
  1381. if (++pring->rspidx >= portRspMax)
  1382. pring->rspidx = 0;
  1383. if (pring->ringno == LPFC_ELS_RING) {
  1384. lpfc_debugfs_slow_ring_trc(phba,
  1385. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1386. *(((uint32_t *) irsp) + 4),
  1387. *(((uint32_t *) irsp) + 6),
  1388. *(((uint32_t *) irsp) + 7));
  1389. }
  1390. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1391. if (list_empty(&(pring->iocb_continueq))) {
  1392. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1393. } else {
  1394. list_add_tail(&rspiocbp->list,
  1395. &(pring->iocb_continueq));
  1396. }
  1397. pring->iocb_continueq_cnt++;
  1398. if (irsp->ulpLe) {
  1399. /*
  1400. * By default, the driver expects to free all resources
  1401. * associated with this iocb completion.
  1402. */
  1403. free_saveq = 1;
  1404. saveq = list_get_first(&pring->iocb_continueq,
  1405. struct lpfc_iocbq, list);
  1406. irsp = &(saveq->iocb);
  1407. list_del_init(&pring->iocb_continueq);
  1408. pring->iocb_continueq_cnt = 0;
  1409. pring->stats.iocb_rsp++;
  1410. /*
  1411. * If resource errors reported from HBA, reduce
  1412. * queuedepths of the SCSI device.
  1413. */
  1414. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1415. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1416. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1417. lpfc_adjust_queue_depth(phba);
  1418. spin_lock_irqsave(&phba->hbalock, iflag);
  1419. }
  1420. if (irsp->ulpStatus) {
  1421. /* Rsp ring <ringno> error: IOCB */
  1422. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1423. "0328 Rsp Ring %d error: "
  1424. "IOCB Data: "
  1425. "x%x x%x x%x x%x "
  1426. "x%x x%x x%x x%x "
  1427. "x%x x%x x%x x%x "
  1428. "x%x x%x x%x x%x\n",
  1429. pring->ringno,
  1430. irsp->un.ulpWord[0],
  1431. irsp->un.ulpWord[1],
  1432. irsp->un.ulpWord[2],
  1433. irsp->un.ulpWord[3],
  1434. irsp->un.ulpWord[4],
  1435. irsp->un.ulpWord[5],
  1436. *(((uint32_t *) irsp) + 6),
  1437. *(((uint32_t *) irsp) + 7),
  1438. *(((uint32_t *) irsp) + 8),
  1439. *(((uint32_t *) irsp) + 9),
  1440. *(((uint32_t *) irsp) + 10),
  1441. *(((uint32_t *) irsp) + 11),
  1442. *(((uint32_t *) irsp) + 12),
  1443. *(((uint32_t *) irsp) + 13),
  1444. *(((uint32_t *) irsp) + 14),
  1445. *(((uint32_t *) irsp) + 15));
  1446. }
  1447. /*
  1448. * Fetch the IOCB command type and call the correct
  1449. * completion routine. Solicited and Unsolicited
  1450. * IOCBs on the ELS ring get freed back to the
  1451. * lpfc_iocb_list by the discovery kernel thread.
  1452. */
  1453. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1454. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1455. if (type == LPFC_SOL_IOCB) {
  1456. spin_unlock_irqrestore(&phba->hbalock,
  1457. iflag);
  1458. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1459. saveq);
  1460. spin_lock_irqsave(&phba->hbalock, iflag);
  1461. } else if (type == LPFC_UNSOL_IOCB) {
  1462. spin_unlock_irqrestore(&phba->hbalock,
  1463. iflag);
  1464. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1465. saveq);
  1466. spin_lock_irqsave(&phba->hbalock, iflag);
  1467. } else if (type == LPFC_ABORT_IOCB) {
  1468. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1469. ((cmdiocbp =
  1470. lpfc_sli_iocbq_lookup(phba, pring,
  1471. saveq)))) {
  1472. /* Call the specified completion
  1473. routine */
  1474. if (cmdiocbp->iocb_cmpl) {
  1475. spin_unlock_irqrestore(
  1476. &phba->hbalock,
  1477. iflag);
  1478. (cmdiocbp->iocb_cmpl) (phba,
  1479. cmdiocbp, saveq);
  1480. spin_lock_irqsave(
  1481. &phba->hbalock,
  1482. iflag);
  1483. } else
  1484. __lpfc_sli_release_iocbq(phba,
  1485. cmdiocbp);
  1486. }
  1487. } else if (type == LPFC_UNKNOWN_IOCB) {
  1488. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1489. char adaptermsg[LPFC_MAX_ADPTMSG];
  1490. memset(adaptermsg, 0,
  1491. LPFC_MAX_ADPTMSG);
  1492. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1493. MAX_MSG_DATA);
  1494. dev_warn(&((phba->pcidev)->dev),
  1495. "lpfc%d: %s\n",
  1496. phba->brd_no, adaptermsg);
  1497. } else {
  1498. /* Unknown IOCB command */
  1499. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1500. "0335 Unknown IOCB "
  1501. "command Data: x%x "
  1502. "x%x x%x x%x\n",
  1503. irsp->ulpCommand,
  1504. irsp->ulpStatus,
  1505. irsp->ulpIoTag,
  1506. irsp->ulpContext);
  1507. }
  1508. }
  1509. if (free_saveq) {
  1510. list_for_each_entry_safe(rspiocbp, next_iocb,
  1511. &saveq->list, list) {
  1512. list_del(&rspiocbp->list);
  1513. __lpfc_sli_release_iocbq(phba,
  1514. rspiocbp);
  1515. }
  1516. __lpfc_sli_release_iocbq(phba, saveq);
  1517. }
  1518. rspiocbp = NULL;
  1519. }
  1520. /*
  1521. * If the port response put pointer has not been updated, sync
  1522. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1523. * response put pointer.
  1524. */
  1525. if (pring->rspidx == portRspPut) {
  1526. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1527. }
  1528. } /* while (pring->rspidx != portRspPut) */
  1529. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1530. /* At least one response entry has been freed */
  1531. pring->stats.iocb_rsp_full++;
  1532. /* SET RxRE_RSP in Chip Att register */
  1533. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1534. writel(status, phba->CAregaddr);
  1535. readl(phba->CAregaddr); /* flush */
  1536. }
  1537. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1538. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1539. pring->stats.iocb_cmd_empty++;
  1540. /* Force update of the local copy of cmdGetInx */
  1541. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1542. lpfc_sli_resume_iocb(phba, pring);
  1543. if ((pring->lpfc_sli_cmd_available))
  1544. (pring->lpfc_sli_cmd_available) (phba, pring);
  1545. }
  1546. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1547. return rc;
  1548. }
  1549. void
  1550. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1551. {
  1552. LIST_HEAD(completions);
  1553. struct lpfc_iocbq *iocb, *next_iocb;
  1554. IOCB_t *cmd = NULL;
  1555. if (pring->ringno == LPFC_ELS_RING) {
  1556. lpfc_fabric_abort_hba(phba);
  1557. }
  1558. /* Error everything on txq and txcmplq
  1559. * First do the txq.
  1560. */
  1561. spin_lock_irq(&phba->hbalock);
  1562. list_splice_init(&pring->txq, &completions);
  1563. pring->txq_cnt = 0;
  1564. /* Next issue ABTS for everything on the txcmplq */
  1565. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1566. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1567. spin_unlock_irq(&phba->hbalock);
  1568. while (!list_empty(&completions)) {
  1569. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1570. cmd = &iocb->iocb;
  1571. list_del_init(&iocb->list);
  1572. if (!iocb->iocb_cmpl)
  1573. lpfc_sli_release_iocbq(phba, iocb);
  1574. else {
  1575. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1576. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1577. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1578. }
  1579. }
  1580. }
  1581. int
  1582. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1583. {
  1584. uint32_t status;
  1585. int i = 0;
  1586. int retval = 0;
  1587. /* Read the HBA Host Status Register */
  1588. status = readl(phba->HSregaddr);
  1589. /*
  1590. * Check status register every 100ms for 5 retries, then every
  1591. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1592. * every 2.5 sec for 4.
  1593. * Break our of the loop if errors occurred during init.
  1594. */
  1595. while (((status & mask) != mask) &&
  1596. !(status & HS_FFERM) &&
  1597. i++ < 20) {
  1598. if (i <= 5)
  1599. msleep(10);
  1600. else if (i <= 10)
  1601. msleep(500);
  1602. else
  1603. msleep(2500);
  1604. if (i == 15) {
  1605. /* Do post */
  1606. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1607. lpfc_sli_brdrestart(phba);
  1608. }
  1609. /* Read the HBA Host Status Register */
  1610. status = readl(phba->HSregaddr);
  1611. }
  1612. /* Check to see if any errors occurred during init */
  1613. if ((status & HS_FFERM) || (i >= 20)) {
  1614. phba->link_state = LPFC_HBA_ERROR;
  1615. retval = 1;
  1616. }
  1617. return retval;
  1618. }
  1619. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1620. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1621. {
  1622. uint32_t __iomem *resp_buf;
  1623. uint32_t __iomem *mbox_buf;
  1624. volatile uint32_t mbox;
  1625. uint32_t hc_copy;
  1626. int i;
  1627. uint8_t hdrtype;
  1628. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1629. if (hdrtype != 0x80 ||
  1630. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1631. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1632. return;
  1633. /*
  1634. * Tell the other part of the chip to suspend temporarily all
  1635. * its DMA activity.
  1636. */
  1637. resp_buf = phba->MBslimaddr;
  1638. /* Disable the error attention */
  1639. hc_copy = readl(phba->HCregaddr);
  1640. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1641. readl(phba->HCregaddr); /* flush */
  1642. phba->link_flag |= LS_IGNORE_ERATT;
  1643. if (readl(phba->HAregaddr) & HA_ERATT) {
  1644. /* Clear Chip error bit */
  1645. writel(HA_ERATT, phba->HAregaddr);
  1646. phba->pport->stopped = 1;
  1647. }
  1648. mbox = 0;
  1649. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1650. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1651. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1652. mbox_buf = phba->MBslimaddr;
  1653. writel(mbox, mbox_buf);
  1654. for (i = 0;
  1655. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1656. mdelay(1);
  1657. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1658. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1659. phba->pport->stopped)
  1660. goto restore_hc;
  1661. else
  1662. goto clear_errat;
  1663. }
  1664. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1665. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1666. mdelay(1);
  1667. clear_errat:
  1668. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1669. mdelay(1);
  1670. if (readl(phba->HAregaddr) & HA_ERATT) {
  1671. writel(HA_ERATT, phba->HAregaddr);
  1672. phba->pport->stopped = 1;
  1673. }
  1674. restore_hc:
  1675. phba->link_flag &= ~LS_IGNORE_ERATT;
  1676. writel(hc_copy, phba->HCregaddr);
  1677. readl(phba->HCregaddr); /* flush */
  1678. }
  1679. int
  1680. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1681. {
  1682. struct lpfc_sli *psli;
  1683. LPFC_MBOXQ_t *pmb;
  1684. uint32_t status;
  1685. uint32_t ha_copy;
  1686. int retval;
  1687. int i = 0;
  1688. psli = &phba->sli;
  1689. /* Kill HBA */
  1690. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1691. "0329 Kill HBA Data: x%x x%x\n",
  1692. phba->pport->port_state, psli->sli_flag);
  1693. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1694. GFP_KERNEL)) == 0)
  1695. return 1;
  1696. /* Disable the error attention */
  1697. spin_lock_irq(&phba->hbalock);
  1698. status = readl(phba->HCregaddr);
  1699. status &= ~HC_ERINT_ENA;
  1700. writel(status, phba->HCregaddr);
  1701. readl(phba->HCregaddr); /* flush */
  1702. phba->link_flag |= LS_IGNORE_ERATT;
  1703. spin_unlock_irq(&phba->hbalock);
  1704. lpfc_kill_board(phba, pmb);
  1705. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1706. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1707. if (retval != MBX_SUCCESS) {
  1708. if (retval != MBX_BUSY)
  1709. mempool_free(pmb, phba->mbox_mem_pool);
  1710. spin_lock_irq(&phba->hbalock);
  1711. phba->link_flag &= ~LS_IGNORE_ERATT;
  1712. spin_unlock_irq(&phba->hbalock);
  1713. return 1;
  1714. }
  1715. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1716. mempool_free(pmb, phba->mbox_mem_pool);
  1717. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1718. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1719. * 3 seconds we still set HBA_ERROR state because the status of the
  1720. * board is now undefined.
  1721. */
  1722. ha_copy = readl(phba->HAregaddr);
  1723. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1724. mdelay(100);
  1725. ha_copy = readl(phba->HAregaddr);
  1726. }
  1727. del_timer_sync(&psli->mbox_tmo);
  1728. if (ha_copy & HA_ERATT) {
  1729. writel(HA_ERATT, phba->HAregaddr);
  1730. phba->pport->stopped = 1;
  1731. }
  1732. spin_lock_irq(&phba->hbalock);
  1733. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1734. phba->link_flag &= ~LS_IGNORE_ERATT;
  1735. spin_unlock_irq(&phba->hbalock);
  1736. psli->mbox_active = NULL;
  1737. lpfc_hba_down_post(phba);
  1738. phba->link_state = LPFC_HBA_ERROR;
  1739. return ha_copy & HA_ERATT ? 0 : 1;
  1740. }
  1741. int
  1742. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1743. {
  1744. struct lpfc_sli *psli;
  1745. struct lpfc_sli_ring *pring;
  1746. uint16_t cfg_value;
  1747. int i;
  1748. psli = &phba->sli;
  1749. /* Reset HBA */
  1750. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1751. "0325 Reset HBA Data: x%x x%x\n",
  1752. phba->pport->port_state, psli->sli_flag);
  1753. /* perform board reset */
  1754. phba->fc_eventTag = 0;
  1755. phba->pport->fc_myDID = 0;
  1756. phba->pport->fc_prevDID = 0;
  1757. /* Turn off parity checking and serr during the physical reset */
  1758. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1759. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1760. (cfg_value &
  1761. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1762. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1763. /* Now toggle INITFF bit in the Host Control Register */
  1764. writel(HC_INITFF, phba->HCregaddr);
  1765. mdelay(1);
  1766. readl(phba->HCregaddr); /* flush */
  1767. writel(0, phba->HCregaddr);
  1768. readl(phba->HCregaddr); /* flush */
  1769. /* Restore PCI cmd register */
  1770. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1771. /* Initialize relevant SLI info */
  1772. for (i = 0; i < psli->num_rings; i++) {
  1773. pring = &psli->ring[i];
  1774. pring->flag = 0;
  1775. pring->rspidx = 0;
  1776. pring->next_cmdidx = 0;
  1777. pring->local_getidx = 0;
  1778. pring->cmdidx = 0;
  1779. pring->missbufcnt = 0;
  1780. }
  1781. phba->link_state = LPFC_WARM_START;
  1782. return 0;
  1783. }
  1784. int
  1785. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1786. {
  1787. MAILBOX_t *mb;
  1788. struct lpfc_sli *psli;
  1789. uint16_t skip_post;
  1790. volatile uint32_t word0;
  1791. void __iomem *to_slim;
  1792. spin_lock_irq(&phba->hbalock);
  1793. psli = &phba->sli;
  1794. /* Restart HBA */
  1795. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1796. "0337 Restart HBA Data: x%x x%x\n",
  1797. phba->pport->port_state, psli->sli_flag);
  1798. word0 = 0;
  1799. mb = (MAILBOX_t *) &word0;
  1800. mb->mbxCommand = MBX_RESTART;
  1801. mb->mbxHc = 1;
  1802. lpfc_reset_barrier(phba);
  1803. to_slim = phba->MBslimaddr;
  1804. writel(*(uint32_t *) mb, to_slim);
  1805. readl(to_slim); /* flush */
  1806. /* Only skip post after fc_ffinit is completed */
  1807. if (phba->pport->port_state) {
  1808. skip_post = 1;
  1809. word0 = 1; /* This is really setting up word1 */
  1810. } else {
  1811. skip_post = 0;
  1812. word0 = 0; /* This is really setting up word1 */
  1813. }
  1814. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1815. writel(*(uint32_t *) mb, to_slim);
  1816. readl(to_slim); /* flush */
  1817. lpfc_sli_brdreset(phba);
  1818. phba->pport->stopped = 0;
  1819. phba->link_state = LPFC_INIT_START;
  1820. spin_unlock_irq(&phba->hbalock);
  1821. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1822. psli->stats_start = get_seconds();
  1823. if (skip_post)
  1824. mdelay(100);
  1825. else
  1826. mdelay(2000);
  1827. lpfc_hba_down_post(phba);
  1828. return 0;
  1829. }
  1830. static int
  1831. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1832. {
  1833. uint32_t status, i = 0;
  1834. /* Read the HBA Host Status Register */
  1835. status = readl(phba->HSregaddr);
  1836. /* Check status register to see what current state is */
  1837. i = 0;
  1838. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1839. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1840. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1841. * 4.
  1842. */
  1843. if (i++ >= 20) {
  1844. /* Adapter failed to init, timeout, status reg
  1845. <status> */
  1846. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1847. "0436 Adapter failed to init, "
  1848. "timeout, status reg x%x\n", status);
  1849. phba->link_state = LPFC_HBA_ERROR;
  1850. return -ETIMEDOUT;
  1851. }
  1852. /* Check to see if any errors occurred during init */
  1853. if (status & HS_FFERM) {
  1854. /* ERROR: During chipset initialization */
  1855. /* Adapter failed to init, chipset, status reg
  1856. <status> */
  1857. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1858. "0437 Adapter failed to init, "
  1859. "chipset, status reg x%x\n", status);
  1860. phba->link_state = LPFC_HBA_ERROR;
  1861. return -EIO;
  1862. }
  1863. if (i <= 5) {
  1864. msleep(10);
  1865. } else if (i <= 10) {
  1866. msleep(500);
  1867. } else {
  1868. msleep(2500);
  1869. }
  1870. if (i == 15) {
  1871. /* Do post */
  1872. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1873. lpfc_sli_brdrestart(phba);
  1874. }
  1875. /* Read the HBA Host Status Register */
  1876. status = readl(phba->HSregaddr);
  1877. }
  1878. /* Check to see if any errors occurred during init */
  1879. if (status & HS_FFERM) {
  1880. /* ERROR: During chipset initialization */
  1881. /* Adapter failed to init, chipset, status reg <status> */
  1882. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1883. "0438 Adapter failed to init, chipset, "
  1884. "status reg x%x\n", status);
  1885. phba->link_state = LPFC_HBA_ERROR;
  1886. return -EIO;
  1887. }
  1888. /* Clear all interrupt enable conditions */
  1889. writel(0, phba->HCregaddr);
  1890. readl(phba->HCregaddr); /* flush */
  1891. /* setup host attn register */
  1892. writel(0xffffffff, phba->HAregaddr);
  1893. readl(phba->HAregaddr); /* flush */
  1894. return 0;
  1895. }
  1896. int
  1897. lpfc_sli_hbq_count(void)
  1898. {
  1899. return ARRAY_SIZE(lpfc_hbq_defs);
  1900. }
  1901. static int
  1902. lpfc_sli_hbq_entry_count(void)
  1903. {
  1904. int hbq_count = lpfc_sli_hbq_count();
  1905. int count = 0;
  1906. int i;
  1907. for (i = 0; i < hbq_count; ++i)
  1908. count += lpfc_hbq_defs[i]->entry_count;
  1909. return count;
  1910. }
  1911. int
  1912. lpfc_sli_hbq_size(void)
  1913. {
  1914. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1915. }
  1916. static int
  1917. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1918. {
  1919. int hbq_count = lpfc_sli_hbq_count();
  1920. LPFC_MBOXQ_t *pmb;
  1921. MAILBOX_t *pmbox;
  1922. uint32_t hbqno;
  1923. uint32_t hbq_entry_index;
  1924. /* Get a Mailbox buffer to setup mailbox
  1925. * commands for HBA initialization
  1926. */
  1927. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1928. if (!pmb)
  1929. return -ENOMEM;
  1930. pmbox = &pmb->mb;
  1931. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1932. phba->link_state = LPFC_INIT_MBX_CMDS;
  1933. hbq_entry_index = 0;
  1934. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1935. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  1936. phba->hbqs[hbqno].hbqPutIdx = 0;
  1937. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  1938. phba->hbqs[hbqno].entry_count =
  1939. lpfc_hbq_defs[hbqno]->entry_count;
  1940. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  1941. hbq_entry_index, pmb);
  1942. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  1943. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  1944. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  1945. mbxStatus <status>, ring <num> */
  1946. lpfc_printf_log(phba, KERN_ERR,
  1947. LOG_SLI | LOG_VPORT,
  1948. "1805 Adapter failed to init. "
  1949. "Data: x%x x%x x%x\n",
  1950. pmbox->mbxCommand,
  1951. pmbox->mbxStatus, hbqno);
  1952. phba->link_state = LPFC_HBA_ERROR;
  1953. mempool_free(pmb, phba->mbox_mem_pool);
  1954. return ENXIO;
  1955. }
  1956. }
  1957. phba->hbq_count = hbq_count;
  1958. mempool_free(pmb, phba->mbox_mem_pool);
  1959. /* Initially populate or replenish the HBQs */
  1960. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1961. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  1962. return -ENOMEM;
  1963. }
  1964. return 0;
  1965. }
  1966. static int
  1967. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  1968. {
  1969. LPFC_MBOXQ_t *pmb;
  1970. uint32_t resetcount = 0, rc = 0, done = 0;
  1971. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1972. if (!pmb) {
  1973. phba->link_state = LPFC_HBA_ERROR;
  1974. return -ENOMEM;
  1975. }
  1976. phba->sli_rev = sli_mode;
  1977. while (resetcount < 2 && !done) {
  1978. spin_lock_irq(&phba->hbalock);
  1979. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1980. spin_unlock_irq(&phba->hbalock);
  1981. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1982. lpfc_sli_brdrestart(phba);
  1983. msleep(2500);
  1984. rc = lpfc_sli_chipset_init(phba);
  1985. if (rc)
  1986. break;
  1987. spin_lock_irq(&phba->hbalock);
  1988. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1989. spin_unlock_irq(&phba->hbalock);
  1990. resetcount++;
  1991. /* Call pre CONFIG_PORT mailbox command initialization. A
  1992. * value of 0 means the call was successful. Any other
  1993. * nonzero value is a failure, but if ERESTART is returned,
  1994. * the driver may reset the HBA and try again.
  1995. */
  1996. rc = lpfc_config_port_prep(phba);
  1997. if (rc == -ERESTART) {
  1998. phba->link_state = LPFC_LINK_UNKNOWN;
  1999. continue;
  2000. } else if (rc) {
  2001. break;
  2002. }
  2003. phba->link_state = LPFC_INIT_MBX_CMDS;
  2004. lpfc_config_port(phba, pmb);
  2005. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2006. if (rc != MBX_SUCCESS) {
  2007. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2008. "0442 Adapter failed to init, mbxCmd x%x "
  2009. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2010. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2011. spin_lock_irq(&phba->hbalock);
  2012. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2013. spin_unlock_irq(&phba->hbalock);
  2014. rc = -ENXIO;
  2015. } else {
  2016. done = 1;
  2017. phba->max_vpi = (phba->max_vpi &&
  2018. pmb->mb.un.varCfgPort.gmv) != 0
  2019. ? pmb->mb.un.varCfgPort.max_vpi
  2020. : 0;
  2021. }
  2022. }
  2023. if (!done) {
  2024. rc = -EINVAL;
  2025. goto do_prep_failed;
  2026. }
  2027. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2028. (!pmb->mb.un.varCfgPort.cMA)) {
  2029. rc = -ENXIO;
  2030. goto do_prep_failed;
  2031. }
  2032. return rc;
  2033. do_prep_failed:
  2034. mempool_free(pmb, phba->mbox_mem_pool);
  2035. return rc;
  2036. }
  2037. int
  2038. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2039. {
  2040. uint32_t rc;
  2041. int mode = 3;
  2042. switch (lpfc_sli_mode) {
  2043. case 2:
  2044. if (phba->cfg_enable_npiv) {
  2045. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2046. "1824 NPIV enabled: Override lpfc_sli_mode "
  2047. "parameter (%d) to auto (0).\n",
  2048. lpfc_sli_mode);
  2049. break;
  2050. }
  2051. mode = 2;
  2052. break;
  2053. case 0:
  2054. case 3:
  2055. break;
  2056. default:
  2057. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2058. "1819 Unrecognized lpfc_sli_mode "
  2059. "parameter: %d.\n", lpfc_sli_mode);
  2060. break;
  2061. }
  2062. rc = lpfc_do_config_port(phba, mode);
  2063. if (rc && lpfc_sli_mode == 3)
  2064. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2065. "1820 Unable to select SLI-3. "
  2066. "Not supported by adapter.\n");
  2067. if (rc && mode != 2)
  2068. rc = lpfc_do_config_port(phba, 2);
  2069. if (rc)
  2070. goto lpfc_sli_hba_setup_error;
  2071. if (phba->sli_rev == 3) {
  2072. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2073. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2074. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2075. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2076. } else {
  2077. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2078. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2079. phba->sli3_options = 0;
  2080. }
  2081. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2082. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2083. phba->sli_rev, phba->max_vpi);
  2084. rc = lpfc_sli_ring_map(phba);
  2085. if (rc)
  2086. goto lpfc_sli_hba_setup_error;
  2087. /* Init HBQs */
  2088. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2089. rc = lpfc_sli_hbq_setup(phba);
  2090. if (rc)
  2091. goto lpfc_sli_hba_setup_error;
  2092. }
  2093. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2094. rc = lpfc_config_port_post(phba);
  2095. if (rc)
  2096. goto lpfc_sli_hba_setup_error;
  2097. return rc;
  2098. lpfc_sli_hba_setup_error:
  2099. phba->link_state = LPFC_HBA_ERROR;
  2100. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2101. "0445 Firmware initialization failed\n");
  2102. return rc;
  2103. }
  2104. /*! lpfc_mbox_timeout
  2105. *
  2106. * \pre
  2107. * \post
  2108. * \param hba Pointer to per struct lpfc_hba structure
  2109. * \param l1 Pointer to the driver's mailbox queue.
  2110. * \return
  2111. * void
  2112. *
  2113. * \b Description:
  2114. *
  2115. * This routine handles mailbox timeout events at timer interrupt context.
  2116. */
  2117. void
  2118. lpfc_mbox_timeout(unsigned long ptr)
  2119. {
  2120. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2121. unsigned long iflag;
  2122. uint32_t tmo_posted;
  2123. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2124. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2125. if (!tmo_posted)
  2126. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2127. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2128. if (!tmo_posted) {
  2129. spin_lock_irqsave(&phba->hbalock, iflag);
  2130. if (phba->work_wait)
  2131. lpfc_worker_wake_up(phba);
  2132. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2133. }
  2134. }
  2135. void
  2136. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2137. {
  2138. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2139. MAILBOX_t *mb = &pmbox->mb;
  2140. struct lpfc_sli *psli = &phba->sli;
  2141. struct lpfc_sli_ring *pring;
  2142. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2143. return;
  2144. }
  2145. /* Mbox cmd <mbxCommand> timeout */
  2146. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2147. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2148. mb->mbxCommand,
  2149. phba->pport->port_state,
  2150. phba->sli.sli_flag,
  2151. phba->sli.mbox_active);
  2152. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2153. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2154. * it to fail all oustanding SCSI IO.
  2155. */
  2156. spin_lock_irq(&phba->pport->work_port_lock);
  2157. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2158. spin_unlock_irq(&phba->pport->work_port_lock);
  2159. spin_lock_irq(&phba->hbalock);
  2160. phba->link_state = LPFC_LINK_UNKNOWN;
  2161. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2162. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2163. spin_unlock_irq(&phba->hbalock);
  2164. pring = &psli->ring[psli->fcp_ring];
  2165. lpfc_sli_abort_iocb_ring(phba, pring);
  2166. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2167. "0316 Resetting board due to mailbox timeout\n");
  2168. /*
  2169. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2170. * on oustanding mailbox commands.
  2171. */
  2172. lpfc_offline_prep(phba);
  2173. lpfc_offline(phba);
  2174. lpfc_sli_brdrestart(phba);
  2175. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2176. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2177. lpfc_unblock_mgmt_io(phba);
  2178. return;
  2179. }
  2180. int
  2181. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2182. {
  2183. MAILBOX_t *mb;
  2184. struct lpfc_sli *psli = &phba->sli;
  2185. uint32_t status, evtctr;
  2186. uint32_t ha_copy;
  2187. int i;
  2188. unsigned long drvr_flag = 0;
  2189. volatile uint32_t word0, ldata;
  2190. void __iomem *to_slim;
  2191. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2192. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2193. if(!pmbox->vport) {
  2194. lpfc_printf_log(phba, KERN_ERR,
  2195. LOG_MBOX | LOG_VPORT,
  2196. "1806 Mbox x%x failed. No vport\n",
  2197. pmbox->mb.mbxCommand);
  2198. dump_stack();
  2199. return MBXERR_ERROR;
  2200. }
  2201. }
  2202. /* If the PCI channel is in offline state, do not post mbox. */
  2203. if (unlikely(pci_channel_offline(phba->pcidev)))
  2204. return MBX_NOT_FINISHED;
  2205. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2206. psli = &phba->sli;
  2207. mb = &pmbox->mb;
  2208. status = MBX_SUCCESS;
  2209. if (phba->link_state == LPFC_HBA_ERROR) {
  2210. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2211. /* Mbox command <mbxCommand> cannot issue */
  2212. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2213. return MBX_NOT_FINISHED;
  2214. }
  2215. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2216. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2217. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2218. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2219. return MBX_NOT_FINISHED;
  2220. }
  2221. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2222. /* Polling for a mbox command when another one is already active
  2223. * is not allowed in SLI. Also, the driver must have established
  2224. * SLI2 mode to queue and process multiple mbox commands.
  2225. */
  2226. if (flag & MBX_POLL) {
  2227. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2228. /* Mbox command <mbxCommand> cannot issue */
  2229. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2230. return MBX_NOT_FINISHED;
  2231. }
  2232. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2233. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2234. /* Mbox command <mbxCommand> cannot issue */
  2235. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2236. return MBX_NOT_FINISHED;
  2237. }
  2238. /* Another mailbox command is still being processed, queue this
  2239. * command to be processed later.
  2240. */
  2241. lpfc_mbox_put(phba, pmbox);
  2242. /* Mbox cmd issue - BUSY */
  2243. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2244. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2245. "x%x x%x x%x x%x\n",
  2246. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2247. mb->mbxCommand, phba->pport->port_state,
  2248. psli->sli_flag, flag);
  2249. psli->slistat.mbox_busy++;
  2250. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2251. if (pmbox->vport) {
  2252. lpfc_debugfs_disc_trc(pmbox->vport,
  2253. LPFC_DISC_TRC_MBOX_VPORT,
  2254. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2255. (uint32_t)mb->mbxCommand,
  2256. mb->un.varWords[0], mb->un.varWords[1]);
  2257. }
  2258. else {
  2259. lpfc_debugfs_disc_trc(phba->pport,
  2260. LPFC_DISC_TRC_MBOX,
  2261. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2262. (uint32_t)mb->mbxCommand,
  2263. mb->un.varWords[0], mb->un.varWords[1]);
  2264. }
  2265. return MBX_BUSY;
  2266. }
  2267. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2268. /* If we are not polling, we MUST be in SLI2 mode */
  2269. if (flag != MBX_POLL) {
  2270. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2271. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2272. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2273. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2274. /* Mbox command <mbxCommand> cannot issue */
  2275. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2276. return MBX_NOT_FINISHED;
  2277. }
  2278. /* timeout active mbox command */
  2279. mod_timer(&psli->mbox_tmo, (jiffies +
  2280. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2281. }
  2282. /* Mailbox cmd <cmd> issue */
  2283. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2284. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2285. "x%x\n",
  2286. pmbox->vport ? pmbox->vport->vpi : 0,
  2287. mb->mbxCommand, phba->pport->port_state,
  2288. psli->sli_flag, flag);
  2289. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2290. if (pmbox->vport) {
  2291. lpfc_debugfs_disc_trc(pmbox->vport,
  2292. LPFC_DISC_TRC_MBOX_VPORT,
  2293. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2294. (uint32_t)mb->mbxCommand,
  2295. mb->un.varWords[0], mb->un.varWords[1]);
  2296. }
  2297. else {
  2298. lpfc_debugfs_disc_trc(phba->pport,
  2299. LPFC_DISC_TRC_MBOX,
  2300. "MBOX Send: cmd:x%x mb:x%x x%x",
  2301. (uint32_t)mb->mbxCommand,
  2302. mb->un.varWords[0], mb->un.varWords[1]);
  2303. }
  2304. }
  2305. psli->slistat.mbox_cmd++;
  2306. evtctr = psli->slistat.mbox_event;
  2307. /* next set own bit for the adapter and copy over command word */
  2308. mb->mbxOwner = OWN_CHIP;
  2309. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2310. /* First copy command data to host SLIM area */
  2311. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2312. } else {
  2313. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2314. /* copy command data into host mbox for cmpl */
  2315. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2316. MAILBOX_CMD_SIZE);
  2317. }
  2318. /* First copy mbox command data to HBA SLIM, skip past first
  2319. word */
  2320. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2321. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2322. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2323. /* Next copy over first word, with mbxOwner set */
  2324. ldata = *((volatile uint32_t *)mb);
  2325. to_slim = phba->MBslimaddr;
  2326. writel(ldata, to_slim);
  2327. readl(to_slim); /* flush */
  2328. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2329. /* switch over to host mailbox */
  2330. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2331. }
  2332. }
  2333. wmb();
  2334. /* interrupt board to doit right away */
  2335. writel(CA_MBATT, phba->CAregaddr);
  2336. readl(phba->CAregaddr); /* flush */
  2337. switch (flag) {
  2338. case MBX_NOWAIT:
  2339. /* Don't wait for it to finish, just return */
  2340. psli->mbox_active = pmbox;
  2341. break;
  2342. case MBX_POLL:
  2343. psli->mbox_active = NULL;
  2344. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2345. /* First read mbox status word */
  2346. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2347. word0 = le32_to_cpu(word0);
  2348. } else {
  2349. /* First read mbox status word */
  2350. word0 = readl(phba->MBslimaddr);
  2351. }
  2352. /* Read the HBA Host Attention Register */
  2353. ha_copy = readl(phba->HAregaddr);
  2354. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2355. i *= 1000; /* Convert to ms */
  2356. /* Wait for command to complete */
  2357. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2358. (!(ha_copy & HA_MBATT) &&
  2359. (phba->link_state > LPFC_WARM_START))) {
  2360. if (i-- <= 0) {
  2361. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2362. spin_unlock_irqrestore(&phba->hbalock,
  2363. drvr_flag);
  2364. return MBX_NOT_FINISHED;
  2365. }
  2366. /* Check if we took a mbox interrupt while we were
  2367. polling */
  2368. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2369. && (evtctr != psli->slistat.mbox_event))
  2370. break;
  2371. spin_unlock_irqrestore(&phba->hbalock,
  2372. drvr_flag);
  2373. msleep(1);
  2374. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2375. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2376. /* First copy command data */
  2377. word0 = *((volatile uint32_t *)
  2378. &phba->slim2p->mbx);
  2379. word0 = le32_to_cpu(word0);
  2380. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2381. MAILBOX_t *slimmb;
  2382. volatile uint32_t slimword0;
  2383. /* Check real SLIM for any errors */
  2384. slimword0 = readl(phba->MBslimaddr);
  2385. slimmb = (MAILBOX_t *) & slimword0;
  2386. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2387. && slimmb->mbxStatus) {
  2388. psli->sli_flag &=
  2389. ~LPFC_SLI2_ACTIVE;
  2390. word0 = slimword0;
  2391. }
  2392. }
  2393. } else {
  2394. /* First copy command data */
  2395. word0 = readl(phba->MBslimaddr);
  2396. }
  2397. /* Read the HBA Host Attention Register */
  2398. ha_copy = readl(phba->HAregaddr);
  2399. }
  2400. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2401. /* copy results back to user */
  2402. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2403. MAILBOX_CMD_SIZE);
  2404. } else {
  2405. /* First copy command data */
  2406. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2407. MAILBOX_CMD_SIZE);
  2408. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2409. pmbox->context2) {
  2410. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2411. phba->MBslimaddr + DMP_RSP_OFFSET,
  2412. mb->un.varDmp.word_cnt);
  2413. }
  2414. }
  2415. writel(HA_MBATT, phba->HAregaddr);
  2416. readl(phba->HAregaddr); /* flush */
  2417. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2418. status = mb->mbxStatus;
  2419. }
  2420. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2421. return status;
  2422. }
  2423. /*
  2424. * Caller needs to hold lock.
  2425. */
  2426. static void
  2427. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2428. struct lpfc_iocbq *piocb)
  2429. {
  2430. /* Insert the caller's iocb in the txq tail for later processing. */
  2431. list_add_tail(&piocb->list, &pring->txq);
  2432. pring->txq_cnt++;
  2433. }
  2434. static struct lpfc_iocbq *
  2435. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2436. struct lpfc_iocbq **piocb)
  2437. {
  2438. struct lpfc_iocbq * nextiocb;
  2439. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2440. if (!nextiocb) {
  2441. nextiocb = *piocb;
  2442. *piocb = NULL;
  2443. }
  2444. return nextiocb;
  2445. }
  2446. /*
  2447. * Lockless version of lpfc_sli_issue_iocb.
  2448. */
  2449. int
  2450. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2451. struct lpfc_iocbq *piocb, uint32_t flag)
  2452. {
  2453. struct lpfc_iocbq *nextiocb;
  2454. IOCB_t *iocb;
  2455. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2456. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2457. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2458. lpfc_printf_log(phba, KERN_ERR,
  2459. LOG_SLI | LOG_VPORT,
  2460. "1807 IOCB x%x failed. No vport\n",
  2461. piocb->iocb.ulpCommand);
  2462. dump_stack();
  2463. return IOCB_ERROR;
  2464. }
  2465. /* If the PCI channel is in offline state, do not post iocbs. */
  2466. if (unlikely(pci_channel_offline(phba->pcidev)))
  2467. return IOCB_ERROR;
  2468. /*
  2469. * We should never get an IOCB if we are in a < LINK_DOWN state
  2470. */
  2471. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2472. return IOCB_ERROR;
  2473. /*
  2474. * Check to see if we are blocking IOCB processing because of a
  2475. * outstanding event.
  2476. */
  2477. if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
  2478. goto iocb_busy;
  2479. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2480. /*
  2481. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2482. * can be issued if the link is not up.
  2483. */
  2484. switch (piocb->iocb.ulpCommand) {
  2485. case CMD_QUE_RING_BUF_CN:
  2486. case CMD_QUE_RING_BUF64_CN:
  2487. /*
  2488. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2489. * completion, iocb_cmpl MUST be 0.
  2490. */
  2491. if (piocb->iocb_cmpl)
  2492. piocb->iocb_cmpl = NULL;
  2493. /*FALLTHROUGH*/
  2494. case CMD_CREATE_XRI_CR:
  2495. case CMD_CLOSE_XRI_CN:
  2496. case CMD_CLOSE_XRI_CX:
  2497. break;
  2498. default:
  2499. goto iocb_busy;
  2500. }
  2501. /*
  2502. * For FCP commands, we must be in a state where we can process link
  2503. * attention events.
  2504. */
  2505. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2506. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2507. goto iocb_busy;
  2508. }
  2509. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2510. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2511. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2512. if (iocb)
  2513. lpfc_sli_update_ring(phba, pring);
  2514. else
  2515. lpfc_sli_update_full_ring(phba, pring);
  2516. if (!piocb)
  2517. return IOCB_SUCCESS;
  2518. goto out_busy;
  2519. iocb_busy:
  2520. pring->stats.iocb_cmd_delay++;
  2521. out_busy:
  2522. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2523. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2524. return IOCB_SUCCESS;
  2525. }
  2526. return IOCB_BUSY;
  2527. }
  2528. int
  2529. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2530. struct lpfc_iocbq *piocb, uint32_t flag)
  2531. {
  2532. unsigned long iflags;
  2533. int rc;
  2534. spin_lock_irqsave(&phba->hbalock, iflags);
  2535. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2536. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2537. return rc;
  2538. }
  2539. static int
  2540. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2541. {
  2542. struct lpfc_sli *psli;
  2543. struct lpfc_sli_ring *pring;
  2544. psli = &phba->sli;
  2545. /* Adjust cmd/rsp ring iocb entries more evenly */
  2546. /* Take some away from the FCP ring */
  2547. pring = &psli->ring[psli->fcp_ring];
  2548. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2549. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2550. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2551. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2552. /* and give them to the extra ring */
  2553. pring = &psli->ring[psli->extra_ring];
  2554. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2555. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2556. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2557. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2558. /* Setup default profile for this ring */
  2559. pring->iotag_max = 4096;
  2560. pring->num_mask = 1;
  2561. pring->prt[0].profile = 0; /* Mask 0 */
  2562. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2563. pring->prt[0].type = phba->cfg_multi_ring_type;
  2564. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2565. return 0;
  2566. }
  2567. void
  2568. lpfc_sli_async_event_handler(struct lpfc_hba * phba,
  2569. struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
  2570. {
  2571. IOCB_t *icmd;
  2572. uint16_t evt_code;
  2573. uint16_t temp;
  2574. struct temp_event temp_event_data;
  2575. struct Scsi_Host *shost;
  2576. icmd = &iocbq->iocb;
  2577. evt_code = icmd->un.asyncstat.evt_code;
  2578. temp = icmd->ulpContext;
  2579. if ((evt_code != ASYNC_TEMP_WARN) &&
  2580. (evt_code != ASYNC_TEMP_SAFE)) {
  2581. lpfc_printf_log(phba,
  2582. KERN_ERR,
  2583. LOG_SLI,
  2584. "0327 Ring %d handler: unexpected ASYNC_STATUS"
  2585. " evt_code 0x%x\n",
  2586. pring->ringno,
  2587. icmd->un.asyncstat.evt_code);
  2588. return;
  2589. }
  2590. temp_event_data.data = (uint32_t)temp;
  2591. temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
  2592. if (evt_code == ASYNC_TEMP_WARN) {
  2593. temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
  2594. lpfc_printf_log(phba,
  2595. KERN_WARNING,
  2596. LOG_TEMP,
  2597. "0339 Adapter is very hot, please take "
  2598. "corrective action. temperature : %d Celsius\n",
  2599. temp);
  2600. }
  2601. if (evt_code == ASYNC_TEMP_SAFE) {
  2602. temp_event_data.event_code = LPFC_NORMAL_TEMP;
  2603. lpfc_printf_log(phba,
  2604. KERN_INFO,
  2605. LOG_TEMP,
  2606. "0340 Adapter temperature is OK now. "
  2607. "temperature : %d Celsius\n",
  2608. temp);
  2609. }
  2610. /* Send temperature change event to applications */
  2611. shost = lpfc_shost_from_vport(phba->pport);
  2612. fc_host_post_vendor_event(shost, fc_get_event_number(),
  2613. sizeof(temp_event_data), (char *) &temp_event_data,
  2614. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  2615. }
  2616. int
  2617. lpfc_sli_setup(struct lpfc_hba *phba)
  2618. {
  2619. int i, totiocbsize = 0;
  2620. struct lpfc_sli *psli = &phba->sli;
  2621. struct lpfc_sli_ring *pring;
  2622. psli->num_rings = MAX_CONFIGURED_RINGS;
  2623. psli->sli_flag = 0;
  2624. psli->fcp_ring = LPFC_FCP_RING;
  2625. psli->next_ring = LPFC_FCP_NEXT_RING;
  2626. psli->extra_ring = LPFC_EXTRA_RING;
  2627. psli->iocbq_lookup = NULL;
  2628. psli->iocbq_lookup_len = 0;
  2629. psli->last_iotag = 0;
  2630. for (i = 0; i < psli->num_rings; i++) {
  2631. pring = &psli->ring[i];
  2632. switch (i) {
  2633. case LPFC_FCP_RING: /* ring 0 - FCP */
  2634. /* numCiocb and numRiocb are used in config_port */
  2635. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2636. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2637. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2638. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2639. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2640. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2641. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2642. SLI3_IOCB_CMD_SIZE :
  2643. SLI2_IOCB_CMD_SIZE;
  2644. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2645. SLI3_IOCB_RSP_SIZE :
  2646. SLI2_IOCB_RSP_SIZE;
  2647. pring->iotag_ctr = 0;
  2648. pring->iotag_max =
  2649. (phba->cfg_hba_queue_depth * 2);
  2650. pring->fast_iotag = pring->iotag_max;
  2651. pring->num_mask = 0;
  2652. break;
  2653. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2654. /* numCiocb and numRiocb are used in config_port */
  2655. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2656. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2657. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2658. SLI3_IOCB_CMD_SIZE :
  2659. SLI2_IOCB_CMD_SIZE;
  2660. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2661. SLI3_IOCB_RSP_SIZE :
  2662. SLI2_IOCB_RSP_SIZE;
  2663. pring->iotag_max = phba->cfg_hba_queue_depth;
  2664. pring->num_mask = 0;
  2665. break;
  2666. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2667. /* numCiocb and numRiocb are used in config_port */
  2668. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2669. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2670. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2671. SLI3_IOCB_CMD_SIZE :
  2672. SLI2_IOCB_CMD_SIZE;
  2673. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2674. SLI3_IOCB_RSP_SIZE :
  2675. SLI2_IOCB_RSP_SIZE;
  2676. pring->fast_iotag = 0;
  2677. pring->iotag_ctr = 0;
  2678. pring->iotag_max = 4096;
  2679. pring->lpfc_sli_rcv_async_status =
  2680. lpfc_sli_async_event_handler;
  2681. pring->num_mask = 4;
  2682. pring->prt[0].profile = 0; /* Mask 0 */
  2683. pring->prt[0].rctl = FC_ELS_REQ;
  2684. pring->prt[0].type = FC_ELS_DATA;
  2685. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2686. lpfc_els_unsol_event;
  2687. pring->prt[1].profile = 0; /* Mask 1 */
  2688. pring->prt[1].rctl = FC_ELS_RSP;
  2689. pring->prt[1].type = FC_ELS_DATA;
  2690. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2691. lpfc_els_unsol_event;
  2692. pring->prt[2].profile = 0; /* Mask 2 */
  2693. /* NameServer Inquiry */
  2694. pring->prt[2].rctl = FC_UNSOL_CTL;
  2695. /* NameServer */
  2696. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2697. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2698. lpfc_ct_unsol_event;
  2699. pring->prt[3].profile = 0; /* Mask 3 */
  2700. /* NameServer response */
  2701. pring->prt[3].rctl = FC_SOL_CTL;
  2702. /* NameServer */
  2703. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2704. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2705. lpfc_ct_unsol_event;
  2706. break;
  2707. }
  2708. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2709. (pring->numRiocb * pring->sizeRiocb);
  2710. }
  2711. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2712. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2713. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2714. "SLI2 SLIM Data: x%x x%lx\n",
  2715. phba->brd_no, totiocbsize,
  2716. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2717. }
  2718. if (phba->cfg_multi_ring_support == 2)
  2719. lpfc_extra_ring_setup(phba);
  2720. return 0;
  2721. }
  2722. int
  2723. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2724. {
  2725. struct lpfc_sli *psli;
  2726. struct lpfc_sli_ring *pring;
  2727. int i;
  2728. psli = &phba->sli;
  2729. spin_lock_irq(&phba->hbalock);
  2730. INIT_LIST_HEAD(&psli->mboxq);
  2731. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2732. /* Initialize list headers for txq and txcmplq as double linked lists */
  2733. for (i = 0; i < psli->num_rings; i++) {
  2734. pring = &psli->ring[i];
  2735. pring->ringno = i;
  2736. pring->next_cmdidx = 0;
  2737. pring->local_getidx = 0;
  2738. pring->cmdidx = 0;
  2739. INIT_LIST_HEAD(&pring->txq);
  2740. INIT_LIST_HEAD(&pring->txcmplq);
  2741. INIT_LIST_HEAD(&pring->iocb_continueq);
  2742. INIT_LIST_HEAD(&pring->postbufq);
  2743. }
  2744. spin_unlock_irq(&phba->hbalock);
  2745. return 1;
  2746. }
  2747. int
  2748. lpfc_sli_host_down(struct lpfc_vport *vport)
  2749. {
  2750. LIST_HEAD(completions);
  2751. struct lpfc_hba *phba = vport->phba;
  2752. struct lpfc_sli *psli = &phba->sli;
  2753. struct lpfc_sli_ring *pring;
  2754. struct lpfc_iocbq *iocb, *next_iocb;
  2755. int i;
  2756. unsigned long flags = 0;
  2757. uint16_t prev_pring_flag;
  2758. lpfc_cleanup_discovery_resources(vport);
  2759. spin_lock_irqsave(&phba->hbalock, flags);
  2760. for (i = 0; i < psli->num_rings; i++) {
  2761. pring = &psli->ring[i];
  2762. prev_pring_flag = pring->flag;
  2763. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2764. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2765. /*
  2766. * Error everything on the txq since these iocbs have not been
  2767. * given to the FW yet.
  2768. */
  2769. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2770. if (iocb->vport != vport)
  2771. continue;
  2772. list_move_tail(&iocb->list, &completions);
  2773. pring->txq_cnt--;
  2774. }
  2775. /* Next issue ABTS for everything on the txcmplq */
  2776. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2777. list) {
  2778. if (iocb->vport != vport)
  2779. continue;
  2780. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2781. }
  2782. pring->flag = prev_pring_flag;
  2783. }
  2784. spin_unlock_irqrestore(&phba->hbalock, flags);
  2785. while (!list_empty(&completions)) {
  2786. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2787. if (!iocb->iocb_cmpl)
  2788. lpfc_sli_release_iocbq(phba, iocb);
  2789. else {
  2790. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2791. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2792. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2793. }
  2794. }
  2795. return 1;
  2796. }
  2797. int
  2798. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2799. {
  2800. LIST_HEAD(completions);
  2801. struct lpfc_sli *psli = &phba->sli;
  2802. struct lpfc_sli_ring *pring;
  2803. LPFC_MBOXQ_t *pmb;
  2804. struct lpfc_iocbq *iocb;
  2805. IOCB_t *cmd = NULL;
  2806. int i;
  2807. unsigned long flags = 0;
  2808. lpfc_hba_down_prep(phba);
  2809. lpfc_fabric_abort_hba(phba);
  2810. spin_lock_irqsave(&phba->hbalock, flags);
  2811. for (i = 0; i < psli->num_rings; i++) {
  2812. pring = &psli->ring[i];
  2813. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2814. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2815. /*
  2816. * Error everything on the txq since these iocbs have not been
  2817. * given to the FW yet.
  2818. */
  2819. list_splice_init(&pring->txq, &completions);
  2820. pring->txq_cnt = 0;
  2821. }
  2822. spin_unlock_irqrestore(&phba->hbalock, flags);
  2823. while (!list_empty(&completions)) {
  2824. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2825. cmd = &iocb->iocb;
  2826. if (!iocb->iocb_cmpl)
  2827. lpfc_sli_release_iocbq(phba, iocb);
  2828. else {
  2829. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2830. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2831. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2832. }
  2833. }
  2834. /* Return any active mbox cmds */
  2835. del_timer_sync(&psli->mbox_tmo);
  2836. spin_lock_irqsave(&phba->hbalock, flags);
  2837. spin_lock(&phba->pport->work_port_lock);
  2838. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2839. spin_unlock(&phba->pport->work_port_lock);
  2840. if (psli->mbox_active) {
  2841. list_add_tail(&psli->mbox_active->list, &completions);
  2842. psli->mbox_active = NULL;
  2843. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2844. }
  2845. /* Return any pending or completed mbox cmds */
  2846. list_splice_init(&phba->sli.mboxq, &completions);
  2847. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2848. INIT_LIST_HEAD(&psli->mboxq);
  2849. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2850. spin_unlock_irqrestore(&phba->hbalock, flags);
  2851. while (!list_empty(&completions)) {
  2852. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2853. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2854. if (pmb->mbox_cmpl) {
  2855. pmb->mbox_cmpl(phba,pmb);
  2856. }
  2857. }
  2858. return 1;
  2859. }
  2860. void
  2861. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2862. {
  2863. uint32_t *src = srcp;
  2864. uint32_t *dest = destp;
  2865. uint32_t ldata;
  2866. int i;
  2867. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2868. ldata = *src;
  2869. ldata = le32_to_cpu(ldata);
  2870. *dest = ldata;
  2871. src++;
  2872. dest++;
  2873. }
  2874. }
  2875. int
  2876. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2877. struct lpfc_dmabuf *mp)
  2878. {
  2879. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2880. later */
  2881. spin_lock_irq(&phba->hbalock);
  2882. list_add_tail(&mp->list, &pring->postbufq);
  2883. pring->postbufq_cnt++;
  2884. spin_unlock_irq(&phba->hbalock);
  2885. return 0;
  2886. }
  2887. struct lpfc_dmabuf *
  2888. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2889. dma_addr_t phys)
  2890. {
  2891. struct lpfc_dmabuf *mp, *next_mp;
  2892. struct list_head *slp = &pring->postbufq;
  2893. /* Search postbufq, from the begining, looking for a match on phys */
  2894. spin_lock_irq(&phba->hbalock);
  2895. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2896. if (mp->phys == phys) {
  2897. list_del_init(&mp->list);
  2898. pring->postbufq_cnt--;
  2899. spin_unlock_irq(&phba->hbalock);
  2900. return mp;
  2901. }
  2902. }
  2903. spin_unlock_irq(&phba->hbalock);
  2904. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2905. "0410 Cannot find virtual addr for mapped buf on "
  2906. "ring %d Data x%llx x%p x%p x%x\n",
  2907. pring->ringno, (unsigned long long)phys,
  2908. slp->next, slp->prev, pring->postbufq_cnt);
  2909. return NULL;
  2910. }
  2911. static void
  2912. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2913. struct lpfc_iocbq *rspiocb)
  2914. {
  2915. IOCB_t *irsp = &rspiocb->iocb;
  2916. uint16_t abort_iotag, abort_context;
  2917. struct lpfc_iocbq *abort_iocb;
  2918. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  2919. abort_iocb = NULL;
  2920. if (irsp->ulpStatus) {
  2921. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  2922. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  2923. spin_lock_irq(&phba->hbalock);
  2924. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  2925. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  2926. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  2927. "0327 Cannot abort els iocb %p "
  2928. "with tag %x context %x, abort status %x, "
  2929. "abort code %x\n",
  2930. abort_iocb, abort_iotag, abort_context,
  2931. irsp->ulpStatus, irsp->un.ulpWord[4]);
  2932. /*
  2933. * make sure we have the right iocbq before taking it
  2934. * off the txcmplq and try to call completion routine.
  2935. */
  2936. if (!abort_iocb ||
  2937. abort_iocb->iocb.ulpContext != abort_context ||
  2938. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  2939. spin_unlock_irq(&phba->hbalock);
  2940. else {
  2941. list_del_init(&abort_iocb->list);
  2942. pring->txcmplq_cnt--;
  2943. spin_unlock_irq(&phba->hbalock);
  2944. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  2945. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2946. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  2947. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  2948. }
  2949. }
  2950. lpfc_sli_release_iocbq(phba, cmdiocb);
  2951. return;
  2952. }
  2953. static void
  2954. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2955. struct lpfc_iocbq *rspiocb)
  2956. {
  2957. IOCB_t *irsp = &rspiocb->iocb;
  2958. /* ELS cmd tag <ulpIoTag> completes */
  2959. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  2960. "0133 Ignoring ELS cmd tag x%x completion Data: "
  2961. "x%x x%x x%x\n",
  2962. irsp->ulpIoTag, irsp->ulpStatus,
  2963. irsp->un.ulpWord[4], irsp->ulpTimeout);
  2964. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  2965. lpfc_ct_free_iocb(phba, cmdiocb);
  2966. else
  2967. lpfc_els_free_iocb(phba, cmdiocb);
  2968. return;
  2969. }
  2970. int
  2971. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2972. struct lpfc_iocbq *cmdiocb)
  2973. {
  2974. struct lpfc_vport *vport = cmdiocb->vport;
  2975. struct lpfc_iocbq *abtsiocbp;
  2976. IOCB_t *icmd = NULL;
  2977. IOCB_t *iabt = NULL;
  2978. int retval = IOCB_ERROR;
  2979. /*
  2980. * There are certain command types we don't want to abort. And we
  2981. * don't want to abort commands that are already in the process of
  2982. * being aborted.
  2983. */
  2984. icmd = &cmdiocb->iocb;
  2985. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  2986. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  2987. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  2988. return 0;
  2989. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  2990. * callback so that nothing happens when it finishes.
  2991. */
  2992. if ((vport->load_flag & FC_UNLOADING) &&
  2993. (pring->ringno == LPFC_ELS_RING)) {
  2994. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  2995. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  2996. else
  2997. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  2998. goto abort_iotag_exit;
  2999. }
  3000. /* issue ABTS for this IOCB based on iotag */
  3001. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  3002. if (abtsiocbp == NULL)
  3003. return 0;
  3004. /* This signals the response to set the correct status
  3005. * before calling the completion handler.
  3006. */
  3007. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3008. iabt = &abtsiocbp->iocb;
  3009. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3010. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3011. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3012. iabt->ulpLe = 1;
  3013. iabt->ulpClass = icmd->ulpClass;
  3014. if (phba->link_state >= LPFC_LINK_UP)
  3015. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3016. else
  3017. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3018. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3019. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3020. "0339 Abort xri x%x, original iotag x%x, "
  3021. "abort cmd iotag x%x\n",
  3022. iabt->un.acxri.abortContextTag,
  3023. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3024. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3025. abort_iotag_exit:
  3026. /*
  3027. * Caller to this routine should check for IOCB_ERROR
  3028. * and handle it properly. This routine no longer removes
  3029. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3030. */
  3031. return retval;
  3032. }
  3033. static int
  3034. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3035. uint16_t tgt_id, uint64_t lun_id,
  3036. lpfc_ctx_cmd ctx_cmd)
  3037. {
  3038. struct lpfc_scsi_buf *lpfc_cmd;
  3039. struct scsi_cmnd *cmnd;
  3040. int rc = 1;
  3041. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3042. return rc;
  3043. if (iocbq->vport != vport)
  3044. return rc;
  3045. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3046. cmnd = lpfc_cmd->pCmd;
  3047. if (cmnd == NULL)
  3048. return rc;
  3049. switch (ctx_cmd) {
  3050. case LPFC_CTX_LUN:
  3051. if ((cmnd->device->id == tgt_id) &&
  3052. (cmnd->device->lun == lun_id))
  3053. rc = 0;
  3054. break;
  3055. case LPFC_CTX_TGT:
  3056. if (cmnd->device->id == tgt_id)
  3057. rc = 0;
  3058. break;
  3059. case LPFC_CTX_HOST:
  3060. rc = 0;
  3061. break;
  3062. default:
  3063. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3064. __FUNCTION__, ctx_cmd);
  3065. break;
  3066. }
  3067. return rc;
  3068. }
  3069. int
  3070. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3071. lpfc_ctx_cmd ctx_cmd)
  3072. {
  3073. struct lpfc_hba *phba = vport->phba;
  3074. struct lpfc_iocbq *iocbq;
  3075. int sum, i;
  3076. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3077. iocbq = phba->sli.iocbq_lookup[i];
  3078. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3079. ctx_cmd) == 0)
  3080. sum++;
  3081. }
  3082. return sum;
  3083. }
  3084. void
  3085. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3086. struct lpfc_iocbq *rspiocb)
  3087. {
  3088. lpfc_sli_release_iocbq(phba, cmdiocb);
  3089. return;
  3090. }
  3091. int
  3092. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3093. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3094. {
  3095. struct lpfc_hba *phba = vport->phba;
  3096. struct lpfc_iocbq *iocbq;
  3097. struct lpfc_iocbq *abtsiocb;
  3098. IOCB_t *cmd = NULL;
  3099. int errcnt = 0, ret_val = 0;
  3100. int i;
  3101. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3102. iocbq = phba->sli.iocbq_lookup[i];
  3103. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3104. abort_cmd) != 0)
  3105. continue;
  3106. /* issue ABTS for this IOCB based on iotag */
  3107. abtsiocb = lpfc_sli_get_iocbq(phba);
  3108. if (abtsiocb == NULL) {
  3109. errcnt++;
  3110. continue;
  3111. }
  3112. cmd = &iocbq->iocb;
  3113. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3114. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3115. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3116. abtsiocb->iocb.ulpLe = 1;
  3117. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3118. abtsiocb->vport = phba->pport;
  3119. if (lpfc_is_link_up(phba))
  3120. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3121. else
  3122. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3123. /* Setup callback routine and issue the command. */
  3124. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3125. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3126. if (ret_val == IOCB_ERROR) {
  3127. lpfc_sli_release_iocbq(phba, abtsiocb);
  3128. errcnt++;
  3129. continue;
  3130. }
  3131. }
  3132. return errcnt;
  3133. }
  3134. static void
  3135. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3136. struct lpfc_iocbq *cmdiocbq,
  3137. struct lpfc_iocbq *rspiocbq)
  3138. {
  3139. wait_queue_head_t *pdone_q;
  3140. unsigned long iflags;
  3141. spin_lock_irqsave(&phba->hbalock, iflags);
  3142. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3143. if (cmdiocbq->context2 && rspiocbq)
  3144. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3145. &rspiocbq->iocb, sizeof(IOCB_t));
  3146. pdone_q = cmdiocbq->context_un.wait_queue;
  3147. if (pdone_q)
  3148. wake_up(pdone_q);
  3149. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3150. return;
  3151. }
  3152. /*
  3153. * Issue the caller's iocb and wait for its completion, but no longer than the
  3154. * caller's timeout. Note that iocb_flags is cleared before the
  3155. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3156. * definition this is a wait function.
  3157. */
  3158. int
  3159. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3160. struct lpfc_sli_ring *pring,
  3161. struct lpfc_iocbq *piocb,
  3162. struct lpfc_iocbq *prspiocbq,
  3163. uint32_t timeout)
  3164. {
  3165. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3166. long timeleft, timeout_req = 0;
  3167. int retval = IOCB_SUCCESS;
  3168. uint32_t creg_val;
  3169. /*
  3170. * If the caller has provided a response iocbq buffer, then context2
  3171. * is NULL or its an error.
  3172. */
  3173. if (prspiocbq) {
  3174. if (piocb->context2)
  3175. return IOCB_ERROR;
  3176. piocb->context2 = prspiocbq;
  3177. }
  3178. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3179. piocb->context_un.wait_queue = &done_q;
  3180. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3181. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3182. creg_val = readl(phba->HCregaddr);
  3183. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3184. writel(creg_val, phba->HCregaddr);
  3185. readl(phba->HCregaddr); /* flush */
  3186. }
  3187. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3188. if (retval == IOCB_SUCCESS) {
  3189. timeout_req = timeout * HZ;
  3190. timeleft = wait_event_timeout(done_q,
  3191. piocb->iocb_flag & LPFC_IO_WAKE,
  3192. timeout_req);
  3193. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3194. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3195. "0331 IOCB wake signaled\n");
  3196. } else if (timeleft == 0) {
  3197. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3198. "0338 IOCB wait timeout error - no "
  3199. "wake response Data x%x\n", timeout);
  3200. retval = IOCB_TIMEDOUT;
  3201. } else {
  3202. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3203. "0330 IOCB wake NOT set, "
  3204. "Data x%x x%lx\n",
  3205. timeout, (timeleft / jiffies));
  3206. retval = IOCB_TIMEDOUT;
  3207. }
  3208. } else {
  3209. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3210. ":0332 IOCB wait issue failed, Data x%x\n",
  3211. retval);
  3212. retval = IOCB_ERROR;
  3213. }
  3214. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3215. creg_val = readl(phba->HCregaddr);
  3216. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3217. writel(creg_val, phba->HCregaddr);
  3218. readl(phba->HCregaddr); /* flush */
  3219. }
  3220. if (prspiocbq)
  3221. piocb->context2 = NULL;
  3222. piocb->context_un.wait_queue = NULL;
  3223. piocb->iocb_cmpl = NULL;
  3224. return retval;
  3225. }
  3226. int
  3227. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3228. uint32_t timeout)
  3229. {
  3230. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3231. int retval;
  3232. unsigned long flag;
  3233. /* The caller must leave context1 empty. */
  3234. if (pmboxq->context1 != 0)
  3235. return MBX_NOT_FINISHED;
  3236. /* setup wake call as IOCB callback */
  3237. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3238. /* setup context field to pass wait_queue pointer to wake function */
  3239. pmboxq->context1 = &done_q;
  3240. /* now issue the command */
  3241. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3242. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3243. wait_event_interruptible_timeout(done_q,
  3244. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3245. timeout * HZ);
  3246. spin_lock_irqsave(&phba->hbalock, flag);
  3247. pmboxq->context1 = NULL;
  3248. /*
  3249. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3250. * else do not free the resources.
  3251. */
  3252. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3253. retval = MBX_SUCCESS;
  3254. else {
  3255. retval = MBX_TIMEOUT;
  3256. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3257. }
  3258. spin_unlock_irqrestore(&phba->hbalock, flag);
  3259. }
  3260. return retval;
  3261. }
  3262. int
  3263. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3264. {
  3265. struct lpfc_vport *vport = phba->pport;
  3266. int i = 0;
  3267. uint32_t ha_copy;
  3268. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3269. if (i++ > LPFC_MBOX_TMO * 1000)
  3270. return 1;
  3271. /*
  3272. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3273. * did finish. This way we won't get the misleading
  3274. * "Stray Mailbox Interrupt" message.
  3275. */
  3276. spin_lock_irq(&phba->hbalock);
  3277. ha_copy = phba->work_ha;
  3278. phba->work_ha &= ~HA_MBATT;
  3279. spin_unlock_irq(&phba->hbalock);
  3280. if (ha_copy & HA_MBATT)
  3281. if (lpfc_sli_handle_mb_event(phba) == 0)
  3282. i = 0;
  3283. msleep(1);
  3284. }
  3285. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3286. }
  3287. irqreturn_t
  3288. lpfc_intr_handler(int irq, void *dev_id)
  3289. {
  3290. struct lpfc_hba *phba;
  3291. uint32_t ha_copy;
  3292. uint32_t work_ha_copy;
  3293. unsigned long status;
  3294. uint32_t control;
  3295. MAILBOX_t *mbox, *pmbox;
  3296. struct lpfc_vport *vport;
  3297. struct lpfc_nodelist *ndlp;
  3298. struct lpfc_dmabuf *mp;
  3299. LPFC_MBOXQ_t *pmb;
  3300. int rc;
  3301. /*
  3302. * Get the driver's phba structure from the dev_id and
  3303. * assume the HBA is not interrupting.
  3304. */
  3305. phba = (struct lpfc_hba *) dev_id;
  3306. if (unlikely(!phba))
  3307. return IRQ_NONE;
  3308. /* If the pci channel is offline, ignore all the interrupts. */
  3309. if (unlikely(pci_channel_offline(phba->pcidev)))
  3310. return IRQ_NONE;
  3311. phba->sli.slistat.sli_intr++;
  3312. /*
  3313. * Call the HBA to see if it is interrupting. If not, don't claim
  3314. * the interrupt
  3315. */
  3316. /* Ignore all interrupts during initialization. */
  3317. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3318. return IRQ_NONE;
  3319. /*
  3320. * Read host attention register to determine interrupt source
  3321. * Clear Attention Sources, except Error Attention (to
  3322. * preserve status) and Link Attention
  3323. */
  3324. spin_lock(&phba->hbalock);
  3325. ha_copy = readl(phba->HAregaddr);
  3326. /* If somebody is waiting to handle an eratt don't process it
  3327. * here. The brdkill function will do this.
  3328. */
  3329. if (phba->link_flag & LS_IGNORE_ERATT)
  3330. ha_copy &= ~HA_ERATT;
  3331. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3332. readl(phba->HAregaddr); /* flush */
  3333. spin_unlock(&phba->hbalock);
  3334. if (unlikely(!ha_copy))
  3335. return IRQ_NONE;
  3336. work_ha_copy = ha_copy & phba->work_ha_mask;
  3337. if (unlikely(work_ha_copy)) {
  3338. if (work_ha_copy & HA_LATT) {
  3339. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3340. /*
  3341. * Turn off Link Attention interrupts
  3342. * until CLEAR_LA done
  3343. */
  3344. spin_lock(&phba->hbalock);
  3345. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3346. control = readl(phba->HCregaddr);
  3347. control &= ~HC_LAINT_ENA;
  3348. writel(control, phba->HCregaddr);
  3349. readl(phba->HCregaddr); /* flush */
  3350. spin_unlock(&phba->hbalock);
  3351. }
  3352. else
  3353. work_ha_copy &= ~HA_LATT;
  3354. }
  3355. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3356. /*
  3357. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3358. * the only slow ring.
  3359. */
  3360. status = (work_ha_copy &
  3361. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3362. status >>= (4*LPFC_ELS_RING);
  3363. if (status & HA_RXMASK) {
  3364. spin_lock(&phba->hbalock);
  3365. control = readl(phba->HCregaddr);
  3366. lpfc_debugfs_slow_ring_trc(phba,
  3367. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3368. control, status,
  3369. (uint32_t)phba->sli.slistat.sli_intr);
  3370. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3371. lpfc_debugfs_slow_ring_trc(phba,
  3372. "ISR Disable ring:"
  3373. "pwork:x%x hawork:x%x wait:x%x",
  3374. phba->work_ha, work_ha_copy,
  3375. (uint32_t)((unsigned long)
  3376. phba->work_wait));
  3377. control &=
  3378. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3379. writel(control, phba->HCregaddr);
  3380. readl(phba->HCregaddr); /* flush */
  3381. }
  3382. else {
  3383. lpfc_debugfs_slow_ring_trc(phba,
  3384. "ISR slow ring: pwork:"
  3385. "x%x hawork:x%x wait:x%x",
  3386. phba->work_ha, work_ha_copy,
  3387. (uint32_t)((unsigned long)
  3388. phba->work_wait));
  3389. }
  3390. spin_unlock(&phba->hbalock);
  3391. }
  3392. }
  3393. if (work_ha_copy & HA_ERATT) {
  3394. phba->link_state = LPFC_HBA_ERROR;
  3395. /*
  3396. * There was a link/board error. Read the
  3397. * status register to retrieve the error event
  3398. * and process it.
  3399. */
  3400. phba->sli.slistat.err_attn_event++;
  3401. /* Save status info */
  3402. phba->work_hs = readl(phba->HSregaddr);
  3403. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3404. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3405. /* Clear Chip error bit */
  3406. writel(HA_ERATT, phba->HAregaddr);
  3407. readl(phba->HAregaddr); /* flush */
  3408. phba->pport->stopped = 1;
  3409. }
  3410. if ((work_ha_copy & HA_MBATT) &&
  3411. (phba->sli.mbox_active)) {
  3412. pmb = phba->sli.mbox_active;
  3413. pmbox = &pmb->mb;
  3414. mbox = &phba->slim2p->mbx;
  3415. vport = pmb->vport;
  3416. /* First check out the status word */
  3417. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3418. if (pmbox->mbxOwner != OWN_HOST) {
  3419. /*
  3420. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3421. * mbxStatus <status>
  3422. */
  3423. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3424. LOG_SLI,
  3425. "(%d):0304 Stray Mailbox "
  3426. "Interrupt mbxCommand x%x "
  3427. "mbxStatus x%x\n",
  3428. (vport ? vport->vpi : 0),
  3429. pmbox->mbxCommand,
  3430. pmbox->mbxStatus);
  3431. }
  3432. phba->last_completion_time = jiffies;
  3433. del_timer_sync(&phba->sli.mbox_tmo);
  3434. phba->sli.mbox_active = NULL;
  3435. if (pmb->mbox_cmpl) {
  3436. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3437. MAILBOX_CMD_SIZE);
  3438. }
  3439. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3440. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3441. lpfc_debugfs_disc_trc(vport,
  3442. LPFC_DISC_TRC_MBOX_VPORT,
  3443. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3444. (uint32_t)pmbox->mbxStatus,
  3445. pmbox->un.varWords[0], 0);
  3446. if ( !pmbox->mbxStatus) {
  3447. mp = (struct lpfc_dmabuf *)
  3448. (pmb->context1);
  3449. ndlp = (struct lpfc_nodelist *)
  3450. pmb->context2;
  3451. /* Reg_LOGIN of dflt RPI was successful.
  3452. * new lets get rid of the RPI using the
  3453. * same mbox buffer.
  3454. */
  3455. lpfc_unreg_login(phba, vport->vpi,
  3456. pmbox->un.varWords[0], pmb);
  3457. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3458. pmb->context1 = mp;
  3459. pmb->context2 = ndlp;
  3460. pmb->vport = vport;
  3461. spin_lock(&phba->hbalock);
  3462. phba->sli.sli_flag &=
  3463. ~LPFC_SLI_MBOX_ACTIVE;
  3464. spin_unlock(&phba->hbalock);
  3465. goto send_current_mbox;
  3466. }
  3467. }
  3468. spin_lock(&phba->pport->work_port_lock);
  3469. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3470. spin_unlock(&phba->pport->work_port_lock);
  3471. lpfc_mbox_cmpl_put(phba, pmb);
  3472. }
  3473. if ((work_ha_copy & HA_MBATT) &&
  3474. (phba->sli.mbox_active == NULL)) {
  3475. send_next_mbox:
  3476. spin_lock(&phba->hbalock);
  3477. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3478. pmb = lpfc_mbox_get(phba);
  3479. spin_unlock(&phba->hbalock);
  3480. send_current_mbox:
  3481. /* Process next mailbox command if there is one */
  3482. if (pmb != NULL) {
  3483. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3484. if (rc == MBX_NOT_FINISHED) {
  3485. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3486. lpfc_mbox_cmpl_put(phba, pmb);
  3487. goto send_next_mbox;
  3488. }
  3489. }
  3490. }
  3491. spin_lock(&phba->hbalock);
  3492. phba->work_ha |= work_ha_copy;
  3493. if (phba->work_wait)
  3494. lpfc_worker_wake_up(phba);
  3495. spin_unlock(&phba->hbalock);
  3496. }
  3497. ha_copy &= ~(phba->work_ha_mask);
  3498. /*
  3499. * Process all events on FCP ring. Take the optimized path for
  3500. * FCP IO. Any other IO is slow path and is handled by
  3501. * the worker thread.
  3502. */
  3503. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3504. status >>= (4*LPFC_FCP_RING);
  3505. if (status & HA_RXMASK)
  3506. lpfc_sli_handle_fast_ring_event(phba,
  3507. &phba->sli.ring[LPFC_FCP_RING],
  3508. status);
  3509. if (phba->cfg_multi_ring_support == 2) {
  3510. /*
  3511. * Process all events on extra ring. Take the optimized path
  3512. * for extra ring IO. Any other IO is slow path and is handled
  3513. * by the worker thread.
  3514. */
  3515. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3516. status >>= (4*LPFC_EXTRA_RING);
  3517. if (status & HA_RXMASK) {
  3518. lpfc_sli_handle_fast_ring_event(phba,
  3519. &phba->sli.ring[LPFC_EXTRA_RING],
  3520. status);
  3521. }
  3522. }
  3523. return IRQ_HANDLED;
  3524. } /* lpfc_intr_handler */