bigsmp_32.c 6.4 KB

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  1. /*
  2. * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
  3. *
  4. * Drives the local APIC in "clustered mode".
  5. */
  6. #include <linux/threads.h>
  7. #include <linux/cpumask.h>
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <linux/smp.h>
  12. #include <asm/apicdef.h>
  13. #include <asm/fixmap.h>
  14. #include <asm/mpspec.h>
  15. #include <asm/apic.h>
  16. #include <asm/ipi.h>
  17. static inline unsigned bigsmp_get_apic_id(unsigned long x)
  18. {
  19. return (x >> 24) & 0xFF;
  20. }
  21. static inline int bigsmp_apic_id_registered(void)
  22. {
  23. return 1;
  24. }
  25. static inline const cpumask_t *bigsmp_target_cpus(void)
  26. {
  27. #ifdef CONFIG_SMP
  28. return &cpu_online_map;
  29. #else
  30. return &cpumask_of_cpu(0);
  31. #endif
  32. }
  33. static inline unsigned long
  34. bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
  35. {
  36. return 0;
  37. }
  38. static inline unsigned long bigsmp_check_apicid_present(int bit)
  39. {
  40. return 1;
  41. }
  42. static inline unsigned long calculate_ldr(int cpu)
  43. {
  44. unsigned long val, id;
  45. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  46. id = per_cpu(x86_bios_cpu_apicid, cpu);
  47. val |= SET_APIC_LOGICAL_ID(id);
  48. return val;
  49. }
  50. /*
  51. * Set up the logical destination ID.
  52. *
  53. * Intel recommends to set DFR, LDR and TPR before enabling
  54. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  55. * document number 292116). So here it goes...
  56. */
  57. static inline void bigsmp_init_apic_ldr(void)
  58. {
  59. unsigned long val;
  60. int cpu = smp_processor_id();
  61. apic_write(APIC_DFR, APIC_DFR_FLAT);
  62. val = calculate_ldr(cpu);
  63. apic_write(APIC_LDR, val);
  64. }
  65. static inline void bigsmp_setup_apic_routing(void)
  66. {
  67. printk(KERN_INFO
  68. "Enabling APIC mode: Physflat. Using %d I/O APICs\n",
  69. nr_ioapics);
  70. }
  71. static inline int bigsmp_apicid_to_node(int logical_apicid)
  72. {
  73. return apicid_2_node[hard_smp_processor_id()];
  74. }
  75. static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
  76. {
  77. if (mps_cpu < nr_cpu_ids)
  78. return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
  79. return BAD_APICID;
  80. }
  81. static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
  82. {
  83. return physid_mask_of_physid(phys_apicid);
  84. }
  85. /* Mapping from cpu number to logical apicid */
  86. static inline int bigsmp_cpu_to_logical_apicid(int cpu)
  87. {
  88. if (cpu >= nr_cpu_ids)
  89. return BAD_APICID;
  90. return cpu_physical_id(cpu);
  91. }
  92. static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
  93. {
  94. /* For clustered we don't have a good way to do this yet - hack */
  95. return physids_promote(0xFFL);
  96. }
  97. static inline void bigsmp_setup_portio_remap(void)
  98. {
  99. }
  100. static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
  101. {
  102. return 1;
  103. }
  104. /* As we are using single CPU as destination, pick only one CPU here */
  105. static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
  106. {
  107. return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
  108. }
  109. static inline unsigned int
  110. bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  111. const struct cpumask *andmask)
  112. {
  113. int cpu;
  114. /*
  115. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  116. * May as well be the first.
  117. */
  118. for_each_cpu_and(cpu, cpumask, andmask) {
  119. if (cpumask_test_cpu(cpu, cpu_online_mask))
  120. break;
  121. }
  122. if (cpu < nr_cpu_ids)
  123. return bigsmp_cpu_to_logical_apicid(cpu);
  124. return BAD_APICID;
  125. }
  126. static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
  127. {
  128. return cpuid_apic >> index_msb;
  129. }
  130. static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
  131. {
  132. default_send_IPI_mask_sequence_phys(mask, vector);
  133. }
  134. static inline void bigsmp_send_IPI_allbutself(int vector)
  135. {
  136. default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
  137. }
  138. static inline void bigsmp_send_IPI_all(int vector)
  139. {
  140. bigsmp_send_IPI_mask(cpu_online_mask, vector);
  141. }
  142. static int dmi_bigsmp; /* can be set by dmi scanners */
  143. static int hp_ht_bigsmp(const struct dmi_system_id *d)
  144. {
  145. printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
  146. dmi_bigsmp = 1;
  147. return 0;
  148. }
  149. static const struct dmi_system_id bigsmp_dmi_table[] = {
  150. { hp_ht_bigsmp, "HP ProLiant DL760 G2",
  151. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  152. DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
  153. }
  154. },
  155. { hp_ht_bigsmp, "HP ProLiant DL740",
  156. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  157. DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
  158. }
  159. },
  160. { } /* NULL entry stops DMI scanning */
  161. };
  162. static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
  163. {
  164. cpus_clear(*retmask);
  165. cpu_set(cpu, *retmask);
  166. }
  167. static int probe_bigsmp(void)
  168. {
  169. if (def_to_bigsmp)
  170. dmi_bigsmp = 1;
  171. else
  172. dmi_check_system(bigsmp_dmi_table);
  173. return dmi_bigsmp;
  174. }
  175. struct apic apic_bigsmp = {
  176. .name = "bigsmp",
  177. .probe = probe_bigsmp,
  178. .acpi_madt_oem_check = NULL,
  179. .apic_id_registered = bigsmp_apic_id_registered,
  180. .irq_delivery_mode = dest_Fixed,
  181. /* phys delivery to target CPU: */
  182. .irq_dest_mode = 0,
  183. .target_cpus = bigsmp_target_cpus,
  184. .disable_esr = 1,
  185. .dest_logical = 0,
  186. .check_apicid_used = bigsmp_check_apicid_used,
  187. .check_apicid_present = bigsmp_check_apicid_present,
  188. .vector_allocation_domain = bigsmp_vector_allocation_domain,
  189. .init_apic_ldr = bigsmp_init_apic_ldr,
  190. .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
  191. .setup_apic_routing = bigsmp_setup_apic_routing,
  192. .multi_timer_check = NULL,
  193. .apicid_to_node = bigsmp_apicid_to_node,
  194. .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid,
  195. .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,
  196. .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present,
  197. .setup_portio_remap = NULL,
  198. .check_phys_apicid_present = bigsmp_check_phys_apicid_present,
  199. .enable_apic_mode = NULL,
  200. .phys_pkg_id = bigsmp_phys_pkg_id,
  201. .mps_oem_check = NULL,
  202. .get_apic_id = bigsmp_get_apic_id,
  203. .set_apic_id = NULL,
  204. .apic_id_mask = 0xFF << 24,
  205. .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
  206. .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
  207. .send_IPI_mask = bigsmp_send_IPI_mask,
  208. .send_IPI_mask_allbutself = NULL,
  209. .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
  210. .send_IPI_all = bigsmp_send_IPI_all,
  211. .send_IPI_self = default_send_IPI_self,
  212. .wakeup_cpu = NULL,
  213. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  214. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  215. .wait_for_init_deassert = default_wait_for_init_deassert,
  216. .smp_callin_clear_local_apic = NULL,
  217. .inquire_remote_apic = default_inquire_remote_apic,
  218. .read = native_apic_mem_read,
  219. .write = native_apic_mem_write,
  220. .icr_read = native_apic_icr_read,
  221. .icr_write = native_apic_icr_write,
  222. .wait_icr_idle = native_apic_wait_icr_idle,
  223. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  224. };