tvp7002.c 35 KB

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  1. /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
  2. * Digitizer with Horizontal PLL registers
  3. *
  4. * Copyright (C) 2009 Texas Instruments Inc
  5. * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
  6. *
  7. * This code is partially based upon the TVP5150 driver
  8. * written by Mauro Carvalho Chehab (mchehab@infradead.org),
  9. * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  10. * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
  11. * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/delay.h>
  28. #include <linux/i2c.h>
  29. #include <linux/videodev2.h>
  30. #include <media/tvp7002.h>
  31. #include <media/v4l2-device.h>
  32. #include <media/v4l2-chip-ident.h>
  33. #include <media/v4l2-common.h>
  34. #include "tvp7002_reg.h"
  35. MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
  36. MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
  37. MODULE_LICENSE("GPL");
  38. /* Module Name */
  39. #define TVP7002_MODULE_NAME "tvp7002"
  40. /* I2C retry attempts */
  41. #define I2C_RETRY_COUNT (5)
  42. /* End of registers */
  43. #define TVP7002_EOR 0x5c
  44. /* Read write definition for registers */
  45. #define TVP7002_READ 0
  46. #define TVP7002_WRITE 1
  47. #define TVP7002_RESERVED 2
  48. /* Interlaced vs progressive mask and shift */
  49. #define TVP7002_IP_SHIFT 5
  50. #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
  51. /* Shift for CPL and LPF registers */
  52. #define TVP7002_CL_SHIFT 8
  53. #define TVP7002_CL_MASK 0x0f
  54. /* Debug functions */
  55. static int debug;
  56. module_param(debug, bool, 0644);
  57. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  58. /* Structure for register values */
  59. struct i2c_reg_value {
  60. u8 reg;
  61. u8 value;
  62. u8 type;
  63. };
  64. /*
  65. * Register default values (according to tvp7002 datasheet)
  66. * In the case of read-only registers, the value (0xff) is
  67. * never written. R/W functionality is controlled by the
  68. * writable bit in the register struct definition.
  69. */
  70. static const struct i2c_reg_value tvp7002_init_default[] = {
  71. { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
  72. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  73. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  74. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  75. { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
  76. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  77. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  78. { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
  79. { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
  80. { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
  81. { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
  82. { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  83. { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  84. { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  85. { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
  86. { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
  87. { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
  88. { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
  89. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  90. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  91. { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
  92. { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
  93. { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
  94. { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
  95. { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
  96. { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
  97. { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
  98. { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
  99. { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
  100. { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
  101. { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
  102. { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
  103. { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
  104. { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
  105. { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
  106. { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  107. { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  108. { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  109. { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
  110. { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
  111. { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
  112. { 0x29, 0x08, TVP7002_RESERVED },
  113. { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
  114. /* PWR_CTL is controlled only by the probe and reset functions */
  115. { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
  116. { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
  117. { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
  118. { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
  119. { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
  120. { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
  121. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  122. { 0x32, 0x18, TVP7002_RESERVED },
  123. { 0x33, 0x60, TVP7002_RESERVED },
  124. { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
  125. { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
  126. { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
  127. { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
  128. { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
  129. { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
  130. { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
  131. { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
  132. { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
  133. { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
  134. { 0x3e, 0x60, TVP7002_RESERVED },
  135. { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
  136. { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
  137. { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  138. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  139. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  140. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  141. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  142. { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
  143. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  144. { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  145. { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  146. { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
  147. { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
  148. { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
  149. { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
  150. { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
  151. { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
  152. { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
  153. { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
  154. { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
  155. { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
  156. { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
  157. { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
  158. { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
  159. { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
  160. { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
  161. { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
  162. { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
  163. { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
  164. /* This signals end of register values */
  165. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  166. };
  167. /* Register parameters for 480P */
  168. static const struct i2c_reg_value tvp7002_parms_480P[] = {
  169. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
  170. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE },
  171. { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
  172. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  173. { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
  174. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  175. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
  176. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  177. { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
  178. { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
  179. { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
  180. { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
  181. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  182. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  183. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  184. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  185. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  186. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  187. };
  188. /* Register parameters for 576P */
  189. static const struct i2c_reg_value tvp7002_parms_576P[] = {
  190. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
  191. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  192. { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
  193. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  194. { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
  195. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  196. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
  197. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  198. { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  199. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  200. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  201. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  202. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  203. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  204. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  205. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  206. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  207. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  208. };
  209. /* Register parameters for 1080I60 */
  210. static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
  211. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  212. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
  213. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  214. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  215. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  216. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  217. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  218. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  219. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  220. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  221. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  222. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  223. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  224. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  225. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  226. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  227. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  228. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  229. };
  230. /* Register parameters for 1080P60 */
  231. static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
  232. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  233. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
  234. { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
  235. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  236. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  237. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  238. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  239. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  240. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  241. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  242. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  243. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  244. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  245. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  246. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  247. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  248. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  249. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  250. };
  251. /* Register parameters for 1080I50 */
  252. static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
  253. { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
  254. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  255. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  256. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  257. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  258. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  259. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  260. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  261. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  262. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  263. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  264. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  265. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  266. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  267. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  268. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  269. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  270. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  271. };
  272. /* Register parameters for 720P60 */
  273. static const struct i2c_reg_value tvp7002_parms_720P60[] = {
  274. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  275. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE },
  276. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  277. { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
  278. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  279. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  280. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  281. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  282. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  283. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  284. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  285. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  286. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  287. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  288. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  289. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  290. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  291. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  292. };
  293. /* Register parameters for 720P50 */
  294. static const struct i2c_reg_value tvp7002_parms_720P50[] = {
  295. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
  296. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE },
  297. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  298. { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
  299. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  300. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  301. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  302. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  303. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  304. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  305. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  306. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  307. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  308. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  309. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  310. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  311. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  312. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  313. };
  314. /* Struct list for available formats */
  315. static const struct v4l2_fmtdesc tvp7002_fmt_list[] = {
  316. {
  317. .index = 0,
  318. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  319. .flags = 0,
  320. .description = "8-bit UYVY 4:2:2 Format",
  321. .pixelformat = V4L2_PIX_FMT_UYVY,
  322. },
  323. };
  324. #define NUM_FORMATS ARRAY_SIZE(tvp7002_fmt_list)
  325. /* Preset definition for handling device operation */
  326. struct tvp7002_preset_definition {
  327. u32 preset;
  328. const struct i2c_reg_value *p_settings;
  329. enum v4l2_colorspace color_space;
  330. enum v4l2_field scanmode;
  331. u16 progressive;
  332. u16 lines_per_frame;
  333. u16 cpl_min;
  334. u16 cpl_max;
  335. };
  336. /* Struct list for digital video presets */
  337. static const struct tvp7002_preset_definition tvp7002_presets[] = {
  338. {
  339. V4L2_DV_720P60,
  340. tvp7002_parms_720P60,
  341. V4L2_COLORSPACE_REC709,
  342. V4L2_FIELD_NONE,
  343. 1,
  344. 0x2EE,
  345. 135,
  346. 153
  347. },
  348. {
  349. V4L2_DV_1080I60,
  350. tvp7002_parms_1080I60,
  351. V4L2_COLORSPACE_REC709,
  352. V4L2_FIELD_INTERLACED,
  353. 0,
  354. 0x465,
  355. 181,
  356. 205
  357. },
  358. {
  359. V4L2_DV_1080I50,
  360. tvp7002_parms_1080I50,
  361. V4L2_COLORSPACE_REC709,
  362. V4L2_FIELD_INTERLACED,
  363. 0,
  364. 0x465,
  365. 217,
  366. 245
  367. },
  368. {
  369. V4L2_DV_720P50,
  370. tvp7002_parms_720P50,
  371. V4L2_COLORSPACE_REC709,
  372. V4L2_FIELD_NONE,
  373. 1,
  374. 0x2EE,
  375. 163,
  376. 183
  377. },
  378. {
  379. V4L2_DV_1080P60,
  380. tvp7002_parms_1080P60,
  381. V4L2_COLORSPACE_REC709,
  382. V4L2_FIELD_NONE,
  383. 1,
  384. 0x465,
  385. 90,
  386. 102
  387. },
  388. {
  389. V4L2_DV_480P59_94,
  390. tvp7002_parms_480P,
  391. V4L2_COLORSPACE_SMPTE170M,
  392. V4L2_FIELD_NONE,
  393. 1,
  394. 0x20D,
  395. 0xffff,
  396. 0xffff
  397. },
  398. {
  399. V4L2_DV_576P50,
  400. tvp7002_parms_576P,
  401. V4L2_COLORSPACE_SMPTE170M,
  402. V4L2_FIELD_NONE,
  403. 1,
  404. 0x271,
  405. 0xffff,
  406. 0xffff
  407. }
  408. };
  409. #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
  410. /* Device definition */
  411. struct tvp7002 {
  412. struct v4l2_subdev sd;
  413. const struct tvp7002_config *pdata;
  414. int ver;
  415. int streaming;
  416. struct v4l2_pix_format pix;
  417. const struct tvp7002_preset_definition *current_preset;
  418. u8 gain;
  419. };
  420. /*
  421. * to_tvp7002 - Obtain device handler TVP7002
  422. * @sd: ptr to v4l2_subdev struct
  423. *
  424. * Returns device handler tvp7002.
  425. */
  426. static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
  427. {
  428. return container_of(sd, struct tvp7002, sd);
  429. }
  430. /*
  431. * tvp7002_read - Read a value from a register in an TVP7002
  432. * @sd: ptr to v4l2_subdev struct
  433. * @reg: TVP7002 register address
  434. * @dst: pointer to 8-bit destination
  435. *
  436. * Returns value read if successful, or non-zero (-1) otherwise.
  437. */
  438. static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
  439. {
  440. struct i2c_client *c = v4l2_get_subdevdata(sd);
  441. int retry;
  442. int error;
  443. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  444. error = i2c_smbus_read_byte_data(c, addr);
  445. if (error >= 0) {
  446. *dst = (u8)error;
  447. return 0;
  448. }
  449. msleep_interruptible(10);
  450. }
  451. v4l2_err(sd, "TVP7002 read error %d\n", error);
  452. return error;
  453. }
  454. /*
  455. * tvp7002_read_err() - Read a register value with error code
  456. * @sd: pointer to standard V4L2 sub-device structure
  457. * @reg: destination register
  458. * @val: value to be read
  459. * @error: pointer to error value
  460. *
  461. * Read a value in a register and save error value in pointer.
  462. * Also update the register table if successful
  463. */
  464. static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
  465. u8 *dst, int *err)
  466. {
  467. if (!*err)
  468. *err = tvp7002_read(sd, reg, dst);
  469. }
  470. /*
  471. * tvp7002_write() - Write a value to a register in TVP7002
  472. * @sd: ptr to v4l2_subdev struct
  473. * @addr: TVP7002 register address
  474. * @value: value to be written to the register
  475. *
  476. * Write a value to a register in an TVP7002 decoder device.
  477. * Returns zero if successful, or non-zero otherwise.
  478. */
  479. static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
  480. {
  481. struct i2c_client *c;
  482. int retry;
  483. int error;
  484. c = v4l2_get_subdevdata(sd);
  485. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  486. error = i2c_smbus_write_byte_data(c, addr, value);
  487. if (error >= 0)
  488. return 0;
  489. v4l2_warn(sd, "Write: retry ... %d\n", retry);
  490. msleep_interruptible(10);
  491. }
  492. v4l2_err(sd, "TVP7002 write error %d\n", error);
  493. return error;
  494. }
  495. /*
  496. * tvp7002_write_err() - Write a register value with error code
  497. * @sd: pointer to standard V4L2 sub-device structure
  498. * @reg: destination register
  499. * @val: value to be written
  500. * @error: pointer to error value
  501. *
  502. * Write a value in a register and save error value in pointer.
  503. * Also update the register table if successful
  504. */
  505. static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
  506. u8 val, int *err)
  507. {
  508. if (!*err)
  509. *err = tvp7002_write(sd, reg, val);
  510. }
  511. /*
  512. * tvp7002_g_chip_ident() - Get chip identification number
  513. * @sd: ptr to v4l2_subdev struct
  514. * @chip: ptr to v4l2_dbg_chip_ident struct
  515. *
  516. * Obtains the chip's identification number.
  517. * Returns zero or -EINVAL if read operation fails.
  518. */
  519. static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
  520. struct v4l2_dbg_chip_ident *chip)
  521. {
  522. u8 rev;
  523. int error;
  524. struct i2c_client *client = v4l2_get_subdevdata(sd);
  525. error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
  526. if (error < 0)
  527. return error;
  528. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
  529. }
  530. /*
  531. * tvp7002_write_inittab() - Write initialization values
  532. * @sd: ptr to v4l2_subdev struct
  533. * @regs: ptr to i2c_reg_value struct
  534. *
  535. * Write initialization values.
  536. * Returns zero or -EINVAL if read operation fails.
  537. */
  538. static int tvp7002_write_inittab(struct v4l2_subdev *sd,
  539. const struct i2c_reg_value *regs)
  540. {
  541. int error = 0;
  542. /* Initialize the first (defined) registers */
  543. while (TVP7002_EOR != regs->reg) {
  544. if (TVP7002_WRITE == regs->type)
  545. tvp7002_write_err(sd, regs->reg, regs->value, &error);
  546. regs++;
  547. }
  548. return error;
  549. }
  550. /*
  551. * tvp7002_s_dv_preset() - Set digital video preset
  552. * @sd: ptr to v4l2_subdev struct
  553. * @std: ptr to v4l2_dv_preset struct
  554. *
  555. * Set the digital video preset for a TVP7002 decoder device.
  556. * Returns zero when successful or -EINVAL if register access fails.
  557. */
  558. static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
  559. struct v4l2_dv_preset *dv_preset)
  560. {
  561. struct tvp7002 *device = to_tvp7002(sd);
  562. u32 preset;
  563. int i;
  564. for (i = 0; i < NUM_PRESETS; i++) {
  565. preset = tvp7002_presets[i].preset;
  566. if (preset == dv_preset->preset) {
  567. device->current_preset = &tvp7002_presets[i];
  568. return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
  569. }
  570. }
  571. return -EINVAL;
  572. }
  573. /*
  574. * tvp7002_g_ctrl() - Get a control
  575. * @sd: ptr to v4l2_subdev struct
  576. * @ctrl: ptr to v4l2_control struct
  577. *
  578. * Get a control for a TVP7002 decoder device.
  579. * Returns zero when successful or -EINVAL if register access fails.
  580. */
  581. static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  582. {
  583. struct tvp7002 *device = to_tvp7002(sd);
  584. switch (ctrl->id) {
  585. case V4L2_CID_GAIN:
  586. ctrl->value = device->gain;
  587. return 0;
  588. default:
  589. return -EINVAL;
  590. }
  591. }
  592. /*
  593. * tvp7002_s_ctrl() - Set a control
  594. * @sd: ptr to v4l2_subdev struct
  595. * @ctrl: ptr to v4l2_control struct
  596. *
  597. * Set a control in TVP7002 decoder device.
  598. * Returns zero when successful or -EINVAL if register access fails.
  599. */
  600. static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  601. {
  602. struct tvp7002 *device = to_tvp7002(sd);
  603. int error = 0;
  604. switch (ctrl->id) {
  605. case V4L2_CID_GAIN:
  606. tvp7002_write_err(sd, TVP7002_R_FINE_GAIN,
  607. ctrl->value & 0xff, &error);
  608. tvp7002_write_err(sd, TVP7002_G_FINE_GAIN,
  609. ctrl->value & 0xff, &error);
  610. tvp7002_write_err(sd, TVP7002_B_FINE_GAIN,
  611. ctrl->value & 0xff, &error);
  612. if (error < 0)
  613. return error;
  614. /* Set only after knowing there is no error */
  615. device->gain = ctrl->value & 0xff;
  616. return 0;
  617. default:
  618. return -EINVAL;
  619. }
  620. }
  621. /*
  622. * tvp7002_queryctrl() - Query a control
  623. * @sd: ptr to v4l2_subdev struct
  624. * @ctrl: ptr to v4l2_queryctrl struct
  625. *
  626. * Query a control of a TVP7002 decoder device.
  627. * Returns zero when successful or -EINVAL if register read fails.
  628. */
  629. static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  630. {
  631. switch (qc->id) {
  632. case V4L2_CID_GAIN:
  633. /*
  634. * Gain is supported [0-255, default=0, step=1]
  635. */
  636. return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);
  637. default:
  638. return -EINVAL;
  639. }
  640. }
  641. /*
  642. * tvp7002_try_fmt_cap() - V4L2 decoder interface handler for try_fmt
  643. * @sd: pointer to standard V4L2 sub-device structure
  644. * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure
  645. *
  646. * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
  647. * ioctl is used to negotiate the image capture size and pixel format
  648. * without actually making it take effect.
  649. */
  650. static int tvp7002_try_fmt_cap(struct v4l2_subdev *sd, struct v4l2_format *f)
  651. {
  652. struct tvp7002 *device = to_tvp7002(sd);
  653. struct v4l2_dv_enum_preset e_preset;
  654. struct v4l2_pix_format *pix;
  655. int error = 0;
  656. pix = &f->fmt.pix;
  657. /* Calculate height and width based on current standard */
  658. error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
  659. if (error)
  660. return -EINVAL;
  661. pix->width = e_preset.width;
  662. pix->height = e_preset.height;
  663. pix->pixelformat = V4L2_PIX_FMT_UYVY;
  664. pix->field = device->current_preset->scanmode;
  665. pix->bytesperline = pix->width * 2;
  666. pix->sizeimage = pix->bytesperline * pix->height;
  667. pix->colorspace = device->current_preset->color_space;
  668. pix->priv = 0;
  669. v4l2_dbg(1, debug, sd, "Try FMT: pixelformat - %s, bytesperline - %d"
  670. "Width - %d, Height - %d", "8-bit UYVY 4:2:2 Format",
  671. pix->bytesperline, pix->width, pix->height);
  672. return error;
  673. }
  674. /*
  675. * tvp7002_s_fmt() - V4L2 decoder interface handler for s_fmt
  676. * @sd: pointer to standard V4L2 sub-device structure
  677. * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure
  678. *
  679. * If the requested format is supported, configures the HW to use that
  680. * format, returns error code if format not supported or HW can't be
  681. * correctly configured.
  682. */
  683. static int tvp7002_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
  684. {
  685. struct tvp7002 *decoder = to_tvp7002(sd);
  686. int rval;
  687. rval = tvp7002_try_fmt_cap(sd, f);
  688. if (!rval)
  689. decoder->pix = f->fmt.pix;
  690. return rval;
  691. }
  692. /*
  693. * tvp7002_g_fmt() - V4L2 decoder interface handler for tvp7002_g_fmt
  694. * @sd: pointer to standard V4L2 sub-device structure
  695. * @f: pointer to standard V4L2 v4l2_format structure
  696. *
  697. * Returns the decoder's current pixel format in the v4l2_format
  698. * parameter.
  699. */
  700. static int tvp7002_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
  701. {
  702. struct tvp7002 *decoder = to_tvp7002(sd);
  703. f->fmt.pix = decoder->pix;
  704. v4l2_dbg(1, debug, sd, "Current FMT: bytesperline - %d"
  705. "Width - %d, Height - %d",
  706. decoder->pix.bytesperline,
  707. decoder->pix.width, decoder->pix.height);
  708. return 0;
  709. }
  710. /*
  711. * tvp7002_query_dv_preset() - query DV preset
  712. * @sd: pointer to standard V4L2 sub-device structure
  713. * @std_id: standard V4L2 v4l2_dv_preset
  714. *
  715. * Returns the current DV preset by TVP7002. If no active input is
  716. * detected, returns -EINVAL
  717. */
  718. static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
  719. struct v4l2_dv_preset *qpreset)
  720. {
  721. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  722. struct v4l2_dv_enum_preset e_preset;
  723. struct tvp7002 *device;
  724. u8 progressive;
  725. u32 lpfr;
  726. u32 cpln;
  727. int error = 0;
  728. u8 lpf_lsb;
  729. u8 lpf_msb;
  730. u8 cpl_lsb;
  731. u8 cpl_msb;
  732. int index;
  733. device = to_tvp7002(sd);
  734. /* Read standards from device registers */
  735. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
  736. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
  737. if (error < 0)
  738. return error;
  739. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
  740. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
  741. if (error < 0)
  742. return error;
  743. /* Get lines per frame, clocks per line and interlaced/progresive */
  744. lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
  745. cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
  746. progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
  747. /* Do checking of video modes */
  748. for (index = 0; index < NUM_PRESETS; index++, presets++)
  749. if (lpfr == presets->lines_per_frame &&
  750. progressive == presets->progressive) {
  751. if (presets->cpl_min == 0xffff)
  752. break;
  753. if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
  754. break;
  755. }
  756. if (index == NUM_PRESETS) {
  757. v4l2_err(sd, "querystd error, lpf = %x, cpl = %x\n",
  758. lpfr, cpln);
  759. return -EINVAL;
  760. }
  761. if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
  762. return -EINVAL;
  763. /* Set values in found preset */
  764. qpreset->preset = presets->preset;
  765. /* Update lines per frame and clocks per line info */
  766. v4l2_dbg(1, debug, sd, "Current preset: %d %d",
  767. e_preset.width, e_preset.height);
  768. return 0;
  769. }
  770. #ifdef CONFIG_VIDEO_ADV_DEBUG
  771. /*
  772. * tvp7002_g_register() - Get the value of a register
  773. * @sd: ptr to v4l2_subdev struct
  774. * @vreg: ptr to v4l2_dbg_register struct
  775. *
  776. * Get the value of a TVP7002 decoder device register.
  777. * Returns zero when successful, -EINVAL if register read fails or
  778. * access to I2C client fails, -EPERM if the call is not allowed
  779. * by diabled CAP_SYS_ADMIN.
  780. */
  781. static int tvp7002_g_register(struct v4l2_subdev *sd,
  782. struct v4l2_dbg_register *reg)
  783. {
  784. struct i2c_client *client = v4l2_get_subdevdata(sd);
  785. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  786. return -EINVAL;
  787. if (!capable(CAP_SYS_ADMIN))
  788. return -EPERM;
  789. return reg->val < 0 ? -EINVAL : 0;
  790. }
  791. /*
  792. * tvp7002_s_register() - set a control
  793. * @sd: ptr to v4l2_subdev struct
  794. * @ctrl: ptr to v4l2_control struct
  795. *
  796. * Get the value of a TVP7002 decoder device register.
  797. * Returns zero when successful, -EINVAL if register read fails or
  798. * -EPERM if call not allowed.
  799. */
  800. static int tvp7002_s_register(struct v4l2_subdev *sd,
  801. struct v4l2_dbg_register *reg)
  802. {
  803. struct i2c_client *client = v4l2_get_subdevdata(sd);
  804. struct tvp7002 *device = to_tvp7002(sd);
  805. int wres;
  806. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  807. return -EINVAL;
  808. if (!capable(CAP_SYS_ADMIN))
  809. return -EPERM;
  810. wres = tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
  811. /* Update the register value in device's table */
  812. if (!wres)
  813. device->registers[reg->reg].value = reg->val;
  814. return wres < 0 ? -EINVAL : 0;
  815. }
  816. #endif
  817. /*
  818. * tvp7002_enum_fmt() - Enum supported formats
  819. * @sd: pointer to standard V4L2 sub-device structure
  820. * @enable: pointer to format struct
  821. *
  822. * Enumerate supported formats.
  823. */
  824. static int tvp7002_enum_fmt(struct v4l2_subdev *sd,
  825. struct v4l2_fmtdesc *fmtdesc)
  826. {
  827. /* Check requested format index is within range */
  828. if (fmtdesc->index < 0 || fmtdesc->index >= NUM_FORMATS)
  829. return -EINVAL;
  830. *fmtdesc = tvp7002_fmt_list[fmtdesc->index];
  831. return 0;
  832. }
  833. /*
  834. * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
  835. * @sd: pointer to standard V4L2 sub-device structure
  836. * @enable: streaming enable or disable
  837. *
  838. * Sets streaming to enable or disable, if possible.
  839. */
  840. static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
  841. {
  842. struct tvp7002 *device = to_tvp7002(sd);
  843. int error = 0;
  844. if (device->streaming == enable)
  845. return 0;
  846. if (enable) {
  847. /* Set output state on (low impedance means stream on) */
  848. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
  849. device->streaming = enable;
  850. } else {
  851. /* Set output state off (high impedance means stream off) */
  852. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
  853. if (error)
  854. v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
  855. device->streaming = enable;
  856. }
  857. return error;
  858. }
  859. /*
  860. * tvp7002_log_status() - Print information about register settings
  861. * @sd: ptr to v4l2_subdev struct
  862. *
  863. * Log register values of a TVP7002 decoder device.
  864. * Returns zero or -EINVAL if read operation fails.
  865. */
  866. static int tvp7002_log_status(struct v4l2_subdev *sd)
  867. {
  868. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  869. struct tvp7002 *device = to_tvp7002(sd);
  870. struct v4l2_dv_enum_preset e_preset;
  871. struct v4l2_dv_preset detected;
  872. int i;
  873. detected.preset = V4L2_DV_INVALID;
  874. /* Find my current standard*/
  875. tvp7002_query_dv_preset(sd, &detected);
  876. /* Print standard related code values */
  877. for (i = 0; i < NUM_PRESETS; i++, presets++)
  878. if (presets->preset == detected.preset)
  879. break;
  880. if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
  881. return -EINVAL;
  882. v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
  883. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  884. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  885. if (i == NUM_PRESETS) {
  886. v4l2_info(sd, "Detected DV Preset: None\n");
  887. } else {
  888. if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
  889. return -EINVAL;
  890. v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
  891. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  892. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  893. }
  894. v4l2_info(sd, "Streaming enabled: %s\n",
  895. device->streaming ? "yes" : "no");
  896. /* Print the current value of the gain control */
  897. v4l2_info(sd, "Gain: %u\n", device->gain);
  898. return 0;
  899. }
  900. /* V4L2 core operation handlers */
  901. static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
  902. .g_chip_ident = tvp7002_g_chip_ident,
  903. .log_status = tvp7002_log_status,
  904. .g_ctrl = tvp7002_g_ctrl,
  905. .s_ctrl = tvp7002_s_ctrl,
  906. .queryctrl = tvp7002_queryctrl,
  907. #ifdef CONFIG_VIDEO_ADV_DEBUG
  908. .g_register = tvp7002_g_register,
  909. .s_register = tvp7002_s_register,
  910. #endif
  911. };
  912. /* Specific video subsystem operation handlers */
  913. static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
  914. .s_dv_preset = tvp7002_s_dv_preset,
  915. .query_dv_preset = tvp7002_query_dv_preset,
  916. .s_stream = tvp7002_s_stream,
  917. .g_fmt = tvp7002_g_fmt,
  918. .s_fmt = tvp7002_s_fmt,
  919. .enum_fmt = tvp7002_enum_fmt,
  920. };
  921. /* V4L2 top level operation handlers */
  922. static const struct v4l2_subdev_ops tvp7002_ops = {
  923. .core = &tvp7002_core_ops,
  924. .video = &tvp7002_video_ops,
  925. };
  926. static struct tvp7002 tvp7002_dev = {
  927. .streaming = 0,
  928. .pix = {
  929. .width = 1280,
  930. .height = 720,
  931. .pixelformat = V4L2_PIX_FMT_UYVY,
  932. .field = V4L2_FIELD_NONE,
  933. .bytesperline = 1280 * 2,
  934. .sizeimage = 1280 * 2 * 720,
  935. .colorspace = V4L2_COLORSPACE_REC709,
  936. },
  937. .current_preset = tvp7002_presets,
  938. .gain = 0,
  939. };
  940. /*
  941. * tvp7002_probe - Probe a TVP7002 device
  942. * @sd: ptr to v4l2_subdev struct
  943. * @ctrl: ptr to i2c_device_id struct
  944. *
  945. * Initialize the TVP7002 device
  946. * Returns zero when successful, -EINVAL if register read fails or
  947. * -EIO if i2c access is not available.
  948. */
  949. static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
  950. {
  951. struct v4l2_subdev *sd;
  952. struct tvp7002 *device;
  953. struct v4l2_dv_preset preset;
  954. int polarity_a;
  955. int polarity_b;
  956. u8 revision;
  957. int error;
  958. /* Check if the adapter supports the needed features */
  959. if (!i2c_check_functionality(c->adapter,
  960. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  961. return -EIO;
  962. if (!c->dev.platform_data) {
  963. v4l_err(c, "No platform data!!\n");
  964. return -ENODEV;
  965. }
  966. device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL);
  967. if (!device)
  968. return -ENOMEM;
  969. *device = tvp7002_dev;
  970. sd = &device->sd;
  971. device->pdata = c->dev.platform_data;
  972. /* Tell v4l2 the device is ready */
  973. v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
  974. v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
  975. c->addr, c->adapter->name);
  976. error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
  977. if (error < 0)
  978. goto found_error;
  979. /* Get revision number */
  980. v4l2_info(sd, "Rev. %02x detected.\n", revision);
  981. if (revision != 0x02)
  982. v4l2_info(sd, "Unknown revision detected.\n");
  983. /* Initializes TVP7002 to its default values */
  984. error = tvp7002_write_inittab(sd, tvp7002_init_default);
  985. if (error < 0)
  986. goto found_error;
  987. /* Set polarity information after registers have been set */
  988. polarity_a = 0x20 | device->pdata->hs_polarity << 5
  989. | device->pdata->vs_polarity << 2;
  990. error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
  991. if (error < 0)
  992. goto found_error;
  993. polarity_b = 0x01 | device->pdata->fid_polarity << 2
  994. | device->pdata->sog_polarity << 1
  995. | device->pdata->clk_polarity;
  996. error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
  997. if (error < 0)
  998. goto found_error;
  999. /* Set registers according to default video mode */
  1000. preset.preset = device->current_preset->preset;
  1001. error = tvp7002_s_dv_preset(sd, &preset);
  1002. found_error:
  1003. if (error < 0)
  1004. kfree(device);
  1005. return error;
  1006. }
  1007. /*
  1008. * tvp7002_remove - Remove TVP7002 device support
  1009. * @c: ptr to i2c_client struct
  1010. *
  1011. * Reset the TVP7002 device
  1012. * Returns zero.
  1013. */
  1014. static int tvp7002_remove(struct i2c_client *c)
  1015. {
  1016. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  1017. struct tvp7002 *device = to_tvp7002(sd);
  1018. v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
  1019. "on address 0x%x\n", c->addr);
  1020. v4l2_device_unregister_subdev(sd);
  1021. kfree(device);
  1022. return 0;
  1023. }
  1024. /* I2C Device ID table */
  1025. static const struct i2c_device_id tvp7002_id[] = {
  1026. { "tvp7002", 0 },
  1027. { }
  1028. };
  1029. MODULE_DEVICE_TABLE(i2c, tvp7002_id);
  1030. /* I2C driver data */
  1031. static struct i2c_driver tvp7002_driver = {
  1032. .driver = {
  1033. .owner = THIS_MODULE,
  1034. .name = TVP7002_MODULE_NAME,
  1035. },
  1036. .probe = tvp7002_probe,
  1037. .remove = tvp7002_remove,
  1038. .id_table = tvp7002_id,
  1039. };
  1040. /*
  1041. * tvp7002_init - Initialize driver via I2C interface
  1042. *
  1043. * Register the TVP7002 driver.
  1044. * Return 0 on success or error code on failure.
  1045. */
  1046. static int __init tvp7002_init(void)
  1047. {
  1048. return i2c_add_driver(&tvp7002_driver);
  1049. }
  1050. /*
  1051. * tvp7002_exit - Remove driver via I2C interface
  1052. *
  1053. * Unregister the TVP7002 driver.
  1054. * Returns nothing.
  1055. */
  1056. static void __exit tvp7002_exit(void)
  1057. {
  1058. i2c_del_driver(&tvp7002_driver);
  1059. }
  1060. module_init(tvp7002_init);
  1061. module_exit(tvp7002_exit);