ad5764.c 8.5 KB

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  1. /*
  2. * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
  3. * Digital to Analog Converters driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #define AD5764_REG_SF_NOP 0x0
  20. #define AD5764_REG_SF_CONFIG 0x1
  21. #define AD5764_REG_SF_CLEAR 0x4
  22. #define AD5764_REG_SF_LOAD 0x5
  23. #define AD5764_REG_DATA(x) ((2 << 3) | (x))
  24. #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
  25. #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
  26. #define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
  27. #define AD5764_NUM_CHANNELS 4
  28. /**
  29. * struct ad5764_chip_info - chip specific information
  30. * @int_vref: Value of the internal reference voltage in uV - 0 if external
  31. * reference voltage is used
  32. * @channel channel specification
  33. */
  34. struct ad5764_chip_info {
  35. unsigned long int_vref;
  36. const struct iio_chan_spec *channels;
  37. };
  38. /**
  39. * struct ad5764_state - driver instance specific data
  40. * @spi: spi_device
  41. * @chip_info: chip info
  42. * @vref_reg: vref supply regulators
  43. * @data: spi transfer buffers
  44. */
  45. struct ad5764_state {
  46. struct spi_device *spi;
  47. const struct ad5764_chip_info *chip_info;
  48. struct regulator_bulk_data vref_reg[2];
  49. /*
  50. * DMA (thus cache coherency maintenance) requires the
  51. * transfer buffers to live in their own cache lines.
  52. */
  53. union {
  54. __be32 d32;
  55. u8 d8[4];
  56. } data[2] ____cacheline_aligned;
  57. };
  58. enum ad5764_type {
  59. ID_AD5744,
  60. ID_AD5744R,
  61. ID_AD5764,
  62. ID_AD5764R,
  63. };
  64. #define AD5764_CHANNEL(_chan, _bits) { \
  65. .type = IIO_VOLTAGE, \
  66. .indexed = 1, \
  67. .output = 1, \
  68. .channel = (_chan), \
  69. .address = (_chan), \
  70. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  71. BIT(IIO_CHAN_INFO_SCALE) | \
  72. BIT(IIO_CHAN_INFO_CALIBSCALE) | \
  73. BIT(IIO_CHAN_INFO_CALIBBIAS), \
  74. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \
  75. .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
  76. }
  77. #define DECLARE_AD5764_CHANNELS(_name, _bits) \
  78. const struct iio_chan_spec _name##_channels[] = { \
  79. AD5764_CHANNEL(0, (_bits)), \
  80. AD5764_CHANNEL(1, (_bits)), \
  81. AD5764_CHANNEL(2, (_bits)), \
  82. AD5764_CHANNEL(3, (_bits)), \
  83. };
  84. static DECLARE_AD5764_CHANNELS(ad5764, 16);
  85. static DECLARE_AD5764_CHANNELS(ad5744, 14);
  86. static const struct ad5764_chip_info ad5764_chip_infos[] = {
  87. [ID_AD5744] = {
  88. .int_vref = 0,
  89. .channels = ad5744_channels,
  90. },
  91. [ID_AD5744R] = {
  92. .int_vref = 5000000,
  93. .channels = ad5744_channels,
  94. },
  95. [ID_AD5764] = {
  96. .int_vref = 0,
  97. .channels = ad5764_channels,
  98. },
  99. [ID_AD5764R] = {
  100. .int_vref = 5000000,
  101. .channels = ad5764_channels,
  102. },
  103. };
  104. static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
  105. unsigned int val)
  106. {
  107. struct ad5764_state *st = iio_priv(indio_dev);
  108. int ret;
  109. mutex_lock(&indio_dev->mlock);
  110. st->data[0].d32 = cpu_to_be32((reg << 16) | val);
  111. ret = spi_write(st->spi, &st->data[0].d8[1], 3);
  112. mutex_unlock(&indio_dev->mlock);
  113. return ret;
  114. }
  115. static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
  116. unsigned int *val)
  117. {
  118. struct ad5764_state *st = iio_priv(indio_dev);
  119. int ret;
  120. struct spi_transfer t[] = {
  121. {
  122. .tx_buf = &st->data[0].d8[1],
  123. .len = 3,
  124. .cs_change = 1,
  125. }, {
  126. .rx_buf = &st->data[1].d8[1],
  127. .len = 3,
  128. },
  129. };
  130. mutex_lock(&indio_dev->mlock);
  131. st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
  132. ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
  133. if (ret >= 0)
  134. *val = be32_to_cpu(st->data[1].d32) & 0xffff;
  135. mutex_unlock(&indio_dev->mlock);
  136. return ret;
  137. }
  138. static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
  139. {
  140. switch (info) {
  141. case 0:
  142. return AD5764_REG_DATA(chan->address);
  143. case IIO_CHAN_INFO_CALIBBIAS:
  144. return AD5764_REG_OFFSET(chan->address);
  145. case IIO_CHAN_INFO_CALIBSCALE:
  146. return AD5764_REG_FINE_GAIN(chan->address);
  147. default:
  148. break;
  149. }
  150. return 0;
  151. }
  152. static int ad5764_write_raw(struct iio_dev *indio_dev,
  153. struct iio_chan_spec const *chan, int val, int val2, long info)
  154. {
  155. const int max_val = (1 << chan->scan_type.realbits);
  156. unsigned int reg;
  157. switch (info) {
  158. case IIO_CHAN_INFO_RAW:
  159. if (val >= max_val || val < 0)
  160. return -EINVAL;
  161. val <<= chan->scan_type.shift;
  162. break;
  163. case IIO_CHAN_INFO_CALIBBIAS:
  164. if (val >= 128 || val < -128)
  165. return -EINVAL;
  166. break;
  167. case IIO_CHAN_INFO_CALIBSCALE:
  168. if (val >= 32 || val < -32)
  169. return -EINVAL;
  170. break;
  171. default:
  172. return -EINVAL;
  173. }
  174. reg = ad5764_chan_info_to_reg(chan, info);
  175. return ad5764_write(indio_dev, reg, (u16)val);
  176. }
  177. static int ad5764_get_channel_vref(struct ad5764_state *st,
  178. unsigned int channel)
  179. {
  180. if (st->chip_info->int_vref)
  181. return st->chip_info->int_vref;
  182. else
  183. return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
  184. }
  185. static int ad5764_read_raw(struct iio_dev *indio_dev,
  186. struct iio_chan_spec const *chan, int *val, int *val2, long info)
  187. {
  188. struct ad5764_state *st = iio_priv(indio_dev);
  189. unsigned int reg;
  190. int vref;
  191. int ret;
  192. switch (info) {
  193. case IIO_CHAN_INFO_RAW:
  194. reg = AD5764_REG_DATA(chan->address);
  195. ret = ad5764_read(indio_dev, reg, val);
  196. if (ret < 0)
  197. return ret;
  198. *val >>= chan->scan_type.shift;
  199. return IIO_VAL_INT;
  200. case IIO_CHAN_INFO_CALIBBIAS:
  201. reg = AD5764_REG_OFFSET(chan->address);
  202. ret = ad5764_read(indio_dev, reg, val);
  203. if (ret < 0)
  204. return ret;
  205. *val = sign_extend32(*val, 7);
  206. return IIO_VAL_INT;
  207. case IIO_CHAN_INFO_CALIBSCALE:
  208. reg = AD5764_REG_FINE_GAIN(chan->address);
  209. ret = ad5764_read(indio_dev, reg, val);
  210. if (ret < 0)
  211. return ret;
  212. *val = sign_extend32(*val, 5);
  213. return IIO_VAL_INT;
  214. case IIO_CHAN_INFO_SCALE:
  215. /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */
  216. vref = ad5764_get_channel_vref(st, chan->channel);
  217. if (vref < 0)
  218. return vref;
  219. *val = vref * 4 / 1000;
  220. *val2 = chan->scan_type.realbits;
  221. return IIO_VAL_FRACTIONAL_LOG2;
  222. case IIO_CHAN_INFO_OFFSET:
  223. *val = -(1 << chan->scan_type.realbits) / 2;
  224. return IIO_VAL_INT;
  225. }
  226. return -EINVAL;
  227. }
  228. static const struct iio_info ad5764_info = {
  229. .read_raw = ad5764_read_raw,
  230. .write_raw = ad5764_write_raw,
  231. .driver_module = THIS_MODULE,
  232. };
  233. static int ad5764_probe(struct spi_device *spi)
  234. {
  235. enum ad5764_type type = spi_get_device_id(spi)->driver_data;
  236. struct iio_dev *indio_dev;
  237. struct ad5764_state *st;
  238. int ret;
  239. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  240. if (indio_dev == NULL) {
  241. dev_err(&spi->dev, "Failed to allocate iio device\n");
  242. return -ENOMEM;
  243. }
  244. st = iio_priv(indio_dev);
  245. spi_set_drvdata(spi, indio_dev);
  246. st->spi = spi;
  247. st->chip_info = &ad5764_chip_infos[type];
  248. indio_dev->dev.parent = &spi->dev;
  249. indio_dev->name = spi_get_device_id(spi)->name;
  250. indio_dev->info = &ad5764_info;
  251. indio_dev->modes = INDIO_DIRECT_MODE;
  252. indio_dev->num_channels = AD5764_NUM_CHANNELS;
  253. indio_dev->channels = st->chip_info->channels;
  254. if (st->chip_info->int_vref == 0) {
  255. st->vref_reg[0].supply = "vrefAB";
  256. st->vref_reg[1].supply = "vrefCD";
  257. ret = devm_regulator_bulk_get(&st->spi->dev,
  258. ARRAY_SIZE(st->vref_reg), st->vref_reg);
  259. if (ret) {
  260. dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
  261. ret);
  262. return ret;
  263. }
  264. ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
  265. st->vref_reg);
  266. if (ret) {
  267. dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
  268. ret);
  269. return ret;
  270. }
  271. }
  272. ret = iio_device_register(indio_dev);
  273. if (ret) {
  274. dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
  275. goto error_disable_reg;
  276. }
  277. return 0;
  278. error_disable_reg:
  279. if (st->chip_info->int_vref == 0)
  280. regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  281. return ret;
  282. }
  283. static int ad5764_remove(struct spi_device *spi)
  284. {
  285. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  286. struct ad5764_state *st = iio_priv(indio_dev);
  287. iio_device_unregister(indio_dev);
  288. if (st->chip_info->int_vref == 0)
  289. regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  290. return 0;
  291. }
  292. static const struct spi_device_id ad5764_ids[] = {
  293. { "ad5744", ID_AD5744 },
  294. { "ad5744r", ID_AD5744R },
  295. { "ad5764", ID_AD5764 },
  296. { "ad5764r", ID_AD5764R },
  297. { }
  298. };
  299. MODULE_DEVICE_TABLE(spi, ad5764_ids);
  300. static struct spi_driver ad5764_driver = {
  301. .driver = {
  302. .name = "ad5764",
  303. .owner = THIS_MODULE,
  304. },
  305. .probe = ad5764_probe,
  306. .remove = ad5764_remove,
  307. .id_table = ad5764_ids,
  308. };
  309. module_spi_driver(ad5764_driver);
  310. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  311. MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
  312. MODULE_LICENSE("GPL v2");