ad7266.c 13 KB

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  1. /*
  2. * AD7266/65 SPI ADC driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/buffer.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #include <linux/platform_data/ad7266.h>
  22. struct ad7266_state {
  23. struct spi_device *spi;
  24. struct regulator *reg;
  25. unsigned long vref_mv;
  26. struct spi_transfer single_xfer[3];
  27. struct spi_message single_msg;
  28. enum ad7266_range range;
  29. enum ad7266_mode mode;
  30. bool fixed_addr;
  31. struct gpio gpios[3];
  32. /*
  33. * DMA (thus cache coherency maintenance) requires the
  34. * transfer buffers to live in their own cache lines.
  35. * The buffer needs to be large enough to hold two samples (4 bytes) and
  36. * the naturally aligned timestamp (8 bytes).
  37. */
  38. uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
  39. };
  40. static int ad7266_wakeup(struct ad7266_state *st)
  41. {
  42. /* Any read with >= 2 bytes will wake the device */
  43. return spi_read(st->spi, st->data, 2);
  44. }
  45. static int ad7266_powerdown(struct ad7266_state *st)
  46. {
  47. /* Any read with < 2 bytes will powerdown the device */
  48. return spi_read(st->spi, st->data, 1);
  49. }
  50. static int ad7266_preenable(struct iio_dev *indio_dev)
  51. {
  52. struct ad7266_state *st = iio_priv(indio_dev);
  53. return ad7266_wakeup(st);
  54. }
  55. static int ad7266_postdisable(struct iio_dev *indio_dev)
  56. {
  57. struct ad7266_state *st = iio_priv(indio_dev);
  58. return ad7266_powerdown(st);
  59. }
  60. static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
  61. .preenable = &ad7266_preenable,
  62. .postenable = &iio_triggered_buffer_postenable,
  63. .predisable = &iio_triggered_buffer_predisable,
  64. .postdisable = &ad7266_postdisable,
  65. };
  66. static irqreturn_t ad7266_trigger_handler(int irq, void *p)
  67. {
  68. struct iio_poll_func *pf = p;
  69. struct iio_dev *indio_dev = pf->indio_dev;
  70. struct ad7266_state *st = iio_priv(indio_dev);
  71. int ret;
  72. ret = spi_read(st->spi, st->data, 4);
  73. if (ret == 0) {
  74. iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  75. pf->timestamp);
  76. }
  77. iio_trigger_notify_done(indio_dev->trig);
  78. return IRQ_HANDLED;
  79. }
  80. static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
  81. {
  82. unsigned int i;
  83. if (st->fixed_addr)
  84. return;
  85. switch (st->mode) {
  86. case AD7266_MODE_SINGLE_ENDED:
  87. nr >>= 1;
  88. break;
  89. case AD7266_MODE_PSEUDO_DIFF:
  90. nr |= 1;
  91. break;
  92. case AD7266_MODE_DIFF:
  93. nr &= ~1;
  94. break;
  95. }
  96. for (i = 0; i < 3; ++i)
  97. gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
  98. }
  99. static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
  100. const unsigned long *scan_mask)
  101. {
  102. struct ad7266_state *st = iio_priv(indio_dev);
  103. unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
  104. ad7266_select_input(st, nr);
  105. return 0;
  106. }
  107. static int ad7266_read_single(struct ad7266_state *st, int *val,
  108. unsigned int address)
  109. {
  110. int ret;
  111. ad7266_select_input(st, address);
  112. ret = spi_sync(st->spi, &st->single_msg);
  113. *val = be16_to_cpu(st->data[address % 2]);
  114. return ret;
  115. }
  116. static int ad7266_read_raw(struct iio_dev *indio_dev,
  117. struct iio_chan_spec const *chan, int *val, int *val2, long m)
  118. {
  119. struct ad7266_state *st = iio_priv(indio_dev);
  120. unsigned long scale_mv;
  121. int ret;
  122. switch (m) {
  123. case IIO_CHAN_INFO_RAW:
  124. if (iio_buffer_enabled(indio_dev))
  125. return -EBUSY;
  126. ret = ad7266_read_single(st, val, chan->address);
  127. if (ret)
  128. return ret;
  129. *val = (*val >> 2) & 0xfff;
  130. if (chan->scan_type.sign == 's')
  131. *val = sign_extend32(*val, 11);
  132. return IIO_VAL_INT;
  133. case IIO_CHAN_INFO_SCALE:
  134. scale_mv = st->vref_mv;
  135. if (st->mode == AD7266_MODE_DIFF)
  136. scale_mv *= 2;
  137. if (st->range == AD7266_RANGE_2VREF)
  138. scale_mv *= 2;
  139. *val = scale_mv;
  140. *val2 = chan->scan_type.realbits;
  141. return IIO_VAL_FRACTIONAL_LOG2;
  142. case IIO_CHAN_INFO_OFFSET:
  143. if (st->range == AD7266_RANGE_2VREF &&
  144. st->mode != AD7266_MODE_DIFF)
  145. *val = 2048;
  146. else
  147. *val = 0;
  148. return IIO_VAL_INT;
  149. }
  150. return -EINVAL;
  151. }
  152. #define AD7266_CHAN(_chan, _sign) { \
  153. .type = IIO_VOLTAGE, \
  154. .indexed = 1, \
  155. .channel = (_chan), \
  156. .address = (_chan), \
  157. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  158. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  159. | BIT(IIO_CHAN_INFO_OFFSET), \
  160. .scan_index = (_chan), \
  161. .scan_type = { \
  162. .sign = (_sign), \
  163. .realbits = 12, \
  164. .storagebits = 16, \
  165. .shift = 2, \
  166. .endianness = IIO_BE, \
  167. }, \
  168. }
  169. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
  170. const struct iio_chan_spec ad7266_channels_##_name[] = { \
  171. AD7266_CHAN(0, (_sign)), \
  172. AD7266_CHAN(1, (_sign)), \
  173. AD7266_CHAN(2, (_sign)), \
  174. AD7266_CHAN(3, (_sign)), \
  175. AD7266_CHAN(4, (_sign)), \
  176. AD7266_CHAN(5, (_sign)), \
  177. AD7266_CHAN(6, (_sign)), \
  178. AD7266_CHAN(7, (_sign)), \
  179. AD7266_CHAN(8, (_sign)), \
  180. AD7266_CHAN(9, (_sign)), \
  181. AD7266_CHAN(10, (_sign)), \
  182. AD7266_CHAN(11, (_sign)), \
  183. IIO_CHAN_SOFT_TIMESTAMP(13), \
  184. }
  185. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
  186. const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
  187. AD7266_CHAN(0, (_sign)), \
  188. AD7266_CHAN(1, (_sign)), \
  189. IIO_CHAN_SOFT_TIMESTAMP(2), \
  190. }
  191. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
  192. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
  193. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
  194. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
  195. #define AD7266_CHAN_DIFF(_chan, _sign) { \
  196. .type = IIO_VOLTAGE, \
  197. .indexed = 1, \
  198. .channel = (_chan) * 2, \
  199. .channel2 = (_chan) * 2 + 1, \
  200. .address = (_chan), \
  201. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  202. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  203. | BIT(IIO_CHAN_INFO_OFFSET), \
  204. .scan_index = (_chan), \
  205. .scan_type = { \
  206. .sign = _sign, \
  207. .realbits = 12, \
  208. .storagebits = 16, \
  209. .shift = 2, \
  210. .endianness = IIO_BE, \
  211. }, \
  212. .differential = 1, \
  213. }
  214. #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
  215. const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
  216. AD7266_CHAN_DIFF(0, (_sign)), \
  217. AD7266_CHAN_DIFF(1, (_sign)), \
  218. AD7266_CHAN_DIFF(2, (_sign)), \
  219. AD7266_CHAN_DIFF(3, (_sign)), \
  220. AD7266_CHAN_DIFF(4, (_sign)), \
  221. AD7266_CHAN_DIFF(5, (_sign)), \
  222. IIO_CHAN_SOFT_TIMESTAMP(6), \
  223. }
  224. static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
  225. static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
  226. #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
  227. const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
  228. AD7266_CHAN_DIFF(0, (_sign)), \
  229. AD7266_CHAN_DIFF(1, (_sign)), \
  230. IIO_CHAN_SOFT_TIMESTAMP(2), \
  231. }
  232. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
  233. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
  234. static const struct iio_info ad7266_info = {
  235. .read_raw = &ad7266_read_raw,
  236. .update_scan_mode = &ad7266_update_scan_mode,
  237. .driver_module = THIS_MODULE,
  238. };
  239. static const unsigned long ad7266_available_scan_masks[] = {
  240. 0x003,
  241. 0x00c,
  242. 0x030,
  243. 0x0c0,
  244. 0x300,
  245. 0xc00,
  246. 0x000,
  247. };
  248. static const unsigned long ad7266_available_scan_masks_diff[] = {
  249. 0x003,
  250. 0x00c,
  251. 0x030,
  252. 0x000,
  253. };
  254. static const unsigned long ad7266_available_scan_masks_fixed[] = {
  255. 0x003,
  256. 0x000,
  257. };
  258. struct ad7266_chan_info {
  259. const struct iio_chan_spec *channels;
  260. unsigned int num_channels;
  261. const unsigned long *scan_masks;
  262. };
  263. #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
  264. (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
  265. static const struct ad7266_chan_info ad7266_chan_infos[] = {
  266. [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
  267. .channels = ad7266_channels_u,
  268. .num_channels = ARRAY_SIZE(ad7266_channels_u),
  269. .scan_masks = ad7266_available_scan_masks,
  270. },
  271. [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
  272. .channels = ad7266_channels_u_fixed,
  273. .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
  274. .scan_masks = ad7266_available_scan_masks_fixed,
  275. },
  276. [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
  277. .channels = ad7266_channels_s,
  278. .num_channels = ARRAY_SIZE(ad7266_channels_s),
  279. .scan_masks = ad7266_available_scan_masks,
  280. },
  281. [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
  282. .channels = ad7266_channels_s_fixed,
  283. .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
  284. .scan_masks = ad7266_available_scan_masks_fixed,
  285. },
  286. [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
  287. .channels = ad7266_channels_diff_u,
  288. .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
  289. .scan_masks = ad7266_available_scan_masks_diff,
  290. },
  291. [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
  292. .channels = ad7266_channels_diff_fixed_u,
  293. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
  294. .scan_masks = ad7266_available_scan_masks_fixed,
  295. },
  296. [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
  297. .channels = ad7266_channels_diff_s,
  298. .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
  299. .scan_masks = ad7266_available_scan_masks_diff,
  300. },
  301. [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
  302. .channels = ad7266_channels_diff_fixed_s,
  303. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
  304. .scan_masks = ad7266_available_scan_masks_fixed,
  305. },
  306. };
  307. static void ad7266_init_channels(struct iio_dev *indio_dev)
  308. {
  309. struct ad7266_state *st = iio_priv(indio_dev);
  310. bool is_differential, is_signed;
  311. const struct ad7266_chan_info *chan_info;
  312. int i;
  313. is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
  314. is_signed = (st->range == AD7266_RANGE_2VREF) |
  315. (st->mode == AD7266_MODE_DIFF);
  316. i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
  317. chan_info = &ad7266_chan_infos[i];
  318. indio_dev->channels = chan_info->channels;
  319. indio_dev->num_channels = chan_info->num_channels;
  320. indio_dev->available_scan_masks = chan_info->scan_masks;
  321. indio_dev->masklength = chan_info->num_channels - 1;
  322. }
  323. static const char * const ad7266_gpio_labels[] = {
  324. "AD0", "AD1", "AD2",
  325. };
  326. static int ad7266_probe(struct spi_device *spi)
  327. {
  328. struct ad7266_platform_data *pdata = spi->dev.platform_data;
  329. struct iio_dev *indio_dev;
  330. struct ad7266_state *st;
  331. unsigned int i;
  332. int ret;
  333. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  334. if (indio_dev == NULL)
  335. return -ENOMEM;
  336. st = iio_priv(indio_dev);
  337. st->reg = devm_regulator_get(&spi->dev, "vref");
  338. if (!IS_ERR_OR_NULL(st->reg)) {
  339. ret = regulator_enable(st->reg);
  340. if (ret)
  341. return ret;
  342. ret = regulator_get_voltage(st->reg);
  343. if (ret < 0)
  344. goto error_disable_reg;
  345. st->vref_mv = ret / 1000;
  346. } else {
  347. /* Use internal reference */
  348. st->vref_mv = 2500;
  349. }
  350. if (pdata) {
  351. st->fixed_addr = pdata->fixed_addr;
  352. st->mode = pdata->mode;
  353. st->range = pdata->range;
  354. if (!st->fixed_addr) {
  355. for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
  356. st->gpios[i].gpio = pdata->addr_gpios[i];
  357. st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
  358. st->gpios[i].label = ad7266_gpio_labels[i];
  359. }
  360. ret = gpio_request_array(st->gpios,
  361. ARRAY_SIZE(st->gpios));
  362. if (ret)
  363. goto error_disable_reg;
  364. }
  365. } else {
  366. st->fixed_addr = true;
  367. st->range = AD7266_RANGE_VREF;
  368. st->mode = AD7266_MODE_DIFF;
  369. }
  370. spi_set_drvdata(spi, indio_dev);
  371. st->spi = spi;
  372. indio_dev->dev.parent = &spi->dev;
  373. indio_dev->name = spi_get_device_id(spi)->name;
  374. indio_dev->modes = INDIO_DIRECT_MODE;
  375. indio_dev->info = &ad7266_info;
  376. ad7266_init_channels(indio_dev);
  377. /* wakeup */
  378. st->single_xfer[0].rx_buf = &st->data;
  379. st->single_xfer[0].len = 2;
  380. st->single_xfer[0].cs_change = 1;
  381. /* conversion */
  382. st->single_xfer[1].rx_buf = &st->data;
  383. st->single_xfer[1].len = 4;
  384. st->single_xfer[1].cs_change = 1;
  385. /* powerdown */
  386. st->single_xfer[2].tx_buf = &st->data;
  387. st->single_xfer[2].len = 1;
  388. spi_message_init(&st->single_msg);
  389. spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
  390. spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
  391. spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
  392. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  393. &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
  394. if (ret)
  395. goto error_free_gpios;
  396. ret = iio_device_register(indio_dev);
  397. if (ret)
  398. goto error_buffer_cleanup;
  399. return 0;
  400. error_buffer_cleanup:
  401. iio_triggered_buffer_cleanup(indio_dev);
  402. error_free_gpios:
  403. if (!st->fixed_addr)
  404. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  405. error_disable_reg:
  406. if (!IS_ERR_OR_NULL(st->reg))
  407. regulator_disable(st->reg);
  408. return ret;
  409. }
  410. static int ad7266_remove(struct spi_device *spi)
  411. {
  412. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  413. struct ad7266_state *st = iio_priv(indio_dev);
  414. iio_device_unregister(indio_dev);
  415. iio_triggered_buffer_cleanup(indio_dev);
  416. if (!st->fixed_addr)
  417. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  418. if (!IS_ERR_OR_NULL(st->reg))
  419. regulator_disable(st->reg);
  420. return 0;
  421. }
  422. static const struct spi_device_id ad7266_id[] = {
  423. {"ad7265", 0},
  424. {"ad7266", 0},
  425. { }
  426. };
  427. MODULE_DEVICE_TABLE(spi, ad7266_id);
  428. static struct spi_driver ad7266_driver = {
  429. .driver = {
  430. .name = "ad7266",
  431. .owner = THIS_MODULE,
  432. },
  433. .probe = ad7266_probe,
  434. .remove = ad7266_remove,
  435. .id_table = ad7266_id,
  436. };
  437. module_spi_driver(ad7266_driver);
  438. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  439. MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
  440. MODULE_LICENSE("GPL v2");