dmatest.c 24 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. * Copyright (C) 2013 Intel Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/delay.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/dmaengine.h>
  15. #include <linux/freezer.h>
  16. #include <linux/init.h>
  17. #include <linux/kthread.h>
  18. #include <linux/module.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/random.h>
  21. #include <linux/slab.h>
  22. #include <linux/wait.h>
  23. #include <linux/ctype.h>
  24. #include <linux/debugfs.h>
  25. #include <linux/uaccess.h>
  26. #include <linux/seq_file.h>
  27. static unsigned int test_buf_size = 16384;
  28. module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  29. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  30. static char test_channel[20];
  31. module_param_string(channel, test_channel, sizeof(test_channel),
  32. S_IRUGO | S_IWUSR);
  33. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  34. static char test_device[20];
  35. module_param_string(device, test_device, sizeof(test_device),
  36. S_IRUGO | S_IWUSR);
  37. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  38. static unsigned int threads_per_chan = 1;
  39. module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  40. MODULE_PARM_DESC(threads_per_chan,
  41. "Number of threads to start per channel (default: 1)");
  42. static unsigned int max_channels;
  43. module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  44. MODULE_PARM_DESC(max_channels,
  45. "Maximum number of channels to use (default: all)");
  46. static unsigned int iterations;
  47. module_param(iterations, uint, S_IRUGO | S_IWUSR);
  48. MODULE_PARM_DESC(iterations,
  49. "Iterations before stopping test (default: infinite)");
  50. static unsigned int xor_sources = 3;
  51. module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  52. MODULE_PARM_DESC(xor_sources,
  53. "Number of xor source buffers (default: 3)");
  54. static unsigned int pq_sources = 3;
  55. module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  56. MODULE_PARM_DESC(pq_sources,
  57. "Number of p+q source buffers (default: 3)");
  58. static int timeout = 3000;
  59. module_param(timeout, uint, S_IRUGO | S_IWUSR);
  60. MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  61. "Pass -1 for infinite timeout");
  62. /* Maximum amount of mismatched bytes in buffer to print */
  63. #define MAX_ERROR_COUNT 32
  64. /*
  65. * Initialization patterns. All bytes in the source buffer has bit 7
  66. * set, all bytes in the destination buffer has bit 7 cleared.
  67. *
  68. * Bit 6 is set for all bytes which are to be copied by the DMA
  69. * engine. Bit 5 is set for all bytes which are to be overwritten by
  70. * the DMA engine.
  71. *
  72. * The remaining bits are the inverse of a counter which increments by
  73. * one for each byte address.
  74. */
  75. #define PATTERN_SRC 0x80
  76. #define PATTERN_DST 0x00
  77. #define PATTERN_COPY 0x40
  78. #define PATTERN_OVERWRITE 0x20
  79. #define PATTERN_COUNT_MASK 0x1f
  80. struct dmatest_info;
  81. struct dmatest_thread {
  82. struct list_head node;
  83. struct dmatest_info *info;
  84. struct task_struct *task;
  85. struct dma_chan *chan;
  86. u8 **srcs;
  87. u8 **dsts;
  88. enum dma_transaction_type type;
  89. bool done;
  90. };
  91. struct dmatest_chan {
  92. struct list_head node;
  93. struct dma_chan *chan;
  94. struct list_head threads;
  95. };
  96. /**
  97. * struct dmatest_params - test parameters.
  98. * @buf_size: size of the memcpy test buffer
  99. * @channel: bus ID of the channel to test
  100. * @device: bus ID of the DMA Engine to test
  101. * @threads_per_chan: number of threads to start per channel
  102. * @max_channels: maximum number of channels to use
  103. * @iterations: iterations before stopping test
  104. * @xor_sources: number of xor source buffers
  105. * @pq_sources: number of p+q source buffers
  106. * @timeout: transfer timeout in msec, -1 for infinite timeout
  107. */
  108. struct dmatest_params {
  109. unsigned int buf_size;
  110. char channel[20];
  111. char device[20];
  112. unsigned int threads_per_chan;
  113. unsigned int max_channels;
  114. unsigned int iterations;
  115. unsigned int xor_sources;
  116. unsigned int pq_sources;
  117. int timeout;
  118. };
  119. /**
  120. * struct dmatest_info - test information.
  121. * @params: test parameters
  122. * @lock: access protection to the fields of this structure
  123. */
  124. struct dmatest_info {
  125. /* Test parameters */
  126. struct dmatest_params params;
  127. /* Internal state */
  128. struct list_head channels;
  129. unsigned int nr_channels;
  130. struct mutex lock;
  131. /* debugfs related stuff */
  132. struct dentry *root;
  133. };
  134. static struct dmatest_info test_info;
  135. static bool dmatest_match_channel(struct dmatest_params *params,
  136. struct dma_chan *chan)
  137. {
  138. if (params->channel[0] == '\0')
  139. return true;
  140. return strcmp(dma_chan_name(chan), params->channel) == 0;
  141. }
  142. static bool dmatest_match_device(struct dmatest_params *params,
  143. struct dma_device *device)
  144. {
  145. if (params->device[0] == '\0')
  146. return true;
  147. return strcmp(dev_name(device->dev), params->device) == 0;
  148. }
  149. static unsigned long dmatest_random(void)
  150. {
  151. unsigned long buf;
  152. get_random_bytes(&buf, sizeof(buf));
  153. return buf;
  154. }
  155. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
  156. unsigned int buf_size)
  157. {
  158. unsigned int i;
  159. u8 *buf;
  160. for (; (buf = *bufs); bufs++) {
  161. for (i = 0; i < start; i++)
  162. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  163. for ( ; i < start + len; i++)
  164. buf[i] = PATTERN_SRC | PATTERN_COPY
  165. | (~i & PATTERN_COUNT_MASK);
  166. for ( ; i < buf_size; i++)
  167. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  168. buf++;
  169. }
  170. }
  171. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
  172. unsigned int buf_size)
  173. {
  174. unsigned int i;
  175. u8 *buf;
  176. for (; (buf = *bufs); bufs++) {
  177. for (i = 0; i < start; i++)
  178. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  179. for ( ; i < start + len; i++)
  180. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  181. | (~i & PATTERN_COUNT_MASK);
  182. for ( ; i < buf_size; i++)
  183. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  184. }
  185. }
  186. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  187. unsigned int counter, bool is_srcbuf)
  188. {
  189. u8 diff = actual ^ pattern;
  190. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  191. const char *thread_name = current->comm;
  192. if (is_srcbuf)
  193. pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
  194. thread_name, index, expected, actual);
  195. else if ((pattern & PATTERN_COPY)
  196. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  197. pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
  198. thread_name, index, expected, actual);
  199. else if (diff & PATTERN_SRC)
  200. pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
  201. thread_name, index, expected, actual);
  202. else
  203. pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
  204. thread_name, index, expected, actual);
  205. }
  206. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  207. unsigned int end, unsigned int counter, u8 pattern,
  208. bool is_srcbuf)
  209. {
  210. unsigned int i;
  211. unsigned int error_count = 0;
  212. u8 actual;
  213. u8 expected;
  214. u8 *buf;
  215. unsigned int counter_orig = counter;
  216. for (; (buf = *bufs); bufs++) {
  217. counter = counter_orig;
  218. for (i = start; i < end; i++) {
  219. actual = buf[i];
  220. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  221. if (actual != expected) {
  222. if (error_count < MAX_ERROR_COUNT)
  223. dmatest_mismatch(actual, pattern, i,
  224. counter, is_srcbuf);
  225. error_count++;
  226. }
  227. counter++;
  228. }
  229. }
  230. if (error_count > MAX_ERROR_COUNT)
  231. pr_warn("%s: %u errors suppressed\n",
  232. current->comm, error_count - MAX_ERROR_COUNT);
  233. return error_count;
  234. }
  235. /* poor man's completion - we want to use wait_event_freezable() on it */
  236. struct dmatest_done {
  237. bool done;
  238. wait_queue_head_t *wait;
  239. };
  240. static void dmatest_callback(void *arg)
  241. {
  242. struct dmatest_done *done = arg;
  243. done->done = true;
  244. wake_up_all(done->wait);
  245. }
  246. static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len,
  247. unsigned int count)
  248. {
  249. while (count--)
  250. dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE);
  251. }
  252. static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len,
  253. unsigned int count)
  254. {
  255. while (count--)
  256. dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL);
  257. }
  258. static unsigned int min_odd(unsigned int x, unsigned int y)
  259. {
  260. unsigned int val = min(x, y);
  261. return val % 2 ? val : val - 1;
  262. }
  263. static void result(const char *err, unsigned int n, unsigned int src_off,
  264. unsigned int dst_off, unsigned int len, unsigned long data)
  265. {
  266. pr_info("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
  267. current->comm, n, err, src_off, dst_off, len, data);
  268. }
  269. static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
  270. unsigned int dst_off, unsigned int len,
  271. unsigned long data)
  272. {
  273. pr_debug("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
  274. current->comm, n, err, src_off, dst_off, len, data);
  275. }
  276. /*
  277. * This function repeatedly tests DMA transfers of various lengths and
  278. * offsets for a given operation type until it is told to exit by
  279. * kthread_stop(). There may be multiple threads running this function
  280. * in parallel for a single channel, and there may be multiple channels
  281. * being tested in parallel.
  282. *
  283. * Before each test, the source and destination buffer is initialized
  284. * with a known pattern. This pattern is different depending on
  285. * whether it's in an area which is supposed to be copied or
  286. * overwritten, and different in the source and destination buffers.
  287. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  288. * we'll notice.
  289. */
  290. static int dmatest_func(void *data)
  291. {
  292. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
  293. struct dmatest_thread *thread = data;
  294. struct dmatest_done done = { .wait = &done_wait };
  295. struct dmatest_info *info;
  296. struct dmatest_params *params;
  297. struct dma_chan *chan;
  298. struct dma_device *dev;
  299. unsigned int src_off, dst_off, len;
  300. unsigned int error_count;
  301. unsigned int failed_tests = 0;
  302. unsigned int total_tests = 0;
  303. dma_cookie_t cookie;
  304. enum dma_status status;
  305. enum dma_ctrl_flags flags;
  306. u8 *pq_coefs = NULL;
  307. int ret;
  308. int src_cnt;
  309. int dst_cnt;
  310. int i;
  311. set_freezable();
  312. ret = -ENOMEM;
  313. smp_rmb();
  314. info = thread->info;
  315. params = &info->params;
  316. chan = thread->chan;
  317. dev = chan->device;
  318. if (thread->type == DMA_MEMCPY)
  319. src_cnt = dst_cnt = 1;
  320. else if (thread->type == DMA_XOR) {
  321. /* force odd to ensure dst = src */
  322. src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
  323. dst_cnt = 1;
  324. } else if (thread->type == DMA_PQ) {
  325. /* force odd to ensure dst = src */
  326. src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
  327. dst_cnt = 2;
  328. pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
  329. if (!pq_coefs)
  330. goto err_thread_type;
  331. for (i = 0; i < src_cnt; i++)
  332. pq_coefs[i] = 1;
  333. } else
  334. goto err_thread_type;
  335. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  336. if (!thread->srcs)
  337. goto err_srcs;
  338. for (i = 0; i < src_cnt; i++) {
  339. thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
  340. if (!thread->srcs[i])
  341. goto err_srcbuf;
  342. }
  343. thread->srcs[i] = NULL;
  344. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  345. if (!thread->dsts)
  346. goto err_dsts;
  347. for (i = 0; i < dst_cnt; i++) {
  348. thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
  349. if (!thread->dsts[i])
  350. goto err_dstbuf;
  351. }
  352. thread->dsts[i] = NULL;
  353. set_user_nice(current, 10);
  354. /*
  355. * src and dst buffers are freed by ourselves below
  356. */
  357. flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
  358. while (!kthread_should_stop()
  359. && !(params->iterations && total_tests >= params->iterations)) {
  360. struct dma_async_tx_descriptor *tx = NULL;
  361. dma_addr_t dma_srcs[src_cnt];
  362. dma_addr_t dma_dsts[dst_cnt];
  363. u8 align = 0;
  364. total_tests++;
  365. /* honor alignment restrictions */
  366. if (thread->type == DMA_MEMCPY)
  367. align = dev->copy_align;
  368. else if (thread->type == DMA_XOR)
  369. align = dev->xor_align;
  370. else if (thread->type == DMA_PQ)
  371. align = dev->pq_align;
  372. if (1 << align > params->buf_size) {
  373. pr_err("%u-byte buffer too small for %d-byte alignment\n",
  374. params->buf_size, 1 << align);
  375. break;
  376. }
  377. len = dmatest_random() % params->buf_size + 1;
  378. len = (len >> align) << align;
  379. if (!len)
  380. len = 1 << align;
  381. src_off = dmatest_random() % (params->buf_size - len + 1);
  382. dst_off = dmatest_random() % (params->buf_size - len + 1);
  383. src_off = (src_off >> align) << align;
  384. dst_off = (dst_off >> align) << align;
  385. dmatest_init_srcs(thread->srcs, src_off, len, params->buf_size);
  386. dmatest_init_dsts(thread->dsts, dst_off, len, params->buf_size);
  387. for (i = 0; i < src_cnt; i++) {
  388. u8 *buf = thread->srcs[i] + src_off;
  389. dma_srcs[i] = dma_map_single(dev->dev, buf, len,
  390. DMA_TO_DEVICE);
  391. ret = dma_mapping_error(dev->dev, dma_srcs[i]);
  392. if (ret) {
  393. unmap_src(dev->dev, dma_srcs, len, i);
  394. result("src mapping error", total_tests,
  395. src_off, dst_off, len, ret);
  396. failed_tests++;
  397. continue;
  398. }
  399. }
  400. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  401. for (i = 0; i < dst_cnt; i++) {
  402. dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
  403. params->buf_size,
  404. DMA_BIDIRECTIONAL);
  405. ret = dma_mapping_error(dev->dev, dma_dsts[i]);
  406. if (ret) {
  407. unmap_src(dev->dev, dma_srcs, len, src_cnt);
  408. unmap_dst(dev->dev, dma_dsts, params->buf_size,
  409. i);
  410. result("dst mapping error", total_tests,
  411. src_off, dst_off, len, ret);
  412. failed_tests++;
  413. continue;
  414. }
  415. }
  416. if (thread->type == DMA_MEMCPY)
  417. tx = dev->device_prep_dma_memcpy(chan,
  418. dma_dsts[0] + dst_off,
  419. dma_srcs[0], len,
  420. flags);
  421. else if (thread->type == DMA_XOR)
  422. tx = dev->device_prep_dma_xor(chan,
  423. dma_dsts[0] + dst_off,
  424. dma_srcs, src_cnt,
  425. len, flags);
  426. else if (thread->type == DMA_PQ) {
  427. dma_addr_t dma_pq[dst_cnt];
  428. for (i = 0; i < dst_cnt; i++)
  429. dma_pq[i] = dma_dsts[i] + dst_off;
  430. tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
  431. src_cnt, pq_coefs,
  432. len, flags);
  433. }
  434. if (!tx) {
  435. unmap_src(dev->dev, dma_srcs, len, src_cnt);
  436. unmap_dst(dev->dev, dma_dsts, params->buf_size,
  437. dst_cnt);
  438. result("prep error", total_tests, src_off,
  439. dst_off, len, ret);
  440. msleep(100);
  441. failed_tests++;
  442. continue;
  443. }
  444. done.done = false;
  445. tx->callback = dmatest_callback;
  446. tx->callback_param = &done;
  447. cookie = tx->tx_submit(tx);
  448. if (dma_submit_error(cookie)) {
  449. result("submit error", total_tests, src_off,
  450. dst_off, len, ret);
  451. msleep(100);
  452. failed_tests++;
  453. continue;
  454. }
  455. dma_async_issue_pending(chan);
  456. wait_event_freezable_timeout(done_wait, done.done,
  457. msecs_to_jiffies(params->timeout));
  458. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  459. if (!done.done) {
  460. /*
  461. * We're leaving the timed out dma operation with
  462. * dangling pointer to done_wait. To make this
  463. * correct, we'll need to allocate wait_done for
  464. * each test iteration and perform "who's gonna
  465. * free it this time?" dancing. For now, just
  466. * leave it dangling.
  467. */
  468. result("test timed out", total_tests, src_off, dst_off,
  469. len, 0);
  470. failed_tests++;
  471. continue;
  472. } else if (status != DMA_SUCCESS) {
  473. result(status == DMA_ERROR ?
  474. "completion error status" :
  475. "completion busy status", total_tests, src_off,
  476. dst_off, len, ret);
  477. failed_tests++;
  478. continue;
  479. }
  480. /* Unmap by myself */
  481. unmap_src(dev->dev, dma_srcs, len, src_cnt);
  482. unmap_dst(dev->dev, dma_dsts, params->buf_size, dst_cnt);
  483. error_count = 0;
  484. pr_debug("%s: verifying source buffer...\n", current->comm);
  485. error_count += dmatest_verify(thread->srcs, 0, src_off,
  486. 0, PATTERN_SRC, true);
  487. error_count += dmatest_verify(thread->srcs, src_off,
  488. src_off + len, src_off,
  489. PATTERN_SRC | PATTERN_COPY, true);
  490. error_count += dmatest_verify(thread->srcs, src_off + len,
  491. params->buf_size, src_off + len,
  492. PATTERN_SRC, true);
  493. pr_debug("%s: verifying dest buffer...\n", current->comm);
  494. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  495. 0, PATTERN_DST, false);
  496. error_count += dmatest_verify(thread->dsts, dst_off,
  497. dst_off + len, src_off,
  498. PATTERN_SRC | PATTERN_COPY, false);
  499. error_count += dmatest_verify(thread->dsts, dst_off + len,
  500. params->buf_size, dst_off + len,
  501. PATTERN_DST, false);
  502. if (error_count) {
  503. result("data error", total_tests, src_off, dst_off,
  504. len, error_count);
  505. failed_tests++;
  506. } else {
  507. dbg_result("test passed", total_tests, src_off, dst_off,
  508. len, 0);
  509. }
  510. }
  511. ret = 0;
  512. for (i = 0; thread->dsts[i]; i++)
  513. kfree(thread->dsts[i]);
  514. err_dstbuf:
  515. kfree(thread->dsts);
  516. err_dsts:
  517. for (i = 0; thread->srcs[i]; i++)
  518. kfree(thread->srcs[i]);
  519. err_srcbuf:
  520. kfree(thread->srcs);
  521. err_srcs:
  522. kfree(pq_coefs);
  523. err_thread_type:
  524. pr_info("%s: terminating after %u tests, %u failures (status %d)\n",
  525. current->comm, total_tests, failed_tests, ret);
  526. /* terminate all transfers on specified channels */
  527. if (ret)
  528. dmaengine_terminate_all(chan);
  529. thread->done = true;
  530. if (params->iterations > 0)
  531. while (!kthread_should_stop()) {
  532. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
  533. interruptible_sleep_on(&wait_dmatest_exit);
  534. }
  535. return ret;
  536. }
  537. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  538. {
  539. struct dmatest_thread *thread;
  540. struct dmatest_thread *_thread;
  541. int ret;
  542. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  543. ret = kthread_stop(thread->task);
  544. pr_debug("thread %s exited with status %d\n",
  545. thread->task->comm, ret);
  546. list_del(&thread->node);
  547. kfree(thread);
  548. }
  549. /* terminate all transfers on specified channels */
  550. dmaengine_terminate_all(dtc->chan);
  551. kfree(dtc);
  552. }
  553. static int dmatest_add_threads(struct dmatest_info *info,
  554. struct dmatest_chan *dtc, enum dma_transaction_type type)
  555. {
  556. struct dmatest_params *params = &info->params;
  557. struct dmatest_thread *thread;
  558. struct dma_chan *chan = dtc->chan;
  559. char *op;
  560. unsigned int i;
  561. if (type == DMA_MEMCPY)
  562. op = "copy";
  563. else if (type == DMA_XOR)
  564. op = "xor";
  565. else if (type == DMA_PQ)
  566. op = "pq";
  567. else
  568. return -EINVAL;
  569. for (i = 0; i < params->threads_per_chan; i++) {
  570. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  571. if (!thread) {
  572. pr_warn("No memory for %s-%s%u\n",
  573. dma_chan_name(chan), op, i);
  574. break;
  575. }
  576. thread->info = info;
  577. thread->chan = dtc->chan;
  578. thread->type = type;
  579. smp_wmb();
  580. thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
  581. dma_chan_name(chan), op, i);
  582. if (IS_ERR(thread->task)) {
  583. pr_warn("Failed to run thread %s-%s%u\n",
  584. dma_chan_name(chan), op, i);
  585. kfree(thread);
  586. break;
  587. }
  588. /* srcbuf and dstbuf are allocated by the thread itself */
  589. list_add_tail(&thread->node, &dtc->threads);
  590. }
  591. return i;
  592. }
  593. static int dmatest_add_channel(struct dmatest_info *info,
  594. struct dma_chan *chan)
  595. {
  596. struct dmatest_chan *dtc;
  597. struct dma_device *dma_dev = chan->device;
  598. unsigned int thread_count = 0;
  599. int cnt;
  600. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  601. if (!dtc) {
  602. pr_warn("No memory for %s\n", dma_chan_name(chan));
  603. return -ENOMEM;
  604. }
  605. dtc->chan = chan;
  606. INIT_LIST_HEAD(&dtc->threads);
  607. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  608. cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
  609. thread_count += cnt > 0 ? cnt : 0;
  610. }
  611. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  612. cnt = dmatest_add_threads(info, dtc, DMA_XOR);
  613. thread_count += cnt > 0 ? cnt : 0;
  614. }
  615. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  616. cnt = dmatest_add_threads(info, dtc, DMA_PQ);
  617. thread_count += cnt > 0 ? cnt : 0;
  618. }
  619. pr_info("Started %u threads using %s\n",
  620. thread_count, dma_chan_name(chan));
  621. list_add_tail(&dtc->node, &info->channels);
  622. info->nr_channels++;
  623. return 0;
  624. }
  625. static bool filter(struct dma_chan *chan, void *param)
  626. {
  627. struct dmatest_params *params = param;
  628. if (!dmatest_match_channel(params, chan) ||
  629. !dmatest_match_device(params, chan->device))
  630. return false;
  631. else
  632. return true;
  633. }
  634. static int __run_threaded_test(struct dmatest_info *info)
  635. {
  636. dma_cap_mask_t mask;
  637. struct dma_chan *chan;
  638. struct dmatest_params *params = &info->params;
  639. int err = 0;
  640. dma_cap_zero(mask);
  641. dma_cap_set(DMA_MEMCPY, mask);
  642. for (;;) {
  643. chan = dma_request_channel(mask, filter, params);
  644. if (chan) {
  645. err = dmatest_add_channel(info, chan);
  646. if (err) {
  647. dma_release_channel(chan);
  648. break; /* add_channel failed, punt */
  649. }
  650. } else
  651. break; /* no more channels available */
  652. if (params->max_channels &&
  653. info->nr_channels >= params->max_channels)
  654. break; /* we have all we need */
  655. }
  656. return err;
  657. }
  658. #ifndef MODULE
  659. static int run_threaded_test(struct dmatest_info *info)
  660. {
  661. int ret;
  662. mutex_lock(&info->lock);
  663. ret = __run_threaded_test(info);
  664. mutex_unlock(&info->lock);
  665. return ret;
  666. }
  667. #endif
  668. static void __stop_threaded_test(struct dmatest_info *info)
  669. {
  670. struct dmatest_chan *dtc, *_dtc;
  671. struct dma_chan *chan;
  672. list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
  673. list_del(&dtc->node);
  674. chan = dtc->chan;
  675. dmatest_cleanup_channel(dtc);
  676. pr_debug("dropped channel %s\n", dma_chan_name(chan));
  677. dma_release_channel(chan);
  678. }
  679. info->nr_channels = 0;
  680. }
  681. static void stop_threaded_test(struct dmatest_info *info)
  682. {
  683. mutex_lock(&info->lock);
  684. __stop_threaded_test(info);
  685. mutex_unlock(&info->lock);
  686. }
  687. static int __restart_threaded_test(struct dmatest_info *info, bool run)
  688. {
  689. struct dmatest_params *params = &info->params;
  690. /* Stop any running test first */
  691. __stop_threaded_test(info);
  692. if (run == false)
  693. return 0;
  694. /* Copy test parameters */
  695. params->buf_size = test_buf_size;
  696. strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
  697. strlcpy(params->device, strim(test_device), sizeof(params->device));
  698. params->threads_per_chan = threads_per_chan;
  699. params->max_channels = max_channels;
  700. params->iterations = iterations;
  701. params->xor_sources = xor_sources;
  702. params->pq_sources = pq_sources;
  703. params->timeout = timeout;
  704. /* Run test with new parameters */
  705. return __run_threaded_test(info);
  706. }
  707. static bool __is_threaded_test_run(struct dmatest_info *info)
  708. {
  709. struct dmatest_chan *dtc;
  710. list_for_each_entry(dtc, &info->channels, node) {
  711. struct dmatest_thread *thread;
  712. list_for_each_entry(thread, &dtc->threads, node) {
  713. if (!thread->done)
  714. return true;
  715. }
  716. }
  717. return false;
  718. }
  719. static ssize_t dtf_read_run(struct file *file, char __user *user_buf,
  720. size_t count, loff_t *ppos)
  721. {
  722. struct dmatest_info *info = file->private_data;
  723. char buf[3];
  724. mutex_lock(&info->lock);
  725. if (__is_threaded_test_run(info)) {
  726. buf[0] = 'Y';
  727. } else {
  728. __stop_threaded_test(info);
  729. buf[0] = 'N';
  730. }
  731. mutex_unlock(&info->lock);
  732. buf[1] = '\n';
  733. buf[2] = 0x00;
  734. return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
  735. }
  736. static ssize_t dtf_write_run(struct file *file, const char __user *user_buf,
  737. size_t count, loff_t *ppos)
  738. {
  739. struct dmatest_info *info = file->private_data;
  740. char buf[16];
  741. bool bv;
  742. int ret = 0;
  743. if (copy_from_user(buf, user_buf, min(count, (sizeof(buf) - 1))))
  744. return -EFAULT;
  745. if (strtobool(buf, &bv) == 0) {
  746. mutex_lock(&info->lock);
  747. if (__is_threaded_test_run(info))
  748. ret = -EBUSY;
  749. else
  750. ret = __restart_threaded_test(info, bv);
  751. mutex_unlock(&info->lock);
  752. }
  753. return ret ? ret : count;
  754. }
  755. static const struct file_operations dtf_run_fops = {
  756. .read = dtf_read_run,
  757. .write = dtf_write_run,
  758. .open = simple_open,
  759. .llseek = default_llseek,
  760. };
  761. static int dmatest_register_dbgfs(struct dmatest_info *info)
  762. {
  763. struct dentry *d;
  764. d = debugfs_create_dir("dmatest", NULL);
  765. if (IS_ERR(d))
  766. return PTR_ERR(d);
  767. if (!d)
  768. goto err_root;
  769. info->root = d;
  770. /* Run or stop threaded test */
  771. debugfs_create_file("run", S_IWUSR | S_IRUGO, info->root, info,
  772. &dtf_run_fops);
  773. return 0;
  774. err_root:
  775. pr_err("Failed to initialize debugfs\n");
  776. return -ENOMEM;
  777. }
  778. static int __init dmatest_init(void)
  779. {
  780. struct dmatest_info *info = &test_info;
  781. int ret;
  782. memset(info, 0, sizeof(*info));
  783. mutex_init(&info->lock);
  784. INIT_LIST_HEAD(&info->channels);
  785. ret = dmatest_register_dbgfs(info);
  786. if (ret)
  787. return ret;
  788. #ifdef MODULE
  789. return 0;
  790. #else
  791. return run_threaded_test(info);
  792. #endif
  793. }
  794. /* when compiled-in wait for drivers to load first */
  795. late_initcall(dmatest_init);
  796. static void __exit dmatest_exit(void)
  797. {
  798. struct dmatest_info *info = &test_info;
  799. debugfs_remove_recursive(info->root);
  800. stop_threaded_test(info);
  801. }
  802. module_exit(dmatest_exit);
  803. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  804. MODULE_LICENSE("GPL v2");