smp.c 13 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version 2
  5. * of the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2000, 2001 Kanoj Sarcar
  17. * Copyright (C) 2000, 2001 Ralf Baechle
  18. * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19. * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20. */
  21. #include <linux/cache.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/threads.h>
  27. #include <linux/module.h>
  28. #include <linux/time.h>
  29. #include <linux/timex.h>
  30. #include <linux/sched.h>
  31. #include <linux/cpumask.h>
  32. #include <linux/cpu.h>
  33. #include <linux/err.h>
  34. #include <asm/atomic.h>
  35. #include <asm/cpu.h>
  36. #include <asm/processor.h>
  37. #include <asm/system.h>
  38. #include <asm/mmu_context.h>
  39. #include <asm/smp.h>
  40. #include <asm/time.h>
  41. #ifdef CONFIG_MIPS_MT_SMTC
  42. #include <asm/mipsmtregs.h>
  43. #endif /* CONFIG_MIPS_MT_SMTC */
  44. cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
  45. volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
  46. cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
  47. int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
  48. int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
  49. EXPORT_SYMBOL(phys_cpu_present_map);
  50. EXPORT_SYMBOL(cpu_online_map);
  51. extern void __init calibrate_delay(void);
  52. extern void cpu_idle(void);
  53. /* Number of TCs (or siblings in Intel speak) per CPU core */
  54. int smp_num_siblings = 1;
  55. EXPORT_SYMBOL(smp_num_siblings);
  56. /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  57. cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  58. EXPORT_SYMBOL(cpu_sibling_map);
  59. /* representing cpus for which sibling maps can be computed */
  60. static cpumask_t cpu_sibling_setup_map;
  61. static inline void set_cpu_sibling_map(int cpu)
  62. {
  63. int i;
  64. cpu_set(cpu, cpu_sibling_setup_map);
  65. if (smp_num_siblings > 1) {
  66. for_each_cpu_mask(i, cpu_sibling_setup_map) {
  67. if (cpu_data[cpu].core == cpu_data[i].core) {
  68. cpu_set(i, cpu_sibling_map[cpu]);
  69. cpu_set(cpu, cpu_sibling_map[i]);
  70. }
  71. }
  72. } else
  73. cpu_set(cpu, cpu_sibling_map[cpu]);
  74. }
  75. /*
  76. * First C code run on the secondary CPUs after being started up by
  77. * the master.
  78. */
  79. asmlinkage __cpuinit void start_secondary(void)
  80. {
  81. unsigned int cpu;
  82. #ifdef CONFIG_MIPS_MT_SMTC
  83. /* Only do cpu_probe for first TC of CPU */
  84. if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
  85. #endif /* CONFIG_MIPS_MT_SMTC */
  86. cpu_probe();
  87. cpu_report();
  88. per_cpu_trap_init();
  89. mips_clockevent_init();
  90. prom_init_secondary();
  91. /*
  92. * XXX parity protection should be folded in here when it's converted
  93. * to an option instead of something based on .cputype
  94. */
  95. calibrate_delay();
  96. preempt_disable();
  97. cpu = smp_processor_id();
  98. cpu_data[cpu].udelay_val = loops_per_jiffy;
  99. prom_smp_finish();
  100. set_cpu_sibling_map(cpu);
  101. cpu_set(cpu, cpu_callin_map);
  102. cpu_idle();
  103. }
  104. DEFINE_SPINLOCK(smp_call_lock);
  105. struct call_data_struct *call_data;
  106. /*
  107. * Run a function on all other CPUs.
  108. *
  109. * <mask> cpuset_t of all processors to run the function on.
  110. * <func> The function to run. This must be fast and non-blocking.
  111. * <info> An arbitrary pointer to pass to the function.
  112. * <retry> If true, keep retrying until ready.
  113. * <wait> If true, wait until function has completed on other CPUs.
  114. * [RETURNS] 0 on success, else a negative status code.
  115. *
  116. * Does not return until remote CPUs are nearly ready to execute <func>
  117. * or are or have executed.
  118. *
  119. * You must not call this function with disabled interrupts or from a
  120. * hardware interrupt handler or from a bottom half handler:
  121. *
  122. * CPU A CPU B
  123. * Disable interrupts
  124. * smp_call_function()
  125. * Take call_lock
  126. * Send IPIs
  127. * Wait for all cpus to acknowledge IPI
  128. * CPU A has not responded, spin waiting
  129. * for cpu A to respond, holding call_lock
  130. * smp_call_function()
  131. * Spin waiting for call_lock
  132. * Deadlock Deadlock
  133. */
  134. int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
  135. void *info, int retry, int wait)
  136. {
  137. struct call_data_struct data;
  138. int cpu = smp_processor_id();
  139. int cpus;
  140. /*
  141. * Can die spectacularly if this CPU isn't yet marked online
  142. */
  143. BUG_ON(!cpu_online(cpu));
  144. cpu_clear(cpu, mask);
  145. cpus = cpus_weight(mask);
  146. if (!cpus)
  147. return 0;
  148. /* Can deadlock when called with interrupts disabled */
  149. WARN_ON(irqs_disabled());
  150. data.func = func;
  151. data.info = info;
  152. atomic_set(&data.started, 0);
  153. data.wait = wait;
  154. if (wait)
  155. atomic_set(&data.finished, 0);
  156. spin_lock(&smp_call_lock);
  157. call_data = &data;
  158. smp_mb();
  159. /* Send a message to all other CPUs and wait for them to respond */
  160. core_send_ipi_mask(mask, SMP_CALL_FUNCTION);
  161. /* Wait for response */
  162. /* FIXME: lock-up detection, backtrace on lock-up */
  163. while (atomic_read(&data.started) != cpus)
  164. barrier();
  165. if (wait)
  166. while (atomic_read(&data.finished) != cpus)
  167. barrier();
  168. call_data = NULL;
  169. spin_unlock(&smp_call_lock);
  170. return 0;
  171. }
  172. int smp_call_function(void (*func) (void *info), void *info, int retry,
  173. int wait)
  174. {
  175. return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
  176. }
  177. void smp_call_function_interrupt(void)
  178. {
  179. void (*func) (void *info) = call_data->func;
  180. void *info = call_data->info;
  181. int wait = call_data->wait;
  182. /*
  183. * Notify initiating CPU that I've grabbed the data and am
  184. * about to execute the function.
  185. */
  186. smp_mb();
  187. atomic_inc(&call_data->started);
  188. /*
  189. * At this point the info structure may be out of scope unless wait==1.
  190. */
  191. irq_enter();
  192. (*func)(info);
  193. irq_exit();
  194. if (wait) {
  195. smp_mb();
  196. atomic_inc(&call_data->finished);
  197. }
  198. }
  199. int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
  200. int retry, int wait)
  201. {
  202. int ret, me;
  203. /*
  204. * Can die spectacularly if this CPU isn't yet marked online
  205. */
  206. if (!cpu_online(cpu))
  207. return 0;
  208. me = get_cpu();
  209. BUG_ON(!cpu_online(me));
  210. if (cpu == me) {
  211. local_irq_disable();
  212. func(info);
  213. local_irq_enable();
  214. put_cpu();
  215. return 0;
  216. }
  217. ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
  218. wait);
  219. put_cpu();
  220. return 0;
  221. }
  222. static void stop_this_cpu(void *dummy)
  223. {
  224. /*
  225. * Remove this CPU:
  226. */
  227. cpu_clear(smp_processor_id(), cpu_online_map);
  228. local_irq_enable(); /* May need to service _machine_restart IPI */
  229. for (;;); /* Wait if available. */
  230. }
  231. void smp_send_stop(void)
  232. {
  233. smp_call_function(stop_this_cpu, NULL, 1, 0);
  234. }
  235. void __init smp_cpus_done(unsigned int max_cpus)
  236. {
  237. prom_cpus_done();
  238. }
  239. /* called from main before smp_init() */
  240. void __init smp_prepare_cpus(unsigned int max_cpus)
  241. {
  242. init_new_context(current, &init_mm);
  243. current_thread_info()->cpu = 0;
  244. plat_prepare_cpus(max_cpus);
  245. set_cpu_sibling_map(0);
  246. #ifndef CONFIG_HOTPLUG_CPU
  247. cpu_present_map = cpu_possible_map;
  248. #endif
  249. }
  250. /* preload SMP state for boot cpu */
  251. void __devinit smp_prepare_boot_cpu(void)
  252. {
  253. /*
  254. * This assumes that bootup is always handled by the processor
  255. * with the logic and physical number 0.
  256. */
  257. __cpu_number_map[0] = 0;
  258. __cpu_logical_map[0] = 0;
  259. cpu_set(0, phys_cpu_present_map);
  260. cpu_set(0, cpu_online_map);
  261. cpu_set(0, cpu_callin_map);
  262. }
  263. /*
  264. * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
  265. * and keep control until "cpu_online(cpu)" is set. Note: cpu is
  266. * physical, not logical.
  267. */
  268. int __cpuinit __cpu_up(unsigned int cpu)
  269. {
  270. struct task_struct *idle;
  271. /*
  272. * Processor goes to start_secondary(), sets online flag
  273. * The following code is purely to make sure
  274. * Linux can schedule processes on this slave.
  275. */
  276. idle = fork_idle(cpu);
  277. if (IS_ERR(idle))
  278. panic(KERN_ERR "Fork failed for CPU %d", cpu);
  279. prom_boot_secondary(cpu, idle);
  280. /*
  281. * Trust is futile. We should really have timeouts ...
  282. */
  283. while (!cpu_isset(cpu, cpu_callin_map))
  284. udelay(100);
  285. cpu_set(cpu, cpu_online_map);
  286. return 0;
  287. }
  288. /* Not really SMP stuff ... */
  289. int setup_profiling_timer(unsigned int multiplier)
  290. {
  291. return 0;
  292. }
  293. static void flush_tlb_all_ipi(void *info)
  294. {
  295. local_flush_tlb_all();
  296. }
  297. void flush_tlb_all(void)
  298. {
  299. on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
  300. }
  301. static void flush_tlb_mm_ipi(void *mm)
  302. {
  303. local_flush_tlb_mm((struct mm_struct *)mm);
  304. }
  305. /*
  306. * Special Variant of smp_call_function for use by TLB functions:
  307. *
  308. * o No return value
  309. * o collapses to normal function call on UP kernels
  310. * o collapses to normal function call on systems with a single shared
  311. * primary cache.
  312. * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
  313. */
  314. static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
  315. {
  316. #ifndef CONFIG_MIPS_MT_SMTC
  317. smp_call_function(func, info, 1, 1);
  318. #endif
  319. }
  320. static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
  321. {
  322. preempt_disable();
  323. smp_on_other_tlbs(func, info);
  324. func(info);
  325. preempt_enable();
  326. }
  327. /*
  328. * The following tlb flush calls are invoked when old translations are
  329. * being torn down, or pte attributes are changing. For single threaded
  330. * address spaces, a new context is obtained on the current cpu, and tlb
  331. * context on other cpus are invalidated to force a new context allocation
  332. * at switch_mm time, should the mm ever be used on other cpus. For
  333. * multithreaded address spaces, intercpu interrupts have to be sent.
  334. * Another case where intercpu interrupts are required is when the target
  335. * mm might be active on another cpu (eg debuggers doing the flushes on
  336. * behalf of debugees, kswapd stealing pages from another process etc).
  337. * Kanoj 07/00.
  338. */
  339. void flush_tlb_mm(struct mm_struct *mm)
  340. {
  341. preempt_disable();
  342. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  343. smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
  344. } else {
  345. cpumask_t mask = cpu_online_map;
  346. unsigned int cpu;
  347. cpu_clear(smp_processor_id(), mask);
  348. for_each_cpu_mask(cpu, mask)
  349. if (cpu_context(cpu, mm))
  350. cpu_context(cpu, mm) = 0;
  351. }
  352. local_flush_tlb_mm(mm);
  353. preempt_enable();
  354. }
  355. struct flush_tlb_data {
  356. struct vm_area_struct *vma;
  357. unsigned long addr1;
  358. unsigned long addr2;
  359. };
  360. static void flush_tlb_range_ipi(void *info)
  361. {
  362. struct flush_tlb_data *fd = info;
  363. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  364. }
  365. void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  366. {
  367. struct mm_struct *mm = vma->vm_mm;
  368. preempt_disable();
  369. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  370. struct flush_tlb_data fd = {
  371. .vma = vma,
  372. .addr1 = start,
  373. .addr2 = end,
  374. };
  375. smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
  376. } else {
  377. cpumask_t mask = cpu_online_map;
  378. unsigned int cpu;
  379. cpu_clear(smp_processor_id(), mask);
  380. for_each_cpu_mask(cpu, mask)
  381. if (cpu_context(cpu, mm))
  382. cpu_context(cpu, mm) = 0;
  383. }
  384. local_flush_tlb_range(vma, start, end);
  385. preempt_enable();
  386. }
  387. static void flush_tlb_kernel_range_ipi(void *info)
  388. {
  389. struct flush_tlb_data *fd = info;
  390. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  391. }
  392. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  393. {
  394. struct flush_tlb_data fd = {
  395. .addr1 = start,
  396. .addr2 = end,
  397. };
  398. on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1);
  399. }
  400. static void flush_tlb_page_ipi(void *info)
  401. {
  402. struct flush_tlb_data *fd = info;
  403. local_flush_tlb_page(fd->vma, fd->addr1);
  404. }
  405. void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  406. {
  407. preempt_disable();
  408. if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
  409. struct flush_tlb_data fd = {
  410. .vma = vma,
  411. .addr1 = page,
  412. };
  413. smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
  414. } else {
  415. cpumask_t mask = cpu_online_map;
  416. unsigned int cpu;
  417. cpu_clear(smp_processor_id(), mask);
  418. for_each_cpu_mask(cpu, mask)
  419. if (cpu_context(cpu, vma->vm_mm))
  420. cpu_context(cpu, vma->vm_mm) = 0;
  421. }
  422. local_flush_tlb_page(vma, page);
  423. preempt_enable();
  424. }
  425. static void flush_tlb_one_ipi(void *info)
  426. {
  427. unsigned long vaddr = (unsigned long) info;
  428. local_flush_tlb_one(vaddr);
  429. }
  430. void flush_tlb_one(unsigned long vaddr)
  431. {
  432. smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
  433. }
  434. EXPORT_SYMBOL(flush_tlb_page);
  435. EXPORT_SYMBOL(flush_tlb_one);