core.c 20 KB

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  1. /*
  2. * Filename: core.c
  3. *
  4. *
  5. * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
  6. * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
  7. *
  8. * (C) Copyright 2013 IBM Corporation
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of the
  13. * License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software Foundation,
  22. * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/reboot.h>
  30. #include <linux/slab.h>
  31. #include <linux/bitops.h>
  32. #include <linux/delay.h>
  33. #include <linux/genhd.h>
  34. #include <linux/idr.h>
  35. #include "rsxx_priv.h"
  36. #include "rsxx_cfg.h"
  37. #define NO_LEGACY 0
  38. MODULE_DESCRIPTION("IBM FlashSystem 70/80 PCIe SSD Device Driver");
  39. MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
  40. MODULE_LICENSE("GPL");
  41. MODULE_VERSION(DRIVER_VERSION);
  42. static unsigned int force_legacy = NO_LEGACY;
  43. module_param(force_legacy, uint, 0444);
  44. MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
  45. static DEFINE_IDA(rsxx_disk_ida);
  46. static DEFINE_SPINLOCK(rsxx_ida_lock);
  47. /*----------------- Interrupt Control & Handling -------------------*/
  48. static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
  49. {
  50. card->isr_mask = 0;
  51. card->ier_mask = 0;
  52. }
  53. static void __enable_intr(unsigned int *mask, unsigned int intr)
  54. {
  55. *mask |= intr;
  56. }
  57. static void __disable_intr(unsigned int *mask, unsigned int intr)
  58. {
  59. *mask &= ~intr;
  60. }
  61. /*
  62. * NOTE: Disabling the IER will disable the hardware interrupt.
  63. * Disabling the ISR will disable the software handling of the ISR bit.
  64. *
  65. * Enable/Disable interrupt functions assume the card->irq_lock
  66. * is held by the caller.
  67. */
  68. void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  69. {
  70. if (unlikely(card->halt) ||
  71. unlikely(card->eeh_state))
  72. return;
  73. __enable_intr(&card->ier_mask, intr);
  74. iowrite32(card->ier_mask, card->regmap + IER);
  75. }
  76. void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  77. {
  78. if (unlikely(card->eeh_state))
  79. return;
  80. __disable_intr(&card->ier_mask, intr);
  81. iowrite32(card->ier_mask, card->regmap + IER);
  82. }
  83. void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
  84. unsigned int intr)
  85. {
  86. if (unlikely(card->halt) ||
  87. unlikely(card->eeh_state))
  88. return;
  89. __enable_intr(&card->isr_mask, intr);
  90. __enable_intr(&card->ier_mask, intr);
  91. iowrite32(card->ier_mask, card->regmap + IER);
  92. }
  93. void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
  94. unsigned int intr)
  95. {
  96. if (unlikely(card->eeh_state))
  97. return;
  98. __disable_intr(&card->isr_mask, intr);
  99. __disable_intr(&card->ier_mask, intr);
  100. iowrite32(card->ier_mask, card->regmap + IER);
  101. }
  102. static irqreturn_t rsxx_isr(int irq, void *pdata)
  103. {
  104. struct rsxx_cardinfo *card = pdata;
  105. unsigned int isr;
  106. int handled = 0;
  107. int reread_isr;
  108. int i;
  109. spin_lock(&card->irq_lock);
  110. do {
  111. reread_isr = 0;
  112. if (unlikely(card->eeh_state))
  113. break;
  114. isr = ioread32(card->regmap + ISR);
  115. if (isr == 0xffffffff) {
  116. /*
  117. * A few systems seem to have an intermittent issue
  118. * where PCI reads return all Fs, but retrying the read
  119. * a little later will return as expected.
  120. */
  121. dev_info(CARD_TO_DEV(card),
  122. "ISR = 0xFFFFFFFF, retrying later\n");
  123. break;
  124. }
  125. isr &= card->isr_mask;
  126. if (!isr)
  127. break;
  128. for (i = 0; i < card->n_targets; i++) {
  129. if (isr & CR_INTR_DMA(i)) {
  130. if (card->ier_mask & CR_INTR_DMA(i)) {
  131. rsxx_disable_ier(card, CR_INTR_DMA(i));
  132. reread_isr = 1;
  133. }
  134. queue_work(card->ctrl[i].done_wq,
  135. &card->ctrl[i].dma_done_work);
  136. handled++;
  137. }
  138. }
  139. if (isr & CR_INTR_CREG) {
  140. queue_work(card->creg_ctrl.creg_wq,
  141. &card->creg_ctrl.done_work);
  142. handled++;
  143. }
  144. if (isr & CR_INTR_EVENT) {
  145. queue_work(card->event_wq, &card->event_work);
  146. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  147. handled++;
  148. }
  149. } while (reread_isr);
  150. spin_unlock(&card->irq_lock);
  151. return handled ? IRQ_HANDLED : IRQ_NONE;
  152. }
  153. /*----------------- Card Event Handler -------------------*/
  154. static const char * const rsxx_card_state_to_str(unsigned int state)
  155. {
  156. static const char * const state_strings[] = {
  157. "Unknown", "Shutdown", "Starting", "Formatting",
  158. "Uninitialized", "Good", "Shutting Down",
  159. "Fault", "Read Only Fault", "dStroying"
  160. };
  161. return state_strings[ffs(state)];
  162. }
  163. static void card_state_change(struct rsxx_cardinfo *card,
  164. unsigned int new_state)
  165. {
  166. int st;
  167. dev_info(CARD_TO_DEV(card),
  168. "card state change detected.(%s -> %s)\n",
  169. rsxx_card_state_to_str(card->state),
  170. rsxx_card_state_to_str(new_state));
  171. card->state = new_state;
  172. /* Don't attach DMA interfaces if the card has an invalid config */
  173. if (!card->config_valid)
  174. return;
  175. switch (new_state) {
  176. case CARD_STATE_RD_ONLY_FAULT:
  177. dev_crit(CARD_TO_DEV(card),
  178. "Hardware has entered read-only mode!\n");
  179. /*
  180. * Fall through so the DMA devices can be attached and
  181. * the user can attempt to pull off their data.
  182. */
  183. case CARD_STATE_GOOD:
  184. st = rsxx_get_card_size8(card, &card->size8);
  185. if (st)
  186. dev_err(CARD_TO_DEV(card),
  187. "Failed attaching DMA devices\n");
  188. if (card->config_valid)
  189. set_capacity(card->gendisk, card->size8 >> 9);
  190. break;
  191. case CARD_STATE_FAULT:
  192. dev_crit(CARD_TO_DEV(card),
  193. "Hardware Fault reported!\n");
  194. /* Fall through. */
  195. /* Everything else, detach DMA interface if it's attached. */
  196. case CARD_STATE_SHUTDOWN:
  197. case CARD_STATE_STARTING:
  198. case CARD_STATE_FORMATTING:
  199. case CARD_STATE_UNINITIALIZED:
  200. case CARD_STATE_SHUTTING_DOWN:
  201. /*
  202. * dStroy is a term coined by marketing to represent the low level
  203. * secure erase.
  204. */
  205. case CARD_STATE_DSTROYING:
  206. set_capacity(card->gendisk, 0);
  207. break;
  208. }
  209. }
  210. static void card_event_handler(struct work_struct *work)
  211. {
  212. struct rsxx_cardinfo *card;
  213. unsigned int state;
  214. unsigned long flags;
  215. int st;
  216. card = container_of(work, struct rsxx_cardinfo, event_work);
  217. if (unlikely(card->halt))
  218. return;
  219. /*
  220. * Enable the interrupt now to avoid any weird race conditions where a
  221. * state change might occur while rsxx_get_card_state() is
  222. * processing a returned creg cmd.
  223. */
  224. spin_lock_irqsave(&card->irq_lock, flags);
  225. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  226. spin_unlock_irqrestore(&card->irq_lock, flags);
  227. st = rsxx_get_card_state(card, &state);
  228. if (st) {
  229. dev_info(CARD_TO_DEV(card),
  230. "Failed reading state after event.\n");
  231. return;
  232. }
  233. if (card->state != state)
  234. card_state_change(card, state);
  235. if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
  236. rsxx_read_hw_log(card);
  237. }
  238. /*----------------- Card Operations -------------------*/
  239. static int card_shutdown(struct rsxx_cardinfo *card)
  240. {
  241. unsigned int state;
  242. signed long start;
  243. const int timeout = msecs_to_jiffies(120000);
  244. int st;
  245. /* We can't issue a shutdown if the card is in a transition state */
  246. start = jiffies;
  247. do {
  248. st = rsxx_get_card_state(card, &state);
  249. if (st)
  250. return st;
  251. } while (state == CARD_STATE_STARTING &&
  252. (jiffies - start < timeout));
  253. if (state == CARD_STATE_STARTING)
  254. return -ETIMEDOUT;
  255. /* Only issue a shutdown if we need to */
  256. if ((state != CARD_STATE_SHUTTING_DOWN) &&
  257. (state != CARD_STATE_SHUTDOWN)) {
  258. st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
  259. if (st)
  260. return st;
  261. }
  262. start = jiffies;
  263. do {
  264. st = rsxx_get_card_state(card, &state);
  265. if (st)
  266. return st;
  267. } while (state != CARD_STATE_SHUTDOWN &&
  268. (jiffies - start < timeout));
  269. if (state != CARD_STATE_SHUTDOWN)
  270. return -ETIMEDOUT;
  271. return 0;
  272. }
  273. static int rsxx_eeh_frozen(struct pci_dev *dev)
  274. {
  275. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  276. int i;
  277. int st;
  278. dev_warn(&dev->dev, "IBM FlashSystem PCI: preparing for slot reset.\n");
  279. card->eeh_state = 1;
  280. rsxx_mask_interrupts(card);
  281. /*
  282. * We need to guarantee that the write for eeh_state and masking
  283. * interrupts does not become reordered. This will prevent a possible
  284. * race condition with the EEH code.
  285. */
  286. wmb();
  287. pci_disable_device(dev);
  288. st = rsxx_eeh_save_issued_dmas(card);
  289. if (st)
  290. return st;
  291. rsxx_eeh_save_issued_creg(card);
  292. for (i = 0; i < card->n_targets; i++) {
  293. if (card->ctrl[i].status.buf)
  294. pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
  295. card->ctrl[i].status.buf,
  296. card->ctrl[i].status.dma_addr);
  297. if (card->ctrl[i].cmd.buf)
  298. pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
  299. card->ctrl[i].cmd.buf,
  300. card->ctrl[i].cmd.dma_addr);
  301. }
  302. return 0;
  303. }
  304. static void rsxx_eeh_failure(struct pci_dev *dev)
  305. {
  306. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  307. int i;
  308. int cnt = 0;
  309. dev_err(&dev->dev, "IBM FlashSystem PCI: disabling failed card.\n");
  310. card->eeh_state = 1;
  311. card->halt = 1;
  312. for (i = 0; i < card->n_targets; i++) {
  313. spin_lock_bh(&card->ctrl[i].queue_lock);
  314. cnt = rsxx_cleanup_dma_queue(&card->ctrl[i],
  315. &card->ctrl[i].queue);
  316. spin_unlock_bh(&card->ctrl[i].queue_lock);
  317. cnt += rsxx_dma_cancel(&card->ctrl[i]);
  318. if (cnt)
  319. dev_info(CARD_TO_DEV(card),
  320. "Freed %d queued DMAs on channel %d\n",
  321. cnt, card->ctrl[i].id);
  322. }
  323. }
  324. static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
  325. {
  326. unsigned int status;
  327. int iter = 0;
  328. /* We need to wait for the hardware to reset */
  329. while (iter++ < 10) {
  330. status = ioread32(card->regmap + PCI_RECONFIG);
  331. if (status & RSXX_FLUSH_BUSY) {
  332. ssleep(1);
  333. continue;
  334. }
  335. if (status & RSXX_FLUSH_TIMEOUT)
  336. dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
  337. return 0;
  338. }
  339. /* Hardware failed resetting itself. */
  340. return -1;
  341. }
  342. static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
  343. enum pci_channel_state error)
  344. {
  345. int st;
  346. if (dev->revision < RSXX_EEH_SUPPORT)
  347. return PCI_ERS_RESULT_NONE;
  348. if (error == pci_channel_io_perm_failure) {
  349. rsxx_eeh_failure(dev);
  350. return PCI_ERS_RESULT_DISCONNECT;
  351. }
  352. st = rsxx_eeh_frozen(dev);
  353. if (st) {
  354. dev_err(&dev->dev, "Slot reset setup failed\n");
  355. rsxx_eeh_failure(dev);
  356. return PCI_ERS_RESULT_DISCONNECT;
  357. }
  358. return PCI_ERS_RESULT_NEED_RESET;
  359. }
  360. static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
  361. {
  362. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  363. unsigned long flags;
  364. int i;
  365. int st;
  366. dev_warn(&dev->dev,
  367. "IBM FlashSystem PCI: recovering from slot reset.\n");
  368. st = pci_enable_device(dev);
  369. if (st)
  370. goto failed_hw_setup;
  371. pci_set_master(dev);
  372. st = rsxx_eeh_fifo_flush_poll(card);
  373. if (st)
  374. goto failed_hw_setup;
  375. rsxx_dma_queue_reset(card);
  376. for (i = 0; i < card->n_targets; i++) {
  377. st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
  378. if (st)
  379. goto failed_hw_buffers_init;
  380. }
  381. if (card->config_valid)
  382. rsxx_dma_configure(card);
  383. /* Clears the ISR register from spurious interrupts */
  384. st = ioread32(card->regmap + ISR);
  385. card->eeh_state = 0;
  386. st = rsxx_eeh_remap_dmas(card);
  387. if (st)
  388. goto failed_remap_dmas;
  389. spin_lock_irqsave(&card->irq_lock, flags);
  390. if (card->n_targets & RSXX_MAX_TARGETS)
  391. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
  392. else
  393. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
  394. spin_unlock_irqrestore(&card->irq_lock, flags);
  395. rsxx_kick_creg_queue(card);
  396. for (i = 0; i < card->n_targets; i++) {
  397. spin_lock(&card->ctrl[i].queue_lock);
  398. if (list_empty(&card->ctrl[i].queue)) {
  399. spin_unlock(&card->ctrl[i].queue_lock);
  400. continue;
  401. }
  402. spin_unlock(&card->ctrl[i].queue_lock);
  403. queue_work(card->ctrl[i].issue_wq,
  404. &card->ctrl[i].issue_dma_work);
  405. }
  406. dev_info(&dev->dev, "IBM FlashSystem PCI: recovery complete.\n");
  407. return PCI_ERS_RESULT_RECOVERED;
  408. failed_hw_buffers_init:
  409. failed_remap_dmas:
  410. for (i = 0; i < card->n_targets; i++) {
  411. if (card->ctrl[i].status.buf)
  412. pci_free_consistent(card->dev,
  413. STATUS_BUFFER_SIZE8,
  414. card->ctrl[i].status.buf,
  415. card->ctrl[i].status.dma_addr);
  416. if (card->ctrl[i].cmd.buf)
  417. pci_free_consistent(card->dev,
  418. COMMAND_BUFFER_SIZE8,
  419. card->ctrl[i].cmd.buf,
  420. card->ctrl[i].cmd.dma_addr);
  421. }
  422. failed_hw_setup:
  423. rsxx_eeh_failure(dev);
  424. return PCI_ERS_RESULT_DISCONNECT;
  425. }
  426. /*----------------- Driver Initialization & Setup -------------------*/
  427. /* Returns: 0 if the driver is compatible with the device
  428. -1 if the driver is NOT compatible with the device */
  429. static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
  430. {
  431. unsigned char pci_rev;
  432. pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
  433. if (pci_rev > RS70_PCI_REV_SUPPORTED)
  434. return -1;
  435. return 0;
  436. }
  437. static int rsxx_pci_probe(struct pci_dev *dev,
  438. const struct pci_device_id *id)
  439. {
  440. struct rsxx_cardinfo *card;
  441. int st;
  442. dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
  443. card = kzalloc(sizeof(*card), GFP_KERNEL);
  444. if (!card)
  445. return -ENOMEM;
  446. card->dev = dev;
  447. pci_set_drvdata(dev, card);
  448. do {
  449. if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) {
  450. st = -ENOMEM;
  451. goto failed_ida_get;
  452. }
  453. spin_lock(&rsxx_ida_lock);
  454. st = ida_get_new(&rsxx_disk_ida, &card->disk_id);
  455. spin_unlock(&rsxx_ida_lock);
  456. } while (st == -EAGAIN);
  457. if (st)
  458. goto failed_ida_get;
  459. st = pci_enable_device(dev);
  460. if (st)
  461. goto failed_enable;
  462. pci_set_master(dev);
  463. pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
  464. st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
  465. if (st) {
  466. dev_err(CARD_TO_DEV(card),
  467. "No usable DMA configuration,aborting\n");
  468. goto failed_dma_mask;
  469. }
  470. st = pci_request_regions(dev, DRIVER_NAME);
  471. if (st) {
  472. dev_err(CARD_TO_DEV(card),
  473. "Failed to request memory region\n");
  474. goto failed_request_regions;
  475. }
  476. if (pci_resource_len(dev, 0) == 0) {
  477. dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
  478. st = -ENOMEM;
  479. goto failed_iomap;
  480. }
  481. card->regmap = pci_iomap(dev, 0, 0);
  482. if (!card->regmap) {
  483. dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
  484. st = -ENOMEM;
  485. goto failed_iomap;
  486. }
  487. spin_lock_init(&card->irq_lock);
  488. card->halt = 0;
  489. card->eeh_state = 0;
  490. spin_lock_irq(&card->irq_lock);
  491. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  492. spin_unlock_irq(&card->irq_lock);
  493. if (!force_legacy) {
  494. st = pci_enable_msi(dev);
  495. if (st)
  496. dev_warn(CARD_TO_DEV(card),
  497. "Failed to enable MSI\n");
  498. }
  499. st = request_irq(dev->irq, rsxx_isr, IRQF_DISABLED | IRQF_SHARED,
  500. DRIVER_NAME, card);
  501. if (st) {
  502. dev_err(CARD_TO_DEV(card),
  503. "Failed requesting IRQ%d\n", dev->irq);
  504. goto failed_irq;
  505. }
  506. /************* Setup Processor Command Interface *************/
  507. st = rsxx_creg_setup(card);
  508. if (st) {
  509. dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
  510. goto failed_creg_setup;
  511. }
  512. spin_lock_irq(&card->irq_lock);
  513. rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
  514. spin_unlock_irq(&card->irq_lock);
  515. st = rsxx_compatibility_check(card);
  516. if (st) {
  517. dev_warn(CARD_TO_DEV(card),
  518. "Incompatible driver detected. Please update the driver.\n");
  519. st = -EINVAL;
  520. goto failed_compatiblity_check;
  521. }
  522. /************* Load Card Config *************/
  523. st = rsxx_load_config(card);
  524. if (st)
  525. dev_err(CARD_TO_DEV(card),
  526. "Failed loading card config\n");
  527. /************* Setup DMA Engine *************/
  528. st = rsxx_get_num_targets(card, &card->n_targets);
  529. if (st)
  530. dev_info(CARD_TO_DEV(card),
  531. "Failed reading the number of DMA targets\n");
  532. card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL);
  533. if (!card->ctrl) {
  534. st = -ENOMEM;
  535. goto failed_dma_setup;
  536. }
  537. st = rsxx_dma_setup(card);
  538. if (st) {
  539. dev_info(CARD_TO_DEV(card),
  540. "Failed to setup DMA engine\n");
  541. goto failed_dma_setup;
  542. }
  543. /************* Setup Card Event Handler *************/
  544. card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
  545. if (!card->event_wq) {
  546. dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
  547. goto failed_event_handler;
  548. }
  549. INIT_WORK(&card->event_work, card_event_handler);
  550. st = rsxx_setup_dev(card);
  551. if (st)
  552. goto failed_create_dev;
  553. rsxx_get_card_state(card, &card->state);
  554. dev_info(CARD_TO_DEV(card),
  555. "card state: %s\n",
  556. rsxx_card_state_to_str(card->state));
  557. /*
  558. * Now that the DMA Engine and devices have been setup,
  559. * we can enable the event interrupt(it kicks off actions in
  560. * those layers so we couldn't enable it right away.)
  561. */
  562. spin_lock_irq(&card->irq_lock);
  563. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  564. spin_unlock_irq(&card->irq_lock);
  565. if (card->state == CARD_STATE_SHUTDOWN) {
  566. st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
  567. if (st)
  568. dev_crit(CARD_TO_DEV(card),
  569. "Failed issuing card startup\n");
  570. } else if (card->state == CARD_STATE_GOOD ||
  571. card->state == CARD_STATE_RD_ONLY_FAULT) {
  572. st = rsxx_get_card_size8(card, &card->size8);
  573. if (st)
  574. card->size8 = 0;
  575. }
  576. rsxx_attach_dev(card);
  577. return 0;
  578. failed_create_dev:
  579. destroy_workqueue(card->event_wq);
  580. card->event_wq = NULL;
  581. failed_event_handler:
  582. rsxx_dma_destroy(card);
  583. failed_dma_setup:
  584. failed_compatiblity_check:
  585. destroy_workqueue(card->creg_ctrl.creg_wq);
  586. card->creg_ctrl.creg_wq = NULL;
  587. failed_creg_setup:
  588. spin_lock_irq(&card->irq_lock);
  589. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  590. spin_unlock_irq(&card->irq_lock);
  591. free_irq(dev->irq, card);
  592. if (!force_legacy)
  593. pci_disable_msi(dev);
  594. failed_irq:
  595. pci_iounmap(dev, card->regmap);
  596. failed_iomap:
  597. pci_release_regions(dev);
  598. failed_request_regions:
  599. failed_dma_mask:
  600. pci_disable_device(dev);
  601. failed_enable:
  602. spin_lock(&rsxx_ida_lock);
  603. ida_remove(&rsxx_disk_ida, card->disk_id);
  604. spin_unlock(&rsxx_ida_lock);
  605. failed_ida_get:
  606. kfree(card);
  607. return st;
  608. }
  609. static void rsxx_pci_remove(struct pci_dev *dev)
  610. {
  611. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  612. unsigned long flags;
  613. int st;
  614. int i;
  615. if (!card)
  616. return;
  617. dev_info(CARD_TO_DEV(card),
  618. "Removing PCI-Flash SSD.\n");
  619. rsxx_detach_dev(card);
  620. for (i = 0; i < card->n_targets; i++) {
  621. spin_lock_irqsave(&card->irq_lock, flags);
  622. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  623. spin_unlock_irqrestore(&card->irq_lock, flags);
  624. }
  625. st = card_shutdown(card);
  626. if (st)
  627. dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
  628. /* Sync outstanding event handlers. */
  629. spin_lock_irqsave(&card->irq_lock, flags);
  630. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  631. spin_unlock_irqrestore(&card->irq_lock, flags);
  632. cancel_work_sync(&card->event_work);
  633. rsxx_destroy_dev(card);
  634. rsxx_dma_destroy(card);
  635. spin_lock_irqsave(&card->irq_lock, flags);
  636. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  637. spin_unlock_irqrestore(&card->irq_lock, flags);
  638. /* Prevent work_structs from re-queuing themselves. */
  639. card->halt = 1;
  640. free_irq(dev->irq, card);
  641. if (!force_legacy)
  642. pci_disable_msi(dev);
  643. rsxx_creg_destroy(card);
  644. pci_iounmap(dev, card->regmap);
  645. pci_disable_device(dev);
  646. pci_release_regions(dev);
  647. kfree(card);
  648. }
  649. static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
  650. {
  651. /* We don't support suspend at this time. */
  652. return -ENOSYS;
  653. }
  654. static void rsxx_pci_shutdown(struct pci_dev *dev)
  655. {
  656. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  657. unsigned long flags;
  658. int i;
  659. if (!card)
  660. return;
  661. dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
  662. rsxx_detach_dev(card);
  663. for (i = 0; i < card->n_targets; i++) {
  664. spin_lock_irqsave(&card->irq_lock, flags);
  665. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  666. spin_unlock_irqrestore(&card->irq_lock, flags);
  667. }
  668. card_shutdown(card);
  669. }
  670. static const struct pci_error_handlers rsxx_err_handler = {
  671. .error_detected = rsxx_error_detected,
  672. .slot_reset = rsxx_slot_reset,
  673. };
  674. static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = {
  675. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
  676. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
  677. {0,},
  678. };
  679. MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
  680. static struct pci_driver rsxx_pci_driver = {
  681. .name = DRIVER_NAME,
  682. .id_table = rsxx_pci_ids,
  683. .probe = rsxx_pci_probe,
  684. .remove = rsxx_pci_remove,
  685. .suspend = rsxx_pci_suspend,
  686. .shutdown = rsxx_pci_shutdown,
  687. .err_handler = &rsxx_err_handler,
  688. };
  689. static int __init rsxx_core_init(void)
  690. {
  691. int st;
  692. st = rsxx_dev_init();
  693. if (st)
  694. return st;
  695. st = rsxx_dma_init();
  696. if (st)
  697. goto dma_init_failed;
  698. st = rsxx_creg_init();
  699. if (st)
  700. goto creg_init_failed;
  701. return pci_register_driver(&rsxx_pci_driver);
  702. creg_init_failed:
  703. rsxx_dma_cleanup();
  704. dma_init_failed:
  705. rsxx_dev_cleanup();
  706. return st;
  707. }
  708. static void __exit rsxx_core_cleanup(void)
  709. {
  710. pci_unregister_driver(&rsxx_pci_driver);
  711. rsxx_creg_cleanup();
  712. rsxx_dma_cleanup();
  713. rsxx_dev_cleanup();
  714. }
  715. module_init(rsxx_core_init);
  716. module_exit(rsxx_core_cleanup);