mlx4_ib.h 15 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #ifndef MLX4_IB_H
  34. #define MLX4_IB_H
  35. #include <linux/compiler.h>
  36. #include <linux/list.h>
  37. #include <linux/mutex.h>
  38. #include <rdma/ib_verbs.h>
  39. #include <rdma/ib_umem.h>
  40. #include <linux/mlx4/device.h>
  41. #include <linux/mlx4/doorbell.h>
  42. #define MLX4_IB_DRV_NAME "mlx4_ib"
  43. #ifdef pr_fmt
  44. #undef pr_fmt
  45. #endif
  46. #define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
  47. #define mlx4_ib_warn(ibdev, format, arg...) \
  48. dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
  49. enum {
  50. MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
  51. MLX4_IB_MAX_HEADROOM = 2048
  52. };
  53. #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
  54. #define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
  55. struct mlx4_ib_ucontext {
  56. struct ib_ucontext ibucontext;
  57. struct mlx4_uar uar;
  58. struct list_head db_page_list;
  59. struct mutex db_page_mutex;
  60. };
  61. struct mlx4_ib_pd {
  62. struct ib_pd ibpd;
  63. u32 pdn;
  64. };
  65. struct mlx4_ib_xrcd {
  66. struct ib_xrcd ibxrcd;
  67. u32 xrcdn;
  68. struct ib_pd *pd;
  69. struct ib_cq *cq;
  70. };
  71. struct mlx4_ib_cq_buf {
  72. struct mlx4_buf buf;
  73. struct mlx4_mtt mtt;
  74. };
  75. struct mlx4_ib_cq_resize {
  76. struct mlx4_ib_cq_buf buf;
  77. int cqe;
  78. };
  79. struct mlx4_ib_cq {
  80. struct ib_cq ibcq;
  81. struct mlx4_cq mcq;
  82. struct mlx4_ib_cq_buf buf;
  83. struct mlx4_ib_cq_resize *resize_buf;
  84. struct mlx4_db db;
  85. spinlock_t lock;
  86. struct mutex resize_mutex;
  87. struct ib_umem *umem;
  88. struct ib_umem *resize_umem;
  89. };
  90. struct mlx4_ib_mr {
  91. struct ib_mr ibmr;
  92. struct mlx4_mr mmr;
  93. struct ib_umem *umem;
  94. };
  95. struct mlx4_ib_fast_reg_page_list {
  96. struct ib_fast_reg_page_list ibfrpl;
  97. __be64 *mapped_page_list;
  98. dma_addr_t map;
  99. };
  100. struct mlx4_ib_fmr {
  101. struct ib_fmr ibfmr;
  102. struct mlx4_fmr mfmr;
  103. };
  104. struct mlx4_ib_wq {
  105. u64 *wrid;
  106. spinlock_t lock;
  107. int wqe_cnt;
  108. int max_post;
  109. int max_gs;
  110. int offset;
  111. int wqe_shift;
  112. unsigned head;
  113. unsigned tail;
  114. };
  115. enum mlx4_ib_qp_flags {
  116. MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
  117. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
  118. MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
  119. MLX4_IB_SRIOV_SQP = 1 << 31,
  120. };
  121. struct mlx4_ib_gid_entry {
  122. struct list_head list;
  123. union ib_gid gid;
  124. int added;
  125. u8 port;
  126. };
  127. enum mlx4_ib_qp_type {
  128. /*
  129. * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
  130. * here (and in that order) since the MAD layer uses them as
  131. * indices into a 2-entry table.
  132. */
  133. MLX4_IB_QPT_SMI = IB_QPT_SMI,
  134. MLX4_IB_QPT_GSI = IB_QPT_GSI,
  135. MLX4_IB_QPT_RC = IB_QPT_RC,
  136. MLX4_IB_QPT_UC = IB_QPT_UC,
  137. MLX4_IB_QPT_UD = IB_QPT_UD,
  138. MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
  139. MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
  140. MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
  141. MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
  142. MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
  143. MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
  144. MLX4_IB_QPT_PROXY_SMI = 1 << 17,
  145. MLX4_IB_QPT_PROXY_GSI = 1 << 18,
  146. MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
  147. MLX4_IB_QPT_TUN_SMI = 1 << 20,
  148. MLX4_IB_QPT_TUN_GSI = 1 << 21,
  149. };
  150. #define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
  151. MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
  152. MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
  153. enum mlx4_ib_mad_ifc_flags {
  154. MLX4_MAD_IFC_IGNORE_MKEY = 1,
  155. MLX4_MAD_IFC_IGNORE_BKEY = 2,
  156. MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
  157. MLX4_MAD_IFC_IGNORE_BKEY),
  158. MLX4_MAD_IFC_NET_VIEW = 4,
  159. };
  160. enum {
  161. MLX4_NUM_TUNNEL_BUFS = 256,
  162. };
  163. struct mlx4_ib_tunnel_header {
  164. struct mlx4_av av;
  165. __be32 remote_qpn;
  166. __be32 qkey;
  167. __be16 vlan;
  168. u8 mac[6];
  169. __be16 pkey_index;
  170. u8 reserved[6];
  171. };
  172. struct mlx4_ib_buf {
  173. void *addr;
  174. dma_addr_t map;
  175. };
  176. struct mlx4_rcv_tunnel_hdr {
  177. __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
  178. * 0x0 - no vlan was in the packet
  179. * 0x01 - C-VLAN was in the packet */
  180. u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
  181. u8 reserved;
  182. __be16 pkey_index;
  183. __be16 sl_vid;
  184. __be16 slid_mac_47_32;
  185. __be32 mac_31_0;
  186. };
  187. struct mlx4_ib_proxy_sqp_hdr {
  188. struct ib_grh grh;
  189. struct mlx4_rcv_tunnel_hdr tun;
  190. } __packed;
  191. struct mlx4_ib_qp {
  192. struct ib_qp ibqp;
  193. struct mlx4_qp mqp;
  194. struct mlx4_buf buf;
  195. struct mlx4_db db;
  196. struct mlx4_ib_wq rq;
  197. u32 doorbell_qpn;
  198. __be32 sq_signal_bits;
  199. unsigned sq_next_wqe;
  200. int sq_max_wqes_per_wr;
  201. int sq_spare_wqes;
  202. struct mlx4_ib_wq sq;
  203. enum mlx4_ib_qp_type mlx4_ib_qp_type;
  204. struct ib_umem *umem;
  205. struct mlx4_mtt mtt;
  206. int buf_size;
  207. struct mutex mutex;
  208. u16 xrcdn;
  209. u32 flags;
  210. u8 port;
  211. u8 alt_port;
  212. u8 atomic_rd_en;
  213. u8 resp_depth;
  214. u8 sq_no_prefetch;
  215. u8 state;
  216. int mlx_type;
  217. struct list_head gid_list;
  218. struct list_head steering_rules;
  219. struct mlx4_ib_buf *sqp_proxy_rcv;
  220. };
  221. struct mlx4_ib_srq {
  222. struct ib_srq ibsrq;
  223. struct mlx4_srq msrq;
  224. struct mlx4_buf buf;
  225. struct mlx4_db db;
  226. u64 *wrid;
  227. spinlock_t lock;
  228. int head;
  229. int tail;
  230. u16 wqe_ctr;
  231. struct ib_umem *umem;
  232. struct mlx4_mtt mtt;
  233. struct mutex mutex;
  234. };
  235. struct mlx4_ib_ah {
  236. struct ib_ah ibah;
  237. union mlx4_ext_av av;
  238. };
  239. struct mlx4_ib_demux_work {
  240. struct work_struct work;
  241. struct mlx4_ib_dev *dev;
  242. int slave;
  243. int do_init;
  244. u8 port;
  245. };
  246. struct mlx4_ib_tun_tx_buf {
  247. struct mlx4_ib_buf buf;
  248. struct ib_ah *ah;
  249. };
  250. struct mlx4_ib_demux_pv_qp {
  251. struct ib_qp *qp;
  252. enum ib_qp_type proxy_qpt;
  253. struct mlx4_ib_buf *ring;
  254. struct mlx4_ib_tun_tx_buf *tx_ring;
  255. spinlock_t tx_lock;
  256. unsigned tx_ix_head;
  257. unsigned tx_ix_tail;
  258. };
  259. enum mlx4_ib_demux_pv_state {
  260. DEMUX_PV_STATE_DOWN,
  261. DEMUX_PV_STATE_STARTING,
  262. DEMUX_PV_STATE_ACTIVE,
  263. DEMUX_PV_STATE_DOWNING,
  264. };
  265. struct mlx4_ib_demux_pv_ctx {
  266. int port;
  267. int slave;
  268. enum mlx4_ib_demux_pv_state state;
  269. int has_smi;
  270. struct ib_device *ib_dev;
  271. struct ib_cq *cq;
  272. struct ib_pd *pd;
  273. struct ib_mr *mr;
  274. struct work_struct work;
  275. struct workqueue_struct *wq;
  276. struct mlx4_ib_demux_pv_qp qp[2];
  277. };
  278. struct mlx4_ib_demux_ctx {
  279. struct ib_device *ib_dev;
  280. int port;
  281. struct workqueue_struct *wq;
  282. struct workqueue_struct *ud_wq;
  283. spinlock_t ud_lock;
  284. __be64 subnet_prefix;
  285. __be64 guid_cache[128];
  286. struct mlx4_ib_dev *dev;
  287. struct mlx4_ib_demux_pv_ctx **tun;
  288. };
  289. struct mlx4_ib_sriov {
  290. struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
  291. struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
  292. /* when using this spinlock you should use "irq" because
  293. * it may be called from interrupt context.*/
  294. spinlock_t going_down_lock;
  295. int is_going_down;
  296. };
  297. struct mlx4_ib_iboe {
  298. spinlock_t lock;
  299. struct net_device *netdevs[MLX4_MAX_PORTS];
  300. struct notifier_block nb;
  301. union ib_gid gid_table[MLX4_MAX_PORTS][128];
  302. };
  303. struct pkey_mgt {
  304. u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  305. u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  306. struct list_head pkey_port_list[MLX4_MFUNC_MAX];
  307. struct kobject *device_parent[MLX4_MFUNC_MAX];
  308. };
  309. struct mlx4_ib_dev {
  310. struct ib_device ib_dev;
  311. struct mlx4_dev *dev;
  312. int num_ports;
  313. void __iomem *uar_map;
  314. struct mlx4_uar priv_uar;
  315. u32 priv_pdn;
  316. MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
  317. struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
  318. struct ib_ah *sm_ah[MLX4_MAX_PORTS];
  319. spinlock_t sm_lock;
  320. struct mlx4_ib_sriov sriov;
  321. struct mutex cap_mask_mutex;
  322. bool ib_active;
  323. struct mlx4_ib_iboe iboe;
  324. int counters[MLX4_MAX_PORTS];
  325. int *eq_table;
  326. int eq_added;
  327. struct pkey_mgt pkeys;
  328. };
  329. struct ib_event_work {
  330. struct work_struct work;
  331. struct mlx4_ib_dev *ib_dev;
  332. struct mlx4_eqe ib_eqe;
  333. };
  334. struct mlx4_ib_qp_tunnel_init_attr {
  335. struct ib_qp_init_attr init_attr;
  336. int slave;
  337. enum ib_qp_type proxy_qp_type;
  338. u8 port;
  339. };
  340. static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
  341. {
  342. return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
  343. }
  344. static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
  345. {
  346. return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
  347. }
  348. static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
  349. {
  350. return container_of(ibpd, struct mlx4_ib_pd, ibpd);
  351. }
  352. static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
  353. {
  354. return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
  355. }
  356. static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
  357. {
  358. return container_of(ibcq, struct mlx4_ib_cq, ibcq);
  359. }
  360. static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
  361. {
  362. return container_of(mcq, struct mlx4_ib_cq, mcq);
  363. }
  364. static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
  365. {
  366. return container_of(ibmr, struct mlx4_ib_mr, ibmr);
  367. }
  368. static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
  369. {
  370. return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
  371. }
  372. static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
  373. {
  374. return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
  375. }
  376. static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
  377. {
  378. return container_of(ibqp, struct mlx4_ib_qp, ibqp);
  379. }
  380. static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
  381. {
  382. return container_of(mqp, struct mlx4_ib_qp, mqp);
  383. }
  384. static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
  385. {
  386. return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
  387. }
  388. static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
  389. {
  390. return container_of(msrq, struct mlx4_ib_srq, msrq);
  391. }
  392. static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
  393. {
  394. return container_of(ibah, struct mlx4_ib_ah, ibah);
  395. }
  396. int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
  397. void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
  398. int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
  399. struct mlx4_db *db);
  400. void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
  401. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
  402. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  403. struct ib_umem *umem);
  404. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  405. u64 virt_addr, int access_flags,
  406. struct ib_udata *udata);
  407. int mlx4_ib_dereg_mr(struct ib_mr *mr);
  408. struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
  409. int max_page_list_len);
  410. struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
  411. int page_list_len);
  412. void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
  413. int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
  414. int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
  415. struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
  416. struct ib_ucontext *context,
  417. struct ib_udata *udata);
  418. int mlx4_ib_destroy_cq(struct ib_cq *cq);
  419. int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
  420. int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
  421. void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  422. void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  423. struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
  424. int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
  425. int mlx4_ib_destroy_ah(struct ib_ah *ah);
  426. struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
  427. struct ib_srq_init_attr *init_attr,
  428. struct ib_udata *udata);
  429. int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
  430. enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
  431. int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
  432. int mlx4_ib_destroy_srq(struct ib_srq *srq);
  433. void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
  434. int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  435. struct ib_recv_wr **bad_wr);
  436. struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
  437. struct ib_qp_init_attr *init_attr,
  438. struct ib_udata *udata);
  439. int mlx4_ib_destroy_qp(struct ib_qp *qp);
  440. int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  441. int attr_mask, struct ib_udata *udata);
  442. int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
  443. struct ib_qp_init_attr *qp_init_attr);
  444. int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  445. struct ib_send_wr **bad_wr);
  446. int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  447. struct ib_recv_wr **bad_wr);
  448. int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
  449. int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
  450. void *in_mad, void *response_mad);
  451. int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  452. struct ib_wc *in_wc, struct ib_grh *in_grh,
  453. struct ib_mad *in_mad, struct ib_mad *out_mad);
  454. int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
  455. void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
  456. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
  457. struct ib_fmr_attr *fmr_attr);
  458. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
  459. u64 iova);
  460. int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
  461. int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
  462. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  463. struct ib_port_attr *props, int netw_view);
  464. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  465. u16 *pkey, int netw_view);
  466. int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr,
  467. u8 *mac, int *is_mcast, u8 port);
  468. static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
  469. {
  470. u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
  471. if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
  472. return 1;
  473. return !!(ah->av.ib.g_slid & 0x80);
  474. }
  475. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  476. union ib_gid *gid);
  477. void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
  478. enum ib_event_type type);
  479. void mlx4_ib_tunnels_update_work(struct work_struct *work);
  480. #endif /* MLX4_IB_H */