htt_rx.c 33 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219
  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include <linux/log2.h>
  24. /* slightly larger than one large A-MPDU */
  25. #define HTT_RX_RING_SIZE_MIN 128
  26. /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
  27. #define HTT_RX_RING_SIZE_MAX 2048
  28. #define HTT_RX_AVG_FRM_BYTES 1000
  29. /* ms, very conservative */
  30. #define HTT_RX_HOST_LATENCY_MAX_MS 20
  31. /* ms, conservative */
  32. #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
  33. /* when under memory pressure rx ring refill may fail and needs a retry */
  34. #define HTT_RX_RING_REFILL_RETRY_MS 50
  35. static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
  36. {
  37. int size;
  38. /*
  39. * It is expected that the host CPU will typically be able to
  40. * service the rx indication from one A-MPDU before the rx
  41. * indication from the subsequent A-MPDU happens, roughly 1-2 ms
  42. * later. However, the rx ring should be sized very conservatively,
  43. * to accomodate the worst reasonable delay before the host CPU
  44. * services a rx indication interrupt.
  45. *
  46. * The rx ring need not be kept full of empty buffers. In theory,
  47. * the htt host SW can dynamically track the low-water mark in the
  48. * rx ring, and dynamically adjust the level to which the rx ring
  49. * is filled with empty buffers, to dynamically meet the desired
  50. * low-water mark.
  51. *
  52. * In contrast, it's difficult to resize the rx ring itself, once
  53. * it's in use. Thus, the ring itself should be sized very
  54. * conservatively, while the degree to which the ring is filled
  55. * with empty buffers should be sized moderately conservatively.
  56. */
  57. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  58. size =
  59. htt->max_throughput_mbps +
  60. 1000 /
  61. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
  62. if (size < HTT_RX_RING_SIZE_MIN)
  63. size = HTT_RX_RING_SIZE_MIN;
  64. if (size > HTT_RX_RING_SIZE_MAX)
  65. size = HTT_RX_RING_SIZE_MAX;
  66. size = roundup_pow_of_two(size);
  67. return size;
  68. }
  69. static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
  70. {
  71. int size;
  72. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  73. size =
  74. htt->max_throughput_mbps *
  75. 1000 /
  76. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
  77. /*
  78. * Make sure the fill level is at least 1 less than the ring size.
  79. * Leaving 1 element empty allows the SW to easily distinguish
  80. * between a full ring vs. an empty ring.
  81. */
  82. if (size >= htt->rx_ring.size)
  83. size = htt->rx_ring.size - 1;
  84. return size;
  85. }
  86. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  87. {
  88. struct sk_buff *skb;
  89. struct ath10k_skb_cb *cb;
  90. int i;
  91. for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
  92. skb = htt->rx_ring.netbufs_ring[i];
  93. cb = ATH10K_SKB_CB(skb);
  94. dma_unmap_single(htt->ar->dev, cb->paddr,
  95. skb->len + skb_tailroom(skb),
  96. DMA_FROM_DEVICE);
  97. dev_kfree_skb_any(skb);
  98. }
  99. htt->rx_ring.fill_cnt = 0;
  100. }
  101. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  102. {
  103. struct htt_rx_desc *rx_desc;
  104. struct sk_buff *skb;
  105. dma_addr_t paddr;
  106. int ret = 0, idx;
  107. idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
  108. while (num > 0) {
  109. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  110. if (!skb) {
  111. ret = -ENOMEM;
  112. goto fail;
  113. }
  114. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  115. skb_pull(skb,
  116. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  117. skb->data);
  118. /* Clear rx_desc attention word before posting to Rx ring */
  119. rx_desc = (struct htt_rx_desc *)skb->data;
  120. rx_desc->attention.flags = __cpu_to_le32(0);
  121. paddr = dma_map_single(htt->ar->dev, skb->data,
  122. skb->len + skb_tailroom(skb),
  123. DMA_FROM_DEVICE);
  124. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  125. dev_kfree_skb_any(skb);
  126. ret = -ENOMEM;
  127. goto fail;
  128. }
  129. ATH10K_SKB_CB(skb)->paddr = paddr;
  130. htt->rx_ring.netbufs_ring[idx] = skb;
  131. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  132. htt->rx_ring.fill_cnt++;
  133. num--;
  134. idx++;
  135. idx &= htt->rx_ring.size_mask;
  136. }
  137. fail:
  138. *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
  139. return ret;
  140. }
  141. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  142. {
  143. lockdep_assert_held(&htt->rx_ring.lock);
  144. return __ath10k_htt_rx_ring_fill_n(htt, num);
  145. }
  146. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  147. {
  148. int ret, num_to_fill;
  149. spin_lock_bh(&htt->rx_ring.lock);
  150. num_to_fill = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  151. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  152. if (ret == -ENOMEM) {
  153. /*
  154. * Failed to fill it to the desired level -
  155. * we'll start a timer and try again next time.
  156. * As long as enough buffers are left in the ring for
  157. * another A-MPDU rx, no special recovery is needed.
  158. */
  159. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  160. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  161. }
  162. spin_unlock_bh(&htt->rx_ring.lock);
  163. }
  164. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  165. {
  166. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  167. ath10k_htt_rx_msdu_buff_replenish(htt);
  168. }
  169. static unsigned ath10k_htt_rx_ring_elems(struct ath10k_htt *htt)
  170. {
  171. return (__le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr) -
  172. htt->rx_ring.sw_rd_idx.msdu_payld) & htt->rx_ring.size_mask;
  173. }
  174. void ath10k_htt_rx_detach(struct ath10k_htt *htt)
  175. {
  176. int sw_rd_idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  177. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  178. while (sw_rd_idx != __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr))) {
  179. struct sk_buff *skb =
  180. htt->rx_ring.netbufs_ring[sw_rd_idx];
  181. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(skb);
  182. dma_unmap_single(htt->ar->dev, cb->paddr,
  183. skb->len + skb_tailroom(skb),
  184. DMA_FROM_DEVICE);
  185. dev_kfree_skb_any(htt->rx_ring.netbufs_ring[sw_rd_idx]);
  186. sw_rd_idx++;
  187. sw_rd_idx &= htt->rx_ring.size_mask;
  188. }
  189. dma_free_coherent(htt->ar->dev,
  190. (htt->rx_ring.size *
  191. sizeof(htt->rx_ring.paddrs_ring)),
  192. htt->rx_ring.paddrs_ring,
  193. htt->rx_ring.base_paddr);
  194. dma_free_coherent(htt->ar->dev,
  195. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  196. htt->rx_ring.alloc_idx.vaddr,
  197. htt->rx_ring.alloc_idx.paddr);
  198. kfree(htt->rx_ring.netbufs_ring);
  199. }
  200. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  201. {
  202. int idx;
  203. struct sk_buff *msdu;
  204. spin_lock_bh(&htt->rx_ring.lock);
  205. if (ath10k_htt_rx_ring_elems(htt) == 0)
  206. ath10k_warn("htt rx ring is empty!\n");
  207. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  208. msdu = htt->rx_ring.netbufs_ring[idx];
  209. idx++;
  210. idx &= htt->rx_ring.size_mask;
  211. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  212. htt->rx_ring.fill_cnt--;
  213. spin_unlock_bh(&htt->rx_ring.lock);
  214. return msdu;
  215. }
  216. static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
  217. {
  218. struct sk_buff *next;
  219. while (skb) {
  220. next = skb->next;
  221. dev_kfree_skb_any(skb);
  222. skb = next;
  223. }
  224. }
  225. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  226. u8 **fw_desc, int *fw_desc_len,
  227. struct sk_buff **head_msdu,
  228. struct sk_buff **tail_msdu)
  229. {
  230. int msdu_len, msdu_chaining = 0;
  231. struct sk_buff *msdu;
  232. struct htt_rx_desc *rx_desc;
  233. if (ath10k_htt_rx_ring_elems(htt) == 0)
  234. ath10k_warn("htt rx ring is empty!\n");
  235. if (htt->rx_confused) {
  236. ath10k_warn("htt is confused. refusing rx\n");
  237. return 0;
  238. }
  239. msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
  240. while (msdu) {
  241. int last_msdu, msdu_len_invalid, msdu_chained;
  242. dma_unmap_single(htt->ar->dev,
  243. ATH10K_SKB_CB(msdu)->paddr,
  244. msdu->len + skb_tailroom(msdu),
  245. DMA_FROM_DEVICE);
  246. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx: ",
  247. msdu->data, msdu->len + skb_tailroom(msdu));
  248. rx_desc = (struct htt_rx_desc *)msdu->data;
  249. /* FIXME: we must report msdu payload since this is what caller
  250. * expects now */
  251. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  252. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  253. /*
  254. * Sanity check - confirm the HW is finished filling in the
  255. * rx data.
  256. * If the HW and SW are working correctly, then it's guaranteed
  257. * that the HW's MAC DMA is done before this point in the SW.
  258. * To prevent the case that we handle a stale Rx descriptor,
  259. * just assert for now until we have a way to recover.
  260. */
  261. if (!(__le32_to_cpu(rx_desc->attention.flags)
  262. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  263. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  264. *head_msdu = NULL;
  265. msdu = NULL;
  266. ath10k_err("htt rx stopped. cannot recover\n");
  267. htt->rx_confused = true;
  268. break;
  269. }
  270. /*
  271. * Copy the FW rx descriptor for this MSDU from the rx
  272. * indication message into the MSDU's netbuf. HL uses the
  273. * same rx indication message definition as LL, and simply
  274. * appends new info (fields from the HW rx desc, and the
  275. * MSDU payload itself). So, the offset into the rx
  276. * indication message only has to account for the standard
  277. * offset of the per-MSDU FW rx desc info within the
  278. * message, and how many bytes of the per-MSDU FW rx desc
  279. * info have already been consumed. (And the endianness of
  280. * the host, since for a big-endian host, the rx ind
  281. * message contents, including the per-MSDU rx desc bytes,
  282. * were byteswapped during upload.)
  283. */
  284. if (*fw_desc_len > 0) {
  285. rx_desc->fw_desc.info0 = **fw_desc;
  286. /*
  287. * The target is expected to only provide the basic
  288. * per-MSDU rx descriptors. Just to be sure, verify
  289. * that the target has not attached extension data
  290. * (e.g. LRO flow ID).
  291. */
  292. /* or more, if there's extension data */
  293. (*fw_desc)++;
  294. (*fw_desc_len)--;
  295. } else {
  296. /*
  297. * When an oversized AMSDU happened, FW will lost
  298. * some of MSDU status - in this case, the FW
  299. * descriptors provided will be less than the
  300. * actual MSDUs inside this MPDU. Mark the FW
  301. * descriptors so that it will still deliver to
  302. * upper stack, if no CRC error for this MPDU.
  303. *
  304. * FIX THIS - the FW descriptors are actually for
  305. * MSDUs in the end of this A-MSDU instead of the
  306. * beginning.
  307. */
  308. rx_desc->fw_desc.info0 = 0;
  309. }
  310. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  311. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  312. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  313. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  314. RX_MSDU_START_INFO0_MSDU_LENGTH);
  315. msdu_chained = rx_desc->frag_info.ring2_more_count;
  316. if (msdu_len_invalid)
  317. msdu_len = 0;
  318. skb_trim(msdu, 0);
  319. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  320. msdu_len -= msdu->len;
  321. /* FIXME: Do chained buffers include htt_rx_desc or not? */
  322. while (msdu_chained--) {
  323. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  324. dma_unmap_single(htt->ar->dev,
  325. ATH10K_SKB_CB(next)->paddr,
  326. next->len + skb_tailroom(next),
  327. DMA_FROM_DEVICE);
  328. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx: ",
  329. next->data,
  330. next->len + skb_tailroom(next));
  331. skb_trim(next, 0);
  332. skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
  333. msdu_len -= next->len;
  334. msdu->next = next;
  335. msdu = next;
  336. msdu_chaining = 1;
  337. }
  338. if (msdu_len > 0) {
  339. /* This may suggest FW bug? */
  340. ath10k_warn("htt rx msdu len not consumed (%d)\n",
  341. msdu_len);
  342. }
  343. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  344. RX_MSDU_END_INFO0_LAST_MSDU;
  345. if (last_msdu) {
  346. msdu->next = NULL;
  347. break;
  348. } else {
  349. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  350. msdu->next = next;
  351. msdu = next;
  352. }
  353. }
  354. *tail_msdu = msdu;
  355. /*
  356. * Don't refill the ring yet.
  357. *
  358. * First, the elements popped here are still in use - it is not
  359. * safe to overwrite them until the matching call to
  360. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  361. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  362. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  363. * (something like 3 buffers). Consequently, we'll rely on the txrx
  364. * SW to tell us when it is done pulling all the PPDU's rx buffers
  365. * out of the rx ring, and then refill it just once.
  366. */
  367. return msdu_chaining;
  368. }
  369. int ath10k_htt_rx_attach(struct ath10k_htt *htt)
  370. {
  371. dma_addr_t paddr;
  372. void *vaddr;
  373. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  374. htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
  375. if (!is_power_of_2(htt->rx_ring.size)) {
  376. ath10k_warn("htt rx ring size is not power of 2\n");
  377. return -EINVAL;
  378. }
  379. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  380. /*
  381. * Set the initial value for the level to which the rx ring
  382. * should be filled, based on the max throughput and the
  383. * worst likely latency for the host to fill the rx ring
  384. * with new buffers. In theory, this fill level can be
  385. * dynamically adjusted from the initial value set here, to
  386. * reflect the actual host latency rather than a
  387. * conservative assumption about the host latency.
  388. */
  389. htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
  390. htt->rx_ring.netbufs_ring =
  391. kmalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  392. GFP_KERNEL);
  393. if (!htt->rx_ring.netbufs_ring)
  394. goto err_netbuf;
  395. vaddr = dma_alloc_coherent(htt->ar->dev,
  396. (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
  397. &paddr, GFP_DMA);
  398. if (!vaddr)
  399. goto err_dma_ring;
  400. htt->rx_ring.paddrs_ring = vaddr;
  401. htt->rx_ring.base_paddr = paddr;
  402. vaddr = dma_alloc_coherent(htt->ar->dev,
  403. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  404. &paddr, GFP_DMA);
  405. if (!vaddr)
  406. goto err_dma_idx;
  407. htt->rx_ring.alloc_idx.vaddr = vaddr;
  408. htt->rx_ring.alloc_idx.paddr = paddr;
  409. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  410. *htt->rx_ring.alloc_idx.vaddr = 0;
  411. /* Initialize the Rx refill retry timer */
  412. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  413. spin_lock_init(&htt->rx_ring.lock);
  414. htt->rx_ring.fill_cnt = 0;
  415. if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
  416. goto err_fill_ring;
  417. ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  418. htt->rx_ring.size, htt->rx_ring.fill_level);
  419. return 0;
  420. err_fill_ring:
  421. ath10k_htt_rx_ring_free(htt);
  422. dma_free_coherent(htt->ar->dev,
  423. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  424. htt->rx_ring.alloc_idx.vaddr,
  425. htt->rx_ring.alloc_idx.paddr);
  426. err_dma_idx:
  427. dma_free_coherent(htt->ar->dev,
  428. (htt->rx_ring.size *
  429. sizeof(htt->rx_ring.paddrs_ring)),
  430. htt->rx_ring.paddrs_ring,
  431. htt->rx_ring.base_paddr);
  432. err_dma_ring:
  433. kfree(htt->rx_ring.netbufs_ring);
  434. err_netbuf:
  435. return -ENOMEM;
  436. }
  437. static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
  438. {
  439. switch (type) {
  440. case HTT_RX_MPDU_ENCRYPT_WEP40:
  441. case HTT_RX_MPDU_ENCRYPT_WEP104:
  442. return 4;
  443. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  444. case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
  445. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  446. case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
  447. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  448. return 8;
  449. case HTT_RX_MPDU_ENCRYPT_NONE:
  450. return 0;
  451. }
  452. ath10k_warn("unknown encryption type %d\n", type);
  453. return 0;
  454. }
  455. static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
  456. {
  457. switch (type) {
  458. case HTT_RX_MPDU_ENCRYPT_NONE:
  459. case HTT_RX_MPDU_ENCRYPT_WEP40:
  460. case HTT_RX_MPDU_ENCRYPT_WEP104:
  461. case HTT_RX_MPDU_ENCRYPT_WEP128:
  462. case HTT_RX_MPDU_ENCRYPT_WAPI:
  463. return 0;
  464. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  465. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  466. return 4;
  467. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  468. return 8;
  469. }
  470. ath10k_warn("unknown encryption type %d\n", type);
  471. return 0;
  472. }
  473. /* Applies for first msdu in chain, before altering it. */
  474. static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
  475. {
  476. struct htt_rx_desc *rxd;
  477. enum rx_msdu_decap_format fmt;
  478. rxd = (void *)skb->data - sizeof(*rxd);
  479. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  480. RX_MSDU_START_INFO1_DECAP_FORMAT);
  481. if (fmt == RX_MSDU_DECAP_RAW)
  482. return (void *)skb->data;
  483. else
  484. return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  485. }
  486. /* This function only applies for first msdu in an msdu chain */
  487. static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
  488. {
  489. if (ieee80211_is_data_qos(hdr->frame_control)) {
  490. u8 *qc = ieee80211_get_qos_ctl(hdr);
  491. if (qc[0] & 0x80)
  492. return true;
  493. }
  494. return false;
  495. }
  496. static int ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
  497. struct htt_rx_info *info)
  498. {
  499. struct htt_rx_desc *rxd;
  500. struct sk_buff *amsdu;
  501. struct sk_buff *first;
  502. struct ieee80211_hdr *hdr;
  503. struct sk_buff *skb = info->skb;
  504. enum rx_msdu_decap_format fmt;
  505. enum htt_rx_mpdu_encrypt_type enctype;
  506. unsigned int hdr_len;
  507. int crypto_len;
  508. rxd = (void *)skb->data - sizeof(*rxd);
  509. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  510. RX_MSDU_START_INFO1_DECAP_FORMAT);
  511. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  512. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  513. /* FIXME: No idea what assumptions are safe here. Need logs */
  514. if ((fmt == RX_MSDU_DECAP_RAW && skb->next)) {
  515. ath10k_htt_rx_free_msdu_chain(skb->next);
  516. skb->next = NULL;
  517. return -ENOTSUPP;
  518. }
  519. /* A-MSDU max is a little less than 8K */
  520. amsdu = dev_alloc_skb(8*1024);
  521. if (!amsdu) {
  522. ath10k_warn("A-MSDU allocation failed\n");
  523. ath10k_htt_rx_free_msdu_chain(skb->next);
  524. skb->next = NULL;
  525. return -ENOMEM;
  526. }
  527. if (fmt >= RX_MSDU_DECAP_NATIVE_WIFI) {
  528. int hdrlen;
  529. hdr = (void *)rxd->rx_hdr_status;
  530. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  531. memcpy(skb_put(amsdu, hdrlen), hdr, hdrlen);
  532. }
  533. first = skb;
  534. while (skb) {
  535. void *decap_hdr;
  536. int decap_len = 0;
  537. rxd = (void *)skb->data - sizeof(*rxd);
  538. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  539. RX_MSDU_START_INFO1_DECAP_FORMAT);
  540. decap_hdr = (void *)rxd->rx_hdr_status;
  541. if (skb == first) {
  542. /* We receive linked A-MSDU subframe skbuffs. The
  543. * first one contains the original 802.11 header (and
  544. * possible crypto param) in the RX descriptor. The
  545. * A-MSDU subframe header follows that. Each part is
  546. * aligned to 4 byte boundary. */
  547. hdr = (void *)amsdu->data;
  548. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  549. crypto_len = ath10k_htt_rx_crypto_param_len(enctype);
  550. decap_hdr += roundup(hdr_len, 4);
  551. decap_hdr += roundup(crypto_len, 4);
  552. }
  553. /* When fmt == RX_MSDU_DECAP_8023_SNAP_LLC:
  554. *
  555. * SNAP 802.3 consists of:
  556. * [dst:6][src:6][len:2][dsap:1][ssap:1][ctl:1][snap:5]
  557. * [data][fcs:4].
  558. *
  559. * Since this overlaps with A-MSDU header (da, sa, len)
  560. * there's nothing extra to do. */
  561. if (fmt == RX_MSDU_DECAP_ETHERNET2_DIX) {
  562. /* Ethernet2 decap inserts ethernet header in place of
  563. * A-MSDU subframe header. */
  564. skb_pull(skb, 6 + 6 + 2);
  565. /* A-MSDU subframe header length */
  566. decap_len += 6 + 6 + 2;
  567. /* Ethernet2 decap also strips the LLC/SNAP so we need
  568. * to re-insert it. The LLC/SNAP follows A-MSDU
  569. * subframe header. */
  570. /* FIXME: Not all LLCs are 8 bytes long */
  571. decap_len += 8;
  572. memcpy(skb_put(amsdu, decap_len), decap_hdr, decap_len);
  573. }
  574. if (fmt == RX_MSDU_DECAP_NATIVE_WIFI) {
  575. /* Native Wifi decap inserts regular 802.11 header
  576. * in place of A-MSDU subframe header. */
  577. hdr = (struct ieee80211_hdr *)skb->data;
  578. skb_pull(skb, ieee80211_hdrlen(hdr->frame_control));
  579. /* A-MSDU subframe header length */
  580. decap_len += 6 + 6 + 2;
  581. memcpy(skb_put(amsdu, decap_len), decap_hdr, decap_len);
  582. }
  583. if (fmt == RX_MSDU_DECAP_RAW)
  584. skb_trim(skb, skb->len - 4); /* remove FCS */
  585. memcpy(skb_put(amsdu, skb->len), skb->data, skb->len);
  586. /* A-MSDU subframes are padded to 4bytes
  587. * but relative to first subframe, not the whole MPDU */
  588. if (skb->next && ((decap_len + skb->len) & 3)) {
  589. int padlen = 4 - ((decap_len + skb->len) & 3);
  590. memset(skb_put(amsdu, padlen), 0, padlen);
  591. }
  592. skb = skb->next;
  593. }
  594. info->skb = amsdu;
  595. info->encrypt_type = enctype;
  596. ath10k_htt_rx_free_msdu_chain(first);
  597. return 0;
  598. }
  599. static int ath10k_htt_rx_msdu(struct ath10k_htt *htt, struct htt_rx_info *info)
  600. {
  601. struct sk_buff *skb = info->skb;
  602. struct htt_rx_desc *rxd;
  603. struct ieee80211_hdr *hdr;
  604. enum rx_msdu_decap_format fmt;
  605. enum htt_rx_mpdu_encrypt_type enctype;
  606. /* This shouldn't happen. If it does than it may be a FW bug. */
  607. if (skb->next) {
  608. ath10k_warn("received chained non A-MSDU frame\n");
  609. ath10k_htt_rx_free_msdu_chain(skb->next);
  610. skb->next = NULL;
  611. }
  612. rxd = (void *)skb->data - sizeof(*rxd);
  613. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  614. RX_MSDU_START_INFO1_DECAP_FORMAT);
  615. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  616. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  617. hdr = (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  618. switch (fmt) {
  619. case RX_MSDU_DECAP_RAW:
  620. /* remove trailing FCS */
  621. skb_trim(skb, skb->len - 4);
  622. break;
  623. case RX_MSDU_DECAP_NATIVE_WIFI:
  624. /* nothing to do here */
  625. break;
  626. case RX_MSDU_DECAP_ETHERNET2_DIX:
  627. /* macaddr[6] + macaddr[6] + ethertype[2] */
  628. skb_pull(skb, 6 + 6 + 2);
  629. break;
  630. case RX_MSDU_DECAP_8023_SNAP_LLC:
  631. /* macaddr[6] + macaddr[6] + len[2] */
  632. /* we don't need this for non-A-MSDU */
  633. skb_pull(skb, 6 + 6 + 2);
  634. break;
  635. }
  636. if (fmt == RX_MSDU_DECAP_ETHERNET2_DIX) {
  637. void *llc;
  638. int llclen;
  639. llclen = 8;
  640. llc = hdr;
  641. llc += roundup(ieee80211_hdrlen(hdr->frame_control), 4);
  642. llc += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
  643. skb_push(skb, llclen);
  644. memcpy(skb->data, llc, llclen);
  645. }
  646. if (fmt >= RX_MSDU_DECAP_ETHERNET2_DIX) {
  647. int len = ieee80211_hdrlen(hdr->frame_control);
  648. skb_push(skb, len);
  649. memcpy(skb->data, hdr, len);
  650. }
  651. info->skb = skb;
  652. info->encrypt_type = enctype;
  653. return 0;
  654. }
  655. static bool ath10k_htt_rx_has_decrypt_err(struct sk_buff *skb)
  656. {
  657. struct htt_rx_desc *rxd;
  658. u32 flags;
  659. rxd = (void *)skb->data - sizeof(*rxd);
  660. flags = __le32_to_cpu(rxd->attention.flags);
  661. if (flags & RX_ATTENTION_FLAGS_DECRYPT_ERR)
  662. return true;
  663. return false;
  664. }
  665. static bool ath10k_htt_rx_has_fcs_err(struct sk_buff *skb)
  666. {
  667. struct htt_rx_desc *rxd;
  668. u32 flags;
  669. rxd = (void *)skb->data - sizeof(*rxd);
  670. flags = __le32_to_cpu(rxd->attention.flags);
  671. if (flags & RX_ATTENTION_FLAGS_FCS_ERR)
  672. return true;
  673. return false;
  674. }
  675. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  676. {
  677. struct htt_rx_desc *rxd;
  678. u32 flags, info;
  679. bool is_ip4, is_ip6;
  680. bool is_tcp, is_udp;
  681. bool ip_csum_ok, tcpudp_csum_ok;
  682. rxd = (void *)skb->data - sizeof(*rxd);
  683. flags = __le32_to_cpu(rxd->attention.flags);
  684. info = __le32_to_cpu(rxd->msdu_start.info1);
  685. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  686. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  687. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  688. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  689. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  690. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  691. if (!is_ip4 && !is_ip6)
  692. return CHECKSUM_NONE;
  693. if (!is_tcp && !is_udp)
  694. return CHECKSUM_NONE;
  695. if (!ip_csum_ok)
  696. return CHECKSUM_NONE;
  697. if (!tcpudp_csum_ok)
  698. return CHECKSUM_NONE;
  699. return CHECKSUM_UNNECESSARY;
  700. }
  701. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  702. struct htt_rx_indication *rx)
  703. {
  704. struct htt_rx_info info;
  705. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  706. struct ieee80211_hdr *hdr;
  707. int num_mpdu_ranges;
  708. int fw_desc_len;
  709. u8 *fw_desc;
  710. int i, j;
  711. int ret;
  712. int ip_summed;
  713. memset(&info, 0, sizeof(info));
  714. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  715. fw_desc = (u8 *)&rx->fw_desc;
  716. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  717. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  718. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  719. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  720. rx, sizeof(*rx) +
  721. (sizeof(struct htt_rx_indication_mpdu_range) *
  722. num_mpdu_ranges));
  723. for (i = 0; i < num_mpdu_ranges; i++) {
  724. info.status = mpdu_ranges[i].mpdu_range_status;
  725. for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
  726. struct sk_buff *msdu_head, *msdu_tail;
  727. enum htt_rx_mpdu_status status;
  728. int msdu_chaining;
  729. msdu_head = NULL;
  730. msdu_tail = NULL;
  731. msdu_chaining = ath10k_htt_rx_amsdu_pop(htt,
  732. &fw_desc,
  733. &fw_desc_len,
  734. &msdu_head,
  735. &msdu_tail);
  736. if (!msdu_head) {
  737. ath10k_warn("htt rx no data!\n");
  738. continue;
  739. }
  740. if (msdu_head->len == 0) {
  741. ath10k_dbg(ATH10K_DBG_HTT,
  742. "htt rx dropping due to zero-len\n");
  743. ath10k_htt_rx_free_msdu_chain(msdu_head);
  744. continue;
  745. }
  746. if (ath10k_htt_rx_has_decrypt_err(msdu_head)) {
  747. ath10k_htt_rx_free_msdu_chain(msdu_head);
  748. continue;
  749. }
  750. status = info.status;
  751. /* Skip mgmt frames while we handle this in WMI */
  752. if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL) {
  753. ath10k_htt_rx_free_msdu_chain(msdu_head);
  754. continue;
  755. }
  756. if (status != HTT_RX_IND_MPDU_STATUS_OK &&
  757. status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
  758. !htt->ar->monitor_enabled) {
  759. ath10k_dbg(ATH10K_DBG_HTT,
  760. "htt rx ignoring frame w/ status %d\n",
  761. status);
  762. ath10k_htt_rx_free_msdu_chain(msdu_head);
  763. continue;
  764. }
  765. /* FIXME: we do not support chaining yet.
  766. * this needs investigation */
  767. if (msdu_chaining) {
  768. ath10k_warn("msdu_chaining is true\n");
  769. ath10k_htt_rx_free_msdu_chain(msdu_head);
  770. continue;
  771. }
  772. /* The skb is not yet processed and it may be
  773. * reallocated. Since the offload is in the original
  774. * skb extract the checksum now and assign it later */
  775. ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
  776. info.skb = msdu_head;
  777. info.fcs_err = ath10k_htt_rx_has_fcs_err(msdu_head);
  778. info.signal = ATH10K_DEFAULT_NOISE_FLOOR;
  779. info.signal += rx->ppdu.combined_rssi;
  780. info.rate.info0 = rx->ppdu.info0;
  781. info.rate.info1 = __le32_to_cpu(rx->ppdu.info1);
  782. info.rate.info2 = __le32_to_cpu(rx->ppdu.info2);
  783. hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
  784. if (ath10k_htt_rx_hdr_is_amsdu(hdr))
  785. ret = ath10k_htt_rx_amsdu(htt, &info);
  786. else
  787. ret = ath10k_htt_rx_msdu(htt, &info);
  788. if (ret && !info.fcs_err) {
  789. ath10k_warn("error processing msdus %d\n", ret);
  790. dev_kfree_skb_any(info.skb);
  791. continue;
  792. }
  793. if (ath10k_htt_rx_hdr_is_amsdu((void *)info.skb->data))
  794. ath10k_dbg(ATH10K_DBG_HTT, "htt mpdu is amsdu\n");
  795. info.skb->ip_summed = ip_summed;
  796. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt mpdu: ",
  797. info.skb->data, info.skb->len);
  798. ath10k_process_rx(htt->ar, &info);
  799. }
  800. }
  801. ath10k_htt_rx_msdu_buff_replenish(htt);
  802. }
  803. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  804. struct htt_rx_fragment_indication *frag)
  805. {
  806. struct sk_buff *msdu_head, *msdu_tail;
  807. struct htt_rx_desc *rxd;
  808. enum rx_msdu_decap_format fmt;
  809. struct htt_rx_info info = {};
  810. struct ieee80211_hdr *hdr;
  811. int msdu_chaining;
  812. bool tkip_mic_err;
  813. bool decrypt_err;
  814. u8 *fw_desc;
  815. int fw_desc_len, hdrlen, paramlen;
  816. int trim;
  817. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  818. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  819. msdu_head = NULL;
  820. msdu_tail = NULL;
  821. msdu_chaining = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  822. &msdu_head, &msdu_tail);
  823. ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  824. if (!msdu_head) {
  825. ath10k_warn("htt rx frag no data\n");
  826. return;
  827. }
  828. if (msdu_chaining || msdu_head != msdu_tail) {
  829. ath10k_warn("aggregation with fragmentation?!\n");
  830. ath10k_htt_rx_free_msdu_chain(msdu_head);
  831. return;
  832. }
  833. /* FIXME: implement signal strength */
  834. hdr = (struct ieee80211_hdr *)msdu_head->data;
  835. rxd = (void *)msdu_head->data - sizeof(*rxd);
  836. tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
  837. RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  838. decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
  839. RX_ATTENTION_FLAGS_DECRYPT_ERR);
  840. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  841. RX_MSDU_START_INFO1_DECAP_FORMAT);
  842. if (fmt != RX_MSDU_DECAP_RAW) {
  843. ath10k_warn("we dont support non-raw fragmented rx yet\n");
  844. dev_kfree_skb_any(msdu_head);
  845. goto end;
  846. }
  847. info.skb = msdu_head;
  848. info.status = HTT_RX_IND_MPDU_STATUS_OK;
  849. info.encrypt_type = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  850. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  851. info.skb->ip_summed = ath10k_htt_rx_get_csum_state(info.skb);
  852. if (tkip_mic_err) {
  853. ath10k_warn("tkip mic error\n");
  854. info.status = HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR;
  855. }
  856. if (decrypt_err) {
  857. ath10k_warn("decryption err in fragmented rx\n");
  858. dev_kfree_skb_any(info.skb);
  859. goto end;
  860. }
  861. if (info.encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
  862. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  863. paramlen = ath10k_htt_rx_crypto_param_len(info.encrypt_type);
  864. /* It is more efficient to move the header than the payload */
  865. memmove((void *)info.skb->data + paramlen,
  866. (void *)info.skb->data,
  867. hdrlen);
  868. skb_pull(info.skb, paramlen);
  869. hdr = (struct ieee80211_hdr *)info.skb->data;
  870. }
  871. /* remove trailing FCS */
  872. trim = 4;
  873. /* remove crypto trailer */
  874. trim += ath10k_htt_rx_crypto_tail_len(info.encrypt_type);
  875. /* last fragment of TKIP frags has MIC */
  876. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  877. info.encrypt_type == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  878. trim += 8;
  879. if (trim > info.skb->len) {
  880. ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
  881. dev_kfree_skb_any(info.skb);
  882. goto end;
  883. }
  884. skb_trim(info.skb, info.skb->len - trim);
  885. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt frag mpdu: ",
  886. info.skb->data, info.skb->len);
  887. ath10k_process_rx(htt->ar, &info);
  888. end:
  889. if (fw_desc_len > 0) {
  890. ath10k_dbg(ATH10K_DBG_HTT,
  891. "expecting more fragmented rx in one indication %d\n",
  892. fw_desc_len);
  893. }
  894. }
  895. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  896. {
  897. struct ath10k_htt *htt = &ar->htt;
  898. struct htt_resp *resp = (struct htt_resp *)skb->data;
  899. /* confirm alignment */
  900. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  901. ath10k_warn("unaligned htt message, expect trouble\n");
  902. ath10k_dbg(ATH10K_DBG_HTT, "HTT RX, msg_type: 0x%0X\n",
  903. resp->hdr.msg_type);
  904. switch (resp->hdr.msg_type) {
  905. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  906. htt->target_version_major = resp->ver_resp.major;
  907. htt->target_version_minor = resp->ver_resp.minor;
  908. complete(&htt->target_version_received);
  909. break;
  910. }
  911. case HTT_T2H_MSG_TYPE_RX_IND: {
  912. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  913. break;
  914. }
  915. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  916. struct htt_peer_map_event ev = {
  917. .vdev_id = resp->peer_map.vdev_id,
  918. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  919. };
  920. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  921. ath10k_peer_map_event(htt, &ev);
  922. break;
  923. }
  924. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  925. struct htt_peer_unmap_event ev = {
  926. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  927. };
  928. ath10k_peer_unmap_event(htt, &ev);
  929. break;
  930. }
  931. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  932. struct htt_tx_done tx_done = {};
  933. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  934. tx_done.msdu_id =
  935. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  936. switch (status) {
  937. case HTT_MGMT_TX_STATUS_OK:
  938. break;
  939. case HTT_MGMT_TX_STATUS_RETRY:
  940. tx_done.no_ack = true;
  941. break;
  942. case HTT_MGMT_TX_STATUS_DROP:
  943. tx_done.discard = true;
  944. break;
  945. }
  946. ath10k_txrx_tx_unref(htt, &tx_done);
  947. break;
  948. }
  949. case HTT_T2H_MSG_TYPE_TX_COMPL_IND: {
  950. struct htt_tx_done tx_done = {};
  951. int status = MS(resp->data_tx_completion.flags,
  952. HTT_DATA_TX_STATUS);
  953. __le16 msdu_id;
  954. int i;
  955. switch (status) {
  956. case HTT_DATA_TX_STATUS_NO_ACK:
  957. tx_done.no_ack = true;
  958. break;
  959. case HTT_DATA_TX_STATUS_OK:
  960. break;
  961. case HTT_DATA_TX_STATUS_DISCARD:
  962. case HTT_DATA_TX_STATUS_POSTPONE:
  963. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  964. tx_done.discard = true;
  965. break;
  966. default:
  967. ath10k_warn("unhandled tx completion status %d\n",
  968. status);
  969. tx_done.discard = true;
  970. break;
  971. }
  972. ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  973. resp->data_tx_completion.num_msdus);
  974. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  975. msdu_id = resp->data_tx_completion.msdus[i];
  976. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  977. ath10k_txrx_tx_unref(htt, &tx_done);
  978. }
  979. break;
  980. }
  981. case HTT_T2H_MSG_TYPE_SEC_IND: {
  982. struct ath10k *ar = htt->ar;
  983. struct htt_security_indication *ev = &resp->security_indication;
  984. ath10k_dbg(ATH10K_DBG_HTT,
  985. "sec ind peer_id %d unicast %d type %d\n",
  986. __le16_to_cpu(ev->peer_id),
  987. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  988. MS(ev->flags, HTT_SECURITY_TYPE));
  989. complete(&ar->install_key_done);
  990. break;
  991. }
  992. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  993. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  994. skb->data, skb->len);
  995. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  996. break;
  997. }
  998. case HTT_T2H_MSG_TYPE_TEST:
  999. /* FIX THIS */
  1000. break;
  1001. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1002. trace_ath10k_htt_stats(skb->data, skb->len);
  1003. break;
  1004. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1005. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1006. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1007. case HTT_T2H_MSG_TYPE_RX_FLUSH:
  1008. default:
  1009. ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
  1010. resp->hdr.msg_type);
  1011. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1012. skb->data, skb->len);
  1013. break;
  1014. };
  1015. /* Free the indication buffer */
  1016. dev_kfree_skb_any(skb);
  1017. }