ezkit.c 22 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/stamp.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb/isp1362.h>
  38. #endif
  39. #include <linux/ata_platform.h>
  40. #include <linux/irq.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/usb/sl811.h>
  43. #include <linux/usb/musb.h>
  44. #include <asm/cplb.h>
  45. #include <asm/dma.h>
  46. #include <asm/bfin5xx_spi.h>
  47. #include <asm/reboot.h>
  48. #include <asm/nand.h>
  49. #include <asm/portmux.h>
  50. #include <linux/spi/ad7877.h>
  51. /*
  52. * Name the Board for the /proc/cpuinfo
  53. */
  54. const char bfin_board_name[] = "ADDS-BF527-EZKIT";
  55. /*
  56. * Driver needs to know address, irq and flag pin.
  57. */
  58. #define ISP1761_BASE 0x203C0000
  59. #define ISP1761_IRQ IRQ_PF7
  60. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  61. static struct resource bfin_isp1761_resources[] = {
  62. [0] = {
  63. .name = "isp1761-regs",
  64. .start = ISP1761_BASE + 0x00000000,
  65. .end = ISP1761_BASE + 0x000fffff,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. [1] = {
  69. .start = ISP1761_IRQ,
  70. .end = ISP1761_IRQ,
  71. .flags = IORESOURCE_IRQ,
  72. },
  73. };
  74. static struct platform_device bfin_isp1761_device = {
  75. .name = "isp1761",
  76. .id = 0,
  77. .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
  78. .resource = bfin_isp1761_resources,
  79. };
  80. static struct platform_device *bfin_isp1761_devices[] = {
  81. &bfin_isp1761_device,
  82. };
  83. int __init bfin_isp1761_init(void)
  84. {
  85. unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  86. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  87. set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
  88. return platform_add_devices(bfin_isp1761_devices, num_devices);
  89. }
  90. void __exit bfin_isp1761_exit(void)
  91. {
  92. platform_device_unregister(&bfin_isp1761_device);
  93. }
  94. arch_initcall(bfin_isp1761_init);
  95. #endif
  96. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  97. static struct resource musb_resources[] = {
  98. [0] = {
  99. .start = 0xffc03800,
  100. .end = 0xffc03cff,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. [1] = { /* general IRQ */
  104. .start = IRQ_USB_INT0,
  105. .end = IRQ_USB_INT0,
  106. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  107. },
  108. [2] = { /* DMA IRQ */
  109. .start = IRQ_USB_DMA,
  110. .end = IRQ_USB_DMA,
  111. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  112. },
  113. };
  114. static struct musb_hdrc_platform_data musb_plat = {
  115. #if defined(CONFIG_USB_MUSB_OTG)
  116. .mode = MUSB_OTG,
  117. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  118. .mode = MUSB_HOST,
  119. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  120. .mode = MUSB_PERIPHERAL,
  121. #endif
  122. .multipoint = 0,
  123. };
  124. static u64 musb_dmamask = ~(u32)0;
  125. static struct platform_device musb_device = {
  126. .name = "musb_hdrc",
  127. .id = 0,
  128. .dev = {
  129. .dma_mask = &musb_dmamask,
  130. .coherent_dma_mask = 0xffffffff,
  131. .platform_data = &musb_plat,
  132. },
  133. .num_resources = ARRAY_SIZE(musb_resources),
  134. .resource = musb_resources,
  135. };
  136. #endif
  137. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  138. static struct resource bf52x_t350mcqb_resources[] = {
  139. {
  140. .start = IRQ_PPI_ERROR,
  141. .end = IRQ_PPI_ERROR,
  142. .flags = IORESOURCE_IRQ,
  143. },
  144. };
  145. static struct platform_device bf52x_t350mcqb_device = {
  146. .name = "bfin-t350mcqb",
  147. .id = -1,
  148. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  149. .resource = bf52x_t350mcqb_resources,
  150. };
  151. #endif
  152. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  153. static struct mtd_partition partition_info[] = {
  154. {
  155. .name = "Linux Kernel",
  156. .offset = 0,
  157. .size = 4 * SIZE_1M,
  158. },
  159. {
  160. .name = "File System",
  161. .offset = 4 * SIZE_1M,
  162. .size = (256 - 4) * SIZE_1M,
  163. },
  164. };
  165. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  166. .page_size = NFC_PG_SIZE_256,
  167. .data_width = NFC_NWIDTH_8,
  168. .partitions = partition_info,
  169. .nr_partitions = ARRAY_SIZE(partition_info),
  170. .rd_dly = 3,
  171. .wr_dly = 3,
  172. };
  173. static struct resource bf5xx_nand_resources[] = {
  174. {
  175. .start = NFC_CTL,
  176. .end = NFC_DATA_RD + 2,
  177. .flags = IORESOURCE_MEM,
  178. },
  179. {
  180. .start = CH_NFC,
  181. .end = CH_NFC,
  182. .flags = IORESOURCE_IRQ,
  183. },
  184. };
  185. static struct platform_device bf5xx_nand_device = {
  186. .name = "bf5xx-nand",
  187. .id = 0,
  188. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  189. .resource = bf5xx_nand_resources,
  190. .dev = {
  191. .platform_data = &bf5xx_nand_platform,
  192. },
  193. };
  194. #endif
  195. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  196. static struct resource bfin_pcmcia_cf_resources[] = {
  197. {
  198. .start = 0x20310000, /* IO PORT */
  199. .end = 0x20312000,
  200. .flags = IORESOURCE_MEM,
  201. }, {
  202. .start = 0x20311000, /* Attribute Memory */
  203. .end = 0x20311FFF,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = IRQ_PF4,
  207. .end = IRQ_PF4,
  208. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  209. }, {
  210. .start = 6, /* Card Detect PF6 */
  211. .end = 6,
  212. .flags = IORESOURCE_IRQ,
  213. },
  214. };
  215. static struct platform_device bfin_pcmcia_cf_device = {
  216. .name = "bfin_cf_pcmcia",
  217. .id = -1,
  218. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  219. .resource = bfin_pcmcia_cf_resources,
  220. };
  221. #endif
  222. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  223. static struct platform_device rtc_device = {
  224. .name = "rtc-bfin",
  225. .id = -1,
  226. };
  227. #endif
  228. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  229. static struct resource smc91x_resources[] = {
  230. {
  231. .name = "smc91x-regs",
  232. .start = 0x20300300,
  233. .end = 0x20300300 + 16,
  234. .flags = IORESOURCE_MEM,
  235. }, {
  236. .start = IRQ_PF7,
  237. .end = IRQ_PF7,
  238. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  239. },
  240. };
  241. static struct platform_device smc91x_device = {
  242. .name = "smc91x",
  243. .id = 0,
  244. .num_resources = ARRAY_SIZE(smc91x_resources),
  245. .resource = smc91x_resources,
  246. };
  247. #endif
  248. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  249. static struct resource dm9000_resources[] = {
  250. [0] = {
  251. .start = 0x203FB800,
  252. .end = 0x203FB800 + 8,
  253. .flags = IORESOURCE_MEM,
  254. },
  255. [1] = {
  256. .start = IRQ_PF9,
  257. .end = IRQ_PF9,
  258. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  259. },
  260. };
  261. static struct platform_device dm9000_device = {
  262. .name = "dm9000",
  263. .id = -1,
  264. .num_resources = ARRAY_SIZE(dm9000_resources),
  265. .resource = dm9000_resources,
  266. };
  267. #endif
  268. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  269. static struct resource sl811_hcd_resources[] = {
  270. {
  271. .start = 0x20340000,
  272. .end = 0x20340000,
  273. .flags = IORESOURCE_MEM,
  274. }, {
  275. .start = 0x20340004,
  276. .end = 0x20340004,
  277. .flags = IORESOURCE_MEM,
  278. }, {
  279. .start = CONFIG_USB_SL811_BFIN_IRQ,
  280. .end = CONFIG_USB_SL811_BFIN_IRQ,
  281. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  282. },
  283. };
  284. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  285. void sl811_port_power(struct device *dev, int is_on)
  286. {
  287. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  288. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  289. }
  290. #endif
  291. static struct sl811_platform_data sl811_priv = {
  292. .potpg = 10,
  293. .power = 250, /* == 500mA */
  294. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  295. .port_power = &sl811_port_power,
  296. #endif
  297. };
  298. static struct platform_device sl811_hcd_device = {
  299. .name = "sl811-hcd",
  300. .id = 0,
  301. .dev = {
  302. .platform_data = &sl811_priv,
  303. },
  304. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  305. .resource = sl811_hcd_resources,
  306. };
  307. #endif
  308. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  309. static struct resource isp1362_hcd_resources[] = {
  310. {
  311. .start = 0x20360000,
  312. .end = 0x20360000,
  313. .flags = IORESOURCE_MEM,
  314. }, {
  315. .start = 0x20360004,
  316. .end = 0x20360004,
  317. .flags = IORESOURCE_MEM,
  318. }, {
  319. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  320. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  321. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  322. },
  323. };
  324. static struct isp1362_platform_data isp1362_priv = {
  325. .sel15Kres = 1,
  326. .clknotstop = 0,
  327. .oc_enable = 0,
  328. .int_act_high = 0,
  329. .int_edge_triggered = 0,
  330. .remote_wakeup_connected = 0,
  331. .no_power_switching = 1,
  332. .power_switching_mode = 0,
  333. };
  334. static struct platform_device isp1362_hcd_device = {
  335. .name = "isp1362-hcd",
  336. .id = 0,
  337. .dev = {
  338. .platform_data = &isp1362_priv,
  339. },
  340. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  341. .resource = isp1362_hcd_resources,
  342. };
  343. #endif
  344. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  345. static struct platform_device bfin_mac_device = {
  346. .name = "bfin_mac",
  347. };
  348. #endif
  349. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  350. static struct resource net2272_bfin_resources[] = {
  351. {
  352. .start = 0x20300000,
  353. .end = 0x20300000 + 0x100,
  354. .flags = IORESOURCE_MEM,
  355. }, {
  356. .start = IRQ_PF7,
  357. .end = IRQ_PF7,
  358. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  359. },
  360. };
  361. static struct platform_device net2272_bfin_device = {
  362. .name = "net2272",
  363. .id = -1,
  364. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  365. .resource = net2272_bfin_resources,
  366. };
  367. #endif
  368. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  369. /* all SPI peripherals info goes here */
  370. #if defined(CONFIG_MTD_M25P80) \
  371. || defined(CONFIG_MTD_M25P80_MODULE)
  372. static struct mtd_partition bfin_spi_flash_partitions[] = {
  373. {
  374. .name = "bootloader",
  375. .size = 0x00020000,
  376. .offset = 0,
  377. .mask_flags = MTD_CAP_ROM
  378. }, {
  379. .name = "kernel",
  380. .size = 0xe0000,
  381. .offset = 0x20000
  382. }, {
  383. .name = "file system",
  384. .size = 0x700000,
  385. .offset = 0x00100000,
  386. }
  387. };
  388. static struct flash_platform_data bfin_spi_flash_data = {
  389. .name = "m25p80",
  390. .parts = bfin_spi_flash_partitions,
  391. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  392. .type = "m25p64",
  393. };
  394. /* SPI flash chip (m25p64) */
  395. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  396. .enable_dma = 0, /* use dma transfer with this chip*/
  397. .bits_per_word = 8,
  398. };
  399. #endif
  400. #if defined(CONFIG_SPI_ADC_BF533) \
  401. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  402. /* SPI ADC chip */
  403. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  404. .enable_dma = 1, /* use dma transfer with this chip*/
  405. .bits_per_word = 16,
  406. };
  407. #endif
  408. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  409. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  410. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  411. .enable_dma = 0,
  412. .bits_per_word = 16,
  413. };
  414. #endif
  415. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  416. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  417. .enable_dma = 0,
  418. .bits_per_word = 16,
  419. };
  420. #endif
  421. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  422. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  423. .enable_dma = 1,
  424. .bits_per_word = 8,
  425. };
  426. #endif
  427. #if defined(CONFIG_PBX)
  428. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  429. .ctl_reg = 0x4, /* send zero */
  430. .enable_dma = 0,
  431. .bits_per_word = 8,
  432. .cs_change_per_word = 1,
  433. };
  434. #endif
  435. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  436. static struct bfin5xx_spi_chip ad5304_chip_info = {
  437. .enable_dma = 0,
  438. .bits_per_word = 16,
  439. };
  440. #endif
  441. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  442. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  443. .enable_dma = 0,
  444. .bits_per_word = 16,
  445. };
  446. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  447. .model = 7877,
  448. .vref_delay_usecs = 50, /* internal, no capacitor */
  449. .x_plate_ohms = 419,
  450. .y_plate_ohms = 486,
  451. .pressure_max = 1000,
  452. .pressure_min = 0,
  453. .stopacq_polarity = 1,
  454. .first_conversion_delay = 3,
  455. .acquisition_time = 1,
  456. .averaging = 1,
  457. .pen_down_acc_interval = 1,
  458. };
  459. #endif
  460. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  461. && defined(CONFIG_SND_SOC_WM8731_SPI)
  462. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  463. .enable_dma = 0,
  464. .bits_per_word = 16,
  465. };
  466. #endif
  467. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  468. #if defined(CONFIG_MTD_M25P80) \
  469. || defined(CONFIG_MTD_M25P80_MODULE)
  470. {
  471. /* the modalias must be the same as spi device driver name */
  472. .modalias = "m25p80", /* Name of spi_driver for this device */
  473. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  474. .bus_num = 0, /* Framework bus number */
  475. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  476. .platform_data = &bfin_spi_flash_data,
  477. .controller_data = &spi_flash_chip_info,
  478. .mode = SPI_MODE_3,
  479. },
  480. #endif
  481. #if defined(CONFIG_SPI_ADC_BF533) \
  482. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  483. {
  484. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  485. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  486. .bus_num = 0, /* Framework bus number */
  487. .chip_select = 1, /* Framework chip select. */
  488. .platform_data = NULL, /* No spi_driver specific config */
  489. .controller_data = &spi_adc_chip_info,
  490. },
  491. #endif
  492. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  493. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  494. {
  495. .modalias = "ad1836-spi",
  496. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  497. .bus_num = 0,
  498. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  499. .controller_data = &ad1836_spi_chip_info,
  500. },
  501. #endif
  502. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  503. {
  504. .modalias = "ad9960-spi",
  505. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  506. .bus_num = 0,
  507. .chip_select = 1,
  508. .controller_data = &ad9960_spi_chip_info,
  509. },
  510. #endif
  511. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  512. {
  513. .modalias = "spi_mmc_dummy",
  514. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  515. .bus_num = 0,
  516. .chip_select = 0,
  517. .platform_data = NULL,
  518. .controller_data = &spi_mmc_chip_info,
  519. .mode = SPI_MODE_3,
  520. },
  521. {
  522. .modalias = "spi_mmc",
  523. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  524. .bus_num = 0,
  525. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  526. .platform_data = NULL,
  527. .controller_data = &spi_mmc_chip_info,
  528. .mode = SPI_MODE_3,
  529. },
  530. #endif
  531. #if defined(CONFIG_PBX)
  532. {
  533. .modalias = "fxs-spi",
  534. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  535. .bus_num = 0,
  536. .chip_select = 8 - CONFIG_J11_JUMPER,
  537. .controller_data = &spi_si3xxx_chip_info,
  538. .mode = SPI_MODE_3,
  539. },
  540. {
  541. .modalias = "fxo-spi",
  542. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  543. .bus_num = 0,
  544. .chip_select = 8 - CONFIG_J19_JUMPER,
  545. .controller_data = &spi_si3xxx_chip_info,
  546. .mode = SPI_MODE_3,
  547. },
  548. #endif
  549. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  550. {
  551. .modalias = "ad5304_spi",
  552. .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
  553. .bus_num = 0,
  554. .chip_select = 2,
  555. .platform_data = NULL,
  556. .controller_data = &ad5304_chip_info,
  557. .mode = SPI_MODE_2,
  558. },
  559. #endif
  560. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  561. {
  562. .modalias = "ad7877",
  563. .platform_data = &bfin_ad7877_ts_info,
  564. .irq = IRQ_PF6,
  565. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  566. .bus_num = 0,
  567. .chip_select = 1,
  568. .controller_data = &spi_ad7877_chip_info,
  569. },
  570. #endif
  571. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  572. && defined(CONFIG_SND_SOC_WM8731_SPI)
  573. {
  574. .modalias = "wm8731",
  575. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  576. .bus_num = 0,
  577. .chip_select = 5,
  578. .controller_data = &spi_wm8731_chip_info,
  579. .mode = SPI_MODE_0,
  580. },
  581. #endif
  582. };
  583. /* SPI controller data */
  584. static struct bfin5xx_spi_master bfin_spi0_info = {
  585. .num_chipselect = 8,
  586. .enable_dma = 1, /* master has the ability to do dma transfer */
  587. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  588. };
  589. /* SPI (0) */
  590. static struct resource bfin_spi0_resource[] = {
  591. [0] = {
  592. .start = SPI0_REGBASE,
  593. .end = SPI0_REGBASE + 0xFF,
  594. .flags = IORESOURCE_MEM,
  595. },
  596. [1] = {
  597. .start = CH_SPI,
  598. .end = CH_SPI,
  599. .flags = IORESOURCE_IRQ,
  600. },
  601. };
  602. static struct platform_device bfin_spi0_device = {
  603. .name = "bfin-spi",
  604. .id = 0, /* Bus number */
  605. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  606. .resource = bfin_spi0_resource,
  607. .dev = {
  608. .platform_data = &bfin_spi0_info, /* Passed to driver */
  609. },
  610. };
  611. #endif /* spi master and devices */
  612. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  613. static struct platform_device bfin_fb_device = {
  614. .name = "bf537-lq035",
  615. };
  616. #endif
  617. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  618. static struct platform_device bfin_fb_adv7393_device = {
  619. .name = "bfin-adv7393",
  620. };
  621. #endif
  622. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  623. static struct resource bfin_uart_resources[] = {
  624. #ifdef CONFIG_SERIAL_BFIN_UART0
  625. {
  626. .start = 0xFFC00400,
  627. .end = 0xFFC004FF,
  628. .flags = IORESOURCE_MEM,
  629. },
  630. #endif
  631. #ifdef CONFIG_SERIAL_BFIN_UART1
  632. {
  633. .start = 0xFFC02000,
  634. .end = 0xFFC020FF,
  635. .flags = IORESOURCE_MEM,
  636. },
  637. #endif
  638. };
  639. static struct platform_device bfin_uart_device = {
  640. .name = "bfin-uart",
  641. .id = 1,
  642. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  643. .resource = bfin_uart_resources,
  644. };
  645. #endif
  646. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  647. static struct resource bfin_twi0_resource[] = {
  648. [0] = {
  649. .start = TWI0_REGBASE,
  650. .end = TWI0_REGBASE,
  651. .flags = IORESOURCE_MEM,
  652. },
  653. [1] = {
  654. .start = IRQ_TWI,
  655. .end = IRQ_TWI,
  656. .flags = IORESOURCE_IRQ,
  657. },
  658. };
  659. static struct platform_device i2c_bfin_twi_device = {
  660. .name = "i2c-bfin-twi",
  661. .id = 0,
  662. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  663. .resource = bfin_twi0_resource,
  664. };
  665. #endif
  666. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  667. static struct platform_device bfin_sport0_uart_device = {
  668. .name = "bfin-sport-uart",
  669. .id = 0,
  670. };
  671. static struct platform_device bfin_sport1_uart_device = {
  672. .name = "bfin-sport-uart",
  673. .id = 1,
  674. };
  675. #endif
  676. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  677. #define PATA_INT 55
  678. static struct pata_platform_info bfin_pata_platform_data = {
  679. .ioport_shift = 1,
  680. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  681. };
  682. static struct resource bfin_pata_resources[] = {
  683. {
  684. .start = 0x20314020,
  685. .end = 0x2031403F,
  686. .flags = IORESOURCE_MEM,
  687. },
  688. {
  689. .start = 0x2031401C,
  690. .end = 0x2031401F,
  691. .flags = IORESOURCE_MEM,
  692. },
  693. {
  694. .start = PATA_INT,
  695. .end = PATA_INT,
  696. .flags = IORESOURCE_IRQ,
  697. },
  698. };
  699. static struct platform_device bfin_pata_device = {
  700. .name = "pata_platform",
  701. .id = -1,
  702. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  703. .resource = bfin_pata_resources,
  704. .dev = {
  705. .platform_data = &bfin_pata_platform_data,
  706. }
  707. };
  708. #endif
  709. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  710. #include <linux/input.h>
  711. #include <linux/gpio_keys.h>
  712. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  713. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  714. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  715. };
  716. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  717. .buttons = bfin_gpio_keys_table,
  718. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  719. };
  720. static struct platform_device bfin_device_gpiokeys = {
  721. .name = "gpio-keys",
  722. .dev = {
  723. .platform_data = &bfin_gpio_keys_data,
  724. },
  725. };
  726. #endif
  727. static struct platform_device *stamp_devices[] __initdata = {
  728. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  729. &bf5xx_nand_device,
  730. #endif
  731. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  732. &bfin_pcmcia_cf_device,
  733. #endif
  734. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  735. &rtc_device,
  736. #endif
  737. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  738. &sl811_hcd_device,
  739. #endif
  740. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  741. &isp1362_hcd_device,
  742. #endif
  743. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  744. &musb_device,
  745. #endif
  746. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  747. &smc91x_device,
  748. #endif
  749. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  750. &dm9000_device,
  751. #endif
  752. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  753. &bfin_mac_device,
  754. #endif
  755. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  756. &net2272_bfin_device,
  757. #endif
  758. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  759. &bfin_spi0_device,
  760. #endif
  761. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  762. &bfin_fb_device,
  763. #endif
  764. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  765. &bf52x_t350mcqb_device,
  766. #endif
  767. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  768. &bfin_fb_adv7393_device,
  769. #endif
  770. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  771. &bfin_uart_device,
  772. #endif
  773. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  774. &i2c_bfin_twi_device,
  775. #endif
  776. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  777. &bfin_sport0_uart_device,
  778. &bfin_sport1_uart_device,
  779. #endif
  780. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  781. &bfin_pata_device,
  782. #endif
  783. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  784. &bfin_device_gpiokeys,
  785. #endif
  786. };
  787. static int __init stamp_init(void)
  788. {
  789. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  790. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  791. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  792. spi_register_board_info(bfin_spi_board_info,
  793. ARRAY_SIZE(bfin_spi_board_info));
  794. #endif
  795. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  796. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  797. #endif
  798. return 0;
  799. }
  800. arch_initcall(stamp_init);
  801. void native_machine_restart(char *cmd)
  802. {
  803. /* workaround reboot hang when booting from SPI */
  804. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  805. bfin_gpio_reset_spi0_ssel1();
  806. }
  807. /*
  808. * Currently the MAC address is saved in Flash by U-Boot
  809. */
  810. #define FLASH_MAC 0x203f0000
  811. void bfin_get_ether_addr(char *addr)
  812. {
  813. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  814. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  815. }
  816. EXPORT_SYMBOL(bfin_get_ether_addr);