setup.c 4.2 KB

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  1. /*
  2. * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
  3. *
  4. * Renesas Solutions sh7763rdp board
  5. *
  6. * Copyright (C) 2008 Renesas Solutions Corp.
  7. * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/input.h>
  17. #include <linux/mtd/physmap.h>
  18. #include <linux/io.h>
  19. #include <asm/sh7763rdp.h>
  20. #include <asm/sh_eth.h>
  21. /* NOR Flash */
  22. static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
  23. {
  24. .name = "U-Boot",
  25. .offset = 0,
  26. .size = (2 * 128 * 1024),
  27. .mask_flags = MTD_WRITEABLE, /* Read-only */
  28. }, {
  29. .name = "Linux-Kernel",
  30. .offset = MTDPART_OFS_APPEND,
  31. .size = (20 * 128 * 1024),
  32. }, {
  33. .name = "Root Filesystem",
  34. .offset = MTDPART_OFS_APPEND,
  35. .size = MTDPART_SIZ_FULL,
  36. },
  37. };
  38. static struct physmap_flash_data sh7763rdp_nor_flash_data = {
  39. .width = 2,
  40. .parts = sh7763rdp_nor_flash_partitions,
  41. .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
  42. };
  43. static struct resource sh7763rdp_nor_flash_resources[] = {
  44. [0] = {
  45. .name = "NOR Flash",
  46. .start = 0,
  47. .end = (64 * 1024 * 1024),
  48. .flags = IORESOURCE_MEM,
  49. },
  50. };
  51. static struct platform_device sh7763rdp_nor_flash_device = {
  52. .name = "physmap-flash",
  53. .resource = sh7763rdp_nor_flash_resources,
  54. .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
  55. .dev = {
  56. .platform_data = &sh7763rdp_nor_flash_data,
  57. },
  58. };
  59. /* SH-Ether */
  60. static struct resource sh_eth_resources[] = {
  61. {
  62. .start = 0xFEE00800, /* use eth1 */
  63. .end = 0xFEE00F7C - 1,
  64. .flags = IORESOURCE_MEM,
  65. }, {
  66. .start = 58, /* irq number */
  67. .end = 58,
  68. .flags = IORESOURCE_IRQ,
  69. },
  70. };
  71. static struct sh_eth_plat_data sh7763_eth_pdata = {
  72. .phy = 1,
  73. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  74. };
  75. static struct platform_device sh7763rdp_eth_device = {
  76. .name = "sh-eth",
  77. .resource = sh_eth_resources,
  78. .num_resources = ARRAY_SIZE(sh_eth_resources),
  79. .dev = {
  80. .platform_data = &sh7763_eth_pdata,
  81. },
  82. };
  83. static struct platform_device *sh7763rdp_devices[] __initdata = {
  84. &sh7763rdp_nor_flash_device,
  85. &sh7763rdp_eth_device,
  86. };
  87. static int __init sh7763rdp_devices_setup(void)
  88. {
  89. return platform_add_devices(sh7763rdp_devices,
  90. ARRAY_SIZE(sh7763rdp_devices));
  91. }
  92. device_initcall(sh7763rdp_devices_setup);
  93. static void __init sh7763rdp_setup(char **cmdline_p)
  94. {
  95. /* Board version check */
  96. if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
  97. printk(KERN_INFO "RTE Standard Configuration\n");
  98. else
  99. printk(KERN_INFO "RTA Standard Configuration\n");
  100. /* USB pin select bits (clear bit 5-2 to 0) */
  101. ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
  102. /* USBH setup port I controls to other (clear bits 4-9 to 0) */
  103. ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR);
  104. /* Select USB Host controller */
  105. ctrl_outw(0x00, USB_USBHSC);
  106. /* For LCD */
  107. /* set PTJ7-1, bits 15-2 of PJCR to 0 */
  108. ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR);
  109. /* set PTI5, bits 11-10 of PICR to 0 */
  110. ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR);
  111. ctrl_outw(0, PORT_PKCR);
  112. ctrl_outw(0, PORT_PLCR);
  113. /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
  114. ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
  115. /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
  116. ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
  117. /* For HAC */
  118. /* bit3-0 0100:HAC & SSI1 enable */
  119. ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
  120. /* bit14 1:SSI_HAC_CLK enable */
  121. ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
  122. /* SH-Ether */
  123. ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
  124. ctrl_outw(0x0, PORT_PFCR);
  125. ctrl_outw(0x0, PORT_PFCR);
  126. ctrl_outw(0x0, PORT_PFCR);
  127. /* MMC */
  128. /*selects SCIF and MMC other functions */
  129. ctrl_outw(0x0001, PORT_PSEL0);
  130. /* MMC clock operates */
  131. ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1);
  132. ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR);
  133. ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
  134. }
  135. static struct sh_machine_vector mv_sh7763rdp __initmv = {
  136. .mv_name = "sh7763drp",
  137. .mv_setup = sh7763rdp_setup,
  138. .mv_nr_irqs = 112,
  139. .mv_init_irq = init_sh7763rdp_IRQ,
  140. };