bnx2x_sp.h 34 KB

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  1. /* bnx2x_sp.h: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2011-2012 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Vladislav Zolotarov
  17. *
  18. */
  19. #ifndef BNX2X_SP_VERBS
  20. #define BNX2X_SP_VERBS
  21. struct bnx2x;
  22. struct eth_context;
  23. /* Bits representing general command's configuration */
  24. enum {
  25. RAMROD_TX,
  26. RAMROD_RX,
  27. /* Wait until all pending commands complete */
  28. RAMROD_COMP_WAIT,
  29. /* Don't send a ramrod, only update a registry */
  30. RAMROD_DRV_CLR_ONLY,
  31. /* Configure HW according to the current object state */
  32. RAMROD_RESTORE,
  33. /* Execute the next command now */
  34. RAMROD_EXEC,
  35. /*
  36. * Don't add a new command and continue execution of posponed
  37. * commands. If not set a new command will be added to the
  38. * pending commands list.
  39. */
  40. RAMROD_CONT,
  41. };
  42. typedef enum {
  43. BNX2X_OBJ_TYPE_RX,
  44. BNX2X_OBJ_TYPE_TX,
  45. BNX2X_OBJ_TYPE_RX_TX,
  46. } bnx2x_obj_type;
  47. /* Filtering states */
  48. enum {
  49. BNX2X_FILTER_MAC_PENDING,
  50. BNX2X_FILTER_VLAN_PENDING,
  51. BNX2X_FILTER_VLAN_MAC_PENDING,
  52. BNX2X_FILTER_RX_MODE_PENDING,
  53. BNX2X_FILTER_RX_MODE_SCHED,
  54. BNX2X_FILTER_ISCSI_ETH_START_SCHED,
  55. BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
  56. BNX2X_FILTER_FCOE_ETH_START_SCHED,
  57. BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
  58. BNX2X_FILTER_MCAST_PENDING,
  59. BNX2X_FILTER_MCAST_SCHED,
  60. BNX2X_FILTER_RSS_CONF_PENDING,
  61. };
  62. struct bnx2x_raw_obj {
  63. u8 func_id;
  64. /* Queue params */
  65. u8 cl_id;
  66. u32 cid;
  67. /* Ramrod data buffer params */
  68. void *rdata;
  69. dma_addr_t rdata_mapping;
  70. /* Ramrod state params */
  71. int state; /* "ramrod is pending" state bit */
  72. unsigned long *pstate; /* pointer to state buffer */
  73. bnx2x_obj_type obj_type;
  74. int (*wait_comp)(struct bnx2x *bp,
  75. struct bnx2x_raw_obj *o);
  76. bool (*check_pending)(struct bnx2x_raw_obj *o);
  77. void (*clear_pending)(struct bnx2x_raw_obj *o);
  78. void (*set_pending)(struct bnx2x_raw_obj *o);
  79. };
  80. /************************* VLAN-MAC commands related parameters ***************/
  81. struct bnx2x_mac_ramrod_data {
  82. u8 mac[ETH_ALEN];
  83. };
  84. struct bnx2x_vlan_ramrod_data {
  85. u16 vlan;
  86. };
  87. struct bnx2x_vlan_mac_ramrod_data {
  88. u8 mac[ETH_ALEN];
  89. u16 vlan;
  90. };
  91. union bnx2x_classification_ramrod_data {
  92. struct bnx2x_mac_ramrod_data mac;
  93. struct bnx2x_vlan_ramrod_data vlan;
  94. struct bnx2x_vlan_mac_ramrod_data vlan_mac;
  95. };
  96. /* VLAN_MAC commands */
  97. enum bnx2x_vlan_mac_cmd {
  98. BNX2X_VLAN_MAC_ADD,
  99. BNX2X_VLAN_MAC_DEL,
  100. BNX2X_VLAN_MAC_MOVE,
  101. };
  102. struct bnx2x_vlan_mac_data {
  103. /* Requested command: BNX2X_VLAN_MAC_XX */
  104. enum bnx2x_vlan_mac_cmd cmd;
  105. /*
  106. * used to contain the data related vlan_mac_flags bits from
  107. * ramrod parameters.
  108. */
  109. unsigned long vlan_mac_flags;
  110. /* Needed for MOVE command */
  111. struct bnx2x_vlan_mac_obj *target_obj;
  112. union bnx2x_classification_ramrod_data u;
  113. };
  114. /*************************** Exe Queue obj ************************************/
  115. union bnx2x_exe_queue_cmd_data {
  116. struct bnx2x_vlan_mac_data vlan_mac;
  117. struct {
  118. /* TODO */
  119. } mcast;
  120. };
  121. struct bnx2x_exeq_elem {
  122. struct list_head link;
  123. /* Length of this element in the exe_chunk. */
  124. int cmd_len;
  125. union bnx2x_exe_queue_cmd_data cmd_data;
  126. };
  127. union bnx2x_qable_obj;
  128. union bnx2x_exeq_comp_elem {
  129. union event_ring_elem *elem;
  130. };
  131. struct bnx2x_exe_queue_obj;
  132. typedef int (*exe_q_validate)(struct bnx2x *bp,
  133. union bnx2x_qable_obj *o,
  134. struct bnx2x_exeq_elem *elem);
  135. typedef int (*exe_q_remove)(struct bnx2x *bp,
  136. union bnx2x_qable_obj *o,
  137. struct bnx2x_exeq_elem *elem);
  138. /**
  139. * @return positive is entry was optimized, 0 - if not, negative
  140. * in case of an error.
  141. */
  142. typedef int (*exe_q_optimize)(struct bnx2x *bp,
  143. union bnx2x_qable_obj *o,
  144. struct bnx2x_exeq_elem *elem);
  145. typedef int (*exe_q_execute)(struct bnx2x *bp,
  146. union bnx2x_qable_obj *o,
  147. struct list_head *exe_chunk,
  148. unsigned long *ramrod_flags);
  149. typedef struct bnx2x_exeq_elem *
  150. (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
  151. struct bnx2x_exeq_elem *elem);
  152. struct bnx2x_exe_queue_obj {
  153. /*
  154. * Commands pending for an execution.
  155. */
  156. struct list_head exe_queue;
  157. /*
  158. * Commands pending for an completion.
  159. */
  160. struct list_head pending_comp;
  161. spinlock_t lock;
  162. /* Maximum length of commands' list for one execution */
  163. int exe_chunk_len;
  164. union bnx2x_qable_obj *owner;
  165. /****** Virtual functions ******/
  166. /**
  167. * Called before commands execution for commands that are really
  168. * going to be executed (after 'optimize').
  169. *
  170. * Must run under exe_queue->lock
  171. */
  172. exe_q_validate validate;
  173. /**
  174. * Called before removing pending commands, cleaning allocated
  175. * resources (e.g., credits from validate)
  176. */
  177. exe_q_remove remove;
  178. /**
  179. * This will try to cancel the current pending commands list
  180. * considering the new command.
  181. *
  182. * Returns the number of optimized commands or a negative error code
  183. *
  184. * Must run under exe_queue->lock
  185. */
  186. exe_q_optimize optimize;
  187. /**
  188. * Run the next commands chunk (owner specific).
  189. */
  190. exe_q_execute execute;
  191. /**
  192. * Return the exe_queue element containing the specific command
  193. * if any. Otherwise return NULL.
  194. */
  195. exe_q_get get;
  196. };
  197. /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
  198. /*
  199. * Element in the VLAN_MAC registry list having all currenty configured
  200. * rules.
  201. */
  202. struct bnx2x_vlan_mac_registry_elem {
  203. struct list_head link;
  204. /*
  205. * Used to store the cam offset used for the mac/vlan/vlan-mac.
  206. * Relevant for 57710 and 57711 only. VLANs and MACs share the
  207. * same CAM for these chips.
  208. */
  209. int cam_offset;
  210. /* Needed for DEL and RESTORE flows */
  211. unsigned long vlan_mac_flags;
  212. union bnx2x_classification_ramrod_data u;
  213. };
  214. /* Bits representing VLAN_MAC commands specific flags */
  215. enum {
  216. BNX2X_UC_LIST_MAC,
  217. BNX2X_ETH_MAC,
  218. BNX2X_ISCSI_ETH_MAC,
  219. BNX2X_NETQ_ETH_MAC,
  220. BNX2X_DONT_CONSUME_CAM_CREDIT,
  221. BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
  222. };
  223. struct bnx2x_vlan_mac_ramrod_params {
  224. /* Object to run the command from */
  225. struct bnx2x_vlan_mac_obj *vlan_mac_obj;
  226. /* General command flags: COMP_WAIT, etc. */
  227. unsigned long ramrod_flags;
  228. /* Command specific configuration request */
  229. struct bnx2x_vlan_mac_data user_req;
  230. };
  231. struct bnx2x_vlan_mac_obj {
  232. struct bnx2x_raw_obj raw;
  233. /* Bookkeeping list: will prevent the addition of already existing
  234. * entries.
  235. */
  236. struct list_head head;
  237. /* TODO: Add it's initialization in the init functions */
  238. struct bnx2x_exe_queue_obj exe_queue;
  239. /* MACs credit pool */
  240. struct bnx2x_credit_pool_obj *macs_pool;
  241. /* VLANs credit pool */
  242. struct bnx2x_credit_pool_obj *vlans_pool;
  243. /* RAMROD command to be used */
  244. int ramrod_cmd;
  245. /* copy first n elements onto preallocated buffer
  246. *
  247. * @param n number of elements to get
  248. * @param buf buffer preallocated by caller into which elements
  249. * will be copied. Note elements are 4-byte aligned
  250. * so buffer size must be able to accomodate the
  251. * aligned elements.
  252. *
  253. * @return number of copied bytes
  254. */
  255. int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
  256. int n, u8 *buf);
  257. /**
  258. * Checks if ADD-ramrod with the given params may be performed.
  259. *
  260. * @return zero if the element may be added
  261. */
  262. int (*check_add)(struct bnx2x_vlan_mac_obj *o,
  263. union bnx2x_classification_ramrod_data *data);
  264. /**
  265. * Checks if DEL-ramrod with the given params may be performed.
  266. *
  267. * @return true if the element may be deleted
  268. */
  269. struct bnx2x_vlan_mac_registry_elem *
  270. (*check_del)(struct bnx2x_vlan_mac_obj *o,
  271. union bnx2x_classification_ramrod_data *data);
  272. /**
  273. * Checks if DEL-ramrod with the given params may be performed.
  274. *
  275. * @return true if the element may be deleted
  276. */
  277. bool (*check_move)(struct bnx2x_vlan_mac_obj *src_o,
  278. struct bnx2x_vlan_mac_obj *dst_o,
  279. union bnx2x_classification_ramrod_data *data);
  280. /**
  281. * Update the relevant credit object(s) (consume/return
  282. * correspondingly).
  283. */
  284. bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
  285. bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
  286. bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
  287. bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
  288. /**
  289. * Configures one rule in the ramrod data buffer.
  290. */
  291. void (*set_one_rule)(struct bnx2x *bp,
  292. struct bnx2x_vlan_mac_obj *o,
  293. struct bnx2x_exeq_elem *elem, int rule_idx,
  294. int cam_offset);
  295. /**
  296. * Delete all configured elements having the given
  297. * vlan_mac_flags specification. Assumes no pending for
  298. * execution commands. Will schedule all all currently
  299. * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
  300. * specification for deletion and will use the given
  301. * ramrod_flags for the last DEL operation.
  302. *
  303. * @param bp
  304. * @param o
  305. * @param ramrod_flags RAMROD_XX flags
  306. *
  307. * @return 0 if the last operation has completed successfully
  308. * and there are no more elements left, positive value
  309. * if there are pending for completion commands,
  310. * negative value in case of failure.
  311. */
  312. int (*delete_all)(struct bnx2x *bp,
  313. struct bnx2x_vlan_mac_obj *o,
  314. unsigned long *vlan_mac_flags,
  315. unsigned long *ramrod_flags);
  316. /**
  317. * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
  318. * configured elements list.
  319. *
  320. * @param bp
  321. * @param p Command parameters (RAMROD_COMP_WAIT bit in
  322. * ramrod_flags is only taken into an account)
  323. * @param ppos a pointer to the cooky that should be given back in the
  324. * next call to make function handle the next element. If
  325. * *ppos is set to NULL it will restart the iterator.
  326. * If returned *ppos == NULL this means that the last
  327. * element has been handled.
  328. *
  329. * @return int
  330. */
  331. int (*restore)(struct bnx2x *bp,
  332. struct bnx2x_vlan_mac_ramrod_params *p,
  333. struct bnx2x_vlan_mac_registry_elem **ppos);
  334. /**
  335. * Should be called on a completion arival.
  336. *
  337. * @param bp
  338. * @param o
  339. * @param cqe Completion element we are handling
  340. * @param ramrod_flags if RAMROD_CONT is set the next bulk of
  341. * pending commands will be executed.
  342. * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
  343. * may also be set if needed.
  344. *
  345. * @return 0 if there are neither pending nor waiting for
  346. * completion commands. Positive value if there are
  347. * pending for execution or for completion commands.
  348. * Negative value in case of an error (including an
  349. * error in the cqe).
  350. */
  351. int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
  352. union event_ring_elem *cqe,
  353. unsigned long *ramrod_flags);
  354. /**
  355. * Wait for completion of all commands. Don't schedule new ones,
  356. * just wait. It assumes that the completion code will schedule
  357. * for new commands.
  358. */
  359. int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
  360. };
  361. enum {
  362. BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
  363. BNX2X_LLH_CAM_ETH_LINE,
  364. BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
  365. };
  366. /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
  367. /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
  368. * a bnx2x_rx_mode_ramrod_params.
  369. */
  370. enum {
  371. BNX2X_RX_MODE_FCOE_ETH,
  372. BNX2X_RX_MODE_ISCSI_ETH,
  373. };
  374. enum {
  375. BNX2X_ACCEPT_UNICAST,
  376. BNX2X_ACCEPT_MULTICAST,
  377. BNX2X_ACCEPT_ALL_UNICAST,
  378. BNX2X_ACCEPT_ALL_MULTICAST,
  379. BNX2X_ACCEPT_BROADCAST,
  380. BNX2X_ACCEPT_UNMATCHED,
  381. BNX2X_ACCEPT_ANY_VLAN
  382. };
  383. struct bnx2x_rx_mode_ramrod_params {
  384. struct bnx2x_rx_mode_obj *rx_mode_obj;
  385. unsigned long *pstate;
  386. int state;
  387. u8 cl_id;
  388. u32 cid;
  389. u8 func_id;
  390. unsigned long ramrod_flags;
  391. unsigned long rx_mode_flags;
  392. /*
  393. * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
  394. * a tstorm_eth_mac_filter_config (e1x).
  395. */
  396. void *rdata;
  397. dma_addr_t rdata_mapping;
  398. /* Rx mode settings */
  399. unsigned long rx_accept_flags;
  400. /* internal switching settings */
  401. unsigned long tx_accept_flags;
  402. };
  403. struct bnx2x_rx_mode_obj {
  404. int (*config_rx_mode)(struct bnx2x *bp,
  405. struct bnx2x_rx_mode_ramrod_params *p);
  406. int (*wait_comp)(struct bnx2x *bp,
  407. struct bnx2x_rx_mode_ramrod_params *p);
  408. };
  409. /********************** Set multicast group ***********************************/
  410. struct bnx2x_mcast_list_elem {
  411. struct list_head link;
  412. u8 *mac;
  413. };
  414. union bnx2x_mcast_config_data {
  415. u8 *mac;
  416. u8 bin; /* used in a RESTORE flow */
  417. };
  418. struct bnx2x_mcast_ramrod_params {
  419. struct bnx2x_mcast_obj *mcast_obj;
  420. /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
  421. unsigned long ramrod_flags;
  422. struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
  423. /** TODO:
  424. * - rename it to macs_num.
  425. * - Add a new command type for handling pending commands
  426. * (remove "zero semantics").
  427. *
  428. * Length of mcast_list. If zero and ADD_CONT command - post
  429. * pending commands.
  430. */
  431. int mcast_list_len;
  432. };
  433. enum {
  434. BNX2X_MCAST_CMD_ADD,
  435. BNX2X_MCAST_CMD_CONT,
  436. BNX2X_MCAST_CMD_DEL,
  437. BNX2X_MCAST_CMD_RESTORE,
  438. };
  439. struct bnx2x_mcast_obj {
  440. struct bnx2x_raw_obj raw;
  441. union {
  442. struct {
  443. #define BNX2X_MCAST_BINS_NUM 256
  444. #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
  445. u64 vec[BNX2X_MCAST_VEC_SZ];
  446. /** Number of BINs to clear. Should be updated
  447. * immediately when a command arrives in order to
  448. * properly create DEL commands.
  449. */
  450. int num_bins_set;
  451. } aprox_match;
  452. struct {
  453. struct list_head macs;
  454. int num_macs_set;
  455. } exact_match;
  456. } registry;
  457. /* Pending commands */
  458. struct list_head pending_cmds_head;
  459. /* A state that is set in raw.pstate, when there are pending commands */
  460. int sched_state;
  461. /* Maximal number of mcast MACs configured in one command */
  462. int max_cmd_len;
  463. /* Total number of currently pending MACs to configure: both
  464. * in the pending commands list and in the current command.
  465. */
  466. int total_pending_num;
  467. u8 engine_id;
  468. /**
  469. * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
  470. */
  471. int (*config_mcast)(struct bnx2x *bp,
  472. struct bnx2x_mcast_ramrod_params *p, int cmd);
  473. /**
  474. * Fills the ramrod data during the RESTORE flow.
  475. *
  476. * @param bp
  477. * @param o
  478. * @param start_idx Registry index to start from
  479. * @param rdata_idx Index in the ramrod data to start from
  480. *
  481. * @return -1 if we handled the whole registry or index of the last
  482. * handled registry element.
  483. */
  484. int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
  485. int start_bin, int *rdata_idx);
  486. int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
  487. struct bnx2x_mcast_ramrod_params *p, int cmd);
  488. void (*set_one_rule)(struct bnx2x *bp,
  489. struct bnx2x_mcast_obj *o, int idx,
  490. union bnx2x_mcast_config_data *cfg_data, int cmd);
  491. /** Checks if there are more mcast MACs to be set or a previous
  492. * command is still pending.
  493. */
  494. bool (*check_pending)(struct bnx2x_mcast_obj *o);
  495. /**
  496. * Set/Clear/Check SCHEDULED state of the object
  497. */
  498. void (*set_sched)(struct bnx2x_mcast_obj *o);
  499. void (*clear_sched)(struct bnx2x_mcast_obj *o);
  500. bool (*check_sched)(struct bnx2x_mcast_obj *o);
  501. /* Wait until all pending commands complete */
  502. int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
  503. /**
  504. * Handle the internal object counters needed for proper
  505. * commands handling. Checks that the provided parameters are
  506. * feasible.
  507. */
  508. int (*validate)(struct bnx2x *bp,
  509. struct bnx2x_mcast_ramrod_params *p, int cmd);
  510. /**
  511. * Restore the values of internal counters in case of a failure.
  512. */
  513. void (*revert)(struct bnx2x *bp,
  514. struct bnx2x_mcast_ramrod_params *p,
  515. int old_num_bins);
  516. int (*get_registry_size)(struct bnx2x_mcast_obj *o);
  517. void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
  518. };
  519. /*************************** Credit handling **********************************/
  520. struct bnx2x_credit_pool_obj {
  521. /* Current amount of credit in the pool */
  522. atomic_t credit;
  523. /* Maximum allowed credit. put() will check against it. */
  524. int pool_sz;
  525. /*
  526. * Allocate a pool table statically.
  527. *
  528. * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
  529. *
  530. * The set bit in the table will mean that the entry is available.
  531. */
  532. #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
  533. u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
  534. /* Base pool offset (initialized differently */
  535. int base_pool_offset;
  536. /**
  537. * Get the next free pool entry.
  538. *
  539. * @return true if there was a free entry in the pool
  540. */
  541. bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
  542. /**
  543. * Return the entry back to the pool.
  544. *
  545. * @return true if entry is legal and has been successfully
  546. * returned to the pool.
  547. */
  548. bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
  549. /**
  550. * Get the requested amount of credit from the pool.
  551. *
  552. * @param cnt Amount of requested credit
  553. * @return true if the operation is successful
  554. */
  555. bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
  556. /**
  557. * Returns the credit to the pool.
  558. *
  559. * @param cnt Amount of credit to return
  560. * @return true if the operation is successful
  561. */
  562. bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
  563. /**
  564. * Reads the current amount of credit.
  565. */
  566. int (*check)(struct bnx2x_credit_pool_obj *o);
  567. };
  568. /*************************** RSS configuration ********************************/
  569. enum {
  570. /* RSS_MODE bits are mutually exclusive */
  571. BNX2X_RSS_MODE_DISABLED,
  572. BNX2X_RSS_MODE_REGULAR,
  573. BNX2X_RSS_MODE_VLAN_PRI,
  574. BNX2X_RSS_MODE_E1HOV_PRI,
  575. BNX2X_RSS_MODE_IP_DSCP,
  576. BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
  577. BNX2X_RSS_IPV4,
  578. BNX2X_RSS_IPV4_TCP,
  579. BNX2X_RSS_IPV6,
  580. BNX2X_RSS_IPV6_TCP,
  581. };
  582. struct bnx2x_config_rss_params {
  583. struct bnx2x_rss_config_obj *rss_obj;
  584. /* may have RAMROD_COMP_WAIT set only */
  585. unsigned long ramrod_flags;
  586. /* BNX2X_RSS_X bits */
  587. unsigned long rss_flags;
  588. /* Number hash bits to take into an account */
  589. u8 rss_result_mask;
  590. /* Indirection table */
  591. u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
  592. /* RSS hash values */
  593. u32 rss_key[10];
  594. /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
  595. u16 toe_rss_bitmap;
  596. };
  597. struct bnx2x_rss_config_obj {
  598. struct bnx2x_raw_obj raw;
  599. /* RSS engine to use */
  600. u8 engine_id;
  601. /* Last configured indirection table */
  602. u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
  603. int (*config_rss)(struct bnx2x *bp,
  604. struct bnx2x_config_rss_params *p);
  605. };
  606. /*********************** Queue state update ***********************************/
  607. /* UPDATE command options */
  608. enum {
  609. BNX2X_Q_UPDATE_IN_VLAN_REM,
  610. BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
  611. BNX2X_Q_UPDATE_OUT_VLAN_REM,
  612. BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
  613. BNX2X_Q_UPDATE_ANTI_SPOOF,
  614. BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
  615. BNX2X_Q_UPDATE_ACTIVATE,
  616. BNX2X_Q_UPDATE_ACTIVATE_CHNG,
  617. BNX2X_Q_UPDATE_DEF_VLAN_EN,
  618. BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
  619. BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
  620. BNX2X_Q_UPDATE_SILENT_VLAN_REM
  621. };
  622. /* Allowed Queue states */
  623. enum bnx2x_q_state {
  624. BNX2X_Q_STATE_RESET,
  625. BNX2X_Q_STATE_INITIALIZED,
  626. BNX2X_Q_STATE_ACTIVE,
  627. BNX2X_Q_STATE_MULTI_COS,
  628. BNX2X_Q_STATE_MCOS_TERMINATED,
  629. BNX2X_Q_STATE_INACTIVE,
  630. BNX2X_Q_STATE_STOPPED,
  631. BNX2X_Q_STATE_TERMINATED,
  632. BNX2X_Q_STATE_FLRED,
  633. BNX2X_Q_STATE_MAX,
  634. };
  635. /* Allowed commands */
  636. enum bnx2x_queue_cmd {
  637. BNX2X_Q_CMD_INIT,
  638. BNX2X_Q_CMD_SETUP,
  639. BNX2X_Q_CMD_SETUP_TX_ONLY,
  640. BNX2X_Q_CMD_DEACTIVATE,
  641. BNX2X_Q_CMD_ACTIVATE,
  642. BNX2X_Q_CMD_UPDATE,
  643. BNX2X_Q_CMD_UPDATE_TPA,
  644. BNX2X_Q_CMD_HALT,
  645. BNX2X_Q_CMD_CFC_DEL,
  646. BNX2X_Q_CMD_TERMINATE,
  647. BNX2X_Q_CMD_EMPTY,
  648. BNX2X_Q_CMD_MAX,
  649. };
  650. /* queue SETUP + INIT flags */
  651. enum {
  652. BNX2X_Q_FLG_TPA,
  653. BNX2X_Q_FLG_TPA_IPV6,
  654. BNX2X_Q_FLG_TPA_GRO,
  655. BNX2X_Q_FLG_STATS,
  656. BNX2X_Q_FLG_ZERO_STATS,
  657. BNX2X_Q_FLG_ACTIVE,
  658. BNX2X_Q_FLG_OV,
  659. BNX2X_Q_FLG_VLAN,
  660. BNX2X_Q_FLG_COS,
  661. BNX2X_Q_FLG_HC,
  662. BNX2X_Q_FLG_HC_EN,
  663. BNX2X_Q_FLG_DHC,
  664. BNX2X_Q_FLG_FCOE,
  665. BNX2X_Q_FLG_LEADING_RSS,
  666. BNX2X_Q_FLG_MCAST,
  667. BNX2X_Q_FLG_DEF_VLAN,
  668. BNX2X_Q_FLG_TX_SWITCH,
  669. BNX2X_Q_FLG_TX_SEC,
  670. BNX2X_Q_FLG_ANTI_SPOOF,
  671. BNX2X_Q_FLG_SILENT_VLAN_REM
  672. };
  673. /* Queue type options: queue type may be a compination of below. */
  674. enum bnx2x_q_type {
  675. /** TODO: Consider moving both these flags into the init()
  676. * ramrod params.
  677. */
  678. BNX2X_Q_TYPE_HAS_RX,
  679. BNX2X_Q_TYPE_HAS_TX,
  680. };
  681. #define BNX2X_PRIMARY_CID_INDEX 0
  682. #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
  683. #define BNX2X_MULTI_TX_COS_E2_E3A0 2
  684. #define BNX2X_MULTI_TX_COS_E3B0 3
  685. #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
  686. struct bnx2x_queue_init_params {
  687. struct {
  688. unsigned long flags;
  689. u16 hc_rate;
  690. u8 fw_sb_id;
  691. u8 sb_cq_index;
  692. } tx;
  693. struct {
  694. unsigned long flags;
  695. u16 hc_rate;
  696. u8 fw_sb_id;
  697. u8 sb_cq_index;
  698. } rx;
  699. /* CID context in the host memory */
  700. struct eth_context *cxts[BNX2X_MULTI_TX_COS];
  701. /* maximum number of cos supported by hardware */
  702. u8 max_cos;
  703. };
  704. struct bnx2x_queue_terminate_params {
  705. /* index within the tx_only cids of this queue object */
  706. u8 cid_index;
  707. };
  708. struct bnx2x_queue_cfc_del_params {
  709. /* index within the tx_only cids of this queue object */
  710. u8 cid_index;
  711. };
  712. struct bnx2x_queue_update_params {
  713. unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
  714. u16 def_vlan;
  715. u16 silent_removal_value;
  716. u16 silent_removal_mask;
  717. /* index within the tx_only cids of this queue object */
  718. u8 cid_index;
  719. };
  720. struct rxq_pause_params {
  721. u16 bd_th_lo;
  722. u16 bd_th_hi;
  723. u16 rcq_th_lo;
  724. u16 rcq_th_hi;
  725. u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
  726. u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
  727. u16 pri_map;
  728. };
  729. /* general */
  730. struct bnx2x_general_setup_params {
  731. /* valid iff BNX2X_Q_FLG_STATS */
  732. u8 stat_id;
  733. u8 spcl_id;
  734. u16 mtu;
  735. u8 cos;
  736. };
  737. struct bnx2x_rxq_setup_params {
  738. /* dma */
  739. dma_addr_t dscr_map;
  740. dma_addr_t sge_map;
  741. dma_addr_t rcq_map;
  742. dma_addr_t rcq_np_map;
  743. u16 drop_flags;
  744. u16 buf_sz;
  745. u8 fw_sb_id;
  746. u8 cl_qzone_id;
  747. /* valid iff BNX2X_Q_FLG_TPA */
  748. u16 tpa_agg_sz;
  749. u16 sge_buf_sz;
  750. u8 max_sges_pkt;
  751. u8 max_tpa_queues;
  752. u8 rss_engine_id;
  753. u8 cache_line_log;
  754. u8 sb_cq_index;
  755. /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
  756. u16 silent_removal_value;
  757. u16 silent_removal_mask;
  758. };
  759. struct bnx2x_txq_setup_params {
  760. /* dma */
  761. dma_addr_t dscr_map;
  762. u8 fw_sb_id;
  763. u8 sb_cq_index;
  764. u8 cos; /* valid iff BNX2X_Q_FLG_COS */
  765. u16 traffic_type;
  766. /* equals to the leading rss client id, used for TX classification*/
  767. u8 tss_leading_cl_id;
  768. /* valid iff BNX2X_Q_FLG_DEF_VLAN */
  769. u16 default_vlan;
  770. };
  771. struct bnx2x_queue_setup_params {
  772. struct bnx2x_general_setup_params gen_params;
  773. struct bnx2x_txq_setup_params txq_params;
  774. struct bnx2x_rxq_setup_params rxq_params;
  775. struct rxq_pause_params pause_params;
  776. unsigned long flags;
  777. };
  778. struct bnx2x_queue_setup_tx_only_params {
  779. struct bnx2x_general_setup_params gen_params;
  780. struct bnx2x_txq_setup_params txq_params;
  781. unsigned long flags;
  782. /* index within the tx_only cids of this queue object */
  783. u8 cid_index;
  784. };
  785. struct bnx2x_queue_state_params {
  786. struct bnx2x_queue_sp_obj *q_obj;
  787. /* Current command */
  788. enum bnx2x_queue_cmd cmd;
  789. /* may have RAMROD_COMP_WAIT set only */
  790. unsigned long ramrod_flags;
  791. /* Params according to the current command */
  792. union {
  793. struct bnx2x_queue_update_params update;
  794. struct bnx2x_queue_setup_params setup;
  795. struct bnx2x_queue_init_params init;
  796. struct bnx2x_queue_setup_tx_only_params tx_only;
  797. struct bnx2x_queue_terminate_params terminate;
  798. struct bnx2x_queue_cfc_del_params cfc_del;
  799. } params;
  800. };
  801. struct bnx2x_queue_sp_obj {
  802. u32 cids[BNX2X_MULTI_TX_COS];
  803. u8 cl_id;
  804. u8 func_id;
  805. /*
  806. * number of traffic classes supported by queue.
  807. * The primary connection of the queue suppotrs the first traffic
  808. * class. Any further traffic class is suppoted by a tx-only
  809. * connection.
  810. *
  811. * Therefore max_cos is also a number of valid entries in the cids
  812. * array.
  813. */
  814. u8 max_cos;
  815. u8 num_tx_only, next_tx_only;
  816. enum bnx2x_q_state state, next_state;
  817. /* bits from enum bnx2x_q_type */
  818. unsigned long type;
  819. /* BNX2X_Q_CMD_XX bits. This object implements "one
  820. * pending" paradigm but for debug and tracing purposes it's
  821. * more convinient to have different bits for different
  822. * commands.
  823. */
  824. unsigned long pending;
  825. /* Buffer to use as a ramrod data and its mapping */
  826. void *rdata;
  827. dma_addr_t rdata_mapping;
  828. /**
  829. * Performs one state change according to the given parameters.
  830. *
  831. * @return 0 in case of success and negative value otherwise.
  832. */
  833. int (*send_cmd)(struct bnx2x *bp,
  834. struct bnx2x_queue_state_params *params);
  835. /**
  836. * Sets the pending bit according to the requested transition.
  837. */
  838. int (*set_pending)(struct bnx2x_queue_sp_obj *o,
  839. struct bnx2x_queue_state_params *params);
  840. /**
  841. * Checks that the requested state transition is legal.
  842. */
  843. int (*check_transition)(struct bnx2x *bp,
  844. struct bnx2x_queue_sp_obj *o,
  845. struct bnx2x_queue_state_params *params);
  846. /**
  847. * Completes the pending command.
  848. */
  849. int (*complete_cmd)(struct bnx2x *bp,
  850. struct bnx2x_queue_sp_obj *o,
  851. enum bnx2x_queue_cmd);
  852. int (*wait_comp)(struct bnx2x *bp,
  853. struct bnx2x_queue_sp_obj *o,
  854. enum bnx2x_queue_cmd cmd);
  855. };
  856. /********************** Function state update *********************************/
  857. /* Allowed Function states */
  858. enum bnx2x_func_state {
  859. BNX2X_F_STATE_RESET,
  860. BNX2X_F_STATE_INITIALIZED,
  861. BNX2X_F_STATE_STARTED,
  862. BNX2X_F_STATE_TX_STOPPED,
  863. BNX2X_F_STATE_MAX,
  864. };
  865. /* Allowed Function commands */
  866. enum bnx2x_func_cmd {
  867. BNX2X_F_CMD_HW_INIT,
  868. BNX2X_F_CMD_START,
  869. BNX2X_F_CMD_STOP,
  870. BNX2X_F_CMD_HW_RESET,
  871. BNX2X_F_CMD_TX_STOP,
  872. BNX2X_F_CMD_TX_START,
  873. BNX2X_F_CMD_MAX,
  874. };
  875. struct bnx2x_func_hw_init_params {
  876. /* A load phase returned by MCP.
  877. *
  878. * May be:
  879. * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
  880. * FW_MSG_CODE_DRV_LOAD_COMMON
  881. * FW_MSG_CODE_DRV_LOAD_PORT
  882. * FW_MSG_CODE_DRV_LOAD_FUNCTION
  883. */
  884. u32 load_phase;
  885. };
  886. struct bnx2x_func_hw_reset_params {
  887. /* A load phase returned by MCP.
  888. *
  889. * May be:
  890. * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
  891. * FW_MSG_CODE_DRV_LOAD_COMMON
  892. * FW_MSG_CODE_DRV_LOAD_PORT
  893. * FW_MSG_CODE_DRV_LOAD_FUNCTION
  894. */
  895. u32 reset_phase;
  896. };
  897. struct bnx2x_func_start_params {
  898. /* Multi Function mode:
  899. * - Single Function
  900. * - Switch Dependent
  901. * - Switch Independent
  902. */
  903. u16 mf_mode;
  904. /* Switch Dependent mode outer VLAN tag */
  905. u16 sd_vlan_tag;
  906. /* Function cos mode */
  907. u8 network_cos_mode;
  908. };
  909. struct bnx2x_func_tx_start_params {
  910. struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
  911. u8 dcb_enabled;
  912. u8 dcb_version;
  913. u8 dont_add_pri_0_en;
  914. };
  915. struct bnx2x_func_state_params {
  916. struct bnx2x_func_sp_obj *f_obj;
  917. /* Current command */
  918. enum bnx2x_func_cmd cmd;
  919. /* may have RAMROD_COMP_WAIT set only */
  920. unsigned long ramrod_flags;
  921. /* Params according to the current command */
  922. union {
  923. struct bnx2x_func_hw_init_params hw_init;
  924. struct bnx2x_func_hw_reset_params hw_reset;
  925. struct bnx2x_func_start_params start;
  926. struct bnx2x_func_tx_start_params tx_start;
  927. } params;
  928. };
  929. struct bnx2x_func_sp_drv_ops {
  930. /* Init tool + runtime initialization:
  931. * - Common Chip
  932. * - Common (per Path)
  933. * - Port
  934. * - Function phases
  935. */
  936. int (*init_hw_cmn_chip)(struct bnx2x *bp);
  937. int (*init_hw_cmn)(struct bnx2x *bp);
  938. int (*init_hw_port)(struct bnx2x *bp);
  939. int (*init_hw_func)(struct bnx2x *bp);
  940. /* Reset Function HW: Common, Port, Function phases. */
  941. void (*reset_hw_cmn)(struct bnx2x *bp);
  942. void (*reset_hw_port)(struct bnx2x *bp);
  943. void (*reset_hw_func)(struct bnx2x *bp);
  944. /* Init/Free GUNZIP resources */
  945. int (*gunzip_init)(struct bnx2x *bp);
  946. void (*gunzip_end)(struct bnx2x *bp);
  947. /* Prepare/Release FW resources */
  948. int (*init_fw)(struct bnx2x *bp);
  949. void (*release_fw)(struct bnx2x *bp);
  950. };
  951. struct bnx2x_func_sp_obj {
  952. enum bnx2x_func_state state, next_state;
  953. /* BNX2X_FUNC_CMD_XX bits. This object implements "one
  954. * pending" paradigm but for debug and tracing purposes it's
  955. * more convinient to have different bits for different
  956. * commands.
  957. */
  958. unsigned long pending;
  959. /* Buffer to use as a ramrod data and its mapping */
  960. void *rdata;
  961. dma_addr_t rdata_mapping;
  962. /* this mutex validates that when pending flag is taken, the next
  963. * ramrod to be sent will be the one set the pending bit
  964. */
  965. struct mutex one_pending_mutex;
  966. /* Driver interface */
  967. struct bnx2x_func_sp_drv_ops *drv;
  968. /**
  969. * Performs one state change according to the given parameters.
  970. *
  971. * @return 0 in case of success and negative value otherwise.
  972. */
  973. int (*send_cmd)(struct bnx2x *bp,
  974. struct bnx2x_func_state_params *params);
  975. /**
  976. * Checks that the requested state transition is legal.
  977. */
  978. int (*check_transition)(struct bnx2x *bp,
  979. struct bnx2x_func_sp_obj *o,
  980. struct bnx2x_func_state_params *params);
  981. /**
  982. * Completes the pending command.
  983. */
  984. int (*complete_cmd)(struct bnx2x *bp,
  985. struct bnx2x_func_sp_obj *o,
  986. enum bnx2x_func_cmd cmd);
  987. int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
  988. enum bnx2x_func_cmd cmd);
  989. };
  990. /********************** Interfaces ********************************************/
  991. /* Queueable objects set */
  992. union bnx2x_qable_obj {
  993. struct bnx2x_vlan_mac_obj vlan_mac;
  994. };
  995. /************** Function state update *********/
  996. void bnx2x_init_func_obj(struct bnx2x *bp,
  997. struct bnx2x_func_sp_obj *obj,
  998. void *rdata, dma_addr_t rdata_mapping,
  999. struct bnx2x_func_sp_drv_ops *drv_iface);
  1000. int bnx2x_func_state_change(struct bnx2x *bp,
  1001. struct bnx2x_func_state_params *params);
  1002. enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
  1003. struct bnx2x_func_sp_obj *o);
  1004. /******************* Queue State **************/
  1005. void bnx2x_init_queue_obj(struct bnx2x *bp,
  1006. struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
  1007. u8 cid_cnt, u8 func_id, void *rdata,
  1008. dma_addr_t rdata_mapping, unsigned long type);
  1009. int bnx2x_queue_state_change(struct bnx2x *bp,
  1010. struct bnx2x_queue_state_params *params);
  1011. /********************* VLAN-MAC ****************/
  1012. void bnx2x_init_mac_obj(struct bnx2x *bp,
  1013. struct bnx2x_vlan_mac_obj *mac_obj,
  1014. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1015. dma_addr_t rdata_mapping, int state,
  1016. unsigned long *pstate, bnx2x_obj_type type,
  1017. struct bnx2x_credit_pool_obj *macs_pool);
  1018. void bnx2x_init_vlan_obj(struct bnx2x *bp,
  1019. struct bnx2x_vlan_mac_obj *vlan_obj,
  1020. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1021. dma_addr_t rdata_mapping, int state,
  1022. unsigned long *pstate, bnx2x_obj_type type,
  1023. struct bnx2x_credit_pool_obj *vlans_pool);
  1024. void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
  1025. struct bnx2x_vlan_mac_obj *vlan_mac_obj,
  1026. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1027. dma_addr_t rdata_mapping, int state,
  1028. unsigned long *pstate, bnx2x_obj_type type,
  1029. struct bnx2x_credit_pool_obj *macs_pool,
  1030. struct bnx2x_credit_pool_obj *vlans_pool);
  1031. int bnx2x_config_vlan_mac(struct bnx2x *bp,
  1032. struct bnx2x_vlan_mac_ramrod_params *p);
  1033. int bnx2x_vlan_mac_move(struct bnx2x *bp,
  1034. struct bnx2x_vlan_mac_ramrod_params *p,
  1035. struct bnx2x_vlan_mac_obj *dest_o);
  1036. /********************* RX MODE ****************/
  1037. void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
  1038. struct bnx2x_rx_mode_obj *o);
  1039. /**
  1040. * Send and RX_MODE ramrod according to the provided parameters.
  1041. *
  1042. * @param bp
  1043. * @param p Command parameters
  1044. *
  1045. * @return 0 - if operation was successfull and there is no pending completions,
  1046. * positive number - if there are pending completions,
  1047. * negative - if there were errors
  1048. */
  1049. int bnx2x_config_rx_mode(struct bnx2x *bp,
  1050. struct bnx2x_rx_mode_ramrod_params *p);
  1051. /****************** MULTICASTS ****************/
  1052. void bnx2x_init_mcast_obj(struct bnx2x *bp,
  1053. struct bnx2x_mcast_obj *mcast_obj,
  1054. u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
  1055. u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
  1056. int state, unsigned long *pstate,
  1057. bnx2x_obj_type type);
  1058. /**
  1059. * Configure multicast MACs list. May configure a new list
  1060. * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
  1061. * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
  1062. * configuration, continue to execute the pending commands
  1063. * (BNX2X_MCAST_CMD_CONT).
  1064. *
  1065. * If previous command is still pending or if number of MACs to
  1066. * configure is more that maximum number of MACs in one command,
  1067. * the current command will be enqueued to the tail of the
  1068. * pending commands list.
  1069. *
  1070. * @param bp
  1071. * @param p
  1072. * @param command to execute: BNX2X_MCAST_CMD_X
  1073. *
  1074. * @return 0 is operation was sucessfull and there are no pending completions,
  1075. * negative if there were errors, positive if there are pending
  1076. * completions.
  1077. */
  1078. int bnx2x_config_mcast(struct bnx2x *bp,
  1079. struct bnx2x_mcast_ramrod_params *p, int cmd);
  1080. /****************** CREDIT POOL ****************/
  1081. void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
  1082. struct bnx2x_credit_pool_obj *p, u8 func_id,
  1083. u8 func_num);
  1084. void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
  1085. struct bnx2x_credit_pool_obj *p, u8 func_id,
  1086. u8 func_num);
  1087. /****************** RSS CONFIGURATION ****************/
  1088. void bnx2x_init_rss_config_obj(struct bnx2x *bp,
  1089. struct bnx2x_rss_config_obj *rss_obj,
  1090. u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
  1091. void *rdata, dma_addr_t rdata_mapping,
  1092. int state, unsigned long *pstate,
  1093. bnx2x_obj_type type);
  1094. /**
  1095. * Updates RSS configuration according to provided parameters.
  1096. *
  1097. * @param bp
  1098. * @param p
  1099. *
  1100. * @return 0 in case of success
  1101. */
  1102. int bnx2x_config_rss(struct bnx2x *bp,
  1103. struct bnx2x_config_rss_params *p);
  1104. /**
  1105. * Return the current ind_table configuration.
  1106. *
  1107. * @param bp
  1108. * @param ind_table buffer to fill with the current indirection
  1109. * table content. Should be at least
  1110. * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
  1111. */
  1112. void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
  1113. u8 *ind_table);
  1114. #endif /* BNX2X_SP_VERBS */