recv.c 25 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  18. struct ieee80211_hdr *hdr)
  19. {
  20. struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  21. int i;
  22. spin_lock_bh(&sc->wiphy_lock);
  23. for (i = 0; i < sc->num_sec_wiphy; i++) {
  24. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  25. if (aphy == NULL)
  26. continue;
  27. if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  28. == 0) {
  29. hw = aphy->hw;
  30. break;
  31. }
  32. }
  33. spin_unlock_bh(&sc->wiphy_lock);
  34. return hw;
  35. }
  36. /*
  37. * Setup and link descriptors.
  38. *
  39. * 11N: we can no longer afford to self link the last descriptor.
  40. * MAC acknowledges BA status as long as it copies frames to host
  41. * buffer (or rx fifo). This can incorrectly acknowledge packets
  42. * to a sender if last desc is self-linked.
  43. */
  44. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  45. {
  46. struct ath_hw *ah = sc->sc_ah;
  47. struct ath_desc *ds;
  48. struct sk_buff *skb;
  49. ATH_RXBUF_RESET(bf);
  50. ds = bf->bf_desc;
  51. ds->ds_link = 0; /* link to null */
  52. ds->ds_data = bf->bf_buf_addr;
  53. /* virtual addr of the beginning of the buffer. */
  54. skb = bf->bf_mpdu;
  55. BUG_ON(skb == NULL);
  56. ds->ds_vdata = skb->data;
  57. /* setup rx descriptors. The rx.bufsize here tells the harware
  58. * how much data it can DMA to us and that we are prepared
  59. * to process */
  60. ath9k_hw_setuprxdesc(ah, ds,
  61. sc->rx.bufsize,
  62. 0);
  63. if (sc->rx.rxlink == NULL)
  64. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  65. else
  66. *sc->rx.rxlink = bf->bf_daddr;
  67. sc->rx.rxlink = &ds->ds_link;
  68. ath9k_hw_rxena(ah);
  69. }
  70. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  71. {
  72. /* XXX block beacon interrupts */
  73. ath9k_hw_setantenna(sc->sc_ah, antenna);
  74. sc->rx.defant = antenna;
  75. sc->rx.rxotherant = 0;
  76. }
  77. /* Assumes you've already done the endian to CPU conversion */
  78. static bool ath9k_rx_accept(struct ath_common *common,
  79. struct sk_buff *skb,
  80. struct ieee80211_rx_status *rxs,
  81. struct ath_rx_status *rx_stats,
  82. bool *decrypt_error)
  83. {
  84. struct ath_hw *ah = common->ah;
  85. struct ieee80211_hdr *hdr;
  86. __le16 fc;
  87. hdr = (struct ieee80211_hdr *) skb->data;
  88. fc = hdr->frame_control;
  89. if (!rx_stats->rs_datalen)
  90. return false;
  91. if (rx_stats->rs_more) {
  92. /*
  93. * Frame spans multiple descriptors; this cannot happen yet
  94. * as we don't support jumbograms. If not in monitor mode,
  95. * discard the frame. Enable this if you want to see
  96. * error frames in Monitor mode.
  97. */
  98. if (ah->opmode != NL80211_IFTYPE_MONITOR)
  99. return false;
  100. } else if (rx_stats->rs_status != 0) {
  101. if (rx_stats->rs_status & ATH9K_RXERR_CRC)
  102. rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
  103. if (rx_stats->rs_status & ATH9K_RXERR_PHY)
  104. return false;
  105. if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
  106. *decrypt_error = true;
  107. } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
  108. if (ieee80211_is_ctl(fc))
  109. /*
  110. * Sometimes, we get invalid
  111. * MIC failures on valid control frames.
  112. * Remove these mic errors.
  113. */
  114. rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
  115. else
  116. rxs->flag |= RX_FLAG_MMIC_ERROR;
  117. }
  118. /*
  119. * Reject error frames with the exception of
  120. * decryption and MIC failures. For monitor mode,
  121. * we also ignore the CRC error.
  122. */
  123. if (ah->opmode == NL80211_IFTYPE_MONITOR) {
  124. if (rx_stats->rs_status &
  125. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  126. ATH9K_RXERR_CRC))
  127. return false;
  128. } else {
  129. if (rx_stats->rs_status &
  130. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  131. return false;
  132. }
  133. }
  134. }
  135. return true;
  136. }
  137. static u8 ath9k_process_rate(struct ath_common *common,
  138. struct ieee80211_hw *hw,
  139. struct ath_rx_status *rx_stats,
  140. struct ieee80211_rx_status *rxs,
  141. struct sk_buff *skb)
  142. {
  143. struct ieee80211_supported_band *sband;
  144. enum ieee80211_band band;
  145. unsigned int i = 0;
  146. band = hw->conf.channel->band;
  147. sband = hw->wiphy->bands[band];
  148. if (rx_stats->rs_rate & 0x80) {
  149. /* HT rate */
  150. rxs->flag |= RX_FLAG_HT;
  151. if (rx_stats->rs_flags & ATH9K_RX_2040)
  152. rxs->flag |= RX_FLAG_40MHZ;
  153. if (rx_stats->rs_flags & ATH9K_RX_GI)
  154. rxs->flag |= RX_FLAG_SHORT_GI;
  155. return rx_stats->rs_rate & 0x7f;
  156. }
  157. for (i = 0; i < sband->n_bitrates; i++) {
  158. if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
  159. return i;
  160. if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
  161. rxs->flag |= RX_FLAG_SHORTPRE;
  162. return i;
  163. }
  164. }
  165. /* No valid hardware bitrate found -- we should not get here */
  166. ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
  167. "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
  168. if ((common->debug_mask & ATH_DBG_XMIT))
  169. print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
  170. return 0;
  171. }
  172. /*
  173. * Theory for reporting quality:
  174. *
  175. * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
  176. * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
  177. * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
  178. *
  179. * MCS 7 is the highets MCS index usable by a 1-stream device.
  180. * MCS 15 is the highest MCS index usable by a 2-stream device.
  181. *
  182. * All ath9k devices are either 1-stream or 2-stream.
  183. *
  184. * How many bars you see is derived from the qual reporting.
  185. *
  186. * A more elaborate scheme can be used here but it requires tables
  187. * of SNR/throughput for each possible mode used. For the MCS table
  188. * you can refer to the wireless wiki:
  189. *
  190. * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
  191. *
  192. */
  193. static int ath9k_compute_qual(struct ieee80211_hw *hw,
  194. struct ath_rx_status *rx_stats)
  195. {
  196. int qual;
  197. if (conf_is_ht(&hw->conf))
  198. qual = rx_stats->rs_rssi * 100 / 45;
  199. else
  200. qual = rx_stats->rs_rssi * 100 / 35;
  201. /*
  202. * rssi can be more than 45 though, anything above that
  203. * should be considered at 100%
  204. */
  205. if (qual > 100)
  206. qual = 100;
  207. return qual;
  208. }
  209. static void ath9k_process_rssi(struct ath_common *common,
  210. struct ieee80211_hw *hw,
  211. struct sk_buff *skb,
  212. struct ath_rx_status *rx_stats)
  213. {
  214. struct ath_hw *ah = common->ah;
  215. struct ieee80211_sta *sta;
  216. struct ieee80211_hdr *hdr;
  217. struct ath_node *an;
  218. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  219. __le16 fc;
  220. hdr = (struct ieee80211_hdr *)skb->data;
  221. fc = hdr->frame_control;
  222. rcu_read_lock();
  223. /* XXX: use ieee80211_find_sta! */
  224. sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
  225. if (sta) {
  226. an = (struct ath_node *) sta->drv_priv;
  227. if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
  228. !rx_stats->rs_moreaggr)
  229. ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
  230. last_rssi = an->last_rssi;
  231. }
  232. rcu_read_unlock();
  233. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  234. rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
  235. ATH_RSSI_EP_MULTIPLIER);
  236. if (rx_stats->rs_rssi < 0)
  237. rx_stats->rs_rssi = 0;
  238. else if (rx_stats->rs_rssi > 127)
  239. rx_stats->rs_rssi = 127;
  240. /* Update Beacon RSSI, this is used by ANI. */
  241. if (ieee80211_is_beacon(fc))
  242. ah->stats.avgbrssi = rx_stats->rs_rssi;
  243. }
  244. /*
  245. * For Decrypt or Demic errors, we only mark packet status here and always push
  246. * up the frame up to let mac80211 handle the actual error case, be it no
  247. * decryption key or real decryption error. This let us keep statistics there.
  248. */
  249. static int ath_rx_prepare(struct ath_common *common,
  250. struct ieee80211_hw *hw,
  251. struct sk_buff *skb, struct ath_rx_status *rx_stats,
  252. struct ieee80211_rx_status *rx_status,
  253. bool *decrypt_error)
  254. {
  255. struct ath_hw *ah = common->ah;
  256. if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
  257. goto rx_next;
  258. ath9k_process_rssi(common, hw, skb, rx_stats);
  259. rx_status->rate_idx = ath9k_process_rate(common, hw,
  260. rx_stats, rx_status, skb);
  261. rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
  262. rx_status->band = hw->conf.channel->band;
  263. rx_status->freq = hw->conf.channel->center_freq;
  264. rx_status->noise = common->ani.noise_floor;
  265. rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
  266. rx_status->antenna = rx_stats->rs_antenna;
  267. rx_status->qual = ath9k_compute_qual(hw, rx_stats);
  268. rx_status->flag |= RX_FLAG_TSFT;
  269. return 1;
  270. rx_next:
  271. return 0;
  272. }
  273. static void ath_opmode_init(struct ath_softc *sc)
  274. {
  275. struct ath_hw *ah = sc->sc_ah;
  276. struct ath_common *common = ath9k_hw_common(ah);
  277. u32 rfilt, mfilt[2];
  278. /* configure rx filter */
  279. rfilt = ath_calcrxfilter(sc);
  280. ath9k_hw_setrxfilter(ah, rfilt);
  281. /* configure bssid mask */
  282. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  283. ath_hw_setbssidmask(common);
  284. /* configure operational mode */
  285. ath9k_hw_setopmode(ah);
  286. /* Handle any link-level address change. */
  287. ath9k_hw_setmac(ah, common->macaddr);
  288. /* calculate and install multicast filter */
  289. mfilt[0] = mfilt[1] = ~0;
  290. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  291. }
  292. int ath_rx_init(struct ath_softc *sc, int nbufs)
  293. {
  294. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  295. struct sk_buff *skb;
  296. struct ath_buf *bf;
  297. int error = 0;
  298. spin_lock_init(&sc->rx.rxflushlock);
  299. sc->sc_flags &= ~SC_OP_RXFLUSH;
  300. spin_lock_init(&sc->rx.rxbuflock);
  301. sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
  302. min(common->cachelsz, (u16)64));
  303. ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  304. common->cachelsz, sc->rx.bufsize);
  305. /* Initialize rx descriptors */
  306. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  307. "rx", nbufs, 1);
  308. if (error != 0) {
  309. ath_print(common, ATH_DBG_FATAL,
  310. "failed to allocate rx descriptors: %d\n", error);
  311. goto err;
  312. }
  313. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  314. skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_KERNEL);
  315. if (skb == NULL) {
  316. error = -ENOMEM;
  317. goto err;
  318. }
  319. bf->bf_mpdu = skb;
  320. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  321. sc->rx.bufsize,
  322. DMA_FROM_DEVICE);
  323. if (unlikely(dma_mapping_error(sc->dev,
  324. bf->bf_buf_addr))) {
  325. dev_kfree_skb_any(skb);
  326. bf->bf_mpdu = NULL;
  327. ath_print(common, ATH_DBG_FATAL,
  328. "dma_mapping_error() on RX init\n");
  329. error = -ENOMEM;
  330. goto err;
  331. }
  332. bf->bf_dmacontext = bf->bf_buf_addr;
  333. }
  334. sc->rx.rxlink = NULL;
  335. err:
  336. if (error)
  337. ath_rx_cleanup(sc);
  338. return error;
  339. }
  340. void ath_rx_cleanup(struct ath_softc *sc)
  341. {
  342. struct sk_buff *skb;
  343. struct ath_buf *bf;
  344. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  345. skb = bf->bf_mpdu;
  346. if (skb) {
  347. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  348. sc->rx.bufsize, DMA_FROM_DEVICE);
  349. dev_kfree_skb(skb);
  350. }
  351. }
  352. if (sc->rx.rxdma.dd_desc_len != 0)
  353. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  354. }
  355. /*
  356. * Calculate the receive filter according to the
  357. * operating mode and state:
  358. *
  359. * o always accept unicast, broadcast, and multicast traffic
  360. * o maintain current state of phy error reception (the hal
  361. * may enable phy error frames for noise immunity work)
  362. * o probe request frames are accepted only when operating in
  363. * hostap, adhoc, or monitor modes
  364. * o enable promiscuous mode according to the interface state
  365. * o accept beacons:
  366. * - when operating in adhoc mode so the 802.11 layer creates
  367. * node table entries for peers,
  368. * - when operating in station mode for collecting rssi data when
  369. * the station is otherwise quiet, or
  370. * - when operating as a repeater so we see repeater-sta beacons
  371. * - when scanning
  372. */
  373. u32 ath_calcrxfilter(struct ath_softc *sc)
  374. {
  375. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  376. u32 rfilt;
  377. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  378. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  379. | ATH9K_RX_FILTER_MCAST;
  380. /* If not a STA, enable processing of Probe Requests */
  381. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  382. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  383. /*
  384. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  385. * mode interface or when in monitor mode. AP mode does not need this
  386. * since it receives all in-BSS frames anyway.
  387. */
  388. if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
  389. (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
  390. (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
  391. rfilt |= ATH9K_RX_FILTER_PROM;
  392. if (sc->rx.rxfilter & FIF_CONTROL)
  393. rfilt |= ATH9K_RX_FILTER_CONTROL;
  394. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  395. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  396. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  397. else
  398. rfilt |= ATH9K_RX_FILTER_BEACON;
  399. if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
  400. AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
  401. (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
  402. (sc->rx.rxfilter & FIF_PSPOLL))
  403. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  404. if (conf_is_ht(&sc->hw->conf))
  405. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  406. if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  407. /* TODO: only needed if more than one BSSID is in use in
  408. * station/adhoc mode */
  409. /* The following may also be needed for other older chips */
  410. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  411. rfilt |= ATH9K_RX_FILTER_PROM;
  412. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  413. }
  414. return rfilt;
  415. #undef RX_FILTER_PRESERVE
  416. }
  417. int ath_startrecv(struct ath_softc *sc)
  418. {
  419. struct ath_hw *ah = sc->sc_ah;
  420. struct ath_buf *bf, *tbf;
  421. spin_lock_bh(&sc->rx.rxbuflock);
  422. if (list_empty(&sc->rx.rxbuf))
  423. goto start_recv;
  424. sc->rx.rxlink = NULL;
  425. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  426. ath_rx_buf_link(sc, bf);
  427. }
  428. /* We could have deleted elements so the list may be empty now */
  429. if (list_empty(&sc->rx.rxbuf))
  430. goto start_recv;
  431. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  432. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  433. ath9k_hw_rxena(ah);
  434. start_recv:
  435. spin_unlock_bh(&sc->rx.rxbuflock);
  436. ath_opmode_init(sc);
  437. ath9k_hw_startpcureceive(ah);
  438. return 0;
  439. }
  440. bool ath_stoprecv(struct ath_softc *sc)
  441. {
  442. struct ath_hw *ah = sc->sc_ah;
  443. bool stopped;
  444. ath9k_hw_stoppcurecv(ah);
  445. ath9k_hw_setrxfilter(ah, 0);
  446. stopped = ath9k_hw_stopdmarecv(ah);
  447. sc->rx.rxlink = NULL;
  448. return stopped;
  449. }
  450. void ath_flushrecv(struct ath_softc *sc)
  451. {
  452. spin_lock_bh(&sc->rx.rxflushlock);
  453. sc->sc_flags |= SC_OP_RXFLUSH;
  454. ath_rx_tasklet(sc, 1);
  455. sc->sc_flags &= ~SC_OP_RXFLUSH;
  456. spin_unlock_bh(&sc->rx.rxflushlock);
  457. }
  458. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  459. {
  460. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  461. struct ieee80211_mgmt *mgmt;
  462. u8 *pos, *end, id, elen;
  463. struct ieee80211_tim_ie *tim;
  464. mgmt = (struct ieee80211_mgmt *)skb->data;
  465. pos = mgmt->u.beacon.variable;
  466. end = skb->data + skb->len;
  467. while (pos + 2 < end) {
  468. id = *pos++;
  469. elen = *pos++;
  470. if (pos + elen > end)
  471. break;
  472. if (id == WLAN_EID_TIM) {
  473. if (elen < sizeof(*tim))
  474. break;
  475. tim = (struct ieee80211_tim_ie *) pos;
  476. if (tim->dtim_count != 0)
  477. break;
  478. return tim->bitmap_ctrl & 0x01;
  479. }
  480. pos += elen;
  481. }
  482. return false;
  483. }
  484. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  485. {
  486. struct ieee80211_mgmt *mgmt;
  487. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  488. if (skb->len < 24 + 8 + 2 + 2)
  489. return;
  490. mgmt = (struct ieee80211_mgmt *)skb->data;
  491. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
  492. return; /* not from our current AP */
  493. sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
  494. if (sc->sc_flags & SC_OP_BEACON_SYNC) {
  495. sc->sc_flags &= ~SC_OP_BEACON_SYNC;
  496. ath_print(common, ATH_DBG_PS,
  497. "Reconfigure Beacon timers based on "
  498. "timestamp from the AP\n");
  499. ath_beacon_config(sc, NULL);
  500. }
  501. if (ath_beacon_dtim_pending_cab(skb)) {
  502. /*
  503. * Remain awake waiting for buffered broadcast/multicast
  504. * frames. If the last broadcast/multicast frame is not
  505. * received properly, the next beacon frame will work as
  506. * a backup trigger for returning into NETWORK SLEEP state,
  507. * so we are waiting for it as well.
  508. */
  509. ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
  510. "buffered broadcast/multicast frame(s)\n");
  511. sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
  512. return;
  513. }
  514. if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
  515. /*
  516. * This can happen if a broadcast frame is dropped or the AP
  517. * fails to send a frame indicating that all CAB frames have
  518. * been delivered.
  519. */
  520. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  521. ath_print(common, ATH_DBG_PS,
  522. "PS wait for CAB frames timed out\n");
  523. }
  524. }
  525. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  526. {
  527. struct ieee80211_hdr *hdr;
  528. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  529. hdr = (struct ieee80211_hdr *)skb->data;
  530. /* Process Beacon and CAB receive in PS state */
  531. if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
  532. ieee80211_is_beacon(hdr->frame_control))
  533. ath_rx_ps_beacon(sc, skb);
  534. else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
  535. (ieee80211_is_data(hdr->frame_control) ||
  536. ieee80211_is_action(hdr->frame_control)) &&
  537. is_multicast_ether_addr(hdr->addr1) &&
  538. !ieee80211_has_moredata(hdr->frame_control)) {
  539. /*
  540. * No more broadcast/multicast frames to be received at this
  541. * point.
  542. */
  543. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  544. ath_print(common, ATH_DBG_PS,
  545. "All PS CAB frames received, back to sleep\n");
  546. } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
  547. !is_multicast_ether_addr(hdr->addr1) &&
  548. !ieee80211_has_morefrags(hdr->frame_control)) {
  549. sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
  550. ath_print(common, ATH_DBG_PS,
  551. "Going back to sleep after having received "
  552. "PS-Poll data (0x%x)\n",
  553. sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  554. SC_OP_WAIT_FOR_CAB |
  555. SC_OP_WAIT_FOR_PSPOLL_DATA |
  556. SC_OP_WAIT_FOR_TX_ACK));
  557. }
  558. }
  559. static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
  560. struct ath_softc *sc, struct sk_buff *skb,
  561. struct ieee80211_rx_status *rxs)
  562. {
  563. struct ieee80211_hdr *hdr;
  564. hdr = (struct ieee80211_hdr *)skb->data;
  565. /* Send the frame to mac80211 */
  566. if (is_multicast_ether_addr(hdr->addr1)) {
  567. int i;
  568. /*
  569. * Deliver broadcast/multicast frames to all suitable
  570. * virtual wiphys.
  571. */
  572. /* TODO: filter based on channel configuration */
  573. for (i = 0; i < sc->num_sec_wiphy; i++) {
  574. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  575. struct sk_buff *nskb;
  576. if (aphy == NULL)
  577. continue;
  578. nskb = skb_copy(skb, GFP_ATOMIC);
  579. if (!nskb)
  580. continue;
  581. ieee80211_rx(aphy->hw, nskb);
  582. }
  583. ieee80211_rx(sc->hw, skb);
  584. } else
  585. /* Deliver unicast frames based on receiver address */
  586. ieee80211_rx(hw, skb);
  587. }
  588. int ath_rx_tasklet(struct ath_softc *sc, int flush)
  589. {
  590. #define PA2DESC(_sc, _pa) \
  591. ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
  592. ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
  593. struct ath_buf *bf;
  594. struct ath_desc *ds;
  595. struct ath_rx_status *rx_stats;
  596. struct sk_buff *skb = NULL, *requeue_skb;
  597. struct ieee80211_rx_status *rxs;
  598. struct ath_hw *ah = sc->sc_ah;
  599. struct ath_common *common = ath9k_hw_common(ah);
  600. /*
  601. * The hw can techncically differ from common->hw when using ath9k
  602. * virtual wiphy so to account for that we iterate over the active
  603. * wiphys and find the appropriate wiphy and therefore hw.
  604. */
  605. struct ieee80211_hw *hw = NULL;
  606. struct ieee80211_hdr *hdr;
  607. int hdrlen, padsize, retval;
  608. bool decrypt_error = false;
  609. u8 keyix;
  610. __le16 fc;
  611. spin_lock_bh(&sc->rx.rxbuflock);
  612. do {
  613. /* If handling rx interrupt and flush is in progress => exit */
  614. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  615. break;
  616. if (list_empty(&sc->rx.rxbuf)) {
  617. sc->rx.rxlink = NULL;
  618. break;
  619. }
  620. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  621. ds = bf->bf_desc;
  622. /*
  623. * Must provide the virtual address of the current
  624. * descriptor, the physical address, and the virtual
  625. * address of the next descriptor in the h/w chain.
  626. * This allows the HAL to look ahead to see if the
  627. * hardware is done with a descriptor by checking the
  628. * done bit in the following descriptor and the address
  629. * of the current descriptor the DMA engine is working
  630. * on. All this is necessary because of our use of
  631. * a self-linked list to avoid rx overruns.
  632. */
  633. retval = ath9k_hw_rxprocdesc(ah, ds,
  634. bf->bf_daddr,
  635. PA2DESC(sc, ds->ds_link),
  636. 0);
  637. if (retval == -EINPROGRESS) {
  638. struct ath_buf *tbf;
  639. struct ath_desc *tds;
  640. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  641. sc->rx.rxlink = NULL;
  642. break;
  643. }
  644. tbf = list_entry(bf->list.next, struct ath_buf, list);
  645. /*
  646. * On some hardware the descriptor status words could
  647. * get corrupted, including the done bit. Because of
  648. * this, check if the next descriptor's done bit is
  649. * set or not.
  650. *
  651. * If the next descriptor's done bit is set, the current
  652. * descriptor has been corrupted. Force s/w to discard
  653. * this descriptor and continue...
  654. */
  655. tds = tbf->bf_desc;
  656. retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
  657. PA2DESC(sc, tds->ds_link), 0);
  658. if (retval == -EINPROGRESS) {
  659. break;
  660. }
  661. }
  662. skb = bf->bf_mpdu;
  663. if (!skb)
  664. continue;
  665. /*
  666. * Synchronize the DMA transfer with CPU before
  667. * 1. accessing the frame
  668. * 2. requeueing the same buffer to h/w
  669. */
  670. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  671. sc->rx.bufsize,
  672. DMA_FROM_DEVICE);
  673. hdr = (struct ieee80211_hdr *) skb->data;
  674. rxs = IEEE80211_SKB_RXCB(skb);
  675. hw = ath_get_virt_hw(sc, hdr);
  676. rx_stats = &ds->ds_rxstat;
  677. /*
  678. * If we're asked to flush receive queue, directly
  679. * chain it back at the queue without processing it.
  680. */
  681. if (flush)
  682. goto requeue;
  683. /* The status portion of the descriptor could get corrupted. */
  684. if (sc->rx.bufsize < rx_stats->rs_datalen)
  685. goto requeue;
  686. if (!ath_rx_prepare(common, hw, skb, rx_stats,
  687. rxs, &decrypt_error))
  688. goto requeue;
  689. /* Ensure we always have an skb to requeue once we are done
  690. * processing the current buffer's skb */
  691. requeue_skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_ATOMIC);
  692. /* If there is no memory we ignore the current RX'd frame,
  693. * tell hardware it can give us a new frame using the old
  694. * skb and put it at the tail of the sc->rx.rxbuf list for
  695. * processing. */
  696. if (!requeue_skb)
  697. goto requeue;
  698. /* Unmap the frame */
  699. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  700. sc->rx.bufsize,
  701. DMA_FROM_DEVICE);
  702. skb_put(skb, rx_stats->rs_datalen);
  703. /* see if any padding is done by the hw and remove it */
  704. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  705. fc = hdr->frame_control;
  706. /* The MAC header is padded to have 32-bit boundary if the
  707. * packet payload is non-zero. The general calculation for
  708. * padsize would take into account odd header lengths:
  709. * padsize = (4 - hdrlen % 4) % 4; However, since only
  710. * even-length headers are used, padding can only be 0 or 2
  711. * bytes and we can optimize this a bit. In addition, we must
  712. * not try to remove padding from short control frames that do
  713. * not have payload. */
  714. padsize = hdrlen & 3;
  715. if (padsize && hdrlen >= 24) {
  716. memmove(skb->data + padsize, skb->data, hdrlen);
  717. skb_pull(skb, padsize);
  718. }
  719. keyix = rx_stats->rs_keyix;
  720. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
  721. rxs->flag |= RX_FLAG_DECRYPTED;
  722. } else if (ieee80211_has_protected(fc)
  723. && !decrypt_error && skb->len >= hdrlen + 4) {
  724. keyix = skb->data[hdrlen + 3] >> 6;
  725. if (test_bit(keyix, sc->keymap))
  726. rxs->flag |= RX_FLAG_DECRYPTED;
  727. }
  728. if (ah->sw_mgmt_crypto &&
  729. (rxs->flag & RX_FLAG_DECRYPTED) &&
  730. ieee80211_is_mgmt(fc))
  731. /* Use software decrypt for management frames. */
  732. rxs->flag &= ~RX_FLAG_DECRYPTED;
  733. /* We will now give hardware our shiny new allocated skb */
  734. bf->bf_mpdu = requeue_skb;
  735. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  736. sc->rx.bufsize,
  737. DMA_FROM_DEVICE);
  738. if (unlikely(dma_mapping_error(sc->dev,
  739. bf->bf_buf_addr))) {
  740. dev_kfree_skb_any(requeue_skb);
  741. bf->bf_mpdu = NULL;
  742. ath_print(common, ATH_DBG_FATAL,
  743. "dma_mapping_error() on RX\n");
  744. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  745. break;
  746. }
  747. bf->bf_dmacontext = bf->bf_buf_addr;
  748. /*
  749. * change the default rx antenna if rx diversity chooses the
  750. * other antenna 3 times in a row.
  751. */
  752. if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
  753. if (++sc->rx.rxotherant >= 3)
  754. ath_setdefantenna(sc, rx_stats->rs_antenna);
  755. } else {
  756. sc->rx.rxotherant = 0;
  757. }
  758. if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  759. SC_OP_WAIT_FOR_CAB |
  760. SC_OP_WAIT_FOR_PSPOLL_DATA)))
  761. ath_rx_ps(sc, skb);
  762. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  763. requeue:
  764. list_move_tail(&bf->list, &sc->rx.rxbuf);
  765. ath_rx_buf_link(sc, bf);
  766. } while (1);
  767. spin_unlock_bh(&sc->rx.rxbuflock);
  768. return 0;
  769. #undef PA2DESC
  770. }