cciss.c 138 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/delay.h>
  30. #include <linux/major.h>
  31. #include <linux/fs.h>
  32. #include <linux/bio.h>
  33. #include <linux/blkpg.h>
  34. #include <linux/timer.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/seq_file.h>
  37. #include <linux/init.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/hdreg.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/compat.h>
  42. #include <linux/mutex.h>
  43. #include <asm/uaccess.h>
  44. #include <asm/io.h>
  45. #include <linux/dma-mapping.h>
  46. #include <linux/blkdev.h>
  47. #include <linux/genhd.h>
  48. #include <linux/completion.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/sg.h>
  51. #include <scsi/scsi_ioctl.h>
  52. #include <linux/cdrom.h>
  53. #include <linux/scatterlist.h>
  54. #include <linux/kthread.h>
  55. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  56. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  57. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  58. /* Embedded module documentation macros - see modules.h */
  59. MODULE_AUTHOR("Hewlett-Packard Company");
  60. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  61. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  62. MODULE_VERSION("3.6.26");
  63. MODULE_LICENSE("GPL");
  64. static int cciss_allow_hpsa;
  65. module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
  66. MODULE_PARM_DESC(cciss_allow_hpsa,
  67. "Prevent cciss driver from accessing hardware known to be "
  68. " supported by the hpsa driver");
  69. #include "cciss_cmd.h"
  70. #include "cciss.h"
  71. #include <linux/cciss_ioctl.h>
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id cciss_pci_device_id[] = {
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  79. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  80. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  81. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  82. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  104. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  105. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  106. {0,}
  107. };
  108. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  109. /* board_id = Subsystem Device ID & Vendor ID
  110. * product = Marketing Name for the board
  111. * access = Address of the struct of function pointers
  112. */
  113. static struct board_type products[] = {
  114. {0x40700E11, "Smart Array 5300", &SA5_access},
  115. {0x40800E11, "Smart Array 5i", &SA5B_access},
  116. {0x40820E11, "Smart Array 532", &SA5B_access},
  117. {0x40830E11, "Smart Array 5312", &SA5B_access},
  118. {0x409A0E11, "Smart Array 641", &SA5_access},
  119. {0x409B0E11, "Smart Array 642", &SA5_access},
  120. {0x409C0E11, "Smart Array 6400", &SA5_access},
  121. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  122. {0x40910E11, "Smart Array 6i", &SA5_access},
  123. {0x3225103C, "Smart Array P600", &SA5_access},
  124. {0x3235103C, "Smart Array P400i", &SA5_access},
  125. {0x3211103C, "Smart Array E200i", &SA5_access},
  126. {0x3212103C, "Smart Array E200", &SA5_access},
  127. {0x3213103C, "Smart Array E200i", &SA5_access},
  128. {0x3214103C, "Smart Array E200i", &SA5_access},
  129. {0x3215103C, "Smart Array E200i", &SA5_access},
  130. {0x3237103C, "Smart Array E500", &SA5_access},
  131. /* controllers below this line are also supported by the hpsa driver. */
  132. #define HPSA_BOUNDARY 0x3223103C
  133. {0x3223103C, "Smart Array P800", &SA5_access},
  134. {0x3234103C, "Smart Array P400", &SA5_access},
  135. {0x323D103C, "Smart Array P700m", &SA5_access},
  136. {0x3241103C, "Smart Array P212", &SA5_access},
  137. {0x3243103C, "Smart Array P410", &SA5_access},
  138. {0x3245103C, "Smart Array P410i", &SA5_access},
  139. {0x3247103C, "Smart Array P411", &SA5_access},
  140. {0x3249103C, "Smart Array P812", &SA5_access},
  141. {0x324A103C, "Smart Array P712m", &SA5_access},
  142. {0x324B103C, "Smart Array P711m", &SA5_access},
  143. {0x3250103C, "Smart Array", &SA5_access},
  144. {0x3251103C, "Smart Array", &SA5_access},
  145. {0x3252103C, "Smart Array", &SA5_access},
  146. {0x3253103C, "Smart Array", &SA5_access},
  147. {0x3254103C, "Smart Array", &SA5_access},
  148. };
  149. /* How long to wait (in milliseconds) for board to go into simple mode */
  150. #define MAX_CONFIG_WAIT 30000
  151. #define MAX_IOCTL_CONFIG_WAIT 1000
  152. /*define how many times we will try a command because of bus resets */
  153. #define MAX_CMD_RETRIES 3
  154. #define MAX_CTLR 32
  155. /* Originally cciss driver only supports 8 major numbers */
  156. #define MAX_CTLR_ORIG 8
  157. static ctlr_info_t *hba[MAX_CTLR];
  158. static struct task_struct *cciss_scan_thread;
  159. static DEFINE_MUTEX(scan_mutex);
  160. static LIST_HEAD(scan_q);
  161. static void do_cciss_request(struct request_queue *q);
  162. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  163. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  164. static int cciss_open(struct block_device *bdev, fmode_t mode);
  165. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  166. static int cciss_release(struct gendisk *disk, fmode_t mode);
  167. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  168. unsigned int cmd, unsigned long arg);
  169. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  170. unsigned int cmd, unsigned long arg);
  171. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  172. static int cciss_revalidate(struct gendisk *disk);
  173. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  174. static int deregister_disk(ctlr_info_t *h, int drv_index,
  175. int clear_all, int via_ioctl);
  176. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  177. sector_t *total_size, unsigned int *block_size);
  178. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  179. sector_t *total_size, unsigned int *block_size);
  180. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  181. sector_t total_size,
  182. unsigned int block_size, InquiryData_struct *inq_buff,
  183. drive_info_struct *drv);
  184. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  185. static void start_io(ctlr_info_t *h);
  186. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  187. __u8 page_code, unsigned char scsi3addr[],
  188. int cmd_type);
  189. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  190. int attempt_retry);
  191. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  192. static int add_to_scan_list(struct ctlr_info *h);
  193. static int scan_thread(void *data);
  194. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  195. static void cciss_hba_release(struct device *dev);
  196. static void cciss_device_release(struct device *dev);
  197. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  198. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  199. static inline u32 next_command(ctlr_info_t *h);
  200. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  201. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  202. u64 *cfg_offset);
  203. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  204. unsigned long *memory_bar);
  205. /* performant mode helper functions */
  206. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  207. int *bucket_map);
  208. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  209. #ifdef CONFIG_PROC_FS
  210. static void cciss_procinit(ctlr_info_t *h);
  211. #else
  212. static void cciss_procinit(ctlr_info_t *h)
  213. {
  214. }
  215. #endif /* CONFIG_PROC_FS */
  216. #ifdef CONFIG_COMPAT
  217. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  218. unsigned, unsigned long);
  219. #endif
  220. static const struct block_device_operations cciss_fops = {
  221. .owner = THIS_MODULE,
  222. .open = cciss_unlocked_open,
  223. .release = cciss_release,
  224. .ioctl = do_ioctl,
  225. .getgeo = cciss_getgeo,
  226. #ifdef CONFIG_COMPAT
  227. .compat_ioctl = cciss_compat_ioctl,
  228. #endif
  229. .revalidate_disk = cciss_revalidate,
  230. };
  231. /* set_performant_mode: Modify the tag for cciss performant
  232. * set bit 0 for pull model, bits 3-1 for block fetch
  233. * register number
  234. */
  235. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  236. {
  237. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  238. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  239. }
  240. /*
  241. * Enqueuing and dequeuing functions for cmdlists.
  242. */
  243. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  244. {
  245. hlist_add_head(&c->list, list);
  246. }
  247. static inline void removeQ(CommandList_struct *c)
  248. {
  249. /*
  250. * After kexec/dump some commands might still
  251. * be in flight, which the firmware will try
  252. * to complete. Resetting the firmware doesn't work
  253. * with old fw revisions, so we have to mark
  254. * them off as 'stale' to prevent the driver from
  255. * falling over.
  256. */
  257. if (WARN_ON(hlist_unhashed(&c->list))) {
  258. c->cmd_type = CMD_MSG_STALE;
  259. return;
  260. }
  261. hlist_del_init(&c->list);
  262. }
  263. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  264. CommandList_struct *c)
  265. {
  266. unsigned long flags;
  267. set_performant_mode(h, c);
  268. spin_lock_irqsave(&h->lock, flags);
  269. addQ(&h->reqQ, c);
  270. h->Qdepth++;
  271. start_io(h);
  272. spin_unlock_irqrestore(&h->lock, flags);
  273. }
  274. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  275. int nr_cmds)
  276. {
  277. int i;
  278. if (!cmd_sg_list)
  279. return;
  280. for (i = 0; i < nr_cmds; i++) {
  281. kfree(cmd_sg_list[i]);
  282. cmd_sg_list[i] = NULL;
  283. }
  284. kfree(cmd_sg_list);
  285. }
  286. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  287. ctlr_info_t *h, int chainsize, int nr_cmds)
  288. {
  289. int j;
  290. SGDescriptor_struct **cmd_sg_list;
  291. if (chainsize <= 0)
  292. return NULL;
  293. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  294. if (!cmd_sg_list)
  295. return NULL;
  296. /* Build up chain blocks for each command */
  297. for (j = 0; j < nr_cmds; j++) {
  298. /* Need a block of chainsized s/g elements. */
  299. cmd_sg_list[j] = kmalloc((chainsize *
  300. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  301. if (!cmd_sg_list[j]) {
  302. dev_err(&h->pdev->dev, "Cannot get memory "
  303. "for s/g chains.\n");
  304. goto clean;
  305. }
  306. }
  307. return cmd_sg_list;
  308. clean:
  309. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  310. return NULL;
  311. }
  312. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  313. {
  314. SGDescriptor_struct *chain_sg;
  315. u64bit temp64;
  316. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  317. return;
  318. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  319. temp64.val32.lower = chain_sg->Addr.lower;
  320. temp64.val32.upper = chain_sg->Addr.upper;
  321. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  322. }
  323. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  324. SGDescriptor_struct *chain_block, int len)
  325. {
  326. SGDescriptor_struct *chain_sg;
  327. u64bit temp64;
  328. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  329. chain_sg->Ext = CCISS_SG_CHAIN;
  330. chain_sg->Len = len;
  331. temp64.val = pci_map_single(h->pdev, chain_block, len,
  332. PCI_DMA_TODEVICE);
  333. chain_sg->Addr.lower = temp64.val32.lower;
  334. chain_sg->Addr.upper = temp64.val32.upper;
  335. }
  336. #include "cciss_scsi.c" /* For SCSI tape support */
  337. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  338. "UNKNOWN"
  339. };
  340. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  341. #ifdef CONFIG_PROC_FS
  342. /*
  343. * Report information about this controller.
  344. */
  345. #define ENG_GIG 1000000000
  346. #define ENG_GIG_FACTOR (ENG_GIG/512)
  347. #define ENGAGE_SCSI "engage scsi"
  348. static struct proc_dir_entry *proc_cciss;
  349. static void cciss_seq_show_header(struct seq_file *seq)
  350. {
  351. ctlr_info_t *h = seq->private;
  352. seq_printf(seq, "%s: HP %s Controller\n"
  353. "Board ID: 0x%08lx\n"
  354. "Firmware Version: %c%c%c%c\n"
  355. "IRQ: %d\n"
  356. "Logical drives: %d\n"
  357. "Current Q depth: %d\n"
  358. "Current # commands on controller: %d\n"
  359. "Max Q depth since init: %d\n"
  360. "Max # commands on controller since init: %d\n"
  361. "Max SG entries since init: %d\n",
  362. h->devname,
  363. h->product_name,
  364. (unsigned long)h->board_id,
  365. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  366. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  367. h->num_luns,
  368. h->Qdepth, h->commands_outstanding,
  369. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  370. #ifdef CONFIG_CISS_SCSI_TAPE
  371. cciss_seq_tape_report(seq, h);
  372. #endif /* CONFIG_CISS_SCSI_TAPE */
  373. }
  374. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  375. {
  376. ctlr_info_t *h = seq->private;
  377. unsigned long flags;
  378. /* prevent displaying bogus info during configuration
  379. * or deconfiguration of a logical volume
  380. */
  381. spin_lock_irqsave(&h->lock, flags);
  382. if (h->busy_configuring) {
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return ERR_PTR(-EBUSY);
  385. }
  386. h->busy_configuring = 1;
  387. spin_unlock_irqrestore(&h->lock, flags);
  388. if (*pos == 0)
  389. cciss_seq_show_header(seq);
  390. return pos;
  391. }
  392. static int cciss_seq_show(struct seq_file *seq, void *v)
  393. {
  394. sector_t vol_sz, vol_sz_frac;
  395. ctlr_info_t *h = seq->private;
  396. unsigned ctlr = h->ctlr;
  397. loff_t *pos = v;
  398. drive_info_struct *drv = h->drv[*pos];
  399. if (*pos > h->highest_lun)
  400. return 0;
  401. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  402. return 0;
  403. if (drv->heads == 0)
  404. return 0;
  405. vol_sz = drv->nr_blocks;
  406. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  407. vol_sz_frac *= 100;
  408. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  409. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  410. drv->raid_level = RAID_UNKNOWN;
  411. seq_printf(seq, "cciss/c%dd%d:"
  412. "\t%4u.%02uGB\tRAID %s\n",
  413. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  414. raid_label[drv->raid_level]);
  415. return 0;
  416. }
  417. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  418. {
  419. ctlr_info_t *h = seq->private;
  420. if (*pos > h->highest_lun)
  421. return NULL;
  422. *pos += 1;
  423. return pos;
  424. }
  425. static void cciss_seq_stop(struct seq_file *seq, void *v)
  426. {
  427. ctlr_info_t *h = seq->private;
  428. /* Only reset h->busy_configuring if we succeeded in setting
  429. * it during cciss_seq_start. */
  430. if (v == ERR_PTR(-EBUSY))
  431. return;
  432. h->busy_configuring = 0;
  433. }
  434. static const struct seq_operations cciss_seq_ops = {
  435. .start = cciss_seq_start,
  436. .show = cciss_seq_show,
  437. .next = cciss_seq_next,
  438. .stop = cciss_seq_stop,
  439. };
  440. static int cciss_seq_open(struct inode *inode, struct file *file)
  441. {
  442. int ret = seq_open(file, &cciss_seq_ops);
  443. struct seq_file *seq = file->private_data;
  444. if (!ret)
  445. seq->private = PDE(inode)->data;
  446. return ret;
  447. }
  448. static ssize_t
  449. cciss_proc_write(struct file *file, const char __user *buf,
  450. size_t length, loff_t *ppos)
  451. {
  452. int err;
  453. char *buffer;
  454. #ifndef CONFIG_CISS_SCSI_TAPE
  455. return -EINVAL;
  456. #endif
  457. if (!buf || length > PAGE_SIZE - 1)
  458. return -EINVAL;
  459. buffer = (char *)__get_free_page(GFP_KERNEL);
  460. if (!buffer)
  461. return -ENOMEM;
  462. err = -EFAULT;
  463. if (copy_from_user(buffer, buf, length))
  464. goto out;
  465. buffer[length] = '\0';
  466. #ifdef CONFIG_CISS_SCSI_TAPE
  467. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  468. struct seq_file *seq = file->private_data;
  469. ctlr_info_t *h = seq->private;
  470. err = cciss_engage_scsi(h);
  471. if (err == 0)
  472. err = length;
  473. } else
  474. #endif /* CONFIG_CISS_SCSI_TAPE */
  475. err = -EINVAL;
  476. /* might be nice to have "disengage" too, but it's not
  477. safely possible. (only 1 module use count, lock issues.) */
  478. out:
  479. free_page((unsigned long)buffer);
  480. return err;
  481. }
  482. static const struct file_operations cciss_proc_fops = {
  483. .owner = THIS_MODULE,
  484. .open = cciss_seq_open,
  485. .read = seq_read,
  486. .llseek = seq_lseek,
  487. .release = seq_release,
  488. .write = cciss_proc_write,
  489. };
  490. static void __devinit cciss_procinit(ctlr_info_t *h)
  491. {
  492. struct proc_dir_entry *pde;
  493. if (proc_cciss == NULL)
  494. proc_cciss = proc_mkdir("driver/cciss", NULL);
  495. if (!proc_cciss)
  496. return;
  497. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  498. S_IROTH, proc_cciss,
  499. &cciss_proc_fops, h);
  500. }
  501. #endif /* CONFIG_PROC_FS */
  502. #define MAX_PRODUCT_NAME_LEN 19
  503. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  504. #define to_drv(n) container_of(n, drive_info_struct, dev)
  505. static ssize_t host_store_rescan(struct device *dev,
  506. struct device_attribute *attr,
  507. const char *buf, size_t count)
  508. {
  509. struct ctlr_info *h = to_hba(dev);
  510. add_to_scan_list(h);
  511. wake_up_process(cciss_scan_thread);
  512. wait_for_completion_interruptible(&h->scan_wait);
  513. return count;
  514. }
  515. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  516. static ssize_t dev_show_unique_id(struct device *dev,
  517. struct device_attribute *attr,
  518. char *buf)
  519. {
  520. drive_info_struct *drv = to_drv(dev);
  521. struct ctlr_info *h = to_hba(drv->dev.parent);
  522. __u8 sn[16];
  523. unsigned long flags;
  524. int ret = 0;
  525. spin_lock_irqsave(&h->lock, flags);
  526. if (h->busy_configuring)
  527. ret = -EBUSY;
  528. else
  529. memcpy(sn, drv->serial_no, sizeof(sn));
  530. spin_unlock_irqrestore(&h->lock, flags);
  531. if (ret)
  532. return ret;
  533. else
  534. return snprintf(buf, 16 * 2 + 2,
  535. "%02X%02X%02X%02X%02X%02X%02X%02X"
  536. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  537. sn[0], sn[1], sn[2], sn[3],
  538. sn[4], sn[5], sn[6], sn[7],
  539. sn[8], sn[9], sn[10], sn[11],
  540. sn[12], sn[13], sn[14], sn[15]);
  541. }
  542. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  543. static ssize_t dev_show_vendor(struct device *dev,
  544. struct device_attribute *attr,
  545. char *buf)
  546. {
  547. drive_info_struct *drv = to_drv(dev);
  548. struct ctlr_info *h = to_hba(drv->dev.parent);
  549. char vendor[VENDOR_LEN + 1];
  550. unsigned long flags;
  551. int ret = 0;
  552. spin_lock_irqsave(&h->lock, flags);
  553. if (h->busy_configuring)
  554. ret = -EBUSY;
  555. else
  556. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  557. spin_unlock_irqrestore(&h->lock, flags);
  558. if (ret)
  559. return ret;
  560. else
  561. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  562. }
  563. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  564. static ssize_t dev_show_model(struct device *dev,
  565. struct device_attribute *attr,
  566. char *buf)
  567. {
  568. drive_info_struct *drv = to_drv(dev);
  569. struct ctlr_info *h = to_hba(drv->dev.parent);
  570. char model[MODEL_LEN + 1];
  571. unsigned long flags;
  572. int ret = 0;
  573. spin_lock_irqsave(&h->lock, flags);
  574. if (h->busy_configuring)
  575. ret = -EBUSY;
  576. else
  577. memcpy(model, drv->model, MODEL_LEN + 1);
  578. spin_unlock_irqrestore(&h->lock, flags);
  579. if (ret)
  580. return ret;
  581. else
  582. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  583. }
  584. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  585. static ssize_t dev_show_rev(struct device *dev,
  586. struct device_attribute *attr,
  587. char *buf)
  588. {
  589. drive_info_struct *drv = to_drv(dev);
  590. struct ctlr_info *h = to_hba(drv->dev.parent);
  591. char rev[REV_LEN + 1];
  592. unsigned long flags;
  593. int ret = 0;
  594. spin_lock_irqsave(&h->lock, flags);
  595. if (h->busy_configuring)
  596. ret = -EBUSY;
  597. else
  598. memcpy(rev, drv->rev, REV_LEN + 1);
  599. spin_unlock_irqrestore(&h->lock, flags);
  600. if (ret)
  601. return ret;
  602. else
  603. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  604. }
  605. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  606. static ssize_t cciss_show_lunid(struct device *dev,
  607. struct device_attribute *attr, char *buf)
  608. {
  609. drive_info_struct *drv = to_drv(dev);
  610. struct ctlr_info *h = to_hba(drv->dev.parent);
  611. unsigned long flags;
  612. unsigned char lunid[8];
  613. spin_lock_irqsave(&h->lock, flags);
  614. if (h->busy_configuring) {
  615. spin_unlock_irqrestore(&h->lock, flags);
  616. return -EBUSY;
  617. }
  618. if (!drv->heads) {
  619. spin_unlock_irqrestore(&h->lock, flags);
  620. return -ENOTTY;
  621. }
  622. memcpy(lunid, drv->LunID, sizeof(lunid));
  623. spin_unlock_irqrestore(&h->lock, flags);
  624. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  625. lunid[0], lunid[1], lunid[2], lunid[3],
  626. lunid[4], lunid[5], lunid[6], lunid[7]);
  627. }
  628. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  629. static ssize_t cciss_show_raid_level(struct device *dev,
  630. struct device_attribute *attr, char *buf)
  631. {
  632. drive_info_struct *drv = to_drv(dev);
  633. struct ctlr_info *h = to_hba(drv->dev.parent);
  634. int raid;
  635. unsigned long flags;
  636. spin_lock_irqsave(&h->lock, flags);
  637. if (h->busy_configuring) {
  638. spin_unlock_irqrestore(&h->lock, flags);
  639. return -EBUSY;
  640. }
  641. raid = drv->raid_level;
  642. spin_unlock_irqrestore(&h->lock, flags);
  643. if (raid < 0 || raid > RAID_UNKNOWN)
  644. raid = RAID_UNKNOWN;
  645. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  646. raid_label[raid]);
  647. }
  648. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  649. static ssize_t cciss_show_usage_count(struct device *dev,
  650. struct device_attribute *attr, char *buf)
  651. {
  652. drive_info_struct *drv = to_drv(dev);
  653. struct ctlr_info *h = to_hba(drv->dev.parent);
  654. unsigned long flags;
  655. int count;
  656. spin_lock_irqsave(&h->lock, flags);
  657. if (h->busy_configuring) {
  658. spin_unlock_irqrestore(&h->lock, flags);
  659. return -EBUSY;
  660. }
  661. count = drv->usage_count;
  662. spin_unlock_irqrestore(&h->lock, flags);
  663. return snprintf(buf, 20, "%d\n", count);
  664. }
  665. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  666. static struct attribute *cciss_host_attrs[] = {
  667. &dev_attr_rescan.attr,
  668. NULL
  669. };
  670. static struct attribute_group cciss_host_attr_group = {
  671. .attrs = cciss_host_attrs,
  672. };
  673. static const struct attribute_group *cciss_host_attr_groups[] = {
  674. &cciss_host_attr_group,
  675. NULL
  676. };
  677. static struct device_type cciss_host_type = {
  678. .name = "cciss_host",
  679. .groups = cciss_host_attr_groups,
  680. .release = cciss_hba_release,
  681. };
  682. static struct attribute *cciss_dev_attrs[] = {
  683. &dev_attr_unique_id.attr,
  684. &dev_attr_model.attr,
  685. &dev_attr_vendor.attr,
  686. &dev_attr_rev.attr,
  687. &dev_attr_lunid.attr,
  688. &dev_attr_raid_level.attr,
  689. &dev_attr_usage_count.attr,
  690. NULL
  691. };
  692. static struct attribute_group cciss_dev_attr_group = {
  693. .attrs = cciss_dev_attrs,
  694. };
  695. static const struct attribute_group *cciss_dev_attr_groups[] = {
  696. &cciss_dev_attr_group,
  697. NULL
  698. };
  699. static struct device_type cciss_dev_type = {
  700. .name = "cciss_device",
  701. .groups = cciss_dev_attr_groups,
  702. .release = cciss_device_release,
  703. };
  704. static struct bus_type cciss_bus_type = {
  705. .name = "cciss",
  706. };
  707. /*
  708. * cciss_hba_release is called when the reference count
  709. * of h->dev goes to zero.
  710. */
  711. static void cciss_hba_release(struct device *dev)
  712. {
  713. /*
  714. * nothing to do, but need this to avoid a warning
  715. * about not having a release handler from lib/kref.c.
  716. */
  717. }
  718. /*
  719. * Initialize sysfs entry for each controller. This sets up and registers
  720. * the 'cciss#' directory for each individual controller under
  721. * /sys/bus/pci/devices/<dev>/.
  722. */
  723. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  724. {
  725. device_initialize(&h->dev);
  726. h->dev.type = &cciss_host_type;
  727. h->dev.bus = &cciss_bus_type;
  728. dev_set_name(&h->dev, "%s", h->devname);
  729. h->dev.parent = &h->pdev->dev;
  730. return device_add(&h->dev);
  731. }
  732. /*
  733. * Remove sysfs entries for an hba.
  734. */
  735. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  736. {
  737. device_del(&h->dev);
  738. put_device(&h->dev); /* final put. */
  739. }
  740. /* cciss_device_release is called when the reference count
  741. * of h->drv[x]dev goes to zero.
  742. */
  743. static void cciss_device_release(struct device *dev)
  744. {
  745. drive_info_struct *drv = to_drv(dev);
  746. kfree(drv);
  747. }
  748. /*
  749. * Initialize sysfs for each logical drive. This sets up and registers
  750. * the 'c#d#' directory for each individual logical drive under
  751. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  752. * /sys/block/cciss!c#d# to this entry.
  753. */
  754. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  755. int drv_index)
  756. {
  757. struct device *dev;
  758. if (h->drv[drv_index]->device_initialized)
  759. return 0;
  760. dev = &h->drv[drv_index]->dev;
  761. device_initialize(dev);
  762. dev->type = &cciss_dev_type;
  763. dev->bus = &cciss_bus_type;
  764. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  765. dev->parent = &h->dev;
  766. h->drv[drv_index]->device_initialized = 1;
  767. return device_add(dev);
  768. }
  769. /*
  770. * Remove sysfs entries for a logical drive.
  771. */
  772. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  773. int ctlr_exiting)
  774. {
  775. struct device *dev = &h->drv[drv_index]->dev;
  776. /* special case for c*d0, we only destroy it on controller exit */
  777. if (drv_index == 0 && !ctlr_exiting)
  778. return;
  779. device_del(dev);
  780. put_device(dev); /* the "final" put. */
  781. h->drv[drv_index] = NULL;
  782. }
  783. /*
  784. * For operations that cannot sleep, a command block is allocated at init,
  785. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  786. * which ones are free or in use.
  787. */
  788. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  789. {
  790. CommandList_struct *c;
  791. int i;
  792. u64bit temp64;
  793. dma_addr_t cmd_dma_handle, err_dma_handle;
  794. do {
  795. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  796. if (i == h->nr_cmds)
  797. return NULL;
  798. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  799. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  800. c = h->cmd_pool + i;
  801. memset(c, 0, sizeof(CommandList_struct));
  802. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  803. c->err_info = h->errinfo_pool + i;
  804. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  805. err_dma_handle = h->errinfo_pool_dhandle
  806. + i * sizeof(ErrorInfo_struct);
  807. h->nr_allocs++;
  808. c->cmdindex = i;
  809. INIT_HLIST_NODE(&c->list);
  810. c->busaddr = (__u32) cmd_dma_handle;
  811. temp64.val = (__u64) err_dma_handle;
  812. c->ErrDesc.Addr.lower = temp64.val32.lower;
  813. c->ErrDesc.Addr.upper = temp64.val32.upper;
  814. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  815. c->ctlr = h->ctlr;
  816. return c;
  817. }
  818. /* allocate a command using pci_alloc_consistent, used for ioctls,
  819. * etc., not for the main i/o path.
  820. */
  821. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  822. {
  823. CommandList_struct *c;
  824. u64bit temp64;
  825. dma_addr_t cmd_dma_handle, err_dma_handle;
  826. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  827. sizeof(CommandList_struct), &cmd_dma_handle);
  828. if (c == NULL)
  829. return NULL;
  830. memset(c, 0, sizeof(CommandList_struct));
  831. c->cmdindex = -1;
  832. c->err_info = (ErrorInfo_struct *)
  833. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  834. &err_dma_handle);
  835. if (c->err_info == NULL) {
  836. pci_free_consistent(h->pdev,
  837. sizeof(CommandList_struct), c, cmd_dma_handle);
  838. return NULL;
  839. }
  840. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  841. INIT_HLIST_NODE(&c->list);
  842. c->busaddr = (__u32) cmd_dma_handle;
  843. temp64.val = (__u64) err_dma_handle;
  844. c->ErrDesc.Addr.lower = temp64.val32.lower;
  845. c->ErrDesc.Addr.upper = temp64.val32.upper;
  846. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  847. c->ctlr = h->ctlr;
  848. return c;
  849. }
  850. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  851. {
  852. int i;
  853. i = c - h->cmd_pool;
  854. clear_bit(i & (BITS_PER_LONG - 1),
  855. h->cmd_pool_bits + (i / BITS_PER_LONG));
  856. h->nr_frees++;
  857. }
  858. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  859. {
  860. u64bit temp64;
  861. temp64.val32.lower = c->ErrDesc.Addr.lower;
  862. temp64.val32.upper = c->ErrDesc.Addr.upper;
  863. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  864. c->err_info, (dma_addr_t) temp64.val);
  865. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  866. c, (dma_addr_t) c->busaddr);
  867. }
  868. static inline ctlr_info_t *get_host(struct gendisk *disk)
  869. {
  870. return disk->queue->queuedata;
  871. }
  872. static inline drive_info_struct *get_drv(struct gendisk *disk)
  873. {
  874. return disk->private_data;
  875. }
  876. /*
  877. * Open. Make sure the device is really there.
  878. */
  879. static int cciss_open(struct block_device *bdev, fmode_t mode)
  880. {
  881. ctlr_info_t *h = get_host(bdev->bd_disk);
  882. drive_info_struct *drv = get_drv(bdev->bd_disk);
  883. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  884. if (drv->busy_configuring)
  885. return -EBUSY;
  886. /*
  887. * Root is allowed to open raw volume zero even if it's not configured
  888. * so array config can still work. Root is also allowed to open any
  889. * volume that has a LUN ID, so it can issue IOCTL to reread the
  890. * disk information. I don't think I really like this
  891. * but I'm already using way to many device nodes to claim another one
  892. * for "raw controller".
  893. */
  894. if (drv->heads == 0) {
  895. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  896. /* if not node 0 make sure it is a partition = 0 */
  897. if (MINOR(bdev->bd_dev) & 0x0f) {
  898. return -ENXIO;
  899. /* if it is, make sure we have a LUN ID */
  900. } else if (memcmp(drv->LunID, CTLR_LUNID,
  901. sizeof(drv->LunID))) {
  902. return -ENXIO;
  903. }
  904. }
  905. if (!capable(CAP_SYS_ADMIN))
  906. return -EPERM;
  907. }
  908. drv->usage_count++;
  909. h->usage_count++;
  910. return 0;
  911. }
  912. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  913. {
  914. int ret;
  915. lock_kernel();
  916. ret = cciss_open(bdev, mode);
  917. unlock_kernel();
  918. return ret;
  919. }
  920. /*
  921. * Close. Sync first.
  922. */
  923. static int cciss_release(struct gendisk *disk, fmode_t mode)
  924. {
  925. ctlr_info_t *h;
  926. drive_info_struct *drv;
  927. lock_kernel();
  928. h = get_host(disk);
  929. drv = get_drv(disk);
  930. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  931. drv->usage_count--;
  932. h->usage_count--;
  933. unlock_kernel();
  934. return 0;
  935. }
  936. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  937. unsigned cmd, unsigned long arg)
  938. {
  939. int ret;
  940. lock_kernel();
  941. ret = cciss_ioctl(bdev, mode, cmd, arg);
  942. unlock_kernel();
  943. return ret;
  944. }
  945. #ifdef CONFIG_COMPAT
  946. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  947. unsigned cmd, unsigned long arg);
  948. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  949. unsigned cmd, unsigned long arg);
  950. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  951. unsigned cmd, unsigned long arg)
  952. {
  953. switch (cmd) {
  954. case CCISS_GETPCIINFO:
  955. case CCISS_GETINTINFO:
  956. case CCISS_SETINTINFO:
  957. case CCISS_GETNODENAME:
  958. case CCISS_SETNODENAME:
  959. case CCISS_GETHEARTBEAT:
  960. case CCISS_GETBUSTYPES:
  961. case CCISS_GETFIRMVER:
  962. case CCISS_GETDRIVVER:
  963. case CCISS_REVALIDVOLS:
  964. case CCISS_DEREGDISK:
  965. case CCISS_REGNEWDISK:
  966. case CCISS_REGNEWD:
  967. case CCISS_RESCANDISK:
  968. case CCISS_GETLUNINFO:
  969. return do_ioctl(bdev, mode, cmd, arg);
  970. case CCISS_PASSTHRU32:
  971. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  972. case CCISS_BIG_PASSTHRU32:
  973. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  974. default:
  975. return -ENOIOCTLCMD;
  976. }
  977. }
  978. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  979. unsigned cmd, unsigned long arg)
  980. {
  981. IOCTL32_Command_struct __user *arg32 =
  982. (IOCTL32_Command_struct __user *) arg;
  983. IOCTL_Command_struct arg64;
  984. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  985. int err;
  986. u32 cp;
  987. err = 0;
  988. err |=
  989. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  990. sizeof(arg64.LUN_info));
  991. err |=
  992. copy_from_user(&arg64.Request, &arg32->Request,
  993. sizeof(arg64.Request));
  994. err |=
  995. copy_from_user(&arg64.error_info, &arg32->error_info,
  996. sizeof(arg64.error_info));
  997. err |= get_user(arg64.buf_size, &arg32->buf_size);
  998. err |= get_user(cp, &arg32->buf);
  999. arg64.buf = compat_ptr(cp);
  1000. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1001. if (err)
  1002. return -EFAULT;
  1003. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  1004. if (err)
  1005. return err;
  1006. err |=
  1007. copy_in_user(&arg32->error_info, &p->error_info,
  1008. sizeof(arg32->error_info));
  1009. if (err)
  1010. return -EFAULT;
  1011. return err;
  1012. }
  1013. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  1014. unsigned cmd, unsigned long arg)
  1015. {
  1016. BIG_IOCTL32_Command_struct __user *arg32 =
  1017. (BIG_IOCTL32_Command_struct __user *) arg;
  1018. BIG_IOCTL_Command_struct arg64;
  1019. BIG_IOCTL_Command_struct __user *p =
  1020. compat_alloc_user_space(sizeof(arg64));
  1021. int err;
  1022. u32 cp;
  1023. err = 0;
  1024. err |=
  1025. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  1026. sizeof(arg64.LUN_info));
  1027. err |=
  1028. copy_from_user(&arg64.Request, &arg32->Request,
  1029. sizeof(arg64.Request));
  1030. err |=
  1031. copy_from_user(&arg64.error_info, &arg32->error_info,
  1032. sizeof(arg64.error_info));
  1033. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1034. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1035. err |= get_user(cp, &arg32->buf);
  1036. arg64.buf = compat_ptr(cp);
  1037. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1038. if (err)
  1039. return -EFAULT;
  1040. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1041. if (err)
  1042. return err;
  1043. err |=
  1044. copy_in_user(&arg32->error_info, &p->error_info,
  1045. sizeof(arg32->error_info));
  1046. if (err)
  1047. return -EFAULT;
  1048. return err;
  1049. }
  1050. #endif
  1051. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1052. {
  1053. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1054. if (!drv->cylinders)
  1055. return -ENXIO;
  1056. geo->heads = drv->heads;
  1057. geo->sectors = drv->sectors;
  1058. geo->cylinders = drv->cylinders;
  1059. return 0;
  1060. }
  1061. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1062. {
  1063. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1064. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1065. (void)check_for_unit_attention(h, c);
  1066. }
  1067. static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
  1068. {
  1069. cciss_pci_info_struct pciinfo;
  1070. if (!argp)
  1071. return -EINVAL;
  1072. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1073. pciinfo.bus = h->pdev->bus->number;
  1074. pciinfo.dev_fn = h->pdev->devfn;
  1075. pciinfo.board_id = h->board_id;
  1076. if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1077. return -EFAULT;
  1078. return 0;
  1079. }
  1080. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1081. unsigned int cmd, unsigned long arg)
  1082. {
  1083. struct gendisk *disk = bdev->bd_disk;
  1084. ctlr_info_t *h = get_host(disk);
  1085. drive_info_struct *drv = get_drv(disk);
  1086. void __user *argp = (void __user *)arg;
  1087. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1088. cmd, arg);
  1089. switch (cmd) {
  1090. case CCISS_GETPCIINFO:
  1091. return cciss_getpciinfo(h, argp);
  1092. case CCISS_GETINTINFO:
  1093. {
  1094. cciss_coalint_struct intinfo;
  1095. if (!arg)
  1096. return -EINVAL;
  1097. intinfo.delay =
  1098. readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1099. intinfo.count =
  1100. readl(&h->cfgtable->HostWrite.CoalIntCount);
  1101. if (copy_to_user
  1102. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1103. return -EFAULT;
  1104. return 0;
  1105. }
  1106. case CCISS_SETINTINFO:
  1107. {
  1108. cciss_coalint_struct intinfo;
  1109. unsigned long flags;
  1110. int i;
  1111. if (!arg)
  1112. return -EINVAL;
  1113. if (!capable(CAP_SYS_ADMIN))
  1114. return -EPERM;
  1115. if (copy_from_user
  1116. (&intinfo, argp, sizeof(cciss_coalint_struct)))
  1117. return -EFAULT;
  1118. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1119. return -EINVAL;
  1120. spin_lock_irqsave(&h->lock, flags);
  1121. /* Update the field, and then ring the doorbell */
  1122. writel(intinfo.delay,
  1123. &(h->cfgtable->HostWrite.CoalIntDelay));
  1124. writel(intinfo.count,
  1125. &(h->cfgtable->HostWrite.CoalIntCount));
  1126. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1127. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1128. if (!(readl(h->vaddr + SA5_DOORBELL)
  1129. & CFGTBL_ChangeReq))
  1130. break;
  1131. /* delay and try again */
  1132. udelay(1000);
  1133. }
  1134. spin_unlock_irqrestore(&h->lock, flags);
  1135. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1136. return -EAGAIN;
  1137. return 0;
  1138. }
  1139. case CCISS_GETNODENAME:
  1140. {
  1141. NodeName_type NodeName;
  1142. int i;
  1143. if (!arg)
  1144. return -EINVAL;
  1145. for (i = 0; i < 16; i++)
  1146. NodeName[i] =
  1147. readb(&h->cfgtable->ServerName[i]);
  1148. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1149. return -EFAULT;
  1150. return 0;
  1151. }
  1152. case CCISS_SETNODENAME:
  1153. {
  1154. NodeName_type NodeName;
  1155. unsigned long flags;
  1156. int i;
  1157. if (!arg)
  1158. return -EINVAL;
  1159. if (!capable(CAP_SYS_ADMIN))
  1160. return -EPERM;
  1161. if (copy_from_user
  1162. (NodeName, argp, sizeof(NodeName_type)))
  1163. return -EFAULT;
  1164. spin_lock_irqsave(&h->lock, flags);
  1165. /* Update the field, and then ring the doorbell */
  1166. for (i = 0; i < 16; i++)
  1167. writeb(NodeName[i],
  1168. &h->cfgtable->ServerName[i]);
  1169. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1170. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1171. if (!(readl(h->vaddr + SA5_DOORBELL)
  1172. & CFGTBL_ChangeReq))
  1173. break;
  1174. /* delay and try again */
  1175. udelay(1000);
  1176. }
  1177. spin_unlock_irqrestore(&h->lock, flags);
  1178. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1179. return -EAGAIN;
  1180. return 0;
  1181. }
  1182. case CCISS_GETHEARTBEAT:
  1183. {
  1184. Heartbeat_type heartbeat;
  1185. if (!arg)
  1186. return -EINVAL;
  1187. heartbeat = readl(&h->cfgtable->HeartBeat);
  1188. if (copy_to_user
  1189. (argp, &heartbeat, sizeof(Heartbeat_type)))
  1190. return -EFAULT;
  1191. return 0;
  1192. }
  1193. case CCISS_GETBUSTYPES:
  1194. {
  1195. BusTypes_type BusTypes;
  1196. if (!arg)
  1197. return -EINVAL;
  1198. BusTypes = readl(&h->cfgtable->BusTypes);
  1199. if (copy_to_user
  1200. (argp, &BusTypes, sizeof(BusTypes_type)))
  1201. return -EFAULT;
  1202. return 0;
  1203. }
  1204. case CCISS_GETFIRMVER:
  1205. {
  1206. FirmwareVer_type firmware;
  1207. if (!arg)
  1208. return -EINVAL;
  1209. memcpy(firmware, h->firm_ver, 4);
  1210. if (copy_to_user
  1211. (argp, firmware, sizeof(FirmwareVer_type)))
  1212. return -EFAULT;
  1213. return 0;
  1214. }
  1215. case CCISS_GETDRIVVER:
  1216. {
  1217. DriverVer_type DriverVer = DRIVER_VERSION;
  1218. if (!arg)
  1219. return -EINVAL;
  1220. if (copy_to_user
  1221. (argp, &DriverVer, sizeof(DriverVer_type)))
  1222. return -EFAULT;
  1223. return 0;
  1224. }
  1225. case CCISS_DEREGDISK:
  1226. case CCISS_REGNEWD:
  1227. case CCISS_REVALIDVOLS:
  1228. return rebuild_lun_table(h, 0, 1);
  1229. case CCISS_GETLUNINFO:{
  1230. LogvolInfo_struct luninfo;
  1231. memcpy(&luninfo.LunID, drv->LunID,
  1232. sizeof(luninfo.LunID));
  1233. luninfo.num_opens = drv->usage_count;
  1234. luninfo.num_parts = 0;
  1235. if (copy_to_user(argp, &luninfo,
  1236. sizeof(LogvolInfo_struct)))
  1237. return -EFAULT;
  1238. return 0;
  1239. }
  1240. case CCISS_PASSTHRU:
  1241. {
  1242. IOCTL_Command_struct iocommand;
  1243. CommandList_struct *c;
  1244. char *buff = NULL;
  1245. u64bit temp64;
  1246. DECLARE_COMPLETION_ONSTACK(wait);
  1247. if (!arg)
  1248. return -EINVAL;
  1249. if (!capable(CAP_SYS_RAWIO))
  1250. return -EPERM;
  1251. if (copy_from_user
  1252. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1253. return -EFAULT;
  1254. if ((iocommand.buf_size < 1) &&
  1255. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1256. return -EINVAL;
  1257. }
  1258. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  1259. /* Check kmalloc limits */
  1260. if (iocommand.buf_size > 128000)
  1261. return -EINVAL;
  1262. #endif
  1263. if (iocommand.buf_size > 0) {
  1264. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1265. if (buff == NULL)
  1266. return -EFAULT;
  1267. }
  1268. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1269. /* Copy the data into the buffer we created */
  1270. if (copy_from_user
  1271. (buff, iocommand.buf, iocommand.buf_size)) {
  1272. kfree(buff);
  1273. return -EFAULT;
  1274. }
  1275. } else {
  1276. memset(buff, 0, iocommand.buf_size);
  1277. }
  1278. c = cmd_special_alloc(h);
  1279. if (!c) {
  1280. kfree(buff);
  1281. return -ENOMEM;
  1282. }
  1283. /* Fill in the command type */
  1284. c->cmd_type = CMD_IOCTL_PEND;
  1285. /* Fill in Command Header */
  1286. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1287. if (iocommand.buf_size > 0) /* buffer to fill */
  1288. {
  1289. c->Header.SGList = 1;
  1290. c->Header.SGTotal = 1;
  1291. } else /* no buffers to fill */
  1292. {
  1293. c->Header.SGList = 0;
  1294. c->Header.SGTotal = 0;
  1295. }
  1296. c->Header.LUN = iocommand.LUN_info;
  1297. /* use the kernel address the cmd block for tag */
  1298. c->Header.Tag.lower = c->busaddr;
  1299. /* Fill in Request block */
  1300. c->Request = iocommand.Request;
  1301. /* Fill in the scatter gather information */
  1302. if (iocommand.buf_size > 0) {
  1303. temp64.val = pci_map_single(h->pdev, buff,
  1304. iocommand.buf_size,
  1305. PCI_DMA_BIDIRECTIONAL);
  1306. c->SG[0].Addr.lower = temp64.val32.lower;
  1307. c->SG[0].Addr.upper = temp64.val32.upper;
  1308. c->SG[0].Len = iocommand.buf_size;
  1309. c->SG[0].Ext = 0; /* we are not chaining */
  1310. }
  1311. c->waiting = &wait;
  1312. enqueue_cmd_and_start_io(h, c);
  1313. wait_for_completion(&wait);
  1314. /* unlock the buffers from DMA */
  1315. temp64.val32.lower = c->SG[0].Addr.lower;
  1316. temp64.val32.upper = c->SG[0].Addr.upper;
  1317. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
  1318. iocommand.buf_size,
  1319. PCI_DMA_BIDIRECTIONAL);
  1320. check_ioctl_unit_attention(h, c);
  1321. /* Copy the error information out */
  1322. iocommand.error_info = *(c->err_info);
  1323. if (copy_to_user
  1324. (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1325. kfree(buff);
  1326. cmd_special_free(h, c);
  1327. return -EFAULT;
  1328. }
  1329. if (iocommand.Request.Type.Direction == XFER_READ) {
  1330. /* Copy the data out of the buffer we created */
  1331. if (copy_to_user
  1332. (iocommand.buf, buff, iocommand.buf_size)) {
  1333. kfree(buff);
  1334. cmd_special_free(h, c);
  1335. return -EFAULT;
  1336. }
  1337. }
  1338. kfree(buff);
  1339. cmd_special_free(h, c);
  1340. return 0;
  1341. }
  1342. case CCISS_BIG_PASSTHRU:{
  1343. BIG_IOCTL_Command_struct *ioc;
  1344. CommandList_struct *c;
  1345. unsigned char **buff = NULL;
  1346. int *buff_size = NULL;
  1347. u64bit temp64;
  1348. BYTE sg_used = 0;
  1349. int status = 0;
  1350. int i;
  1351. DECLARE_COMPLETION_ONSTACK(wait);
  1352. __u32 left;
  1353. __u32 sz;
  1354. BYTE __user *data_ptr;
  1355. if (!arg)
  1356. return -EINVAL;
  1357. if (!capable(CAP_SYS_RAWIO))
  1358. return -EPERM;
  1359. ioc = (BIG_IOCTL_Command_struct *)
  1360. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1361. if (!ioc) {
  1362. status = -ENOMEM;
  1363. goto cleanup1;
  1364. }
  1365. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1366. status = -EFAULT;
  1367. goto cleanup1;
  1368. }
  1369. if ((ioc->buf_size < 1) &&
  1370. (ioc->Request.Type.Direction != XFER_NONE)) {
  1371. status = -EINVAL;
  1372. goto cleanup1;
  1373. }
  1374. /* Check kmalloc limits using all SGs */
  1375. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1376. status = -EINVAL;
  1377. goto cleanup1;
  1378. }
  1379. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1380. status = -EINVAL;
  1381. goto cleanup1;
  1382. }
  1383. buff =
  1384. kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1385. if (!buff) {
  1386. status = -ENOMEM;
  1387. goto cleanup1;
  1388. }
  1389. buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
  1390. GFP_KERNEL);
  1391. if (!buff_size) {
  1392. status = -ENOMEM;
  1393. goto cleanup1;
  1394. }
  1395. left = ioc->buf_size;
  1396. data_ptr = ioc->buf;
  1397. while (left) {
  1398. sz = (left >
  1399. ioc->malloc_size) ? ioc->
  1400. malloc_size : left;
  1401. buff_size[sg_used] = sz;
  1402. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1403. if (buff[sg_used] == NULL) {
  1404. status = -ENOMEM;
  1405. goto cleanup1;
  1406. }
  1407. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1408. if (copy_from_user
  1409. (buff[sg_used], data_ptr, sz)) {
  1410. status = -EFAULT;
  1411. goto cleanup1;
  1412. }
  1413. } else {
  1414. memset(buff[sg_used], 0, sz);
  1415. }
  1416. left -= sz;
  1417. data_ptr += sz;
  1418. sg_used++;
  1419. }
  1420. c = cmd_special_alloc(h);
  1421. if (!c) {
  1422. status = -ENOMEM;
  1423. goto cleanup1;
  1424. }
  1425. c->cmd_type = CMD_IOCTL_PEND;
  1426. c->Header.ReplyQueue = 0;
  1427. if (ioc->buf_size > 0) {
  1428. c->Header.SGList = sg_used;
  1429. c->Header.SGTotal = sg_used;
  1430. } else {
  1431. c->Header.SGList = 0;
  1432. c->Header.SGTotal = 0;
  1433. }
  1434. c->Header.LUN = ioc->LUN_info;
  1435. c->Header.Tag.lower = c->busaddr;
  1436. c->Request = ioc->Request;
  1437. if (ioc->buf_size > 0) {
  1438. for (i = 0; i < sg_used; i++) {
  1439. temp64.val =
  1440. pci_map_single(h->pdev, buff[i],
  1441. buff_size[i],
  1442. PCI_DMA_BIDIRECTIONAL);
  1443. c->SG[i].Addr.lower =
  1444. temp64.val32.lower;
  1445. c->SG[i].Addr.upper =
  1446. temp64.val32.upper;
  1447. c->SG[i].Len = buff_size[i];
  1448. c->SG[i].Ext = 0; /* we are not chaining */
  1449. }
  1450. }
  1451. c->waiting = &wait;
  1452. enqueue_cmd_and_start_io(h, c);
  1453. wait_for_completion(&wait);
  1454. /* unlock the buffers from DMA */
  1455. for (i = 0; i < sg_used; i++) {
  1456. temp64.val32.lower = c->SG[i].Addr.lower;
  1457. temp64.val32.upper = c->SG[i].Addr.upper;
  1458. pci_unmap_single(h->pdev,
  1459. (dma_addr_t) temp64.val, buff_size[i],
  1460. PCI_DMA_BIDIRECTIONAL);
  1461. }
  1462. check_ioctl_unit_attention(h, c);
  1463. /* Copy the error information out */
  1464. ioc->error_info = *(c->err_info);
  1465. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1466. cmd_special_free(h, c);
  1467. status = -EFAULT;
  1468. goto cleanup1;
  1469. }
  1470. if (ioc->Request.Type.Direction == XFER_READ) {
  1471. /* Copy the data out of the buffer we created */
  1472. BYTE __user *ptr = ioc->buf;
  1473. for (i = 0; i < sg_used; i++) {
  1474. if (copy_to_user
  1475. (ptr, buff[i], buff_size[i])) {
  1476. cmd_special_free(h, c);
  1477. status = -EFAULT;
  1478. goto cleanup1;
  1479. }
  1480. ptr += buff_size[i];
  1481. }
  1482. }
  1483. cmd_special_free(h, c);
  1484. status = 0;
  1485. cleanup1:
  1486. if (buff) {
  1487. for (i = 0; i < sg_used; i++)
  1488. kfree(buff[i]);
  1489. kfree(buff);
  1490. }
  1491. kfree(buff_size);
  1492. kfree(ioc);
  1493. return status;
  1494. }
  1495. /* scsi_cmd_ioctl handles these, below, though some are not */
  1496. /* very meaningful for cciss. SG_IO is the main one people want. */
  1497. case SG_GET_VERSION_NUM:
  1498. case SG_SET_TIMEOUT:
  1499. case SG_GET_TIMEOUT:
  1500. case SG_GET_RESERVED_SIZE:
  1501. case SG_SET_RESERVED_SIZE:
  1502. case SG_EMULATED_HOST:
  1503. case SG_IO:
  1504. case SCSI_IOCTL_SEND_COMMAND:
  1505. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1506. /* scsi_cmd_ioctl would normally handle these, below, but */
  1507. /* they aren't a good fit for cciss, as CD-ROMs are */
  1508. /* not supported, and we don't have any bus/target/lun */
  1509. /* which we present to the kernel. */
  1510. case CDROM_SEND_PACKET:
  1511. case CDROMCLOSETRAY:
  1512. case CDROMEJECT:
  1513. case SCSI_IOCTL_GET_IDLUN:
  1514. case SCSI_IOCTL_GET_BUS_NUMBER:
  1515. default:
  1516. return -ENOTTY;
  1517. }
  1518. }
  1519. static void cciss_check_queues(ctlr_info_t *h)
  1520. {
  1521. int start_queue = h->next_to_run;
  1522. int i;
  1523. /* check to see if we have maxed out the number of commands that can
  1524. * be placed on the queue. If so then exit. We do this check here
  1525. * in case the interrupt we serviced was from an ioctl and did not
  1526. * free any new commands.
  1527. */
  1528. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1529. return;
  1530. /* We have room on the queue for more commands. Now we need to queue
  1531. * them up. We will also keep track of the next queue to run so
  1532. * that every queue gets a chance to be started first.
  1533. */
  1534. for (i = 0; i < h->highest_lun + 1; i++) {
  1535. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1536. /* make sure the disk has been added and the drive is real
  1537. * because this can be called from the middle of init_one.
  1538. */
  1539. if (!h->drv[curr_queue])
  1540. continue;
  1541. if (!(h->drv[curr_queue]->queue) ||
  1542. !(h->drv[curr_queue]->heads))
  1543. continue;
  1544. blk_start_queue(h->gendisk[curr_queue]->queue);
  1545. /* check to see if we have maxed out the number of commands
  1546. * that can be placed on the queue.
  1547. */
  1548. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1549. if (curr_queue == start_queue) {
  1550. h->next_to_run =
  1551. (start_queue + 1) % (h->highest_lun + 1);
  1552. break;
  1553. } else {
  1554. h->next_to_run = curr_queue;
  1555. break;
  1556. }
  1557. }
  1558. }
  1559. }
  1560. static void cciss_softirq_done(struct request *rq)
  1561. {
  1562. CommandList_struct *c = rq->completion_data;
  1563. ctlr_info_t *h = hba[c->ctlr];
  1564. SGDescriptor_struct *curr_sg = c->SG;
  1565. u64bit temp64;
  1566. unsigned long flags;
  1567. int i, ddir;
  1568. int sg_index = 0;
  1569. if (c->Request.Type.Direction == XFER_READ)
  1570. ddir = PCI_DMA_FROMDEVICE;
  1571. else
  1572. ddir = PCI_DMA_TODEVICE;
  1573. /* command did not need to be retried */
  1574. /* unmap the DMA mapping for all the scatter gather elements */
  1575. for (i = 0; i < c->Header.SGList; i++) {
  1576. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1577. cciss_unmap_sg_chain_block(h, c);
  1578. /* Point to the next block */
  1579. curr_sg = h->cmd_sg_list[c->cmdindex];
  1580. sg_index = 0;
  1581. }
  1582. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1583. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1584. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1585. ddir);
  1586. ++sg_index;
  1587. }
  1588. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1589. /* set the residual count for pc requests */
  1590. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1591. rq->resid_len = c->err_info->ResidualCnt;
  1592. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1593. spin_lock_irqsave(&h->lock, flags);
  1594. cmd_free(h, c);
  1595. cciss_check_queues(h);
  1596. spin_unlock_irqrestore(&h->lock, flags);
  1597. }
  1598. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1599. unsigned char scsi3addr[], uint32_t log_unit)
  1600. {
  1601. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1602. sizeof(h->drv[log_unit]->LunID));
  1603. }
  1604. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1605. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1606. * they cannot be read.
  1607. */
  1608. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1609. char *vendor, char *model, char *rev)
  1610. {
  1611. int rc;
  1612. InquiryData_struct *inq_buf;
  1613. unsigned char scsi3addr[8];
  1614. *vendor = '\0';
  1615. *model = '\0';
  1616. *rev = '\0';
  1617. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1618. if (!inq_buf)
  1619. return;
  1620. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1621. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1622. scsi3addr, TYPE_CMD);
  1623. if (rc == IO_OK) {
  1624. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1625. vendor[VENDOR_LEN] = '\0';
  1626. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1627. model[MODEL_LEN] = '\0';
  1628. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1629. rev[REV_LEN] = '\0';
  1630. }
  1631. kfree(inq_buf);
  1632. return;
  1633. }
  1634. /* This function gets the serial number of a logical drive via
  1635. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1636. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1637. * are returned instead.
  1638. */
  1639. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1640. unsigned char *serial_no, int buflen)
  1641. {
  1642. #define PAGE_83_INQ_BYTES 64
  1643. int rc;
  1644. unsigned char *buf;
  1645. unsigned char scsi3addr[8];
  1646. if (buflen > 16)
  1647. buflen = 16;
  1648. memset(serial_no, 0xff, buflen);
  1649. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1650. if (!buf)
  1651. return;
  1652. memset(serial_no, 0, buflen);
  1653. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1654. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1655. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1656. if (rc == IO_OK)
  1657. memcpy(serial_no, &buf[8], buflen);
  1658. kfree(buf);
  1659. return;
  1660. }
  1661. /*
  1662. * cciss_add_disk sets up the block device queue for a logical drive
  1663. */
  1664. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1665. int drv_index)
  1666. {
  1667. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1668. if (!disk->queue)
  1669. goto init_queue_failure;
  1670. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1671. disk->major = h->major;
  1672. disk->first_minor = drv_index << NWD_SHIFT;
  1673. disk->fops = &cciss_fops;
  1674. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1675. goto cleanup_queue;
  1676. disk->private_data = h->drv[drv_index];
  1677. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1678. /* Set up queue information */
  1679. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1680. /* This is a hardware imposed limit. */
  1681. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1682. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1683. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1684. disk->queue->queuedata = h;
  1685. blk_queue_logical_block_size(disk->queue,
  1686. h->drv[drv_index]->block_size);
  1687. /* Make sure all queue data is written out before */
  1688. /* setting h->drv[drv_index]->queue, as setting this */
  1689. /* allows the interrupt handler to start the queue */
  1690. wmb();
  1691. h->drv[drv_index]->queue = disk->queue;
  1692. add_disk(disk);
  1693. return 0;
  1694. cleanup_queue:
  1695. blk_cleanup_queue(disk->queue);
  1696. disk->queue = NULL;
  1697. init_queue_failure:
  1698. return -1;
  1699. }
  1700. /* This function will check the usage_count of the drive to be updated/added.
  1701. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1702. * the drive's capacity, geometry, or serial number has changed,
  1703. * then the drive information will be updated and the disk will be
  1704. * re-registered with the kernel. If these conditions don't hold,
  1705. * then it will be left alone for the next reboot. The exception to this
  1706. * is disk 0 which will always be left registered with the kernel since it
  1707. * is also the controller node. Any changes to disk 0 will show up on
  1708. * the next reboot.
  1709. */
  1710. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1711. int first_time, int via_ioctl)
  1712. {
  1713. struct gendisk *disk;
  1714. InquiryData_struct *inq_buff = NULL;
  1715. unsigned int block_size;
  1716. sector_t total_size;
  1717. unsigned long flags = 0;
  1718. int ret = 0;
  1719. drive_info_struct *drvinfo;
  1720. /* Get information about the disk and modify the driver structure */
  1721. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1722. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1723. if (inq_buff == NULL || drvinfo == NULL)
  1724. goto mem_msg;
  1725. /* testing to see if 16-byte CDBs are already being used */
  1726. if (h->cciss_read == CCISS_READ_16) {
  1727. cciss_read_capacity_16(h, drv_index,
  1728. &total_size, &block_size);
  1729. } else {
  1730. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1731. /* if read_capacity returns all F's this volume is >2TB */
  1732. /* in size so we switch to 16-byte CDB's for all */
  1733. /* read/write ops */
  1734. if (total_size == 0xFFFFFFFFULL) {
  1735. cciss_read_capacity_16(h, drv_index,
  1736. &total_size, &block_size);
  1737. h->cciss_read = CCISS_READ_16;
  1738. h->cciss_write = CCISS_WRITE_16;
  1739. } else {
  1740. h->cciss_read = CCISS_READ_10;
  1741. h->cciss_write = CCISS_WRITE_10;
  1742. }
  1743. }
  1744. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1745. inq_buff, drvinfo);
  1746. drvinfo->block_size = block_size;
  1747. drvinfo->nr_blocks = total_size + 1;
  1748. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1749. drvinfo->model, drvinfo->rev);
  1750. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1751. sizeof(drvinfo->serial_no));
  1752. /* Save the lunid in case we deregister the disk, below. */
  1753. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1754. sizeof(drvinfo->LunID));
  1755. /* Is it the same disk we already know, and nothing's changed? */
  1756. if (h->drv[drv_index]->raid_level != -1 &&
  1757. ((memcmp(drvinfo->serial_no,
  1758. h->drv[drv_index]->serial_no, 16) == 0) &&
  1759. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1760. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1761. drvinfo->heads == h->drv[drv_index]->heads &&
  1762. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1763. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1764. /* The disk is unchanged, nothing to update */
  1765. goto freeret;
  1766. /* If we get here it's not the same disk, or something's changed,
  1767. * so we need to * deregister it, and re-register it, if it's not
  1768. * in use.
  1769. * If the disk already exists then deregister it before proceeding
  1770. * (unless it's the first disk (for the controller node).
  1771. */
  1772. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1773. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1774. spin_lock_irqsave(&h->lock, flags);
  1775. h->drv[drv_index]->busy_configuring = 1;
  1776. spin_unlock_irqrestore(&h->lock, flags);
  1777. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1778. * which keeps the interrupt handler from starting
  1779. * the queue.
  1780. */
  1781. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1782. }
  1783. /* If the disk is in use return */
  1784. if (ret)
  1785. goto freeret;
  1786. /* Save the new information from cciss_geometry_inquiry
  1787. * and serial number inquiry. If the disk was deregistered
  1788. * above, then h->drv[drv_index] will be NULL.
  1789. */
  1790. if (h->drv[drv_index] == NULL) {
  1791. drvinfo->device_initialized = 0;
  1792. h->drv[drv_index] = drvinfo;
  1793. drvinfo = NULL; /* so it won't be freed below. */
  1794. } else {
  1795. /* special case for cxd0 */
  1796. h->drv[drv_index]->block_size = drvinfo->block_size;
  1797. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1798. h->drv[drv_index]->heads = drvinfo->heads;
  1799. h->drv[drv_index]->sectors = drvinfo->sectors;
  1800. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1801. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1802. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1803. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1804. VENDOR_LEN + 1);
  1805. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1806. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1807. }
  1808. ++h->num_luns;
  1809. disk = h->gendisk[drv_index];
  1810. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1811. /* If it's not disk 0 (drv_index != 0)
  1812. * or if it was disk 0, but there was previously
  1813. * no actual corresponding configured logical drive
  1814. * (raid_leve == -1) then we want to update the
  1815. * logical drive's information.
  1816. */
  1817. if (drv_index || first_time) {
  1818. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1819. cciss_free_gendisk(h, drv_index);
  1820. cciss_free_drive_info(h, drv_index);
  1821. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1822. drv_index);
  1823. --h->num_luns;
  1824. }
  1825. }
  1826. freeret:
  1827. kfree(inq_buff);
  1828. kfree(drvinfo);
  1829. return;
  1830. mem_msg:
  1831. dev_err(&h->pdev->dev, "out of memory\n");
  1832. goto freeret;
  1833. }
  1834. /* This function will find the first index of the controllers drive array
  1835. * that has a null drv pointer and allocate the drive info struct and
  1836. * will return that index This is where new drives will be added.
  1837. * If the index to be returned is greater than the highest_lun index for
  1838. * the controller then highest_lun is set * to this new index.
  1839. * If there are no available indexes or if tha allocation fails, then -1
  1840. * is returned. * "controller_node" is used to know if this is a real
  1841. * logical drive, or just the controller node, which determines if this
  1842. * counts towards highest_lun.
  1843. */
  1844. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1845. {
  1846. int i;
  1847. drive_info_struct *drv;
  1848. /* Search for an empty slot for our drive info */
  1849. for (i = 0; i < CISS_MAX_LUN; i++) {
  1850. /* if not cxd0 case, and it's occupied, skip it. */
  1851. if (h->drv[i] && i != 0)
  1852. continue;
  1853. /*
  1854. * If it's cxd0 case, and drv is alloc'ed already, and a
  1855. * disk is configured there, skip it.
  1856. */
  1857. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1858. continue;
  1859. /*
  1860. * We've found an empty slot. Update highest_lun
  1861. * provided this isn't just the fake cxd0 controller node.
  1862. */
  1863. if (i > h->highest_lun && !controller_node)
  1864. h->highest_lun = i;
  1865. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1866. if (i == 0 && h->drv[i] != NULL)
  1867. return i;
  1868. /*
  1869. * Found an empty slot, not already alloc'ed. Allocate it.
  1870. * Mark it with raid_level == -1, so we know it's new later on.
  1871. */
  1872. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1873. if (!drv)
  1874. return -1;
  1875. drv->raid_level = -1; /* so we know it's new */
  1876. h->drv[i] = drv;
  1877. return i;
  1878. }
  1879. return -1;
  1880. }
  1881. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1882. {
  1883. kfree(h->drv[drv_index]);
  1884. h->drv[drv_index] = NULL;
  1885. }
  1886. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1887. {
  1888. put_disk(h->gendisk[drv_index]);
  1889. h->gendisk[drv_index] = NULL;
  1890. }
  1891. /* cciss_add_gendisk finds a free hba[]->drv structure
  1892. * and allocates a gendisk if needed, and sets the lunid
  1893. * in the drvinfo structure. It returns the index into
  1894. * the ->drv[] array, or -1 if none are free.
  1895. * is_controller_node indicates whether highest_lun should
  1896. * count this disk, or if it's only being added to provide
  1897. * a means to talk to the controller in case no logical
  1898. * drives have yet been configured.
  1899. */
  1900. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1901. int controller_node)
  1902. {
  1903. int drv_index;
  1904. drv_index = cciss_alloc_drive_info(h, controller_node);
  1905. if (drv_index == -1)
  1906. return -1;
  1907. /*Check if the gendisk needs to be allocated */
  1908. if (!h->gendisk[drv_index]) {
  1909. h->gendisk[drv_index] =
  1910. alloc_disk(1 << NWD_SHIFT);
  1911. if (!h->gendisk[drv_index]) {
  1912. dev_err(&h->pdev->dev,
  1913. "could not allocate a new disk %d\n",
  1914. drv_index);
  1915. goto err_free_drive_info;
  1916. }
  1917. }
  1918. memcpy(h->drv[drv_index]->LunID, lunid,
  1919. sizeof(h->drv[drv_index]->LunID));
  1920. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1921. goto err_free_disk;
  1922. /* Don't need to mark this busy because nobody */
  1923. /* else knows about this disk yet to contend */
  1924. /* for access to it. */
  1925. h->drv[drv_index]->busy_configuring = 0;
  1926. wmb();
  1927. return drv_index;
  1928. err_free_disk:
  1929. cciss_free_gendisk(h, drv_index);
  1930. err_free_drive_info:
  1931. cciss_free_drive_info(h, drv_index);
  1932. return -1;
  1933. }
  1934. /* This is for the special case of a controller which
  1935. * has no logical drives. In this case, we still need
  1936. * to register a disk so the controller can be accessed
  1937. * by the Array Config Utility.
  1938. */
  1939. static void cciss_add_controller_node(ctlr_info_t *h)
  1940. {
  1941. struct gendisk *disk;
  1942. int drv_index;
  1943. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1944. return;
  1945. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1946. if (drv_index == -1)
  1947. goto error;
  1948. h->drv[drv_index]->block_size = 512;
  1949. h->drv[drv_index]->nr_blocks = 0;
  1950. h->drv[drv_index]->heads = 0;
  1951. h->drv[drv_index]->sectors = 0;
  1952. h->drv[drv_index]->cylinders = 0;
  1953. h->drv[drv_index]->raid_level = -1;
  1954. memset(h->drv[drv_index]->serial_no, 0, 16);
  1955. disk = h->gendisk[drv_index];
  1956. if (cciss_add_disk(h, disk, drv_index) == 0)
  1957. return;
  1958. cciss_free_gendisk(h, drv_index);
  1959. cciss_free_drive_info(h, drv_index);
  1960. error:
  1961. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1962. return;
  1963. }
  1964. /* This function will add and remove logical drives from the Logical
  1965. * drive array of the controller and maintain persistency of ordering
  1966. * so that mount points are preserved until the next reboot. This allows
  1967. * for the removal of logical drives in the middle of the drive array
  1968. * without a re-ordering of those drives.
  1969. * INPUT
  1970. * h = The controller to perform the operations on
  1971. */
  1972. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1973. int via_ioctl)
  1974. {
  1975. int num_luns;
  1976. ReportLunData_struct *ld_buff = NULL;
  1977. int return_code;
  1978. int listlength = 0;
  1979. int i;
  1980. int drv_found;
  1981. int drv_index = 0;
  1982. unsigned char lunid[8] = CTLR_LUNID;
  1983. unsigned long flags;
  1984. if (!capable(CAP_SYS_RAWIO))
  1985. return -EPERM;
  1986. /* Set busy_configuring flag for this operation */
  1987. spin_lock_irqsave(&h->lock, flags);
  1988. if (h->busy_configuring) {
  1989. spin_unlock_irqrestore(&h->lock, flags);
  1990. return -EBUSY;
  1991. }
  1992. h->busy_configuring = 1;
  1993. spin_unlock_irqrestore(&h->lock, flags);
  1994. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1995. if (ld_buff == NULL)
  1996. goto mem_msg;
  1997. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  1998. sizeof(ReportLunData_struct),
  1999. 0, CTLR_LUNID, TYPE_CMD);
  2000. if (return_code == IO_OK)
  2001. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  2002. else { /* reading number of logical volumes failed */
  2003. dev_warn(&h->pdev->dev,
  2004. "report logical volume command failed\n");
  2005. listlength = 0;
  2006. goto freeret;
  2007. }
  2008. num_luns = listlength / 8; /* 8 bytes per entry */
  2009. if (num_luns > CISS_MAX_LUN) {
  2010. num_luns = CISS_MAX_LUN;
  2011. dev_warn(&h->pdev->dev, "more luns configured"
  2012. " on controller than can be handled by"
  2013. " this driver.\n");
  2014. }
  2015. if (num_luns == 0)
  2016. cciss_add_controller_node(h);
  2017. /* Compare controller drive array to driver's drive array
  2018. * to see if any drives are missing on the controller due
  2019. * to action of Array Config Utility (user deletes drive)
  2020. * and deregister logical drives which have disappeared.
  2021. */
  2022. for (i = 0; i <= h->highest_lun; i++) {
  2023. int j;
  2024. drv_found = 0;
  2025. /* skip holes in the array from already deleted drives */
  2026. if (h->drv[i] == NULL)
  2027. continue;
  2028. for (j = 0; j < num_luns; j++) {
  2029. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  2030. if (memcmp(h->drv[i]->LunID, lunid,
  2031. sizeof(lunid)) == 0) {
  2032. drv_found = 1;
  2033. break;
  2034. }
  2035. }
  2036. if (!drv_found) {
  2037. /* Deregister it from the OS, it's gone. */
  2038. spin_lock_irqsave(&h->lock, flags);
  2039. h->drv[i]->busy_configuring = 1;
  2040. spin_unlock_irqrestore(&h->lock, flags);
  2041. return_code = deregister_disk(h, i, 1, via_ioctl);
  2042. if (h->drv[i] != NULL)
  2043. h->drv[i]->busy_configuring = 0;
  2044. }
  2045. }
  2046. /* Compare controller drive array to driver's drive array.
  2047. * Check for updates in the drive information and any new drives
  2048. * on the controller due to ACU adding logical drives, or changing
  2049. * a logical drive's size, etc. Reregister any new/changed drives
  2050. */
  2051. for (i = 0; i < num_luns; i++) {
  2052. int j;
  2053. drv_found = 0;
  2054. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2055. /* Find if the LUN is already in the drive array
  2056. * of the driver. If so then update its info
  2057. * if not in use. If it does not exist then find
  2058. * the first free index and add it.
  2059. */
  2060. for (j = 0; j <= h->highest_lun; j++) {
  2061. if (h->drv[j] != NULL &&
  2062. memcmp(h->drv[j]->LunID, lunid,
  2063. sizeof(h->drv[j]->LunID)) == 0) {
  2064. drv_index = j;
  2065. drv_found = 1;
  2066. break;
  2067. }
  2068. }
  2069. /* check if the drive was found already in the array */
  2070. if (!drv_found) {
  2071. drv_index = cciss_add_gendisk(h, lunid, 0);
  2072. if (drv_index == -1)
  2073. goto freeret;
  2074. }
  2075. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2076. } /* end for */
  2077. freeret:
  2078. kfree(ld_buff);
  2079. h->busy_configuring = 0;
  2080. /* We return -1 here to tell the ACU that we have registered/updated
  2081. * all of the drives that we can and to keep it from calling us
  2082. * additional times.
  2083. */
  2084. return -1;
  2085. mem_msg:
  2086. dev_err(&h->pdev->dev, "out of memory\n");
  2087. h->busy_configuring = 0;
  2088. goto freeret;
  2089. }
  2090. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2091. {
  2092. /* zero out the disk size info */
  2093. drive_info->nr_blocks = 0;
  2094. drive_info->block_size = 0;
  2095. drive_info->heads = 0;
  2096. drive_info->sectors = 0;
  2097. drive_info->cylinders = 0;
  2098. drive_info->raid_level = -1;
  2099. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2100. memset(drive_info->model, 0, sizeof(drive_info->model));
  2101. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2102. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2103. /*
  2104. * don't clear the LUNID though, we need to remember which
  2105. * one this one is.
  2106. */
  2107. }
  2108. /* This function will deregister the disk and it's queue from the
  2109. * kernel. It must be called with the controller lock held and the
  2110. * drv structures busy_configuring flag set. It's parameters are:
  2111. *
  2112. * disk = This is the disk to be deregistered
  2113. * drv = This is the drive_info_struct associated with the disk to be
  2114. * deregistered. It contains information about the disk used
  2115. * by the driver.
  2116. * clear_all = This flag determines whether or not the disk information
  2117. * is going to be completely cleared out and the highest_lun
  2118. * reset. Sometimes we want to clear out information about
  2119. * the disk in preparation for re-adding it. In this case
  2120. * the highest_lun should be left unchanged and the LunID
  2121. * should not be cleared.
  2122. * via_ioctl
  2123. * This indicates whether we've reached this path via ioctl.
  2124. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2125. * If this path is reached via ioctl(), then the max_usage_count will
  2126. * be 1, as the process calling ioctl() has got to have the device open.
  2127. * If we get here via sysfs, then the max usage count will be zero.
  2128. */
  2129. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2130. int clear_all, int via_ioctl)
  2131. {
  2132. int i;
  2133. struct gendisk *disk;
  2134. drive_info_struct *drv;
  2135. int recalculate_highest_lun;
  2136. if (!capable(CAP_SYS_RAWIO))
  2137. return -EPERM;
  2138. drv = h->drv[drv_index];
  2139. disk = h->gendisk[drv_index];
  2140. /* make sure logical volume is NOT is use */
  2141. if (clear_all || (h->gendisk[0] == disk)) {
  2142. if (drv->usage_count > via_ioctl)
  2143. return -EBUSY;
  2144. } else if (drv->usage_count > 0)
  2145. return -EBUSY;
  2146. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2147. /* invalidate the devices and deregister the disk. If it is disk
  2148. * zero do not deregister it but just zero out it's values. This
  2149. * allows us to delete disk zero but keep the controller registered.
  2150. */
  2151. if (h->gendisk[0] != disk) {
  2152. struct request_queue *q = disk->queue;
  2153. if (disk->flags & GENHD_FL_UP) {
  2154. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2155. del_gendisk(disk);
  2156. }
  2157. if (q)
  2158. blk_cleanup_queue(q);
  2159. /* If clear_all is set then we are deleting the logical
  2160. * drive, not just refreshing its info. For drives
  2161. * other than disk 0 we will call put_disk. We do not
  2162. * do this for disk 0 as we need it to be able to
  2163. * configure the controller.
  2164. */
  2165. if (clear_all){
  2166. /* This isn't pretty, but we need to find the
  2167. * disk in our array and NULL our the pointer.
  2168. * This is so that we will call alloc_disk if
  2169. * this index is used again later.
  2170. */
  2171. for (i=0; i < CISS_MAX_LUN; i++){
  2172. if (h->gendisk[i] == disk) {
  2173. h->gendisk[i] = NULL;
  2174. break;
  2175. }
  2176. }
  2177. put_disk(disk);
  2178. }
  2179. } else {
  2180. set_capacity(disk, 0);
  2181. cciss_clear_drive_info(drv);
  2182. }
  2183. --h->num_luns;
  2184. /* if it was the last disk, find the new hightest lun */
  2185. if (clear_all && recalculate_highest_lun) {
  2186. int newhighest = -1;
  2187. for (i = 0; i <= h->highest_lun; i++) {
  2188. /* if the disk has size > 0, it is available */
  2189. if (h->drv[i] && h->drv[i]->heads)
  2190. newhighest = i;
  2191. }
  2192. h->highest_lun = newhighest;
  2193. }
  2194. return 0;
  2195. }
  2196. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2197. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2198. int cmd_type)
  2199. {
  2200. u64bit buff_dma_handle;
  2201. int status = IO_OK;
  2202. c->cmd_type = CMD_IOCTL_PEND;
  2203. c->Header.ReplyQueue = 0;
  2204. if (buff != NULL) {
  2205. c->Header.SGList = 1;
  2206. c->Header.SGTotal = 1;
  2207. } else {
  2208. c->Header.SGList = 0;
  2209. c->Header.SGTotal = 0;
  2210. }
  2211. c->Header.Tag.lower = c->busaddr;
  2212. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2213. c->Request.Type.Type = cmd_type;
  2214. if (cmd_type == TYPE_CMD) {
  2215. switch (cmd) {
  2216. case CISS_INQUIRY:
  2217. /* are we trying to read a vital product page */
  2218. if (page_code != 0) {
  2219. c->Request.CDB[1] = 0x01;
  2220. c->Request.CDB[2] = page_code;
  2221. }
  2222. c->Request.CDBLen = 6;
  2223. c->Request.Type.Attribute = ATTR_SIMPLE;
  2224. c->Request.Type.Direction = XFER_READ;
  2225. c->Request.Timeout = 0;
  2226. c->Request.CDB[0] = CISS_INQUIRY;
  2227. c->Request.CDB[4] = size & 0xFF;
  2228. break;
  2229. case CISS_REPORT_LOG:
  2230. case CISS_REPORT_PHYS:
  2231. /* Talking to controller so It's a physical command
  2232. mode = 00 target = 0. Nothing to write.
  2233. */
  2234. c->Request.CDBLen = 12;
  2235. c->Request.Type.Attribute = ATTR_SIMPLE;
  2236. c->Request.Type.Direction = XFER_READ;
  2237. c->Request.Timeout = 0;
  2238. c->Request.CDB[0] = cmd;
  2239. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2240. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2241. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2242. c->Request.CDB[9] = size & 0xFF;
  2243. break;
  2244. case CCISS_READ_CAPACITY:
  2245. c->Request.CDBLen = 10;
  2246. c->Request.Type.Attribute = ATTR_SIMPLE;
  2247. c->Request.Type.Direction = XFER_READ;
  2248. c->Request.Timeout = 0;
  2249. c->Request.CDB[0] = cmd;
  2250. break;
  2251. case CCISS_READ_CAPACITY_16:
  2252. c->Request.CDBLen = 16;
  2253. c->Request.Type.Attribute = ATTR_SIMPLE;
  2254. c->Request.Type.Direction = XFER_READ;
  2255. c->Request.Timeout = 0;
  2256. c->Request.CDB[0] = cmd;
  2257. c->Request.CDB[1] = 0x10;
  2258. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2259. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2260. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2261. c->Request.CDB[13] = size & 0xFF;
  2262. c->Request.Timeout = 0;
  2263. c->Request.CDB[0] = cmd;
  2264. break;
  2265. case CCISS_CACHE_FLUSH:
  2266. c->Request.CDBLen = 12;
  2267. c->Request.Type.Attribute = ATTR_SIMPLE;
  2268. c->Request.Type.Direction = XFER_WRITE;
  2269. c->Request.Timeout = 0;
  2270. c->Request.CDB[0] = BMIC_WRITE;
  2271. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2272. break;
  2273. case TEST_UNIT_READY:
  2274. c->Request.CDBLen = 6;
  2275. c->Request.Type.Attribute = ATTR_SIMPLE;
  2276. c->Request.Type.Direction = XFER_NONE;
  2277. c->Request.Timeout = 0;
  2278. break;
  2279. default:
  2280. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2281. return IO_ERROR;
  2282. }
  2283. } else if (cmd_type == TYPE_MSG) {
  2284. switch (cmd) {
  2285. case 0: /* ABORT message */
  2286. c->Request.CDBLen = 12;
  2287. c->Request.Type.Attribute = ATTR_SIMPLE;
  2288. c->Request.Type.Direction = XFER_WRITE;
  2289. c->Request.Timeout = 0;
  2290. c->Request.CDB[0] = cmd; /* abort */
  2291. c->Request.CDB[1] = 0; /* abort a command */
  2292. /* buff contains the tag of the command to abort */
  2293. memcpy(&c->Request.CDB[4], buff, 8);
  2294. break;
  2295. case 1: /* RESET message */
  2296. c->Request.CDBLen = 16;
  2297. c->Request.Type.Attribute = ATTR_SIMPLE;
  2298. c->Request.Type.Direction = XFER_NONE;
  2299. c->Request.Timeout = 0;
  2300. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2301. c->Request.CDB[0] = cmd; /* reset */
  2302. c->Request.CDB[1] = 0x03; /* reset a target */
  2303. break;
  2304. case 3: /* No-Op message */
  2305. c->Request.CDBLen = 1;
  2306. c->Request.Type.Attribute = ATTR_SIMPLE;
  2307. c->Request.Type.Direction = XFER_WRITE;
  2308. c->Request.Timeout = 0;
  2309. c->Request.CDB[0] = cmd;
  2310. break;
  2311. default:
  2312. dev_warn(&h->pdev->dev,
  2313. "unknown message type %d\n", cmd);
  2314. return IO_ERROR;
  2315. }
  2316. } else {
  2317. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2318. return IO_ERROR;
  2319. }
  2320. /* Fill in the scatter gather information */
  2321. if (size > 0) {
  2322. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2323. buff, size,
  2324. PCI_DMA_BIDIRECTIONAL);
  2325. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2326. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2327. c->SG[0].Len = size;
  2328. c->SG[0].Ext = 0; /* we are not chaining */
  2329. }
  2330. return status;
  2331. }
  2332. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2333. {
  2334. switch (c->err_info->ScsiStatus) {
  2335. case SAM_STAT_GOOD:
  2336. return IO_OK;
  2337. case SAM_STAT_CHECK_CONDITION:
  2338. switch (0xf & c->err_info->SenseInfo[2]) {
  2339. case 0: return IO_OK; /* no sense */
  2340. case 1: return IO_OK; /* recovered error */
  2341. default:
  2342. if (check_for_unit_attention(h, c))
  2343. return IO_NEEDS_RETRY;
  2344. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2345. "check condition, sense key = 0x%02x\n",
  2346. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2347. }
  2348. break;
  2349. default:
  2350. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2351. "scsi status = 0x%02x\n",
  2352. c->Request.CDB[0], c->err_info->ScsiStatus);
  2353. break;
  2354. }
  2355. return IO_ERROR;
  2356. }
  2357. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2358. {
  2359. int return_status = IO_OK;
  2360. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2361. return IO_OK;
  2362. switch (c->err_info->CommandStatus) {
  2363. case CMD_TARGET_STATUS:
  2364. return_status = check_target_status(h, c);
  2365. break;
  2366. case CMD_DATA_UNDERRUN:
  2367. case CMD_DATA_OVERRUN:
  2368. /* expected for inquiry and report lun commands */
  2369. break;
  2370. case CMD_INVALID:
  2371. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2372. "reported invalid\n", c->Request.CDB[0]);
  2373. return_status = IO_ERROR;
  2374. break;
  2375. case CMD_PROTOCOL_ERR:
  2376. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2377. "protocol error\n", c->Request.CDB[0]);
  2378. return_status = IO_ERROR;
  2379. break;
  2380. case CMD_HARDWARE_ERR:
  2381. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2382. " hardware error\n", c->Request.CDB[0]);
  2383. return_status = IO_ERROR;
  2384. break;
  2385. case CMD_CONNECTION_LOST:
  2386. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2387. "connection lost\n", c->Request.CDB[0]);
  2388. return_status = IO_ERROR;
  2389. break;
  2390. case CMD_ABORTED:
  2391. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2392. "aborted\n", c->Request.CDB[0]);
  2393. return_status = IO_ERROR;
  2394. break;
  2395. case CMD_ABORT_FAILED:
  2396. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2397. "abort failed\n", c->Request.CDB[0]);
  2398. return_status = IO_ERROR;
  2399. break;
  2400. case CMD_UNSOLICITED_ABORT:
  2401. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2402. c->Request.CDB[0]);
  2403. return_status = IO_NEEDS_RETRY;
  2404. break;
  2405. default:
  2406. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2407. "unknown status %x\n", c->Request.CDB[0],
  2408. c->err_info->CommandStatus);
  2409. return_status = IO_ERROR;
  2410. }
  2411. return return_status;
  2412. }
  2413. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2414. int attempt_retry)
  2415. {
  2416. DECLARE_COMPLETION_ONSTACK(wait);
  2417. u64bit buff_dma_handle;
  2418. int return_status = IO_OK;
  2419. resend_cmd2:
  2420. c->waiting = &wait;
  2421. enqueue_cmd_and_start_io(h, c);
  2422. wait_for_completion(&wait);
  2423. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2424. goto command_done;
  2425. return_status = process_sendcmd_error(h, c);
  2426. if (return_status == IO_NEEDS_RETRY &&
  2427. c->retry_count < MAX_CMD_RETRIES) {
  2428. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2429. c->Request.CDB[0]);
  2430. c->retry_count++;
  2431. /* erase the old error information */
  2432. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2433. return_status = IO_OK;
  2434. INIT_COMPLETION(wait);
  2435. goto resend_cmd2;
  2436. }
  2437. command_done:
  2438. /* unlock the buffers from DMA */
  2439. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2440. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2441. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2442. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2443. return return_status;
  2444. }
  2445. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2446. __u8 page_code, unsigned char scsi3addr[],
  2447. int cmd_type)
  2448. {
  2449. CommandList_struct *c;
  2450. int return_status;
  2451. c = cmd_special_alloc(h);
  2452. if (!c)
  2453. return -ENOMEM;
  2454. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2455. scsi3addr, cmd_type);
  2456. if (return_status == IO_OK)
  2457. return_status = sendcmd_withirq_core(h, c, 1);
  2458. cmd_special_free(h, c);
  2459. return return_status;
  2460. }
  2461. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2462. sector_t total_size,
  2463. unsigned int block_size,
  2464. InquiryData_struct *inq_buff,
  2465. drive_info_struct *drv)
  2466. {
  2467. int return_code;
  2468. unsigned long t;
  2469. unsigned char scsi3addr[8];
  2470. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2471. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2472. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2473. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2474. if (return_code == IO_OK) {
  2475. if (inq_buff->data_byte[8] == 0xFF) {
  2476. dev_warn(&h->pdev->dev,
  2477. "reading geometry failed, volume "
  2478. "does not support reading geometry\n");
  2479. drv->heads = 255;
  2480. drv->sectors = 32; /* Sectors per track */
  2481. drv->cylinders = total_size + 1;
  2482. drv->raid_level = RAID_UNKNOWN;
  2483. } else {
  2484. drv->heads = inq_buff->data_byte[6];
  2485. drv->sectors = inq_buff->data_byte[7];
  2486. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2487. drv->cylinders += inq_buff->data_byte[5];
  2488. drv->raid_level = inq_buff->data_byte[8];
  2489. }
  2490. drv->block_size = block_size;
  2491. drv->nr_blocks = total_size + 1;
  2492. t = drv->heads * drv->sectors;
  2493. if (t > 1) {
  2494. sector_t real_size = total_size + 1;
  2495. unsigned long rem = sector_div(real_size, t);
  2496. if (rem)
  2497. real_size++;
  2498. drv->cylinders = real_size;
  2499. }
  2500. } else { /* Get geometry failed */
  2501. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2502. }
  2503. }
  2504. static void
  2505. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2506. unsigned int *block_size)
  2507. {
  2508. ReadCapdata_struct *buf;
  2509. int return_code;
  2510. unsigned char scsi3addr[8];
  2511. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2512. if (!buf) {
  2513. dev_warn(&h->pdev->dev, "out of memory\n");
  2514. return;
  2515. }
  2516. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2517. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2518. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2519. if (return_code == IO_OK) {
  2520. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2521. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2522. } else { /* read capacity command failed */
  2523. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2524. *total_size = 0;
  2525. *block_size = BLOCK_SIZE;
  2526. }
  2527. kfree(buf);
  2528. }
  2529. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2530. sector_t *total_size, unsigned int *block_size)
  2531. {
  2532. ReadCapdata_struct_16 *buf;
  2533. int return_code;
  2534. unsigned char scsi3addr[8];
  2535. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2536. if (!buf) {
  2537. dev_warn(&h->pdev->dev, "out of memory\n");
  2538. return;
  2539. }
  2540. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2541. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2542. buf, sizeof(ReadCapdata_struct_16),
  2543. 0, scsi3addr, TYPE_CMD);
  2544. if (return_code == IO_OK) {
  2545. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2546. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2547. } else { /* read capacity command failed */
  2548. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2549. *total_size = 0;
  2550. *block_size = BLOCK_SIZE;
  2551. }
  2552. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2553. (unsigned long long)*total_size+1, *block_size);
  2554. kfree(buf);
  2555. }
  2556. static int cciss_revalidate(struct gendisk *disk)
  2557. {
  2558. ctlr_info_t *h = get_host(disk);
  2559. drive_info_struct *drv = get_drv(disk);
  2560. int logvol;
  2561. int FOUND = 0;
  2562. unsigned int block_size;
  2563. sector_t total_size;
  2564. InquiryData_struct *inq_buff = NULL;
  2565. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2566. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2567. sizeof(drv->LunID)) == 0) {
  2568. FOUND = 1;
  2569. break;
  2570. }
  2571. }
  2572. if (!FOUND)
  2573. return 1;
  2574. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2575. if (inq_buff == NULL) {
  2576. dev_warn(&h->pdev->dev, "out of memory\n");
  2577. return 1;
  2578. }
  2579. if (h->cciss_read == CCISS_READ_10) {
  2580. cciss_read_capacity(h, logvol,
  2581. &total_size, &block_size);
  2582. } else {
  2583. cciss_read_capacity_16(h, logvol,
  2584. &total_size, &block_size);
  2585. }
  2586. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2587. inq_buff, drv);
  2588. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2589. set_capacity(disk, drv->nr_blocks);
  2590. kfree(inq_buff);
  2591. return 0;
  2592. }
  2593. /*
  2594. * Map (physical) PCI mem into (virtual) kernel space
  2595. */
  2596. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2597. {
  2598. ulong page_base = ((ulong) base) & PAGE_MASK;
  2599. ulong page_offs = ((ulong) base) - page_base;
  2600. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2601. return page_remapped ? (page_remapped + page_offs) : NULL;
  2602. }
  2603. /*
  2604. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2605. * the Q to wait for completion.
  2606. */
  2607. static void start_io(ctlr_info_t *h)
  2608. {
  2609. CommandList_struct *c;
  2610. while (!hlist_empty(&h->reqQ)) {
  2611. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2612. /* can't do anything if fifo is full */
  2613. if ((h->access.fifo_full(h))) {
  2614. dev_warn(&h->pdev->dev, "fifo full\n");
  2615. break;
  2616. }
  2617. /* Get the first entry from the Request Q */
  2618. removeQ(c);
  2619. h->Qdepth--;
  2620. /* Tell the controller execute command */
  2621. h->access.submit_command(h, c);
  2622. /* Put job onto the completed Q */
  2623. addQ(&h->cmpQ, c);
  2624. }
  2625. }
  2626. /* Assumes that h->lock is held. */
  2627. /* Zeros out the error record and then resends the command back */
  2628. /* to the controller */
  2629. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2630. {
  2631. /* erase the old error information */
  2632. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2633. /* add it to software queue and then send it to the controller */
  2634. addQ(&h->reqQ, c);
  2635. h->Qdepth++;
  2636. if (h->Qdepth > h->maxQsinceinit)
  2637. h->maxQsinceinit = h->Qdepth;
  2638. start_io(h);
  2639. }
  2640. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2641. unsigned int msg_byte, unsigned int host_byte,
  2642. unsigned int driver_byte)
  2643. {
  2644. /* inverse of macros in scsi.h */
  2645. return (scsi_status_byte & 0xff) |
  2646. ((msg_byte & 0xff) << 8) |
  2647. ((host_byte & 0xff) << 16) |
  2648. ((driver_byte & 0xff) << 24);
  2649. }
  2650. static inline int evaluate_target_status(ctlr_info_t *h,
  2651. CommandList_struct *cmd, int *retry_cmd)
  2652. {
  2653. unsigned char sense_key;
  2654. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2655. int error_value;
  2656. *retry_cmd = 0;
  2657. /* If we get in here, it means we got "target status", that is, scsi status */
  2658. status_byte = cmd->err_info->ScsiStatus;
  2659. driver_byte = DRIVER_OK;
  2660. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2661. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2662. host_byte = DID_PASSTHROUGH;
  2663. else
  2664. host_byte = DID_OK;
  2665. error_value = make_status_bytes(status_byte, msg_byte,
  2666. host_byte, driver_byte);
  2667. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2668. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2669. dev_warn(&h->pdev->dev, "cmd %p "
  2670. "has SCSI Status 0x%x\n",
  2671. cmd, cmd->err_info->ScsiStatus);
  2672. return error_value;
  2673. }
  2674. /* check the sense key */
  2675. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2676. /* no status or recovered error */
  2677. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2678. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2679. error_value = 0;
  2680. if (check_for_unit_attention(h, cmd)) {
  2681. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2682. return 0;
  2683. }
  2684. /* Not SG_IO or similar? */
  2685. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2686. if (error_value != 0)
  2687. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2688. " sense key = 0x%x\n", cmd, sense_key);
  2689. return error_value;
  2690. }
  2691. /* SG_IO or similar, copy sense data back */
  2692. if (cmd->rq->sense) {
  2693. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2694. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2695. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2696. cmd->rq->sense_len);
  2697. } else
  2698. cmd->rq->sense_len = 0;
  2699. return error_value;
  2700. }
  2701. /* checks the status of the job and calls complete buffers to mark all
  2702. * buffers for the completed job. Note that this function does not need
  2703. * to hold the hba/queue lock.
  2704. */
  2705. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2706. int timeout)
  2707. {
  2708. int retry_cmd = 0;
  2709. struct request *rq = cmd->rq;
  2710. rq->errors = 0;
  2711. if (timeout)
  2712. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2713. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2714. goto after_error_processing;
  2715. switch (cmd->err_info->CommandStatus) {
  2716. case CMD_TARGET_STATUS:
  2717. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2718. break;
  2719. case CMD_DATA_UNDERRUN:
  2720. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2721. dev_warn(&h->pdev->dev, "cmd %p has"
  2722. " completed with data underrun "
  2723. "reported\n", cmd);
  2724. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2725. }
  2726. break;
  2727. case CMD_DATA_OVERRUN:
  2728. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2729. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2730. " completed with data overrun "
  2731. "reported\n", cmd);
  2732. break;
  2733. case CMD_INVALID:
  2734. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2735. "reported invalid\n", cmd);
  2736. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2737. cmd->err_info->CommandStatus, DRIVER_OK,
  2738. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2739. DID_PASSTHROUGH : DID_ERROR);
  2740. break;
  2741. case CMD_PROTOCOL_ERR:
  2742. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2743. "protocol error\n", cmd);
  2744. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2745. cmd->err_info->CommandStatus, DRIVER_OK,
  2746. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2747. DID_PASSTHROUGH : DID_ERROR);
  2748. break;
  2749. case CMD_HARDWARE_ERR:
  2750. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2751. " hardware error\n", cmd);
  2752. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2753. cmd->err_info->CommandStatus, DRIVER_OK,
  2754. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2755. DID_PASSTHROUGH : DID_ERROR);
  2756. break;
  2757. case CMD_CONNECTION_LOST:
  2758. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2759. "connection lost\n", cmd);
  2760. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2761. cmd->err_info->CommandStatus, DRIVER_OK,
  2762. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2763. DID_PASSTHROUGH : DID_ERROR);
  2764. break;
  2765. case CMD_ABORTED:
  2766. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2767. "aborted\n", cmd);
  2768. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2769. cmd->err_info->CommandStatus, DRIVER_OK,
  2770. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2771. DID_PASSTHROUGH : DID_ABORT);
  2772. break;
  2773. case CMD_ABORT_FAILED:
  2774. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2775. "abort failed\n", cmd);
  2776. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2777. cmd->err_info->CommandStatus, DRIVER_OK,
  2778. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2779. DID_PASSTHROUGH : DID_ERROR);
  2780. break;
  2781. case CMD_UNSOLICITED_ABORT:
  2782. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2783. "abort %p\n", h->ctlr, cmd);
  2784. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2785. retry_cmd = 1;
  2786. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2787. cmd->retry_count++;
  2788. } else
  2789. dev_warn(&h->pdev->dev,
  2790. "%p retried too many times\n", cmd);
  2791. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2792. cmd->err_info->CommandStatus, DRIVER_OK,
  2793. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2794. DID_PASSTHROUGH : DID_ABORT);
  2795. break;
  2796. case CMD_TIMEOUT:
  2797. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2798. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2799. cmd->err_info->CommandStatus, DRIVER_OK,
  2800. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2801. DID_PASSTHROUGH : DID_ERROR);
  2802. break;
  2803. default:
  2804. dev_warn(&h->pdev->dev, "cmd %p returned "
  2805. "unknown status %x\n", cmd,
  2806. cmd->err_info->CommandStatus);
  2807. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2808. cmd->err_info->CommandStatus, DRIVER_OK,
  2809. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2810. DID_PASSTHROUGH : DID_ERROR);
  2811. }
  2812. after_error_processing:
  2813. /* We need to return this command */
  2814. if (retry_cmd) {
  2815. resend_cciss_cmd(h, cmd);
  2816. return;
  2817. }
  2818. cmd->rq->completion_data = cmd;
  2819. blk_complete_request(cmd->rq);
  2820. }
  2821. static inline u32 cciss_tag_contains_index(u32 tag)
  2822. {
  2823. #define DIRECT_LOOKUP_BIT 0x10
  2824. return tag & DIRECT_LOOKUP_BIT;
  2825. }
  2826. static inline u32 cciss_tag_to_index(u32 tag)
  2827. {
  2828. #define DIRECT_LOOKUP_SHIFT 5
  2829. return tag >> DIRECT_LOOKUP_SHIFT;
  2830. }
  2831. static inline u32 cciss_tag_discard_error_bits(u32 tag)
  2832. {
  2833. #define CCISS_ERROR_BITS 0x03
  2834. return tag & ~CCISS_ERROR_BITS;
  2835. }
  2836. static inline void cciss_mark_tag_indexed(u32 *tag)
  2837. {
  2838. *tag |= DIRECT_LOOKUP_BIT;
  2839. }
  2840. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2841. {
  2842. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2843. }
  2844. /*
  2845. * Get a request and submit it to the controller.
  2846. */
  2847. static void do_cciss_request(struct request_queue *q)
  2848. {
  2849. ctlr_info_t *h = q->queuedata;
  2850. CommandList_struct *c;
  2851. sector_t start_blk;
  2852. int seg;
  2853. struct request *creq;
  2854. u64bit temp64;
  2855. struct scatterlist *tmp_sg;
  2856. SGDescriptor_struct *curr_sg;
  2857. drive_info_struct *drv;
  2858. int i, dir;
  2859. int sg_index = 0;
  2860. int chained = 0;
  2861. /* We call start_io here in case there is a command waiting on the
  2862. * queue that has not been sent.
  2863. */
  2864. if (blk_queue_plugged(q))
  2865. goto startio;
  2866. queue:
  2867. creq = blk_peek_request(q);
  2868. if (!creq)
  2869. goto startio;
  2870. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2871. c = cmd_alloc(h);
  2872. if (!c)
  2873. goto full;
  2874. blk_start_request(creq);
  2875. tmp_sg = h->scatter_list[c->cmdindex];
  2876. spin_unlock_irq(q->queue_lock);
  2877. c->cmd_type = CMD_RWREQ;
  2878. c->rq = creq;
  2879. /* fill in the request */
  2880. drv = creq->rq_disk->private_data;
  2881. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2882. /* got command from pool, so use the command block index instead */
  2883. /* for direct lookups. */
  2884. /* The first 2 bits are reserved for controller error reporting. */
  2885. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2886. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2887. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2888. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2889. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2890. c->Request.Type.Attribute = ATTR_SIMPLE;
  2891. c->Request.Type.Direction =
  2892. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2893. c->Request.Timeout = 0; /* Don't time out */
  2894. c->Request.CDB[0] =
  2895. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2896. start_blk = blk_rq_pos(creq);
  2897. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2898. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2899. sg_init_table(tmp_sg, h->maxsgentries);
  2900. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2901. /* get the DMA records for the setup */
  2902. if (c->Request.Type.Direction == XFER_READ)
  2903. dir = PCI_DMA_FROMDEVICE;
  2904. else
  2905. dir = PCI_DMA_TODEVICE;
  2906. curr_sg = c->SG;
  2907. sg_index = 0;
  2908. chained = 0;
  2909. for (i = 0; i < seg; i++) {
  2910. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2911. !chained && ((seg - i) > 1)) {
  2912. /* Point to next chain block. */
  2913. curr_sg = h->cmd_sg_list[c->cmdindex];
  2914. sg_index = 0;
  2915. chained = 1;
  2916. }
  2917. curr_sg[sg_index].Len = tmp_sg[i].length;
  2918. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2919. tmp_sg[i].offset,
  2920. tmp_sg[i].length, dir);
  2921. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2922. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2923. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2924. ++sg_index;
  2925. }
  2926. if (chained)
  2927. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2928. (seg - (h->max_cmd_sgentries - 1)) *
  2929. sizeof(SGDescriptor_struct));
  2930. /* track how many SG entries we are using */
  2931. if (seg > h->maxSG)
  2932. h->maxSG = seg;
  2933. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2934. "chained[%d]\n",
  2935. blk_rq_sectors(creq), seg, chained);
  2936. c->Header.SGTotal = seg + chained;
  2937. if (seg <= h->max_cmd_sgentries)
  2938. c->Header.SGList = c->Header.SGTotal;
  2939. else
  2940. c->Header.SGList = h->max_cmd_sgentries;
  2941. set_performant_mode(h, c);
  2942. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2943. if(h->cciss_read == CCISS_READ_10) {
  2944. c->Request.CDB[1] = 0;
  2945. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2946. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2947. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2948. c->Request.CDB[5] = start_blk & 0xff;
  2949. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2950. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2951. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2952. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2953. } else {
  2954. u32 upper32 = upper_32_bits(start_blk);
  2955. c->Request.CDBLen = 16;
  2956. c->Request.CDB[1]= 0;
  2957. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2958. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2959. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2960. c->Request.CDB[5]= upper32 & 0xff;
  2961. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2962. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2963. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2964. c->Request.CDB[9]= start_blk & 0xff;
  2965. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2966. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2967. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2968. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2969. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2970. }
  2971. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2972. c->Request.CDBLen = creq->cmd_len;
  2973. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2974. } else {
  2975. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2976. creq->cmd_type);
  2977. BUG();
  2978. }
  2979. spin_lock_irq(q->queue_lock);
  2980. addQ(&h->reqQ, c);
  2981. h->Qdepth++;
  2982. if (h->Qdepth > h->maxQsinceinit)
  2983. h->maxQsinceinit = h->Qdepth;
  2984. goto queue;
  2985. full:
  2986. blk_stop_queue(q);
  2987. startio:
  2988. /* We will already have the driver lock here so not need
  2989. * to lock it.
  2990. */
  2991. start_io(h);
  2992. }
  2993. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2994. {
  2995. return h->access.command_completed(h);
  2996. }
  2997. static inline int interrupt_pending(ctlr_info_t *h)
  2998. {
  2999. return h->access.intr_pending(h);
  3000. }
  3001. static inline long interrupt_not_for_us(ctlr_info_t *h)
  3002. {
  3003. return ((h->access.intr_pending(h) == 0) ||
  3004. (h->interrupts_enabled == 0));
  3005. }
  3006. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  3007. u32 raw_tag)
  3008. {
  3009. if (unlikely(tag_index >= h->nr_cmds)) {
  3010. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3011. return 1;
  3012. }
  3013. return 0;
  3014. }
  3015. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  3016. u32 raw_tag)
  3017. {
  3018. removeQ(c);
  3019. if (likely(c->cmd_type == CMD_RWREQ))
  3020. complete_command(h, c, 0);
  3021. else if (c->cmd_type == CMD_IOCTL_PEND)
  3022. complete(c->waiting);
  3023. #ifdef CONFIG_CISS_SCSI_TAPE
  3024. else if (c->cmd_type == CMD_SCSI)
  3025. complete_scsi_command(c, 0, raw_tag);
  3026. #endif
  3027. }
  3028. static inline u32 next_command(ctlr_info_t *h)
  3029. {
  3030. u32 a;
  3031. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  3032. return h->access.command_completed(h);
  3033. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  3034. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  3035. (h->reply_pool_head)++;
  3036. h->commands_outstanding--;
  3037. } else {
  3038. a = FIFO_EMPTY;
  3039. }
  3040. /* Check for wraparound */
  3041. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  3042. h->reply_pool_head = h->reply_pool;
  3043. h->reply_pool_wraparound ^= 1;
  3044. }
  3045. return a;
  3046. }
  3047. /* process completion of an indexed ("direct lookup") command */
  3048. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3049. {
  3050. u32 tag_index;
  3051. CommandList_struct *c;
  3052. tag_index = cciss_tag_to_index(raw_tag);
  3053. if (bad_tag(h, tag_index, raw_tag))
  3054. return next_command(h);
  3055. c = h->cmd_pool + tag_index;
  3056. finish_cmd(h, c, raw_tag);
  3057. return next_command(h);
  3058. }
  3059. /* process completion of a non-indexed command */
  3060. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3061. {
  3062. u32 tag;
  3063. CommandList_struct *c = NULL;
  3064. struct hlist_node *tmp;
  3065. __u32 busaddr_masked, tag_masked;
  3066. tag = cciss_tag_discard_error_bits(raw_tag);
  3067. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  3068. busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
  3069. tag_masked = cciss_tag_discard_error_bits(tag);
  3070. if (busaddr_masked == tag_masked) {
  3071. finish_cmd(h, c, raw_tag);
  3072. return next_command(h);
  3073. }
  3074. }
  3075. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3076. return next_command(h);
  3077. }
  3078. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3079. {
  3080. ctlr_info_t *h = dev_id;
  3081. unsigned long flags;
  3082. u32 raw_tag;
  3083. if (interrupt_not_for_us(h))
  3084. return IRQ_NONE;
  3085. spin_lock_irqsave(&h->lock, flags);
  3086. while (interrupt_pending(h)) {
  3087. raw_tag = get_next_completion(h);
  3088. while (raw_tag != FIFO_EMPTY) {
  3089. if (cciss_tag_contains_index(raw_tag))
  3090. raw_tag = process_indexed_cmd(h, raw_tag);
  3091. else
  3092. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3093. }
  3094. }
  3095. spin_unlock_irqrestore(&h->lock, flags);
  3096. return IRQ_HANDLED;
  3097. }
  3098. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3099. * check the interrupt pending register because it is not set.
  3100. */
  3101. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3102. {
  3103. ctlr_info_t *h = dev_id;
  3104. unsigned long flags;
  3105. u32 raw_tag;
  3106. spin_lock_irqsave(&h->lock, flags);
  3107. raw_tag = get_next_completion(h);
  3108. while (raw_tag != FIFO_EMPTY) {
  3109. if (cciss_tag_contains_index(raw_tag))
  3110. raw_tag = process_indexed_cmd(h, raw_tag);
  3111. else
  3112. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3113. }
  3114. spin_unlock_irqrestore(&h->lock, flags);
  3115. return IRQ_HANDLED;
  3116. }
  3117. /**
  3118. * add_to_scan_list() - add controller to rescan queue
  3119. * @h: Pointer to the controller.
  3120. *
  3121. * Adds the controller to the rescan queue if not already on the queue.
  3122. *
  3123. * returns 1 if added to the queue, 0 if skipped (could be on the
  3124. * queue already, or the controller could be initializing or shutting
  3125. * down).
  3126. **/
  3127. static int add_to_scan_list(struct ctlr_info *h)
  3128. {
  3129. struct ctlr_info *test_h;
  3130. int found = 0;
  3131. int ret = 0;
  3132. if (h->busy_initializing)
  3133. return 0;
  3134. if (!mutex_trylock(&h->busy_shutting_down))
  3135. return 0;
  3136. mutex_lock(&scan_mutex);
  3137. list_for_each_entry(test_h, &scan_q, scan_list) {
  3138. if (test_h == h) {
  3139. found = 1;
  3140. break;
  3141. }
  3142. }
  3143. if (!found && !h->busy_scanning) {
  3144. INIT_COMPLETION(h->scan_wait);
  3145. list_add_tail(&h->scan_list, &scan_q);
  3146. ret = 1;
  3147. }
  3148. mutex_unlock(&scan_mutex);
  3149. mutex_unlock(&h->busy_shutting_down);
  3150. return ret;
  3151. }
  3152. /**
  3153. * remove_from_scan_list() - remove controller from rescan queue
  3154. * @h: Pointer to the controller.
  3155. *
  3156. * Removes the controller from the rescan queue if present. Blocks if
  3157. * the controller is currently conducting a rescan. The controller
  3158. * can be in one of three states:
  3159. * 1. Doesn't need a scan
  3160. * 2. On the scan list, but not scanning yet (we remove it)
  3161. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3162. * the scan to complete to make sure the scanning thread for this
  3163. * controller is completely idle.
  3164. **/
  3165. static void remove_from_scan_list(struct ctlr_info *h)
  3166. {
  3167. struct ctlr_info *test_h, *tmp_h;
  3168. mutex_lock(&scan_mutex);
  3169. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3170. if (test_h == h) { /* state 2. */
  3171. list_del(&h->scan_list);
  3172. complete_all(&h->scan_wait);
  3173. mutex_unlock(&scan_mutex);
  3174. return;
  3175. }
  3176. }
  3177. if (h->busy_scanning) { /* state 3. */
  3178. mutex_unlock(&scan_mutex);
  3179. wait_for_completion(&h->scan_wait);
  3180. } else { /* state 1, nothing to do. */
  3181. mutex_unlock(&scan_mutex);
  3182. }
  3183. }
  3184. /**
  3185. * scan_thread() - kernel thread used to rescan controllers
  3186. * @data: Ignored.
  3187. *
  3188. * A kernel thread used scan for drive topology changes on
  3189. * controllers. The thread processes only one controller at a time
  3190. * using a queue. Controllers are added to the queue using
  3191. * add_to_scan_list() and removed from the queue either after done
  3192. * processing or using remove_from_scan_list().
  3193. *
  3194. * returns 0.
  3195. **/
  3196. static int scan_thread(void *data)
  3197. {
  3198. struct ctlr_info *h;
  3199. while (1) {
  3200. set_current_state(TASK_INTERRUPTIBLE);
  3201. schedule();
  3202. if (kthread_should_stop())
  3203. break;
  3204. while (1) {
  3205. mutex_lock(&scan_mutex);
  3206. if (list_empty(&scan_q)) {
  3207. mutex_unlock(&scan_mutex);
  3208. break;
  3209. }
  3210. h = list_entry(scan_q.next,
  3211. struct ctlr_info,
  3212. scan_list);
  3213. list_del(&h->scan_list);
  3214. h->busy_scanning = 1;
  3215. mutex_unlock(&scan_mutex);
  3216. rebuild_lun_table(h, 0, 0);
  3217. complete_all(&h->scan_wait);
  3218. mutex_lock(&scan_mutex);
  3219. h->busy_scanning = 0;
  3220. mutex_unlock(&scan_mutex);
  3221. }
  3222. }
  3223. return 0;
  3224. }
  3225. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3226. {
  3227. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3228. return 0;
  3229. switch (c->err_info->SenseInfo[12]) {
  3230. case STATE_CHANGED:
  3231. dev_warn(&h->pdev->dev, "a state change "
  3232. "detected, command retried\n");
  3233. return 1;
  3234. break;
  3235. case LUN_FAILED:
  3236. dev_warn(&h->pdev->dev, "LUN failure "
  3237. "detected, action required\n");
  3238. return 1;
  3239. break;
  3240. case REPORT_LUNS_CHANGED:
  3241. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3242. /*
  3243. * Here, we could call add_to_scan_list and wake up the scan thread,
  3244. * except that it's quite likely that we will get more than one
  3245. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3246. * that those which occur after the first one will likely happen
  3247. * *during* the scan_thread's rescan. And the rescan code is not
  3248. * robust enough to restart in the middle, undoing what it has already
  3249. * done, and it's not clear that it's even possible to do this, since
  3250. * part of what it does is notify the block layer, which starts
  3251. * doing it's own i/o to read partition tables and so on, and the
  3252. * driver doesn't have visibility to know what might need undoing.
  3253. * In any event, if possible, it is horribly complicated to get right
  3254. * so we just don't do it for now.
  3255. *
  3256. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3257. */
  3258. return 1;
  3259. break;
  3260. case POWER_OR_RESET:
  3261. dev_warn(&h->pdev->dev,
  3262. "a power on or device reset detected\n");
  3263. return 1;
  3264. break;
  3265. case UNIT_ATTENTION_CLEARED:
  3266. dev_warn(&h->pdev->dev,
  3267. "unit attention cleared by another initiator\n");
  3268. return 1;
  3269. break;
  3270. default:
  3271. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3272. return 1;
  3273. }
  3274. }
  3275. /*
  3276. * We cannot read the structure directly, for portability we must use
  3277. * the io functions.
  3278. * This is for debug only.
  3279. */
  3280. static void print_cfg_table(ctlr_info_t *h)
  3281. {
  3282. int i;
  3283. char temp_name[17];
  3284. CfgTable_struct *tb = h->cfgtable;
  3285. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3286. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3287. for (i = 0; i < 4; i++)
  3288. temp_name[i] = readb(&(tb->Signature[i]));
  3289. temp_name[4] = '\0';
  3290. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3291. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3292. readl(&(tb->SpecValence)));
  3293. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3294. readl(&(tb->TransportSupport)));
  3295. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3296. readl(&(tb->TransportActive)));
  3297. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3298. readl(&(tb->HostWrite.TransportRequest)));
  3299. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3300. readl(&(tb->HostWrite.CoalIntDelay)));
  3301. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3302. readl(&(tb->HostWrite.CoalIntCount)));
  3303. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3304. readl(&(tb->CmdsOutMax)));
  3305. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3306. readl(&(tb->BusTypes)));
  3307. for (i = 0; i < 16; i++)
  3308. temp_name[i] = readb(&(tb->ServerName[i]));
  3309. temp_name[16] = '\0';
  3310. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3311. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3312. readl(&(tb->HeartBeat)));
  3313. }
  3314. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3315. {
  3316. int i, offset, mem_type, bar_type;
  3317. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3318. return 0;
  3319. offset = 0;
  3320. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3321. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3322. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3323. offset += 4;
  3324. else {
  3325. mem_type = pci_resource_flags(pdev, i) &
  3326. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3327. switch (mem_type) {
  3328. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3329. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3330. offset += 4; /* 32 bit */
  3331. break;
  3332. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3333. offset += 8;
  3334. break;
  3335. default: /* reserved in PCI 2.2 */
  3336. dev_warn(&pdev->dev,
  3337. "Base address is invalid\n");
  3338. return -1;
  3339. break;
  3340. }
  3341. }
  3342. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3343. return i + 1;
  3344. }
  3345. return -1;
  3346. }
  3347. /* Fill in bucket_map[], given nsgs (the max number of
  3348. * scatter gather elements supported) and bucket[],
  3349. * which is an array of 8 integers. The bucket[] array
  3350. * contains 8 different DMA transfer sizes (in 16
  3351. * byte increments) which the controller uses to fetch
  3352. * commands. This function fills in bucket_map[], which
  3353. * maps a given number of scatter gather elements to one of
  3354. * the 8 DMA transfer sizes. The point of it is to allow the
  3355. * controller to only do as much DMA as needed to fetch the
  3356. * command, with the DMA transfer size encoded in the lower
  3357. * bits of the command address.
  3358. */
  3359. static void calc_bucket_map(int bucket[], int num_buckets,
  3360. int nsgs, int *bucket_map)
  3361. {
  3362. int i, j, b, size;
  3363. /* even a command with 0 SGs requires 4 blocks */
  3364. #define MINIMUM_TRANSFER_BLOCKS 4
  3365. #define NUM_BUCKETS 8
  3366. /* Note, bucket_map must have nsgs+1 entries. */
  3367. for (i = 0; i <= nsgs; i++) {
  3368. /* Compute size of a command with i SG entries */
  3369. size = i + MINIMUM_TRANSFER_BLOCKS;
  3370. b = num_buckets; /* Assume the biggest bucket */
  3371. /* Find the bucket that is just big enough */
  3372. for (j = 0; j < 8; j++) {
  3373. if (bucket[j] >= size) {
  3374. b = j;
  3375. break;
  3376. }
  3377. }
  3378. /* for a command with i SG entries, use bucket b. */
  3379. bucket_map[i] = b;
  3380. }
  3381. }
  3382. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3383. {
  3384. int i;
  3385. /* under certain very rare conditions, this can take awhile.
  3386. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3387. * as we enter this code.) */
  3388. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3389. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3390. break;
  3391. msleep(10);
  3392. }
  3393. }
  3394. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
  3395. {
  3396. /* This is a bit complicated. There are 8 registers on
  3397. * the controller which we write to to tell it 8 different
  3398. * sizes of commands which there may be. It's a way of
  3399. * reducing the DMA done to fetch each command. Encoded into
  3400. * each command's tag are 3 bits which communicate to the controller
  3401. * which of the eight sizes that command fits within. The size of
  3402. * each command depends on how many scatter gather entries there are.
  3403. * Each SG entry requires 16 bytes. The eight registers are programmed
  3404. * with the number of 16-byte blocks a command of that size requires.
  3405. * The smallest command possible requires 5 such 16 byte blocks.
  3406. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3407. * blocks. Note, this only extends to the SG entries contained
  3408. * within the command block, and does not extend to chained blocks
  3409. * of SG elements. bft[] contains the eight values we write to
  3410. * the registers. They are not evenly distributed, but have more
  3411. * sizes for small commands, and fewer sizes for larger commands.
  3412. */
  3413. __u32 trans_offset;
  3414. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3415. /*
  3416. * 5 = 1 s/g entry or 4k
  3417. * 6 = 2 s/g entry or 8k
  3418. * 8 = 4 s/g entry or 16k
  3419. * 10 = 6 s/g entry or 24k
  3420. */
  3421. unsigned long register_value;
  3422. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3423. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3424. /* Controller spec: zero out this buffer. */
  3425. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3426. h->reply_pool_head = h->reply_pool;
  3427. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3428. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3429. h->blockFetchTable);
  3430. writel(bft[0], &h->transtable->BlockFetch0);
  3431. writel(bft[1], &h->transtable->BlockFetch1);
  3432. writel(bft[2], &h->transtable->BlockFetch2);
  3433. writel(bft[3], &h->transtable->BlockFetch3);
  3434. writel(bft[4], &h->transtable->BlockFetch4);
  3435. writel(bft[5], &h->transtable->BlockFetch5);
  3436. writel(bft[6], &h->transtable->BlockFetch6);
  3437. writel(bft[7], &h->transtable->BlockFetch7);
  3438. /* size of controller ring buffer */
  3439. writel(h->max_commands, &h->transtable->RepQSize);
  3440. writel(1, &h->transtable->RepQCount);
  3441. writel(0, &h->transtable->RepQCtrAddrLow32);
  3442. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3443. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3444. writel(0, &h->transtable->RepQAddr0High32);
  3445. writel(CFGTBL_Trans_Performant,
  3446. &(h->cfgtable->HostWrite.TransportRequest));
  3447. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3448. cciss_wait_for_mode_change_ack(h);
  3449. register_value = readl(&(h->cfgtable->TransportActive));
  3450. if (!(register_value & CFGTBL_Trans_Performant))
  3451. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3452. " performant mode\n");
  3453. }
  3454. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3455. {
  3456. __u32 trans_support;
  3457. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3458. /* Attempt to put controller into performant mode if supported */
  3459. /* Does board support performant mode? */
  3460. trans_support = readl(&(h->cfgtable->TransportSupport));
  3461. if (!(trans_support & PERFORMANT_MODE))
  3462. return;
  3463. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3464. /* Performant mode demands commands on a 32 byte boundary
  3465. * pci_alloc_consistent aligns on page boundarys already.
  3466. * Just need to check if divisible by 32
  3467. */
  3468. if ((sizeof(CommandList_struct) % 32) != 0) {
  3469. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3470. "cciss info: command size[",
  3471. (int)sizeof(CommandList_struct),
  3472. "] not divisible by 32, no performant mode..\n");
  3473. return;
  3474. }
  3475. /* Performant mode ring buffer and supporting data structures */
  3476. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3477. h->pdev, h->max_commands * sizeof(__u64),
  3478. &(h->reply_pool_dhandle));
  3479. /* Need a block fetch table for performant mode */
  3480. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3481. sizeof(__u32)), GFP_KERNEL);
  3482. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3483. goto clean_up;
  3484. cciss_enter_performant_mode(h);
  3485. /* Change the access methods to the performant access methods */
  3486. h->access = SA5_performant_access;
  3487. h->transMethod = CFGTBL_Trans_Performant;
  3488. return;
  3489. clean_up:
  3490. kfree(h->blockFetchTable);
  3491. if (h->reply_pool)
  3492. pci_free_consistent(h->pdev,
  3493. h->max_commands * sizeof(__u64),
  3494. h->reply_pool,
  3495. h->reply_pool_dhandle);
  3496. return;
  3497. } /* cciss_put_controller_into_performant_mode */
  3498. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3499. * controllers that are capable. If not, we use IO-APIC mode.
  3500. */
  3501. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3502. {
  3503. #ifdef CONFIG_PCI_MSI
  3504. int err;
  3505. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3506. {0, 2}, {0, 3}
  3507. };
  3508. /* Some boards advertise MSI but don't really support it */
  3509. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3510. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3511. goto default_int_mode;
  3512. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3513. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3514. if (!err) {
  3515. h->intr[0] = cciss_msix_entries[0].vector;
  3516. h->intr[1] = cciss_msix_entries[1].vector;
  3517. h->intr[2] = cciss_msix_entries[2].vector;
  3518. h->intr[3] = cciss_msix_entries[3].vector;
  3519. h->msix_vector = 1;
  3520. return;
  3521. }
  3522. if (err > 0) {
  3523. dev_warn(&h->pdev->dev,
  3524. "only %d MSI-X vectors available\n", err);
  3525. goto default_int_mode;
  3526. } else {
  3527. dev_warn(&h->pdev->dev,
  3528. "MSI-X init failed %d\n", err);
  3529. goto default_int_mode;
  3530. }
  3531. }
  3532. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3533. if (!pci_enable_msi(h->pdev))
  3534. h->msi_vector = 1;
  3535. else
  3536. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3537. }
  3538. default_int_mode:
  3539. #endif /* CONFIG_PCI_MSI */
  3540. /* if we get here we're going to use the default interrupt mode */
  3541. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3542. return;
  3543. }
  3544. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3545. {
  3546. int i;
  3547. u32 subsystem_vendor_id, subsystem_device_id;
  3548. subsystem_vendor_id = pdev->subsystem_vendor;
  3549. subsystem_device_id = pdev->subsystem_device;
  3550. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3551. subsystem_vendor_id;
  3552. for (i = 0; i < ARRAY_SIZE(products); i++) {
  3553. /* Stand aside for hpsa driver on request */
  3554. if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
  3555. return -ENODEV;
  3556. if (*board_id == products[i].board_id)
  3557. return i;
  3558. }
  3559. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3560. *board_id);
  3561. return -ENODEV;
  3562. }
  3563. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3564. {
  3565. u16 command;
  3566. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3567. return ((command & PCI_COMMAND_MEMORY) == 0);
  3568. }
  3569. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3570. unsigned long *memory_bar)
  3571. {
  3572. int i;
  3573. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3574. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3575. /* addressing mode bits already removed */
  3576. *memory_bar = pci_resource_start(pdev, i);
  3577. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3578. *memory_bar);
  3579. return 0;
  3580. }
  3581. dev_warn(&pdev->dev, "no memory BAR found\n");
  3582. return -ENODEV;
  3583. }
  3584. static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
  3585. {
  3586. int i;
  3587. u32 scratchpad;
  3588. for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
  3589. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3590. if (scratchpad == CCISS_FIRMWARE_READY)
  3591. return 0;
  3592. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3593. }
  3594. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3595. return -ENODEV;
  3596. }
  3597. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3598. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3599. u64 *cfg_offset)
  3600. {
  3601. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3602. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3603. *cfg_base_addr &= (u32) 0x0000ffff;
  3604. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3605. if (*cfg_base_addr_index == -1) {
  3606. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3607. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3608. return -ENODEV;
  3609. }
  3610. return 0;
  3611. }
  3612. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3613. {
  3614. u64 cfg_offset;
  3615. u32 cfg_base_addr;
  3616. u64 cfg_base_addr_index;
  3617. u32 trans_offset;
  3618. int rc;
  3619. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3620. &cfg_base_addr_index, &cfg_offset);
  3621. if (rc)
  3622. return rc;
  3623. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3624. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3625. if (!h->cfgtable)
  3626. return -ENOMEM;
  3627. /* Find performant mode table. */
  3628. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3629. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3630. cfg_base_addr_index)+cfg_offset+trans_offset,
  3631. sizeof(*h->transtable));
  3632. if (!h->transtable)
  3633. return -ENOMEM;
  3634. return 0;
  3635. }
  3636. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3637. {
  3638. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3639. if (h->max_commands < 16) {
  3640. dev_warn(&h->pdev->dev, "Controller reports "
  3641. "max supported commands of %d, an obvious lie. "
  3642. "Using 16. Ensure that firmware is up to date.\n",
  3643. h->max_commands);
  3644. h->max_commands = 16;
  3645. }
  3646. }
  3647. /* Interrogate the hardware for some limits:
  3648. * max commands, max SG elements without chaining, and with chaining,
  3649. * SG chain block size, etc.
  3650. */
  3651. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3652. {
  3653. cciss_get_max_perf_mode_cmds(h);
  3654. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3655. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3656. /*
  3657. * Limit in-command s/g elements to 32 save dma'able memory.
  3658. * Howvever spec says if 0, use 31
  3659. */
  3660. h->max_cmd_sgentries = 31;
  3661. if (h->maxsgentries > 512) {
  3662. h->max_cmd_sgentries = 32;
  3663. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3664. h->maxsgentries--; /* save one for chain pointer */
  3665. } else {
  3666. h->maxsgentries = 31; /* default to traditional values */
  3667. h->chainsize = 0;
  3668. }
  3669. }
  3670. static inline bool CISS_signature_present(ctlr_info_t *h)
  3671. {
  3672. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3673. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3674. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3675. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3676. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3677. return false;
  3678. }
  3679. return true;
  3680. }
  3681. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3682. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3683. {
  3684. #ifdef CONFIG_X86
  3685. u32 prefetch;
  3686. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3687. prefetch |= 0x100;
  3688. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3689. #endif
  3690. }
  3691. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3692. * in a prefetch beyond physical memory.
  3693. */
  3694. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3695. {
  3696. u32 dma_prefetch;
  3697. __u32 dma_refetch;
  3698. if (h->board_id != 0x3225103C)
  3699. return;
  3700. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3701. dma_prefetch |= 0x8000;
  3702. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3703. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3704. dma_refetch |= 0x1;
  3705. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3706. }
  3707. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3708. {
  3709. int prod_index, err;
  3710. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3711. if (prod_index < 0)
  3712. return -ENODEV;
  3713. h->product_name = products[prod_index].product_name;
  3714. h->access = *(products[prod_index].access);
  3715. if (cciss_board_disabled(h)) {
  3716. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3717. return -ENODEV;
  3718. }
  3719. err = pci_enable_device(h->pdev);
  3720. if (err) {
  3721. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3722. return err;
  3723. }
  3724. err = pci_request_regions(h->pdev, "cciss");
  3725. if (err) {
  3726. dev_warn(&h->pdev->dev,
  3727. "Cannot obtain PCI resources, aborting\n");
  3728. return err;
  3729. }
  3730. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3731. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3732. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3733. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3734. */
  3735. cciss_interrupt_mode(h);
  3736. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3737. if (err)
  3738. goto err_out_free_res;
  3739. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3740. if (!h->vaddr) {
  3741. err = -ENOMEM;
  3742. goto err_out_free_res;
  3743. }
  3744. err = cciss_wait_for_board_ready(h);
  3745. if (err)
  3746. goto err_out_free_res;
  3747. err = cciss_find_cfgtables(h);
  3748. if (err)
  3749. goto err_out_free_res;
  3750. print_cfg_table(h);
  3751. cciss_find_board_params(h);
  3752. if (!CISS_signature_present(h)) {
  3753. err = -ENODEV;
  3754. goto err_out_free_res;
  3755. }
  3756. cciss_enable_scsi_prefetch(h);
  3757. cciss_p600_dma_prefetch_quirk(h);
  3758. cciss_put_controller_into_performant_mode(h);
  3759. return 0;
  3760. err_out_free_res:
  3761. /*
  3762. * Deliberately omit pci_disable_device(): it does something nasty to
  3763. * Smart Array controllers that pci_enable_device does not undo
  3764. */
  3765. if (h->transtable)
  3766. iounmap(h->transtable);
  3767. if (h->cfgtable)
  3768. iounmap(h->cfgtable);
  3769. if (h->vaddr)
  3770. iounmap(h->vaddr);
  3771. pci_release_regions(h->pdev);
  3772. return err;
  3773. }
  3774. /* Function to find the first free pointer into our hba[] array
  3775. * Returns -1 if no free entries are left.
  3776. */
  3777. static int alloc_cciss_hba(struct pci_dev *pdev)
  3778. {
  3779. int i;
  3780. for (i = 0; i < MAX_CTLR; i++) {
  3781. if (!hba[i]) {
  3782. ctlr_info_t *h;
  3783. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3784. if (!h)
  3785. goto Enomem;
  3786. hba[i] = h;
  3787. return i;
  3788. }
  3789. }
  3790. dev_warn(&pdev->dev, "This driver supports a maximum"
  3791. " of %d controllers.\n", MAX_CTLR);
  3792. return -1;
  3793. Enomem:
  3794. dev_warn(&pdev->dev, "out of memory.\n");
  3795. return -1;
  3796. }
  3797. static void free_hba(ctlr_info_t *h)
  3798. {
  3799. int i;
  3800. hba[h->ctlr] = NULL;
  3801. for (i = 0; i < h->highest_lun + 1; i++)
  3802. if (h->gendisk[i] != NULL)
  3803. put_disk(h->gendisk[i]);
  3804. kfree(h);
  3805. }
  3806. /* Send a message CDB to the firmware. */
  3807. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3808. {
  3809. typedef struct {
  3810. CommandListHeader_struct CommandHeader;
  3811. RequestBlock_struct Request;
  3812. ErrDescriptor_struct ErrorDescriptor;
  3813. } Command;
  3814. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3815. Command *cmd;
  3816. dma_addr_t paddr64;
  3817. uint32_t paddr32, tag;
  3818. void __iomem *vaddr;
  3819. int i, err;
  3820. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3821. if (vaddr == NULL)
  3822. return -ENOMEM;
  3823. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3824. CCISS commands, so they must be allocated from the lower 4GiB of
  3825. memory. */
  3826. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3827. if (err) {
  3828. iounmap(vaddr);
  3829. return -ENOMEM;
  3830. }
  3831. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3832. if (cmd == NULL) {
  3833. iounmap(vaddr);
  3834. return -ENOMEM;
  3835. }
  3836. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3837. although there's no guarantee, we assume that the address is at
  3838. least 4-byte aligned (most likely, it's page-aligned). */
  3839. paddr32 = paddr64;
  3840. cmd->CommandHeader.ReplyQueue = 0;
  3841. cmd->CommandHeader.SGList = 0;
  3842. cmd->CommandHeader.SGTotal = 0;
  3843. cmd->CommandHeader.Tag.lower = paddr32;
  3844. cmd->CommandHeader.Tag.upper = 0;
  3845. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3846. cmd->Request.CDBLen = 16;
  3847. cmd->Request.Type.Type = TYPE_MSG;
  3848. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3849. cmd->Request.Type.Direction = XFER_NONE;
  3850. cmd->Request.Timeout = 0; /* Don't time out */
  3851. cmd->Request.CDB[0] = opcode;
  3852. cmd->Request.CDB[1] = type;
  3853. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3854. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3855. cmd->ErrorDescriptor.Addr.upper = 0;
  3856. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3857. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3858. for (i = 0; i < 10; i++) {
  3859. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3860. if ((tag & ~3) == paddr32)
  3861. break;
  3862. schedule_timeout_uninterruptible(HZ);
  3863. }
  3864. iounmap(vaddr);
  3865. /* we leak the DMA buffer here ... no choice since the controller could
  3866. still complete the command. */
  3867. if (i == 10) {
  3868. dev_err(&pdev->dev,
  3869. "controller message %02x:%02x timed out\n",
  3870. opcode, type);
  3871. return -ETIMEDOUT;
  3872. }
  3873. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3874. if (tag & 2) {
  3875. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3876. opcode, type);
  3877. return -EIO;
  3878. }
  3879. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3880. opcode, type);
  3881. return 0;
  3882. }
  3883. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3884. #define cciss_noop(p) cciss_message(p, 3, 0)
  3885. static __devinit int cciss_reset_msi(struct pci_dev *pdev)
  3886. {
  3887. /* the #defines are stolen from drivers/pci/msi.h. */
  3888. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  3889. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  3890. int pos;
  3891. u16 control = 0;
  3892. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  3893. if (pos) {
  3894. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3895. if (control & PCI_MSI_FLAGS_ENABLE) {
  3896. dev_info(&pdev->dev, "resetting MSI\n");
  3897. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
  3898. }
  3899. }
  3900. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  3901. if (pos) {
  3902. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3903. if (control & PCI_MSIX_FLAGS_ENABLE) {
  3904. dev_info(&pdev->dev, "resetting MSI-X\n");
  3905. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
  3906. }
  3907. }
  3908. return 0;
  3909. }
  3910. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3911. void * __iomem vaddr, bool use_doorbell)
  3912. {
  3913. u16 pmcsr;
  3914. int pos;
  3915. if (use_doorbell) {
  3916. /* For everything after the P600, the PCI power state method
  3917. * of resetting the controller doesn't work, so we have this
  3918. * other way using the doorbell register.
  3919. */
  3920. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3921. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3922. msleep(1000);
  3923. } else { /* Try to do it the PCI power state way */
  3924. /* Quoting from the Open CISS Specification: "The Power
  3925. * Management Control/Status Register (CSR) controls the power
  3926. * state of the device. The normal operating state is D0,
  3927. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3928. * the controller, place the interface device in D3 then to D0,
  3929. * this causes a secondary PCI reset which will reset the
  3930. * controller." */
  3931. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3932. if (pos == 0) {
  3933. dev_err(&pdev->dev,
  3934. "cciss_controller_hard_reset: "
  3935. "PCI PM not supported\n");
  3936. return -ENODEV;
  3937. }
  3938. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3939. /* enter the D3hot power management state */
  3940. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3941. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3942. pmcsr |= PCI_D3hot;
  3943. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3944. msleep(500);
  3945. /* enter the D0 power management state */
  3946. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3947. pmcsr |= PCI_D0;
  3948. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3949. msleep(500);
  3950. }
  3951. return 0;
  3952. }
  3953. /* This does a hard reset of the controller using PCI power management
  3954. * states or using the doorbell register. */
  3955. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3956. {
  3957. u16 saved_config_space[32];
  3958. u64 cfg_offset;
  3959. u32 cfg_base_addr;
  3960. u64 cfg_base_addr_index;
  3961. void __iomem *vaddr;
  3962. unsigned long paddr;
  3963. u32 misc_fw_support, active_transport;
  3964. int rc, i;
  3965. CfgTable_struct __iomem *cfgtable;
  3966. bool use_doorbell;
  3967. u32 board_id;
  3968. /* For controllers as old a the p600, this is very nearly
  3969. * the same thing as
  3970. *
  3971. * pci_save_state(pci_dev);
  3972. * pci_set_power_state(pci_dev, PCI_D3hot);
  3973. * pci_set_power_state(pci_dev, PCI_D0);
  3974. * pci_restore_state(pci_dev);
  3975. *
  3976. * but we can't use these nice canned kernel routines on
  3977. * kexec, because they also check the MSI/MSI-X state in PCI
  3978. * configuration space and do the wrong thing when it is
  3979. * set/cleared. Also, the pci_save/restore_state functions
  3980. * violate the ordering requirements for restoring the
  3981. * configuration space from the CCISS document (see the
  3982. * comment below). So we roll our own ....
  3983. *
  3984. * For controllers newer than the P600, the pci power state
  3985. * method of resetting doesn't work so we have another way
  3986. * using the doorbell register.
  3987. */
  3988. /* Exclude 640x boards. These are two pci devices in one slot
  3989. * which share a battery backed cache module. One controls the
  3990. * cache, the other accesses the cache through the one that controls
  3991. * it. If we reset the one controlling the cache, the other will
  3992. * likely not be happy. Just forbid resetting this conjoined mess.
  3993. */
  3994. cciss_lookup_board_id(pdev, &board_id);
  3995. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  3996. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  3997. "due to shared cache module.");
  3998. return -ENODEV;
  3999. }
  4000. for (i = 0; i < 32; i++)
  4001. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  4002. /* find the first memory BAR, so we can find the cfg table */
  4003. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  4004. if (rc)
  4005. return rc;
  4006. vaddr = remap_pci_mem(paddr, 0x250);
  4007. if (!vaddr)
  4008. return -ENOMEM;
  4009. /* find cfgtable in order to check if reset via doorbell is supported */
  4010. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  4011. &cfg_base_addr_index, &cfg_offset);
  4012. if (rc)
  4013. goto unmap_vaddr;
  4014. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  4015. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  4016. if (!cfgtable) {
  4017. rc = -ENOMEM;
  4018. goto unmap_vaddr;
  4019. }
  4020. /* If reset via doorbell register is supported, use that. */
  4021. misc_fw_support = readl(&cfgtable->misc_fw_support);
  4022. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  4023. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  4024. if (rc)
  4025. goto unmap_cfgtable;
  4026. /* Restore the PCI configuration space. The Open CISS
  4027. * Specification says, "Restore the PCI Configuration
  4028. * Registers, offsets 00h through 60h. It is important to
  4029. * restore the command register, 16-bits at offset 04h,
  4030. * last. Do not restore the configuration status register,
  4031. * 16-bits at offset 06h." Note that the offset is 2*i.
  4032. */
  4033. for (i = 0; i < 32; i++) {
  4034. if (i == 2 || i == 3)
  4035. continue;
  4036. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  4037. }
  4038. wmb();
  4039. pci_write_config_word(pdev, 4, saved_config_space[2]);
  4040. /* Some devices (notably the HP Smart Array 5i Controller)
  4041. need a little pause here */
  4042. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  4043. /* Controller should be in simple mode at this point. If it's not,
  4044. * It means we're on one of those controllers which doesn't support
  4045. * the doorbell reset method and on which the PCI power management reset
  4046. * method doesn't work (P800, for example.)
  4047. * In those cases, don't try to proceed, as it generally doesn't work.
  4048. */
  4049. active_transport = readl(&cfgtable->TransportActive);
  4050. if (active_transport & PERFORMANT_MODE) {
  4051. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  4052. " Ignoring controller.\n");
  4053. rc = -ENODEV;
  4054. }
  4055. unmap_cfgtable:
  4056. iounmap(cfgtable);
  4057. unmap_vaddr:
  4058. iounmap(vaddr);
  4059. return rc;
  4060. }
  4061. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4062. {
  4063. int rc, i;
  4064. if (!reset_devices)
  4065. return 0;
  4066. /* Reset the controller with a PCI power-cycle or via doorbell */
  4067. rc = cciss_kdump_hard_reset_controller(pdev);
  4068. /* -ENOTSUPP here means we cannot reset the controller
  4069. * but it's already (and still) up and running in
  4070. * "performant mode". Or, it might be 640x, which can't reset
  4071. * due to concerns about shared bbwc between 6402/6404 pair.
  4072. */
  4073. if (rc == -ENOTSUPP)
  4074. return 0; /* just try to do the kdump anyhow. */
  4075. if (rc)
  4076. return -ENODEV;
  4077. if (cciss_reset_msi(pdev))
  4078. return -ENODEV;
  4079. /* Now try to get the controller to respond to a no-op */
  4080. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4081. if (cciss_noop(pdev) == 0)
  4082. break;
  4083. else
  4084. dev_warn(&pdev->dev, "no-op failed%s\n",
  4085. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4086. "; re-trying" : ""));
  4087. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4088. }
  4089. return 0;
  4090. }
  4091. /*
  4092. * This is it. Find all the controllers and register them. I really hate
  4093. * stealing all these major device numbers.
  4094. * returns the number of block devices registered.
  4095. */
  4096. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4097. const struct pci_device_id *ent)
  4098. {
  4099. int i;
  4100. int j = 0;
  4101. int k = 0;
  4102. int rc;
  4103. int dac, return_code;
  4104. InquiryData_struct *inq_buff;
  4105. ctlr_info_t *h;
  4106. rc = cciss_init_reset_devices(pdev);
  4107. if (rc)
  4108. return rc;
  4109. i = alloc_cciss_hba(pdev);
  4110. if (i < 0)
  4111. return -1;
  4112. h = hba[i];
  4113. h->pdev = pdev;
  4114. h->busy_initializing = 1;
  4115. INIT_HLIST_HEAD(&h->cmpQ);
  4116. INIT_HLIST_HEAD(&h->reqQ);
  4117. mutex_init(&h->busy_shutting_down);
  4118. if (cciss_pci_init(h) != 0)
  4119. goto clean_no_release_regions;
  4120. sprintf(h->devname, "cciss%d", i);
  4121. h->ctlr = i;
  4122. init_completion(&h->scan_wait);
  4123. if (cciss_create_hba_sysfs_entry(h))
  4124. goto clean0;
  4125. /* configure PCI DMA stuff */
  4126. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4127. dac = 1;
  4128. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4129. dac = 0;
  4130. else {
  4131. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4132. goto clean1;
  4133. }
  4134. /*
  4135. * register with the major number, or get a dynamic major number
  4136. * by passing 0 as argument. This is done for greater than
  4137. * 8 controller support.
  4138. */
  4139. if (i < MAX_CTLR_ORIG)
  4140. h->major = COMPAQ_CISS_MAJOR + i;
  4141. rc = register_blkdev(h->major, h->devname);
  4142. if (rc == -EBUSY || rc == -EINVAL) {
  4143. dev_err(&h->pdev->dev,
  4144. "Unable to get major number %d for %s "
  4145. "on hba %d\n", h->major, h->devname, i);
  4146. goto clean1;
  4147. } else {
  4148. if (i >= MAX_CTLR_ORIG)
  4149. h->major = rc;
  4150. }
  4151. /* make sure the board interrupts are off */
  4152. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4153. if (h->msi_vector || h->msix_vector) {
  4154. if (request_irq(h->intr[PERF_MODE_INT],
  4155. do_cciss_msix_intr,
  4156. IRQF_DISABLED, h->devname, h)) {
  4157. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4158. h->intr[PERF_MODE_INT], h->devname);
  4159. goto clean2;
  4160. }
  4161. } else {
  4162. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4163. IRQF_DISABLED, h->devname, h)) {
  4164. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4165. h->intr[PERF_MODE_INT], h->devname);
  4166. goto clean2;
  4167. }
  4168. }
  4169. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4170. h->devname, pdev->device, pci_name(pdev),
  4171. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4172. h->cmd_pool_bits =
  4173. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4174. * sizeof(unsigned long), GFP_KERNEL);
  4175. h->cmd_pool = (CommandList_struct *)
  4176. pci_alloc_consistent(h->pdev,
  4177. h->nr_cmds * sizeof(CommandList_struct),
  4178. &(h->cmd_pool_dhandle));
  4179. h->errinfo_pool = (ErrorInfo_struct *)
  4180. pci_alloc_consistent(h->pdev,
  4181. h->nr_cmds * sizeof(ErrorInfo_struct),
  4182. &(h->errinfo_pool_dhandle));
  4183. if ((h->cmd_pool_bits == NULL)
  4184. || (h->cmd_pool == NULL)
  4185. || (h->errinfo_pool == NULL)) {
  4186. dev_err(&h->pdev->dev, "out of memory");
  4187. goto clean4;
  4188. }
  4189. /* Need space for temp scatter list */
  4190. h->scatter_list = kmalloc(h->max_commands *
  4191. sizeof(struct scatterlist *),
  4192. GFP_KERNEL);
  4193. for (k = 0; k < h->nr_cmds; k++) {
  4194. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4195. h->maxsgentries,
  4196. GFP_KERNEL);
  4197. if (h->scatter_list[k] == NULL) {
  4198. dev_err(&h->pdev->dev,
  4199. "could not allocate s/g lists\n");
  4200. goto clean4;
  4201. }
  4202. }
  4203. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4204. h->chainsize, h->nr_cmds);
  4205. if (!h->cmd_sg_list && h->chainsize > 0)
  4206. goto clean4;
  4207. spin_lock_init(&h->lock);
  4208. /* Initialize the pdev driver private data.
  4209. have it point to h. */
  4210. pci_set_drvdata(pdev, h);
  4211. /* command and error info recs zeroed out before
  4212. they are used */
  4213. memset(h->cmd_pool_bits, 0,
  4214. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4215. * sizeof(unsigned long));
  4216. h->num_luns = 0;
  4217. h->highest_lun = -1;
  4218. for (j = 0; j < CISS_MAX_LUN; j++) {
  4219. h->drv[j] = NULL;
  4220. h->gendisk[j] = NULL;
  4221. }
  4222. cciss_scsi_setup(h);
  4223. /* Turn the interrupts on so we can service requests */
  4224. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4225. /* Get the firmware version */
  4226. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4227. if (inq_buff == NULL) {
  4228. dev_err(&h->pdev->dev, "out of memory\n");
  4229. goto clean4;
  4230. }
  4231. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4232. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4233. if (return_code == IO_OK) {
  4234. h->firm_ver[0] = inq_buff->data_byte[32];
  4235. h->firm_ver[1] = inq_buff->data_byte[33];
  4236. h->firm_ver[2] = inq_buff->data_byte[34];
  4237. h->firm_ver[3] = inq_buff->data_byte[35];
  4238. } else { /* send command failed */
  4239. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4240. " version of controller\n");
  4241. }
  4242. kfree(inq_buff);
  4243. cciss_procinit(h);
  4244. h->cciss_max_sectors = 8192;
  4245. rebuild_lun_table(h, 1, 0);
  4246. h->busy_initializing = 0;
  4247. return 1;
  4248. clean4:
  4249. kfree(h->cmd_pool_bits);
  4250. /* Free up sg elements */
  4251. for (k = 0; k < h->nr_cmds; k++)
  4252. kfree(h->scatter_list[k]);
  4253. kfree(h->scatter_list);
  4254. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4255. if (h->cmd_pool)
  4256. pci_free_consistent(h->pdev,
  4257. h->nr_cmds * sizeof(CommandList_struct),
  4258. h->cmd_pool, h->cmd_pool_dhandle);
  4259. if (h->errinfo_pool)
  4260. pci_free_consistent(h->pdev,
  4261. h->nr_cmds * sizeof(ErrorInfo_struct),
  4262. h->errinfo_pool,
  4263. h->errinfo_pool_dhandle);
  4264. free_irq(h->intr[PERF_MODE_INT], h);
  4265. clean2:
  4266. unregister_blkdev(h->major, h->devname);
  4267. clean1:
  4268. cciss_destroy_hba_sysfs_entry(h);
  4269. clean0:
  4270. pci_release_regions(pdev);
  4271. clean_no_release_regions:
  4272. h->busy_initializing = 0;
  4273. /*
  4274. * Deliberately omit pci_disable_device(): it does something nasty to
  4275. * Smart Array controllers that pci_enable_device does not undo
  4276. */
  4277. pci_set_drvdata(pdev, NULL);
  4278. free_hba(h);
  4279. return -1;
  4280. }
  4281. static void cciss_shutdown(struct pci_dev *pdev)
  4282. {
  4283. ctlr_info_t *h;
  4284. char *flush_buf;
  4285. int return_code;
  4286. h = pci_get_drvdata(pdev);
  4287. flush_buf = kzalloc(4, GFP_KERNEL);
  4288. if (!flush_buf) {
  4289. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4290. return;
  4291. }
  4292. /* write all data in the battery backed cache to disk */
  4293. memset(flush_buf, 0, 4);
  4294. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4295. 4, 0, CTLR_LUNID, TYPE_CMD);
  4296. kfree(flush_buf);
  4297. if (return_code != IO_OK)
  4298. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4299. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4300. free_irq(h->intr[PERF_MODE_INT], h);
  4301. }
  4302. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4303. {
  4304. ctlr_info_t *h;
  4305. int i, j;
  4306. if (pci_get_drvdata(pdev) == NULL) {
  4307. dev_err(&pdev->dev, "Unable to remove device\n");
  4308. return;
  4309. }
  4310. h = pci_get_drvdata(pdev);
  4311. i = h->ctlr;
  4312. if (hba[i] == NULL) {
  4313. dev_err(&pdev->dev, "device appears to already be removed\n");
  4314. return;
  4315. }
  4316. mutex_lock(&h->busy_shutting_down);
  4317. remove_from_scan_list(h);
  4318. remove_proc_entry(h->devname, proc_cciss);
  4319. unregister_blkdev(h->major, h->devname);
  4320. /* remove it from the disk list */
  4321. for (j = 0; j < CISS_MAX_LUN; j++) {
  4322. struct gendisk *disk = h->gendisk[j];
  4323. if (disk) {
  4324. struct request_queue *q = disk->queue;
  4325. if (disk->flags & GENHD_FL_UP) {
  4326. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4327. del_gendisk(disk);
  4328. }
  4329. if (q)
  4330. blk_cleanup_queue(q);
  4331. }
  4332. }
  4333. #ifdef CONFIG_CISS_SCSI_TAPE
  4334. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4335. #endif
  4336. cciss_shutdown(pdev);
  4337. #ifdef CONFIG_PCI_MSI
  4338. if (h->msix_vector)
  4339. pci_disable_msix(h->pdev);
  4340. else if (h->msi_vector)
  4341. pci_disable_msi(h->pdev);
  4342. #endif /* CONFIG_PCI_MSI */
  4343. iounmap(h->transtable);
  4344. iounmap(h->cfgtable);
  4345. iounmap(h->vaddr);
  4346. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4347. h->cmd_pool, h->cmd_pool_dhandle);
  4348. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4349. h->errinfo_pool, h->errinfo_pool_dhandle);
  4350. kfree(h->cmd_pool_bits);
  4351. /* Free up sg elements */
  4352. for (j = 0; j < h->nr_cmds; j++)
  4353. kfree(h->scatter_list[j]);
  4354. kfree(h->scatter_list);
  4355. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4356. /*
  4357. * Deliberately omit pci_disable_device(): it does something nasty to
  4358. * Smart Array controllers that pci_enable_device does not undo
  4359. */
  4360. pci_release_regions(pdev);
  4361. pci_set_drvdata(pdev, NULL);
  4362. cciss_destroy_hba_sysfs_entry(h);
  4363. mutex_unlock(&h->busy_shutting_down);
  4364. free_hba(h);
  4365. }
  4366. static struct pci_driver cciss_pci_driver = {
  4367. .name = "cciss",
  4368. .probe = cciss_init_one,
  4369. .remove = __devexit_p(cciss_remove_one),
  4370. .id_table = cciss_pci_device_id, /* id_table */
  4371. .shutdown = cciss_shutdown,
  4372. };
  4373. /*
  4374. * This is it. Register the PCI driver information for the cards we control
  4375. * the OS will call our registered routines when it finds one of our cards.
  4376. */
  4377. static int __init cciss_init(void)
  4378. {
  4379. int err;
  4380. /*
  4381. * The hardware requires that commands are aligned on a 64-bit
  4382. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4383. * array of them, the size must be a multiple of 8 bytes.
  4384. */
  4385. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4386. printk(KERN_INFO DRIVER_NAME "\n");
  4387. err = bus_register(&cciss_bus_type);
  4388. if (err)
  4389. return err;
  4390. /* Start the scan thread */
  4391. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4392. if (IS_ERR(cciss_scan_thread)) {
  4393. err = PTR_ERR(cciss_scan_thread);
  4394. goto err_bus_unregister;
  4395. }
  4396. /* Register for our PCI devices */
  4397. err = pci_register_driver(&cciss_pci_driver);
  4398. if (err)
  4399. goto err_thread_stop;
  4400. return err;
  4401. err_thread_stop:
  4402. kthread_stop(cciss_scan_thread);
  4403. err_bus_unregister:
  4404. bus_unregister(&cciss_bus_type);
  4405. return err;
  4406. }
  4407. static void __exit cciss_cleanup(void)
  4408. {
  4409. int i;
  4410. pci_unregister_driver(&cciss_pci_driver);
  4411. /* double check that all controller entrys have been removed */
  4412. for (i = 0; i < MAX_CTLR; i++) {
  4413. if (hba[i] != NULL) {
  4414. dev_warn(&hba[i]->pdev->dev,
  4415. "had to remove controller\n");
  4416. cciss_remove_one(hba[i]->pdev);
  4417. }
  4418. }
  4419. kthread_stop(cciss_scan_thread);
  4420. remove_proc_entry("driver/cciss", NULL);
  4421. bus_unregister(&cciss_bus_type);
  4422. }
  4423. module_init(cciss_init);
  4424. module_exit(cciss_cleanup);