omap_hwmod.c 118 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "clock.h"
  141. #include "omap_hwmod.h"
  142. #include "soc.h"
  143. #include "common.h"
  144. #include "clockdomain.h"
  145. #include "powerdomain.h"
  146. #include "cm2xxx.h"
  147. #include "cm3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "cm33xx.h"
  150. #include "prm.h"
  151. #include "prm3xxx.h"
  152. #include "prm44xx.h"
  153. #include "prm33xx.h"
  154. #include "prminst44xx.h"
  155. #include "mux.h"
  156. #include "pm.h"
  157. /* Name of the OMAP hwmod for the MPU */
  158. #define MPU_INITIATOR_NAME "mpu"
  159. /*
  160. * Number of struct omap_hwmod_link records per struct
  161. * omap_hwmod_ocp_if record (master->slave and slave->master)
  162. */
  163. #define LINKS_PER_OCP_IF 2
  164. /**
  165. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  166. * @enable_module: function to enable a module (via MODULEMODE)
  167. * @disable_module: function to disable a module (via MODULEMODE)
  168. *
  169. * XXX Eventually this functionality will be hidden inside the PRM/CM
  170. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  171. * conditionals in this code.
  172. */
  173. struct omap_hwmod_soc_ops {
  174. void (*enable_module)(struct omap_hwmod *oh);
  175. int (*disable_module)(struct omap_hwmod *oh);
  176. int (*wait_target_ready)(struct omap_hwmod *oh);
  177. int (*assert_hardreset)(struct omap_hwmod *oh,
  178. struct omap_hwmod_rst_info *ohri);
  179. int (*deassert_hardreset)(struct omap_hwmod *oh,
  180. struct omap_hwmod_rst_info *ohri);
  181. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  182. struct omap_hwmod_rst_info *ohri);
  183. int (*init_clkdm)(struct omap_hwmod *oh);
  184. void (*update_context_lost)(struct omap_hwmod *oh);
  185. int (*get_context_lost)(struct omap_hwmod *oh);
  186. };
  187. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  188. static struct omap_hwmod_soc_ops soc_ops;
  189. /* omap_hwmod_list contains all registered struct omap_hwmods */
  190. static LIST_HEAD(omap_hwmod_list);
  191. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  192. static struct omap_hwmod *mpu_oh;
  193. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  194. static DEFINE_SPINLOCK(io_chain_lock);
  195. /*
  196. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  197. * allocated from - used to reduce the number of small memory
  198. * allocations, which has a significant impact on performance
  199. */
  200. static struct omap_hwmod_link *linkspace;
  201. /*
  202. * free_ls, max_ls: array indexes into linkspace; representing the
  203. * next free struct omap_hwmod_link index, and the maximum number of
  204. * struct omap_hwmod_link records allocated (respectively)
  205. */
  206. static unsigned short free_ls, max_ls, ls_supp;
  207. /* inited: set to true once the hwmod code is initialized */
  208. static bool inited;
  209. /* Private functions */
  210. /**
  211. * _fetch_next_ocp_if - return the next OCP interface in a list
  212. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  213. * @i: pointer to the index of the element pointed to by @p in the list
  214. *
  215. * Return a pointer to the struct omap_hwmod_ocp_if record
  216. * containing the struct list_head pointed to by @p, and increment
  217. * @p such that a future call to this routine will return the next
  218. * record.
  219. */
  220. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  221. int *i)
  222. {
  223. struct omap_hwmod_ocp_if *oi;
  224. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  225. *p = (*p)->next;
  226. *i = *i + 1;
  227. return oi;
  228. }
  229. /**
  230. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  231. * @oh: struct omap_hwmod *
  232. *
  233. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  234. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  235. * OCP_SYSCONFIG register or 0 upon success.
  236. */
  237. static int _update_sysc_cache(struct omap_hwmod *oh)
  238. {
  239. if (!oh->class->sysc) {
  240. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  241. return -EINVAL;
  242. }
  243. /* XXX ensure module interface clock is up */
  244. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  245. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  246. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  247. return 0;
  248. }
  249. /**
  250. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  251. * @v: OCP_SYSCONFIG value to write
  252. * @oh: struct omap_hwmod *
  253. *
  254. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  255. * one. No return value.
  256. */
  257. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  258. {
  259. if (!oh->class->sysc) {
  260. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  261. return;
  262. }
  263. /* XXX ensure module interface clock is up */
  264. /* Module might have lost context, always update cache and register */
  265. oh->_sysc_cache = v;
  266. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  267. }
  268. /**
  269. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  270. * @oh: struct omap_hwmod *
  271. * @standbymode: MIDLEMODE field bits
  272. * @v: pointer to register contents to modify
  273. *
  274. * Update the master standby mode bits in @v to be @standbymode for
  275. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  276. * upon error or 0 upon success.
  277. */
  278. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  279. u32 *v)
  280. {
  281. u32 mstandby_mask;
  282. u8 mstandby_shift;
  283. if (!oh->class->sysc ||
  284. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  285. return -EINVAL;
  286. if (!oh->class->sysc->sysc_fields) {
  287. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  288. return -EINVAL;
  289. }
  290. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  291. mstandby_mask = (0x3 << mstandby_shift);
  292. *v &= ~mstandby_mask;
  293. *v |= __ffs(standbymode) << mstandby_shift;
  294. return 0;
  295. }
  296. /**
  297. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  298. * @oh: struct omap_hwmod *
  299. * @idlemode: SIDLEMODE field bits
  300. * @v: pointer to register contents to modify
  301. *
  302. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  303. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  304. * or 0 upon success.
  305. */
  306. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  307. {
  308. u32 sidle_mask;
  309. u8 sidle_shift;
  310. if (!oh->class->sysc ||
  311. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  312. return -EINVAL;
  313. if (!oh->class->sysc->sysc_fields) {
  314. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  315. return -EINVAL;
  316. }
  317. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  318. sidle_mask = (0x3 << sidle_shift);
  319. *v &= ~sidle_mask;
  320. *v |= __ffs(idlemode) << sidle_shift;
  321. return 0;
  322. }
  323. /**
  324. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  325. * @oh: struct omap_hwmod *
  326. * @clockact: CLOCKACTIVITY field bits
  327. * @v: pointer to register contents to modify
  328. *
  329. * Update the clockactivity mode bits in @v to be @clockact for the
  330. * @oh hwmod. Used for additional powersaving on some modules. Does
  331. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  332. * success.
  333. */
  334. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  335. {
  336. u32 clkact_mask;
  337. u8 clkact_shift;
  338. if (!oh->class->sysc ||
  339. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  340. return -EINVAL;
  341. if (!oh->class->sysc->sysc_fields) {
  342. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  343. return -EINVAL;
  344. }
  345. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  346. clkact_mask = (0x3 << clkact_shift);
  347. *v &= ~clkact_mask;
  348. *v |= clockact << clkact_shift;
  349. return 0;
  350. }
  351. /**
  352. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  353. * @oh: struct omap_hwmod *
  354. * @v: pointer to register contents to modify
  355. *
  356. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  357. * error or 0 upon success.
  358. */
  359. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  360. {
  361. u32 softrst_mask;
  362. if (!oh->class->sysc ||
  363. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  364. return -EINVAL;
  365. if (!oh->class->sysc->sysc_fields) {
  366. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  367. return -EINVAL;
  368. }
  369. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  370. *v |= softrst_mask;
  371. return 0;
  372. }
  373. /**
  374. * _wait_softreset_complete - wait for an OCP softreset to complete
  375. * @oh: struct omap_hwmod * to wait on
  376. *
  377. * Wait until the IP block represented by @oh reports that its OCP
  378. * softreset is complete. This can be triggered by software (see
  379. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  380. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  381. * microseconds. Returns the number of microseconds waited.
  382. */
  383. static int _wait_softreset_complete(struct omap_hwmod *oh)
  384. {
  385. struct omap_hwmod_class_sysconfig *sysc;
  386. u32 softrst_mask;
  387. int c = 0;
  388. sysc = oh->class->sysc;
  389. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  390. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  391. & SYSS_RESETDONE_MASK),
  392. MAX_MODULE_SOFTRESET_WAIT, c);
  393. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  394. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  395. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  396. & softrst_mask),
  397. MAX_MODULE_SOFTRESET_WAIT, c);
  398. }
  399. return c;
  400. }
  401. /**
  402. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  403. * @oh: struct omap_hwmod *
  404. *
  405. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  406. * of some modules. When the DMA must perform read/write accesses, the
  407. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  408. * for power management, software must set the DMADISABLE bit back to 1.
  409. *
  410. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  411. * error or 0 upon success.
  412. */
  413. static int _set_dmadisable(struct omap_hwmod *oh)
  414. {
  415. u32 v;
  416. u32 dmadisable_mask;
  417. if (!oh->class->sysc ||
  418. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  419. return -EINVAL;
  420. if (!oh->class->sysc->sysc_fields) {
  421. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  422. return -EINVAL;
  423. }
  424. /* clocks must be on for this operation */
  425. if (oh->_state != _HWMOD_STATE_ENABLED) {
  426. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  427. return -EINVAL;
  428. }
  429. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  430. v = oh->_sysc_cache;
  431. dmadisable_mask =
  432. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  433. v |= dmadisable_mask;
  434. _write_sysconfig(v, oh);
  435. return 0;
  436. }
  437. /**
  438. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  439. * @oh: struct omap_hwmod *
  440. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  441. * @v: pointer to register contents to modify
  442. *
  443. * Update the module autoidle bit in @v to be @autoidle for the @oh
  444. * hwmod. The autoidle bit controls whether the module can gate
  445. * internal clocks automatically when it isn't doing anything; the
  446. * exact function of this bit varies on a per-module basis. This
  447. * function does not write to the hardware. Returns -EINVAL upon
  448. * error or 0 upon success.
  449. */
  450. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  451. u32 *v)
  452. {
  453. u32 autoidle_mask;
  454. u8 autoidle_shift;
  455. if (!oh->class->sysc ||
  456. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  457. return -EINVAL;
  458. if (!oh->class->sysc->sysc_fields) {
  459. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  460. return -EINVAL;
  461. }
  462. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  463. autoidle_mask = (0x1 << autoidle_shift);
  464. *v &= ~autoidle_mask;
  465. *v |= autoidle << autoidle_shift;
  466. return 0;
  467. }
  468. /**
  469. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  470. * @oh: struct omap_hwmod *
  471. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  472. *
  473. * Set or clear the I/O pad wakeup flag in the mux entries for the
  474. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  475. * in memory. If the hwmod is currently idled, and the new idle
  476. * values don't match the previous ones, this function will also
  477. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  478. * currently idled, this function won't touch the hardware: the new
  479. * mux settings are written to the SCM PADCTRL registers when the
  480. * hwmod is idled. No return value.
  481. */
  482. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  483. {
  484. struct omap_device_pad *pad;
  485. bool change = false;
  486. u16 prev_idle;
  487. int j;
  488. if (!oh->mux || !oh->mux->enabled)
  489. return;
  490. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  491. pad = oh->mux->pads_dynamic[j];
  492. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  493. continue;
  494. prev_idle = pad->idle;
  495. if (set_wake)
  496. pad->idle |= OMAP_WAKEUP_EN;
  497. else
  498. pad->idle &= ~OMAP_WAKEUP_EN;
  499. if (prev_idle != pad->idle)
  500. change = true;
  501. }
  502. if (change && oh->_state == _HWMOD_STATE_IDLE)
  503. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  504. }
  505. /**
  506. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  507. * @oh: struct omap_hwmod *
  508. *
  509. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  510. * upon error or 0 upon success.
  511. */
  512. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  513. {
  514. if (!oh->class->sysc ||
  515. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  516. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  517. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  518. return -EINVAL;
  519. if (!oh->class->sysc->sysc_fields) {
  520. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  521. return -EINVAL;
  522. }
  523. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  524. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  525. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  526. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  527. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  528. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  529. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  530. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  531. return 0;
  532. }
  533. /**
  534. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  538. * upon error or 0 upon success.
  539. */
  540. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  541. {
  542. if (!oh->class->sysc ||
  543. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  544. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  545. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  546. return -EINVAL;
  547. if (!oh->class->sysc->sysc_fields) {
  548. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  549. return -EINVAL;
  550. }
  551. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  552. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  553. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  554. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  555. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  556. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  557. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  558. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  559. return 0;
  560. }
  561. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  562. {
  563. struct clk_hw_omap *clk;
  564. if (oh->clkdm) {
  565. return oh->clkdm;
  566. } else if (oh->_clk) {
  567. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  568. return clk->clkdm;
  569. }
  570. return NULL;
  571. }
  572. /**
  573. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  574. * @oh: struct omap_hwmod *
  575. *
  576. * Prevent the hardware module @oh from entering idle while the
  577. * hardare module initiator @init_oh is active. Useful when a module
  578. * will be accessed by a particular initiator (e.g., if a module will
  579. * be accessed by the IVA, there should be a sleepdep between the IVA
  580. * initiator and the module). Only applies to modules in smart-idle
  581. * mode. If the clockdomain is marked as not needing autodeps, return
  582. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  583. * passes along clkdm_add_sleepdep() value upon success.
  584. */
  585. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  586. {
  587. struct clockdomain *clkdm, *init_clkdm;
  588. clkdm = _get_clkdm(oh);
  589. init_clkdm = _get_clkdm(init_oh);
  590. if (!clkdm || !init_clkdm)
  591. return -EINVAL;
  592. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  593. return 0;
  594. return clkdm_add_sleepdep(clkdm, init_clkdm);
  595. }
  596. /**
  597. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Allow the hardware module @oh to enter idle while the hardare
  601. * module initiator @init_oh is active. Useful when a module will not
  602. * be accessed by a particular initiator (e.g., if a module will not
  603. * be accessed by the IVA, there should be no sleepdep between the IVA
  604. * initiator and the module). Only applies to modules in smart-idle
  605. * mode. If the clockdomain is marked as not needing autodeps, return
  606. * 0 without doing anything. Returns -EINVAL upon error or passes
  607. * along clkdm_del_sleepdep() value upon success.
  608. */
  609. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  610. {
  611. struct clockdomain *clkdm, *init_clkdm;
  612. clkdm = _get_clkdm(oh);
  613. init_clkdm = _get_clkdm(init_oh);
  614. if (!clkdm || !init_clkdm)
  615. return -EINVAL;
  616. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  617. return 0;
  618. return clkdm_del_sleepdep(clkdm, init_clkdm);
  619. }
  620. /**
  621. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  622. * @oh: struct omap_hwmod *
  623. *
  624. * Called from _init_clocks(). Populates the @oh _clk (main
  625. * functional clock pointer) if a main_clk is present. Returns 0 on
  626. * success or -EINVAL on error.
  627. */
  628. static int _init_main_clk(struct omap_hwmod *oh)
  629. {
  630. int ret = 0;
  631. if (!oh->main_clk)
  632. return 0;
  633. oh->_clk = clk_get(NULL, oh->main_clk);
  634. if (IS_ERR(oh->_clk)) {
  635. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  636. oh->name, oh->main_clk);
  637. return -EINVAL;
  638. }
  639. /*
  640. * HACK: This needs a re-visit once clk_prepare() is implemented
  641. * to do something meaningful. Today its just a no-op.
  642. * If clk_prepare() is used at some point to do things like
  643. * voltage scaling etc, then this would have to be moved to
  644. * some point where subsystems like i2c and pmic become
  645. * available.
  646. */
  647. clk_prepare(oh->_clk);
  648. if (!_get_clkdm(oh))
  649. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  650. oh->name, oh->main_clk);
  651. return ret;
  652. }
  653. /**
  654. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  655. * @oh: struct omap_hwmod *
  656. *
  657. * Called from _init_clocks(). Populates the @oh OCP slave interface
  658. * clock pointers. Returns 0 on success or -EINVAL on error.
  659. */
  660. static int _init_interface_clks(struct omap_hwmod *oh)
  661. {
  662. struct omap_hwmod_ocp_if *os;
  663. struct list_head *p;
  664. struct clk *c;
  665. int i = 0;
  666. int ret = 0;
  667. p = oh->slave_ports.next;
  668. while (i < oh->slaves_cnt) {
  669. os = _fetch_next_ocp_if(&p, &i);
  670. if (!os->clk)
  671. continue;
  672. c = clk_get(NULL, os->clk);
  673. if (IS_ERR(c)) {
  674. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  675. oh->name, os->clk);
  676. ret = -EINVAL;
  677. }
  678. os->_clk = c;
  679. /*
  680. * HACK: This needs a re-visit once clk_prepare() is implemented
  681. * to do something meaningful. Today its just a no-op.
  682. * If clk_prepare() is used at some point to do things like
  683. * voltage scaling etc, then this would have to be moved to
  684. * some point where subsystems like i2c and pmic become
  685. * available.
  686. */
  687. clk_prepare(os->_clk);
  688. }
  689. return ret;
  690. }
  691. /**
  692. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  693. * @oh: struct omap_hwmod *
  694. *
  695. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  696. * clock pointers. Returns 0 on success or -EINVAL on error.
  697. */
  698. static int _init_opt_clks(struct omap_hwmod *oh)
  699. {
  700. struct omap_hwmod_opt_clk *oc;
  701. struct clk *c;
  702. int i;
  703. int ret = 0;
  704. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  705. c = clk_get(NULL, oc->clk);
  706. if (IS_ERR(c)) {
  707. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  708. oh->name, oc->clk);
  709. ret = -EINVAL;
  710. }
  711. oc->_clk = c;
  712. /*
  713. * HACK: This needs a re-visit once clk_prepare() is implemented
  714. * to do something meaningful. Today its just a no-op.
  715. * If clk_prepare() is used at some point to do things like
  716. * voltage scaling etc, then this would have to be moved to
  717. * some point where subsystems like i2c and pmic become
  718. * available.
  719. */
  720. clk_prepare(oc->_clk);
  721. }
  722. return ret;
  723. }
  724. /**
  725. * _enable_clocks - enable hwmod main clock and interface clocks
  726. * @oh: struct omap_hwmod *
  727. *
  728. * Enables all clocks necessary for register reads and writes to succeed
  729. * on the hwmod @oh. Returns 0.
  730. */
  731. static int _enable_clocks(struct omap_hwmod *oh)
  732. {
  733. struct omap_hwmod_ocp_if *os;
  734. struct list_head *p;
  735. int i = 0;
  736. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  737. if (oh->_clk)
  738. clk_enable(oh->_clk);
  739. p = oh->slave_ports.next;
  740. while (i < oh->slaves_cnt) {
  741. os = _fetch_next_ocp_if(&p, &i);
  742. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  743. clk_enable(os->_clk);
  744. }
  745. /* The opt clocks are controlled by the device driver. */
  746. return 0;
  747. }
  748. /**
  749. * _disable_clocks - disable hwmod main clock and interface clocks
  750. * @oh: struct omap_hwmod *
  751. *
  752. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  753. */
  754. static int _disable_clocks(struct omap_hwmod *oh)
  755. {
  756. struct omap_hwmod_ocp_if *os;
  757. struct list_head *p;
  758. int i = 0;
  759. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  760. if (oh->_clk)
  761. clk_disable(oh->_clk);
  762. p = oh->slave_ports.next;
  763. while (i < oh->slaves_cnt) {
  764. os = _fetch_next_ocp_if(&p, &i);
  765. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  766. clk_disable(os->_clk);
  767. }
  768. /* The opt clocks are controlled by the device driver. */
  769. return 0;
  770. }
  771. static void _enable_optional_clocks(struct omap_hwmod *oh)
  772. {
  773. struct omap_hwmod_opt_clk *oc;
  774. int i;
  775. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  776. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  777. if (oc->_clk) {
  778. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  779. __clk_get_name(oc->_clk));
  780. clk_enable(oc->_clk);
  781. }
  782. }
  783. static void _disable_optional_clocks(struct omap_hwmod *oh)
  784. {
  785. struct omap_hwmod_opt_clk *oc;
  786. int i;
  787. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  788. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  789. if (oc->_clk) {
  790. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  791. __clk_get_name(oc->_clk));
  792. clk_disable(oc->_clk);
  793. }
  794. }
  795. /**
  796. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  797. * @oh: struct omap_hwmod *
  798. *
  799. * Enables the PRCM module mode related to the hwmod @oh.
  800. * No return value.
  801. */
  802. static void _omap4_enable_module(struct omap_hwmod *oh)
  803. {
  804. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  805. return;
  806. pr_debug("omap_hwmod: %s: %s: %d\n",
  807. oh->name, __func__, oh->prcm.omap4.modulemode);
  808. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  809. oh->clkdm->prcm_partition,
  810. oh->clkdm->cm_inst,
  811. oh->clkdm->clkdm_offs,
  812. oh->prcm.omap4.clkctrl_offs);
  813. }
  814. /**
  815. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  816. * @oh: struct omap_hwmod *
  817. *
  818. * Enables the PRCM module mode related to the hwmod @oh.
  819. * No return value.
  820. */
  821. static void _am33xx_enable_module(struct omap_hwmod *oh)
  822. {
  823. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  824. return;
  825. pr_debug("omap_hwmod: %s: %s: %d\n",
  826. oh->name, __func__, oh->prcm.omap4.modulemode);
  827. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  828. oh->clkdm->clkdm_offs,
  829. oh->prcm.omap4.clkctrl_offs);
  830. }
  831. /**
  832. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  833. * @oh: struct omap_hwmod *
  834. *
  835. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  836. * does not have an IDLEST bit or if the module successfully enters
  837. * slave idle; otherwise, pass along the return value of the
  838. * appropriate *_cm*_wait_module_idle() function.
  839. */
  840. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  841. {
  842. if (!oh)
  843. return -EINVAL;
  844. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  845. return 0;
  846. if (oh->flags & HWMOD_NO_IDLEST)
  847. return 0;
  848. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  849. oh->clkdm->cm_inst,
  850. oh->clkdm->clkdm_offs,
  851. oh->prcm.omap4.clkctrl_offs);
  852. }
  853. /**
  854. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  855. * @oh: struct omap_hwmod *
  856. *
  857. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  858. * does not have an IDLEST bit or if the module successfully enters
  859. * slave idle; otherwise, pass along the return value of the
  860. * appropriate *_cm*_wait_module_idle() function.
  861. */
  862. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  863. {
  864. if (!oh)
  865. return -EINVAL;
  866. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  867. return 0;
  868. if (oh->flags & HWMOD_NO_IDLEST)
  869. return 0;
  870. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  871. oh->clkdm->clkdm_offs,
  872. oh->prcm.omap4.clkctrl_offs);
  873. }
  874. /**
  875. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  876. * @oh: struct omap_hwmod *oh
  877. *
  878. * Count and return the number of MPU IRQs associated with the hwmod
  879. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  880. * NULL.
  881. */
  882. static int _count_mpu_irqs(struct omap_hwmod *oh)
  883. {
  884. struct omap_hwmod_irq_info *ohii;
  885. int i = 0;
  886. if (!oh || !oh->mpu_irqs)
  887. return 0;
  888. do {
  889. ohii = &oh->mpu_irqs[i++];
  890. } while (ohii->irq != -1);
  891. return i-1;
  892. }
  893. /**
  894. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  895. * @oh: struct omap_hwmod *oh
  896. *
  897. * Count and return the number of SDMA request lines associated with
  898. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  899. * if @oh is NULL.
  900. */
  901. static int _count_sdma_reqs(struct omap_hwmod *oh)
  902. {
  903. struct omap_hwmod_dma_info *ohdi;
  904. int i = 0;
  905. if (!oh || !oh->sdma_reqs)
  906. return 0;
  907. do {
  908. ohdi = &oh->sdma_reqs[i++];
  909. } while (ohdi->dma_req != -1);
  910. return i-1;
  911. }
  912. /**
  913. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  914. * @oh: struct omap_hwmod *oh
  915. *
  916. * Count and return the number of address space ranges associated with
  917. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  918. * if @oh is NULL.
  919. */
  920. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  921. {
  922. struct omap_hwmod_addr_space *mem;
  923. int i = 0;
  924. if (!os || !os->addr)
  925. return 0;
  926. do {
  927. mem = &os->addr[i++];
  928. } while (mem->pa_start != mem->pa_end);
  929. return i-1;
  930. }
  931. /**
  932. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  933. * @oh: struct omap_hwmod * to operate on
  934. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  935. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  936. *
  937. * Retrieve a MPU hardware IRQ line number named by @name associated
  938. * with the IP block pointed to by @oh. The IRQ number will be filled
  939. * into the address pointed to by @dma. When @name is non-null, the
  940. * IRQ line number associated with the named entry will be returned.
  941. * If @name is null, the first matching entry will be returned. Data
  942. * order is not meaningful in hwmod data, so callers are strongly
  943. * encouraged to use a non-null @name whenever possible to avoid
  944. * unpredictable effects if hwmod data is later added that causes data
  945. * ordering to change. Returns 0 upon success or a negative error
  946. * code upon error.
  947. */
  948. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  949. unsigned int *irq)
  950. {
  951. int i;
  952. bool found = false;
  953. if (!oh->mpu_irqs)
  954. return -ENOENT;
  955. i = 0;
  956. while (oh->mpu_irqs[i].irq != -1) {
  957. if (name == oh->mpu_irqs[i].name ||
  958. !strcmp(name, oh->mpu_irqs[i].name)) {
  959. found = true;
  960. break;
  961. }
  962. i++;
  963. }
  964. if (!found)
  965. return -ENOENT;
  966. *irq = oh->mpu_irqs[i].irq;
  967. return 0;
  968. }
  969. /**
  970. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  971. * @oh: struct omap_hwmod * to operate on
  972. * @name: pointer to the name of the SDMA request line to fetch (optional)
  973. * @dma: pointer to an unsigned int to store the request line ID to
  974. *
  975. * Retrieve an SDMA request line ID named by @name on the IP block
  976. * pointed to by @oh. The ID will be filled into the address pointed
  977. * to by @dma. When @name is non-null, the request line ID associated
  978. * with the named entry will be returned. If @name is null, the first
  979. * matching entry will be returned. Data order is not meaningful in
  980. * hwmod data, so callers are strongly encouraged to use a non-null
  981. * @name whenever possible to avoid unpredictable effects if hwmod
  982. * data is later added that causes data ordering to change. Returns 0
  983. * upon success or a negative error code upon error.
  984. */
  985. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  986. unsigned int *dma)
  987. {
  988. int i;
  989. bool found = false;
  990. if (!oh->sdma_reqs)
  991. return -ENOENT;
  992. i = 0;
  993. while (oh->sdma_reqs[i].dma_req != -1) {
  994. if (name == oh->sdma_reqs[i].name ||
  995. !strcmp(name, oh->sdma_reqs[i].name)) {
  996. found = true;
  997. break;
  998. }
  999. i++;
  1000. }
  1001. if (!found)
  1002. return -ENOENT;
  1003. *dma = oh->sdma_reqs[i].dma_req;
  1004. return 0;
  1005. }
  1006. /**
  1007. * _get_addr_space_by_name - fetch address space start & end by name
  1008. * @oh: struct omap_hwmod * to operate on
  1009. * @name: pointer to the name of the address space to fetch (optional)
  1010. * @pa_start: pointer to a u32 to store the starting address to
  1011. * @pa_end: pointer to a u32 to store the ending address to
  1012. *
  1013. * Retrieve address space start and end addresses for the IP block
  1014. * pointed to by @oh. The data will be filled into the addresses
  1015. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1016. * address space data associated with the named entry will be
  1017. * returned. If @name is null, the first matching entry will be
  1018. * returned. Data order is not meaningful in hwmod data, so callers
  1019. * are strongly encouraged to use a non-null @name whenever possible
  1020. * to avoid unpredictable effects if hwmod data is later added that
  1021. * causes data ordering to change. Returns 0 upon success or a
  1022. * negative error code upon error.
  1023. */
  1024. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1025. u32 *pa_start, u32 *pa_end)
  1026. {
  1027. int i, j;
  1028. struct omap_hwmod_ocp_if *os;
  1029. struct list_head *p = NULL;
  1030. bool found = false;
  1031. p = oh->slave_ports.next;
  1032. i = 0;
  1033. while (i < oh->slaves_cnt) {
  1034. os = _fetch_next_ocp_if(&p, &i);
  1035. if (!os->addr)
  1036. return -ENOENT;
  1037. j = 0;
  1038. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1039. if (name == os->addr[j].name ||
  1040. !strcmp(name, os->addr[j].name)) {
  1041. found = true;
  1042. break;
  1043. }
  1044. j++;
  1045. }
  1046. if (found)
  1047. break;
  1048. }
  1049. if (!found)
  1050. return -ENOENT;
  1051. *pa_start = os->addr[j].pa_start;
  1052. *pa_end = os->addr[j].pa_end;
  1053. return 0;
  1054. }
  1055. /**
  1056. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1057. * @oh: struct omap_hwmod *
  1058. *
  1059. * Determines the array index of the OCP slave port that the MPU uses
  1060. * to address the device, and saves it into the struct omap_hwmod.
  1061. * Intended to be called during hwmod registration only. No return
  1062. * value.
  1063. */
  1064. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1065. {
  1066. struct omap_hwmod_ocp_if *os = NULL;
  1067. struct list_head *p;
  1068. int i = 0;
  1069. if (!oh)
  1070. return;
  1071. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1072. p = oh->slave_ports.next;
  1073. while (i < oh->slaves_cnt) {
  1074. os = _fetch_next_ocp_if(&p, &i);
  1075. if (os->user & OCP_USER_MPU) {
  1076. oh->_mpu_port = os;
  1077. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1078. break;
  1079. }
  1080. }
  1081. return;
  1082. }
  1083. /**
  1084. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1085. * @oh: struct omap_hwmod *
  1086. *
  1087. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1088. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1089. * communicate with the IP block. This interface need not be directly
  1090. * connected to the MPU (and almost certainly is not), but is directly
  1091. * connected to the IP block represented by @oh. Returns a pointer
  1092. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1093. * error or if there does not appear to be a path from the MPU to this
  1094. * IP block.
  1095. */
  1096. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1097. {
  1098. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1099. return NULL;
  1100. return oh->_mpu_port;
  1101. };
  1102. /**
  1103. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1104. * @oh: struct omap_hwmod *
  1105. *
  1106. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1107. * the register target MPU address space; or returns NULL upon error.
  1108. */
  1109. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1110. {
  1111. struct omap_hwmod_ocp_if *os;
  1112. struct omap_hwmod_addr_space *mem;
  1113. int found = 0, i = 0;
  1114. os = _find_mpu_rt_port(oh);
  1115. if (!os || !os->addr)
  1116. return NULL;
  1117. do {
  1118. mem = &os->addr[i++];
  1119. if (mem->flags & ADDR_TYPE_RT)
  1120. found = 1;
  1121. } while (!found && mem->pa_start != mem->pa_end);
  1122. return (found) ? mem : NULL;
  1123. }
  1124. /**
  1125. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1126. * @oh: struct omap_hwmod *
  1127. *
  1128. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1129. * by @oh is set to indicate to the PRCM that the IP block is active.
  1130. * Usually this means placing the module into smart-idle mode and
  1131. * smart-standby, but if there is a bug in the automatic idle handling
  1132. * for the IP block, it may need to be placed into the force-idle or
  1133. * no-idle variants of these modes. No return value.
  1134. */
  1135. static void _enable_sysc(struct omap_hwmod *oh)
  1136. {
  1137. u8 idlemode, sf;
  1138. u32 v;
  1139. bool clkdm_act;
  1140. struct clockdomain *clkdm;
  1141. if (!oh->class->sysc)
  1142. return;
  1143. /*
  1144. * Wait until reset has completed, this is needed as the IP
  1145. * block is reset automatically by hardware in some cases
  1146. * (off-mode for example), and the drivers require the
  1147. * IP to be ready when they access it
  1148. */
  1149. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1150. _enable_optional_clocks(oh);
  1151. _wait_softreset_complete(oh);
  1152. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1153. _disable_optional_clocks(oh);
  1154. v = oh->_sysc_cache;
  1155. sf = oh->class->sysc->sysc_flags;
  1156. clkdm = _get_clkdm(oh);
  1157. if (sf & SYSC_HAS_SIDLEMODE) {
  1158. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1159. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1160. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1161. idlemode = HWMOD_IDLEMODE_FORCE;
  1162. else
  1163. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1164. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1165. _set_slave_idlemode(oh, idlemode, &v);
  1166. }
  1167. if (sf & SYSC_HAS_MIDLEMODE) {
  1168. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1169. idlemode = HWMOD_IDLEMODE_NO;
  1170. } else {
  1171. if (sf & SYSC_HAS_ENAWAKEUP)
  1172. _enable_wakeup(oh, &v);
  1173. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1174. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1175. else
  1176. idlemode = HWMOD_IDLEMODE_SMART;
  1177. }
  1178. _set_master_standbymode(oh, idlemode, &v);
  1179. }
  1180. /*
  1181. * XXX The clock framework should handle this, by
  1182. * calling into this code. But this must wait until the
  1183. * clock structures are tagged with omap_hwmod entries
  1184. */
  1185. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1186. (sf & SYSC_HAS_CLOCKACTIVITY))
  1187. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1188. /* If slave is in SMARTIDLE, also enable wakeup */
  1189. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1190. _enable_wakeup(oh, &v);
  1191. _write_sysconfig(v, oh);
  1192. /*
  1193. * Set the autoidle bit only after setting the smartidle bit
  1194. * Setting this will not have any impact on the other modules.
  1195. */
  1196. if (sf & SYSC_HAS_AUTOIDLE) {
  1197. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1198. 0 : 1;
  1199. _set_module_autoidle(oh, idlemode, &v);
  1200. _write_sysconfig(v, oh);
  1201. }
  1202. }
  1203. /**
  1204. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1205. * @oh: struct omap_hwmod *
  1206. *
  1207. * If module is marked as SWSUP_SIDLE, force the module into slave
  1208. * idle; otherwise, configure it for smart-idle. If module is marked
  1209. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1210. * configure it for smart-standby. No return value.
  1211. */
  1212. static void _idle_sysc(struct omap_hwmod *oh)
  1213. {
  1214. u8 idlemode, sf;
  1215. u32 v;
  1216. if (!oh->class->sysc)
  1217. return;
  1218. v = oh->_sysc_cache;
  1219. sf = oh->class->sysc->sysc_flags;
  1220. if (sf & SYSC_HAS_SIDLEMODE) {
  1221. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1222. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1223. !(oh->class->sysc->idlemodes &
  1224. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1225. idlemode = HWMOD_IDLEMODE_FORCE;
  1226. else
  1227. idlemode = HWMOD_IDLEMODE_SMART;
  1228. _set_slave_idlemode(oh, idlemode, &v);
  1229. }
  1230. if (sf & SYSC_HAS_MIDLEMODE) {
  1231. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1232. idlemode = HWMOD_IDLEMODE_FORCE;
  1233. } else {
  1234. if (sf & SYSC_HAS_ENAWAKEUP)
  1235. _enable_wakeup(oh, &v);
  1236. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1237. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1238. else
  1239. idlemode = HWMOD_IDLEMODE_SMART;
  1240. }
  1241. _set_master_standbymode(oh, idlemode, &v);
  1242. }
  1243. /* If slave is in SMARTIDLE, also enable wakeup */
  1244. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1245. _enable_wakeup(oh, &v);
  1246. _write_sysconfig(v, oh);
  1247. }
  1248. /**
  1249. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1250. * @oh: struct omap_hwmod *
  1251. *
  1252. * Force the module into slave idle and master suspend. No return
  1253. * value.
  1254. */
  1255. static void _shutdown_sysc(struct omap_hwmod *oh)
  1256. {
  1257. u32 v;
  1258. u8 sf;
  1259. if (!oh->class->sysc)
  1260. return;
  1261. v = oh->_sysc_cache;
  1262. sf = oh->class->sysc->sysc_flags;
  1263. if (sf & SYSC_HAS_SIDLEMODE)
  1264. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1265. if (sf & SYSC_HAS_MIDLEMODE)
  1266. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1267. if (sf & SYSC_HAS_AUTOIDLE)
  1268. _set_module_autoidle(oh, 1, &v);
  1269. _write_sysconfig(v, oh);
  1270. }
  1271. /**
  1272. * _lookup - find an omap_hwmod by name
  1273. * @name: find an omap_hwmod by name
  1274. *
  1275. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1276. */
  1277. static struct omap_hwmod *_lookup(const char *name)
  1278. {
  1279. struct omap_hwmod *oh, *temp_oh;
  1280. oh = NULL;
  1281. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1282. if (!strcmp(name, temp_oh->name)) {
  1283. oh = temp_oh;
  1284. break;
  1285. }
  1286. }
  1287. return oh;
  1288. }
  1289. /**
  1290. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1291. * @oh: struct omap_hwmod *
  1292. *
  1293. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1294. * clockdomain pointer, and save it into the struct omap_hwmod.
  1295. * Return -EINVAL if the clkdm_name lookup failed.
  1296. */
  1297. static int _init_clkdm(struct omap_hwmod *oh)
  1298. {
  1299. if (!oh->clkdm_name) {
  1300. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1301. return 0;
  1302. }
  1303. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1304. if (!oh->clkdm) {
  1305. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1306. oh->name, oh->clkdm_name);
  1307. return -EINVAL;
  1308. }
  1309. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1310. oh->name, oh->clkdm_name);
  1311. return 0;
  1312. }
  1313. /**
  1314. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1315. * well the clockdomain.
  1316. * @oh: struct omap_hwmod *
  1317. * @data: not used; pass NULL
  1318. *
  1319. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1320. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1321. * success, or a negative error code on failure.
  1322. */
  1323. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1324. {
  1325. int ret = 0;
  1326. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1327. return 0;
  1328. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1329. if (soc_ops.init_clkdm)
  1330. ret |= soc_ops.init_clkdm(oh);
  1331. ret |= _init_main_clk(oh);
  1332. ret |= _init_interface_clks(oh);
  1333. ret |= _init_opt_clks(oh);
  1334. if (!ret)
  1335. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1336. else
  1337. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1338. return ret;
  1339. }
  1340. /**
  1341. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1342. * @oh: struct omap_hwmod *
  1343. * @name: name of the reset line in the context of this hwmod
  1344. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1345. *
  1346. * Return the bit position of the reset line that match the
  1347. * input name. Return -ENOENT if not found.
  1348. */
  1349. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1350. struct omap_hwmod_rst_info *ohri)
  1351. {
  1352. int i;
  1353. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1354. const char *rst_line = oh->rst_lines[i].name;
  1355. if (!strcmp(rst_line, name)) {
  1356. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1357. ohri->st_shift = oh->rst_lines[i].st_shift;
  1358. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1359. oh->name, __func__, rst_line, ohri->rst_shift,
  1360. ohri->st_shift);
  1361. return 0;
  1362. }
  1363. }
  1364. return -ENOENT;
  1365. }
  1366. /**
  1367. * _assert_hardreset - assert the HW reset line of submodules
  1368. * contained in the hwmod module.
  1369. * @oh: struct omap_hwmod *
  1370. * @name: name of the reset line to lookup and assert
  1371. *
  1372. * Some IP like dsp, ipu or iva contain processor that require an HW
  1373. * reset line to be assert / deassert in order to enable fully the IP.
  1374. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1375. * asserting the hardreset line on the currently-booted SoC, or passes
  1376. * along the return value from _lookup_hardreset() or the SoC's
  1377. * assert_hardreset code.
  1378. */
  1379. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1380. {
  1381. struct omap_hwmod_rst_info ohri;
  1382. int ret = -EINVAL;
  1383. if (!oh)
  1384. return -EINVAL;
  1385. if (!soc_ops.assert_hardreset)
  1386. return -ENOSYS;
  1387. ret = _lookup_hardreset(oh, name, &ohri);
  1388. if (ret < 0)
  1389. return ret;
  1390. ret = soc_ops.assert_hardreset(oh, &ohri);
  1391. return ret;
  1392. }
  1393. /**
  1394. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1395. * in the hwmod module.
  1396. * @oh: struct omap_hwmod *
  1397. * @name: name of the reset line to look up and deassert
  1398. *
  1399. * Some IP like dsp, ipu or iva contain processor that require an HW
  1400. * reset line to be assert / deassert in order to enable fully the IP.
  1401. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1402. * deasserting the hardreset line on the currently-booted SoC, or passes
  1403. * along the return value from _lookup_hardreset() or the SoC's
  1404. * deassert_hardreset code.
  1405. */
  1406. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1407. {
  1408. struct omap_hwmod_rst_info ohri;
  1409. int ret = -EINVAL;
  1410. int hwsup = 0;
  1411. if (!oh)
  1412. return -EINVAL;
  1413. if (!soc_ops.deassert_hardreset)
  1414. return -ENOSYS;
  1415. ret = _lookup_hardreset(oh, name, &ohri);
  1416. if (IS_ERR_VALUE(ret))
  1417. return ret;
  1418. if (oh->clkdm) {
  1419. /*
  1420. * A clockdomain must be in SW_SUP otherwise reset
  1421. * might not be completed. The clockdomain can be set
  1422. * in HW_AUTO only when the module become ready.
  1423. */
  1424. hwsup = clkdm_in_hwsup(oh->clkdm);
  1425. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1426. if (ret) {
  1427. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1428. oh->name, oh->clkdm->name, ret);
  1429. return ret;
  1430. }
  1431. }
  1432. _enable_clocks(oh);
  1433. if (soc_ops.enable_module)
  1434. soc_ops.enable_module(oh);
  1435. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1436. if (soc_ops.disable_module)
  1437. soc_ops.disable_module(oh);
  1438. _disable_clocks(oh);
  1439. if (ret == -EBUSY)
  1440. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1441. if (!ret) {
  1442. /*
  1443. * Set the clockdomain to HW_AUTO, assuming that the
  1444. * previous state was HW_AUTO.
  1445. */
  1446. if (oh->clkdm && hwsup)
  1447. clkdm_allow_idle(oh->clkdm);
  1448. } else {
  1449. if (oh->clkdm)
  1450. clkdm_hwmod_disable(oh->clkdm, oh);
  1451. }
  1452. return ret;
  1453. }
  1454. /**
  1455. * _read_hardreset - read the HW reset line state of submodules
  1456. * contained in the hwmod module
  1457. * @oh: struct omap_hwmod *
  1458. * @name: name of the reset line to look up and read
  1459. *
  1460. * Return the state of the reset line. Returns -EINVAL if @oh is
  1461. * null, -ENOSYS if we have no way of reading the hardreset line
  1462. * status on the currently-booted SoC, or passes along the return
  1463. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1464. * code.
  1465. */
  1466. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1467. {
  1468. struct omap_hwmod_rst_info ohri;
  1469. int ret = -EINVAL;
  1470. if (!oh)
  1471. return -EINVAL;
  1472. if (!soc_ops.is_hardreset_asserted)
  1473. return -ENOSYS;
  1474. ret = _lookup_hardreset(oh, name, &ohri);
  1475. if (ret < 0)
  1476. return ret;
  1477. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1478. }
  1479. /**
  1480. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1481. * @oh: struct omap_hwmod *
  1482. *
  1483. * If all hardreset lines associated with @oh are asserted, then return true.
  1484. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1485. * associated with @oh are asserted, then return false.
  1486. * This function is used to avoid executing some parts of the IP block
  1487. * enable/disable sequence if its hardreset line is set.
  1488. */
  1489. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1490. {
  1491. int i, rst_cnt = 0;
  1492. if (oh->rst_lines_cnt == 0)
  1493. return false;
  1494. for (i = 0; i < oh->rst_lines_cnt; i++)
  1495. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1496. rst_cnt++;
  1497. if (oh->rst_lines_cnt == rst_cnt)
  1498. return true;
  1499. return false;
  1500. }
  1501. /**
  1502. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1503. * hard-reset
  1504. * @oh: struct omap_hwmod *
  1505. *
  1506. * If any hardreset lines associated with @oh are asserted, then
  1507. * return true. Otherwise, if no hardreset lines associated with @oh
  1508. * are asserted, or if @oh has no hardreset lines, then return false.
  1509. * This function is used to avoid executing some parts of the IP block
  1510. * enable/disable sequence if any hardreset line is set.
  1511. */
  1512. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1513. {
  1514. int rst_cnt = 0;
  1515. int i;
  1516. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1517. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1518. rst_cnt++;
  1519. return (rst_cnt) ? true : false;
  1520. }
  1521. /**
  1522. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1523. * @oh: struct omap_hwmod *
  1524. *
  1525. * Disable the PRCM module mode related to the hwmod @oh.
  1526. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1527. */
  1528. static int _omap4_disable_module(struct omap_hwmod *oh)
  1529. {
  1530. int v;
  1531. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1532. return -EINVAL;
  1533. /*
  1534. * Since integration code might still be doing something, only
  1535. * disable if all lines are under hardreset.
  1536. */
  1537. if (_are_any_hardreset_lines_asserted(oh))
  1538. return 0;
  1539. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1540. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1541. oh->clkdm->cm_inst,
  1542. oh->clkdm->clkdm_offs,
  1543. oh->prcm.omap4.clkctrl_offs);
  1544. v = _omap4_wait_target_disable(oh);
  1545. if (v)
  1546. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1547. oh->name);
  1548. return 0;
  1549. }
  1550. /**
  1551. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1552. * @oh: struct omap_hwmod *
  1553. *
  1554. * Disable the PRCM module mode related to the hwmod @oh.
  1555. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1556. */
  1557. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1558. {
  1559. int v;
  1560. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1561. return -EINVAL;
  1562. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1563. if (_are_any_hardreset_lines_asserted(oh))
  1564. return 0;
  1565. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1566. oh->prcm.omap4.clkctrl_offs);
  1567. v = _am33xx_wait_target_disable(oh);
  1568. if (v)
  1569. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1570. oh->name);
  1571. return 0;
  1572. }
  1573. /**
  1574. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1575. * @oh: struct omap_hwmod *
  1576. *
  1577. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1578. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1579. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1580. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1581. *
  1582. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1583. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1584. * use the SYSCONFIG softreset bit to provide the status.
  1585. *
  1586. * Note that some IP like McBSP do have reset control but don't have
  1587. * reset status.
  1588. */
  1589. static int _ocp_softreset(struct omap_hwmod *oh)
  1590. {
  1591. u32 v;
  1592. int c = 0;
  1593. int ret = 0;
  1594. if (!oh->class->sysc ||
  1595. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1596. return -ENOENT;
  1597. /* clocks must be on for this operation */
  1598. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1599. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1600. oh->name);
  1601. return -EINVAL;
  1602. }
  1603. /* For some modules, all optionnal clocks need to be enabled as well */
  1604. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1605. _enable_optional_clocks(oh);
  1606. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1607. v = oh->_sysc_cache;
  1608. ret = _set_softreset(oh, &v);
  1609. if (ret)
  1610. goto dis_opt_clks;
  1611. _write_sysconfig(v, oh);
  1612. if (oh->class->sysc->srst_udelay)
  1613. udelay(oh->class->sysc->srst_udelay);
  1614. c = _wait_softreset_complete(oh);
  1615. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1616. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1617. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1618. else
  1619. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1620. /*
  1621. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1622. * _wait_target_ready() or _reset()
  1623. */
  1624. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1625. dis_opt_clks:
  1626. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1627. _disable_optional_clocks(oh);
  1628. return ret;
  1629. }
  1630. /**
  1631. * _reset - reset an omap_hwmod
  1632. * @oh: struct omap_hwmod *
  1633. *
  1634. * Resets an omap_hwmod @oh. If the module has a custom reset
  1635. * function pointer defined, then call it to reset the IP block, and
  1636. * pass along its return value to the caller. Otherwise, if the IP
  1637. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1638. * associated with it, call a function to reset the IP block via that
  1639. * method, and pass along the return value to the caller. Finally, if
  1640. * the IP block has some hardreset lines associated with it, assert
  1641. * all of those, but do _not_ deassert them. (This is because driver
  1642. * authors have expressed an apparent requirement to control the
  1643. * deassertion of the hardreset lines themselves.)
  1644. *
  1645. * The default software reset mechanism for most OMAP IP blocks is
  1646. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1647. * hwmods cannot be reset via this method. Some are not targets and
  1648. * therefore have no OCP header registers to access. Others (like the
  1649. * IVA) have idiosyncratic reset sequences. So for these relatively
  1650. * rare cases, custom reset code can be supplied in the struct
  1651. * omap_hwmod_class .reset function pointer.
  1652. *
  1653. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1654. * does not prevent idling of the system. This is necessary for cases
  1655. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1656. * kernel without disabling dma.
  1657. *
  1658. * Passes along the return value from either _ocp_softreset() or the
  1659. * custom reset function - these must return -EINVAL if the hwmod
  1660. * cannot be reset this way or if the hwmod is in the wrong state,
  1661. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1662. */
  1663. static int _reset(struct omap_hwmod *oh)
  1664. {
  1665. int i, r;
  1666. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1667. if (oh->class->reset) {
  1668. r = oh->class->reset(oh);
  1669. } else {
  1670. if (oh->rst_lines_cnt > 0) {
  1671. for (i = 0; i < oh->rst_lines_cnt; i++)
  1672. _assert_hardreset(oh, oh->rst_lines[i].name);
  1673. return 0;
  1674. } else {
  1675. r = _ocp_softreset(oh);
  1676. if (r == -ENOENT)
  1677. r = 0;
  1678. }
  1679. }
  1680. _set_dmadisable(oh);
  1681. /*
  1682. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1683. * softreset. The _enable() function should be split to avoid
  1684. * the rewrite of the OCP_SYSCONFIG register.
  1685. */
  1686. if (oh->class->sysc) {
  1687. _update_sysc_cache(oh);
  1688. _enable_sysc(oh);
  1689. }
  1690. return r;
  1691. }
  1692. /**
  1693. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1694. *
  1695. * Call the appropriate PRM function to clear any logged I/O chain
  1696. * wakeups and to reconfigure the chain. This apparently needs to be
  1697. * done upon every mux change. Since hwmods can be concurrently
  1698. * enabled and idled, hold a spinlock around the I/O chain
  1699. * reconfiguration sequence. No return value.
  1700. *
  1701. * XXX When the PRM code is moved to drivers, this function can be removed,
  1702. * as the PRM infrastructure should abstract this.
  1703. */
  1704. static void _reconfigure_io_chain(void)
  1705. {
  1706. unsigned long flags;
  1707. spin_lock_irqsave(&io_chain_lock, flags);
  1708. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1709. omap3xxx_prm_reconfigure_io_chain();
  1710. else if (cpu_is_omap44xx())
  1711. omap44xx_prm_reconfigure_io_chain();
  1712. spin_unlock_irqrestore(&io_chain_lock, flags);
  1713. }
  1714. /**
  1715. * _omap4_update_context_lost - increment hwmod context loss counter if
  1716. * hwmod context was lost, and clear hardware context loss reg
  1717. * @oh: hwmod to check for context loss
  1718. *
  1719. * If the PRCM indicates that the hwmod @oh lost context, increment
  1720. * our in-memory context loss counter, and clear the RM_*_CONTEXT
  1721. * bits. No return value.
  1722. */
  1723. static void _omap4_update_context_lost(struct omap_hwmod *oh)
  1724. {
  1725. if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
  1726. return;
  1727. if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1728. oh->clkdm->pwrdm.ptr->prcm_offs,
  1729. oh->prcm.omap4.context_offs))
  1730. return;
  1731. oh->prcm.omap4.context_lost_counter++;
  1732. prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1733. oh->clkdm->pwrdm.ptr->prcm_offs,
  1734. oh->prcm.omap4.context_offs);
  1735. }
  1736. /**
  1737. * _omap4_get_context_lost - get context loss counter for a hwmod
  1738. * @oh: hwmod to get context loss counter for
  1739. *
  1740. * Returns the in-memory context loss counter for a hwmod.
  1741. */
  1742. static int _omap4_get_context_lost(struct omap_hwmod *oh)
  1743. {
  1744. return oh->prcm.omap4.context_lost_counter;
  1745. }
  1746. /**
  1747. * _enable - enable an omap_hwmod
  1748. * @oh: struct omap_hwmod *
  1749. *
  1750. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1751. * register target. Returns -EINVAL if the hwmod is in the wrong
  1752. * state or passes along the return value of _wait_target_ready().
  1753. */
  1754. static int _enable(struct omap_hwmod *oh)
  1755. {
  1756. int r;
  1757. int hwsup = 0;
  1758. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1759. /*
  1760. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1761. * state at init. Now that someone is really trying to enable
  1762. * them, just ensure that the hwmod mux is set.
  1763. */
  1764. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1765. /*
  1766. * If the caller has mux data populated, do the mux'ing
  1767. * which wouldn't have been done as part of the _enable()
  1768. * done during setup.
  1769. */
  1770. if (oh->mux)
  1771. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1772. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1773. return 0;
  1774. }
  1775. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1776. oh->_state != _HWMOD_STATE_IDLE &&
  1777. oh->_state != _HWMOD_STATE_DISABLED) {
  1778. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1779. oh->name);
  1780. return -EINVAL;
  1781. }
  1782. /*
  1783. * If an IP block contains HW reset lines and all of them are
  1784. * asserted, we let integration code associated with that
  1785. * block handle the enable. We've received very little
  1786. * information on what those driver authors need, and until
  1787. * detailed information is provided and the driver code is
  1788. * posted to the public lists, this is probably the best we
  1789. * can do.
  1790. */
  1791. if (_are_all_hardreset_lines_asserted(oh))
  1792. return 0;
  1793. /* Mux pins for device runtime if populated */
  1794. if (oh->mux && (!oh->mux->enabled ||
  1795. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1796. oh->mux->pads_dynamic))) {
  1797. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1798. _reconfigure_io_chain();
  1799. }
  1800. _add_initiator_dep(oh, mpu_oh);
  1801. if (oh->clkdm) {
  1802. /*
  1803. * A clockdomain must be in SW_SUP before enabling
  1804. * completely the module. The clockdomain can be set
  1805. * in HW_AUTO only when the module become ready.
  1806. */
  1807. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1808. !clkdm_missing_idle_reporting(oh->clkdm);
  1809. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1810. if (r) {
  1811. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1812. oh->name, oh->clkdm->name, r);
  1813. return r;
  1814. }
  1815. }
  1816. _enable_clocks(oh);
  1817. if (soc_ops.enable_module)
  1818. soc_ops.enable_module(oh);
  1819. if (soc_ops.update_context_lost)
  1820. soc_ops.update_context_lost(oh);
  1821. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1822. -EINVAL;
  1823. if (!r) {
  1824. /*
  1825. * Set the clockdomain to HW_AUTO only if the target is ready,
  1826. * assuming that the previous state was HW_AUTO
  1827. */
  1828. if (oh->clkdm && hwsup)
  1829. clkdm_allow_idle(oh->clkdm);
  1830. oh->_state = _HWMOD_STATE_ENABLED;
  1831. /* Access the sysconfig only if the target is ready */
  1832. if (oh->class->sysc) {
  1833. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1834. _update_sysc_cache(oh);
  1835. _enable_sysc(oh);
  1836. }
  1837. } else {
  1838. if (soc_ops.disable_module)
  1839. soc_ops.disable_module(oh);
  1840. _disable_clocks(oh);
  1841. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1842. oh->name, r);
  1843. if (oh->clkdm)
  1844. clkdm_hwmod_disable(oh->clkdm, oh);
  1845. }
  1846. return r;
  1847. }
  1848. /**
  1849. * _idle - idle an omap_hwmod
  1850. * @oh: struct omap_hwmod *
  1851. *
  1852. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1853. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1854. * state or returns 0.
  1855. */
  1856. static int _idle(struct omap_hwmod *oh)
  1857. {
  1858. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1859. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1860. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1861. oh->name);
  1862. return -EINVAL;
  1863. }
  1864. if (_are_all_hardreset_lines_asserted(oh))
  1865. return 0;
  1866. if (oh->class->sysc)
  1867. _idle_sysc(oh);
  1868. _del_initiator_dep(oh, mpu_oh);
  1869. if (soc_ops.disable_module)
  1870. soc_ops.disable_module(oh);
  1871. /*
  1872. * The module must be in idle mode before disabling any parents
  1873. * clocks. Otherwise, the parent clock might be disabled before
  1874. * the module transition is done, and thus will prevent the
  1875. * transition to complete properly.
  1876. */
  1877. _disable_clocks(oh);
  1878. if (oh->clkdm)
  1879. clkdm_hwmod_disable(oh->clkdm, oh);
  1880. /* Mux pins for device idle if populated */
  1881. if (oh->mux && oh->mux->pads_dynamic) {
  1882. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1883. _reconfigure_io_chain();
  1884. }
  1885. oh->_state = _HWMOD_STATE_IDLE;
  1886. return 0;
  1887. }
  1888. /**
  1889. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1890. * @oh: struct omap_hwmod *
  1891. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1892. *
  1893. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1894. * local copy. Intended to be used by drivers that require
  1895. * direct manipulation of the AUTOIDLE bits.
  1896. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1897. * along the return value from _set_module_autoidle().
  1898. *
  1899. * Any users of this function should be scrutinized carefully.
  1900. */
  1901. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1902. {
  1903. u32 v;
  1904. int retval = 0;
  1905. unsigned long flags;
  1906. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1907. return -EINVAL;
  1908. spin_lock_irqsave(&oh->_lock, flags);
  1909. v = oh->_sysc_cache;
  1910. retval = _set_module_autoidle(oh, autoidle, &v);
  1911. if (!retval)
  1912. _write_sysconfig(v, oh);
  1913. spin_unlock_irqrestore(&oh->_lock, flags);
  1914. return retval;
  1915. }
  1916. /**
  1917. * _shutdown - shutdown an omap_hwmod
  1918. * @oh: struct omap_hwmod *
  1919. *
  1920. * Shut down an omap_hwmod @oh. This should be called when the driver
  1921. * used for the hwmod is removed or unloaded or if the driver is not
  1922. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1923. * state or returns 0.
  1924. */
  1925. static int _shutdown(struct omap_hwmod *oh)
  1926. {
  1927. int ret, i;
  1928. u8 prev_state;
  1929. if (oh->_state != _HWMOD_STATE_IDLE &&
  1930. oh->_state != _HWMOD_STATE_ENABLED) {
  1931. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1932. oh->name);
  1933. return -EINVAL;
  1934. }
  1935. if (_are_all_hardreset_lines_asserted(oh))
  1936. return 0;
  1937. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1938. if (oh->class->pre_shutdown) {
  1939. prev_state = oh->_state;
  1940. if (oh->_state == _HWMOD_STATE_IDLE)
  1941. _enable(oh);
  1942. ret = oh->class->pre_shutdown(oh);
  1943. if (ret) {
  1944. if (prev_state == _HWMOD_STATE_IDLE)
  1945. _idle(oh);
  1946. return ret;
  1947. }
  1948. }
  1949. if (oh->class->sysc) {
  1950. if (oh->_state == _HWMOD_STATE_IDLE)
  1951. _enable(oh);
  1952. _shutdown_sysc(oh);
  1953. }
  1954. /* clocks and deps are already disabled in idle */
  1955. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1956. _del_initiator_dep(oh, mpu_oh);
  1957. /* XXX what about the other system initiators here? dma, dsp */
  1958. if (soc_ops.disable_module)
  1959. soc_ops.disable_module(oh);
  1960. _disable_clocks(oh);
  1961. if (oh->clkdm)
  1962. clkdm_hwmod_disable(oh->clkdm, oh);
  1963. }
  1964. /* XXX Should this code also force-disable the optional clocks? */
  1965. for (i = 0; i < oh->rst_lines_cnt; i++)
  1966. _assert_hardreset(oh, oh->rst_lines[i].name);
  1967. /* Mux pins to safe mode or use populated off mode values */
  1968. if (oh->mux)
  1969. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1970. oh->_state = _HWMOD_STATE_DISABLED;
  1971. return 0;
  1972. }
  1973. /**
  1974. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1975. * @oh: struct omap_hwmod * to locate the virtual address
  1976. *
  1977. * Cache the virtual address used by the MPU to access this IP block's
  1978. * registers. This address is needed early so the OCP registers that
  1979. * are part of the device's address space can be ioremapped properly.
  1980. * No return value.
  1981. */
  1982. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1983. {
  1984. struct omap_hwmod_addr_space *mem;
  1985. void __iomem *va_start;
  1986. if (!oh)
  1987. return;
  1988. _save_mpu_port_index(oh);
  1989. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1990. return;
  1991. mem = _find_mpu_rt_addr_space(oh);
  1992. if (!mem) {
  1993. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1994. oh->name);
  1995. return;
  1996. }
  1997. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1998. if (!va_start) {
  1999. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  2000. return;
  2001. }
  2002. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  2003. oh->name, va_start);
  2004. oh->_mpu_rt_va = va_start;
  2005. }
  2006. /**
  2007. * _init - initialize internal data for the hwmod @oh
  2008. * @oh: struct omap_hwmod *
  2009. * @n: (unused)
  2010. *
  2011. * Look up the clocks and the address space used by the MPU to access
  2012. * registers belonging to the hwmod @oh. @oh must already be
  2013. * registered at this point. This is the first of two phases for
  2014. * hwmod initialization. Code called here does not touch any hardware
  2015. * registers, it simply prepares internal data structures. Returns 0
  2016. * upon success or if the hwmod isn't registered, or -EINVAL upon
  2017. * failure.
  2018. */
  2019. static int __init _init(struct omap_hwmod *oh, void *data)
  2020. {
  2021. int r;
  2022. if (oh->_state != _HWMOD_STATE_REGISTERED)
  2023. return 0;
  2024. _init_mpu_rt_base(oh, NULL);
  2025. r = _init_clocks(oh, NULL);
  2026. if (IS_ERR_VALUE(r)) {
  2027. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  2028. return -EINVAL;
  2029. }
  2030. oh->_state = _HWMOD_STATE_INITIALIZED;
  2031. return 0;
  2032. }
  2033. /**
  2034. * _setup_iclk_autoidle - configure an IP block's interface clocks
  2035. * @oh: struct omap_hwmod *
  2036. *
  2037. * Set up the module's interface clocks. XXX This function is still mostly
  2038. * a stub; implementing this properly requires iclk autoidle usecounting in
  2039. * the clock code. No return value.
  2040. */
  2041. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2042. {
  2043. struct omap_hwmod_ocp_if *os;
  2044. struct list_head *p;
  2045. int i = 0;
  2046. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2047. return;
  2048. p = oh->slave_ports.next;
  2049. while (i < oh->slaves_cnt) {
  2050. os = _fetch_next_ocp_if(&p, &i);
  2051. if (!os->_clk)
  2052. continue;
  2053. if (os->flags & OCPIF_SWSUP_IDLE) {
  2054. /* XXX omap_iclk_deny_idle(c); */
  2055. } else {
  2056. /* XXX omap_iclk_allow_idle(c); */
  2057. clk_enable(os->_clk);
  2058. }
  2059. }
  2060. return;
  2061. }
  2062. /**
  2063. * _setup_reset - reset an IP block during the setup process
  2064. * @oh: struct omap_hwmod *
  2065. *
  2066. * Reset the IP block corresponding to the hwmod @oh during the setup
  2067. * process. The IP block is first enabled so it can be successfully
  2068. * reset. Returns 0 upon success or a negative error code upon
  2069. * failure.
  2070. */
  2071. static int __init _setup_reset(struct omap_hwmod *oh)
  2072. {
  2073. int r;
  2074. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2075. return -EINVAL;
  2076. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2077. return -EPERM;
  2078. if (oh->rst_lines_cnt == 0) {
  2079. r = _enable(oh);
  2080. if (r) {
  2081. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2082. oh->name, oh->_state);
  2083. return -EINVAL;
  2084. }
  2085. }
  2086. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2087. r = _reset(oh);
  2088. return r;
  2089. }
  2090. /**
  2091. * _setup_postsetup - transition to the appropriate state after _setup
  2092. * @oh: struct omap_hwmod *
  2093. *
  2094. * Place an IP block represented by @oh into a "post-setup" state --
  2095. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2096. * this function is called at the end of _setup().) The postsetup
  2097. * state for an IP block can be changed by calling
  2098. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2099. * before one of the omap_hwmod_setup*() functions are called for the
  2100. * IP block.
  2101. *
  2102. * The IP block stays in this state until a PM runtime-based driver is
  2103. * loaded for that IP block. A post-setup state of IDLE is
  2104. * appropriate for almost all IP blocks with runtime PM-enabled
  2105. * drivers, since those drivers are able to enable the IP block. A
  2106. * post-setup state of ENABLED is appropriate for kernels with PM
  2107. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2108. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2109. * included, since the WDTIMER starts running on reset and will reset
  2110. * the MPU if left active.
  2111. *
  2112. * This post-setup mechanism is deprecated. Once all of the OMAP
  2113. * drivers have been converted to use PM runtime, and all of the IP
  2114. * block data and interconnect data is available to the hwmod code, it
  2115. * should be possible to replace this mechanism with a "lazy reset"
  2116. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2117. * when the driver first probes, then all remaining IP blocks without
  2118. * drivers are either shut down or enabled after the drivers have
  2119. * loaded. However, this cannot take place until the above
  2120. * preconditions have been met, since otherwise the late reset code
  2121. * has no way of knowing which IP blocks are in use by drivers, and
  2122. * which ones are unused.
  2123. *
  2124. * No return value.
  2125. */
  2126. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2127. {
  2128. u8 postsetup_state;
  2129. if (oh->rst_lines_cnt > 0)
  2130. return;
  2131. postsetup_state = oh->_postsetup_state;
  2132. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2133. postsetup_state = _HWMOD_STATE_ENABLED;
  2134. /*
  2135. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2136. * it should be set by the core code as a runtime flag during startup
  2137. */
  2138. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2139. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2140. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2141. postsetup_state = _HWMOD_STATE_ENABLED;
  2142. }
  2143. if (postsetup_state == _HWMOD_STATE_IDLE)
  2144. _idle(oh);
  2145. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2146. _shutdown(oh);
  2147. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2148. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2149. oh->name, postsetup_state);
  2150. return;
  2151. }
  2152. /**
  2153. * _setup - prepare IP block hardware for use
  2154. * @oh: struct omap_hwmod *
  2155. * @n: (unused, pass NULL)
  2156. *
  2157. * Configure the IP block represented by @oh. This may include
  2158. * enabling the IP block, resetting it, and placing it into a
  2159. * post-setup state, depending on the type of IP block and applicable
  2160. * flags. IP blocks are reset to prevent any previous configuration
  2161. * by the bootloader or previous operating system from interfering
  2162. * with power management or other parts of the system. The reset can
  2163. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2164. * two phases for hwmod initialization. Code called here generally
  2165. * affects the IP block hardware, or system integration hardware
  2166. * associated with the IP block. Returns 0.
  2167. */
  2168. static int __init _setup(struct omap_hwmod *oh, void *data)
  2169. {
  2170. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2171. return 0;
  2172. _setup_iclk_autoidle(oh);
  2173. if (!_setup_reset(oh))
  2174. _setup_postsetup(oh);
  2175. return 0;
  2176. }
  2177. /**
  2178. * _register - register a struct omap_hwmod
  2179. * @oh: struct omap_hwmod *
  2180. *
  2181. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2182. * already has been registered by the same name; -EINVAL if the
  2183. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2184. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2185. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2186. * success.
  2187. *
  2188. * XXX The data should be copied into bootmem, so the original data
  2189. * should be marked __initdata and freed after init. This would allow
  2190. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2191. * that the copy process would be relatively complex due to the large number
  2192. * of substructures.
  2193. */
  2194. static int __init _register(struct omap_hwmod *oh)
  2195. {
  2196. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2197. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2198. return -EINVAL;
  2199. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2200. if (_lookup(oh->name))
  2201. return -EEXIST;
  2202. list_add_tail(&oh->node, &omap_hwmod_list);
  2203. INIT_LIST_HEAD(&oh->master_ports);
  2204. INIT_LIST_HEAD(&oh->slave_ports);
  2205. spin_lock_init(&oh->_lock);
  2206. oh->_state = _HWMOD_STATE_REGISTERED;
  2207. /*
  2208. * XXX Rather than doing a strcmp(), this should test a flag
  2209. * set in the hwmod data, inserted by the autogenerator code.
  2210. */
  2211. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2212. mpu_oh = oh;
  2213. return 0;
  2214. }
  2215. /**
  2216. * _alloc_links - return allocated memory for hwmod links
  2217. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2218. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2219. *
  2220. * Return pointers to two struct omap_hwmod_link records, via the
  2221. * addresses pointed to by @ml and @sl. Will first attempt to return
  2222. * memory allocated as part of a large initial block, but if that has
  2223. * been exhausted, will allocate memory itself. Since ideally this
  2224. * second allocation path will never occur, the number of these
  2225. * 'supplemental' allocations will be logged when debugging is
  2226. * enabled. Returns 0.
  2227. */
  2228. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2229. struct omap_hwmod_link **sl)
  2230. {
  2231. unsigned int sz;
  2232. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2233. *ml = &linkspace[free_ls++];
  2234. *sl = &linkspace[free_ls++];
  2235. return 0;
  2236. }
  2237. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2238. *sl = NULL;
  2239. *ml = alloc_bootmem(sz);
  2240. memset(*ml, 0, sz);
  2241. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2242. ls_supp++;
  2243. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2244. ls_supp * LINKS_PER_OCP_IF);
  2245. return 0;
  2246. };
  2247. /**
  2248. * _add_link - add an interconnect between two IP blocks
  2249. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2250. *
  2251. * Add struct omap_hwmod_link records connecting the master IP block
  2252. * specified in @oi->master to @oi, and connecting the slave IP block
  2253. * specified in @oi->slave to @oi. This code is assumed to run before
  2254. * preemption or SMP has been enabled, thus avoiding the need for
  2255. * locking in this code. Changes to this assumption will require
  2256. * additional locking. Returns 0.
  2257. */
  2258. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2259. {
  2260. struct omap_hwmod_link *ml, *sl;
  2261. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2262. oi->slave->name);
  2263. _alloc_links(&ml, &sl);
  2264. ml->ocp_if = oi;
  2265. INIT_LIST_HEAD(&ml->node);
  2266. list_add(&ml->node, &oi->master->master_ports);
  2267. oi->master->masters_cnt++;
  2268. sl->ocp_if = oi;
  2269. INIT_LIST_HEAD(&sl->node);
  2270. list_add(&sl->node, &oi->slave->slave_ports);
  2271. oi->slave->slaves_cnt++;
  2272. return 0;
  2273. }
  2274. /**
  2275. * _register_link - register a struct omap_hwmod_ocp_if
  2276. * @oi: struct omap_hwmod_ocp_if *
  2277. *
  2278. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2279. * has already been registered; -EINVAL if @oi is NULL or if the
  2280. * record pointed to by @oi is missing required fields; or 0 upon
  2281. * success.
  2282. *
  2283. * XXX The data should be copied into bootmem, so the original data
  2284. * should be marked __initdata and freed after init. This would allow
  2285. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2286. */
  2287. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2288. {
  2289. if (!oi || !oi->master || !oi->slave || !oi->user)
  2290. return -EINVAL;
  2291. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2292. return -EEXIST;
  2293. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2294. oi->master->name, oi->slave->name);
  2295. /*
  2296. * Register the connected hwmods, if they haven't been
  2297. * registered already
  2298. */
  2299. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2300. _register(oi->master);
  2301. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2302. _register(oi->slave);
  2303. _add_link(oi);
  2304. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2305. return 0;
  2306. }
  2307. /**
  2308. * _alloc_linkspace - allocate large block of hwmod links
  2309. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2310. *
  2311. * Allocate a large block of struct omap_hwmod_link records. This
  2312. * improves boot time significantly by avoiding the need to allocate
  2313. * individual records one by one. If the number of records to
  2314. * allocate in the block hasn't been manually specified, this function
  2315. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2316. * and use that to determine the allocation size. For SoC families
  2317. * that require multiple list registrations, such as OMAP3xxx, this
  2318. * estimation process isn't optimal, so manual estimation is advised
  2319. * in those cases. Returns -EEXIST if the allocation has already occurred
  2320. * or 0 upon success.
  2321. */
  2322. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2323. {
  2324. unsigned int i = 0;
  2325. unsigned int sz;
  2326. if (linkspace) {
  2327. WARN(1, "linkspace already allocated\n");
  2328. return -EEXIST;
  2329. }
  2330. if (max_ls == 0)
  2331. while (ois[i++])
  2332. max_ls += LINKS_PER_OCP_IF;
  2333. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2334. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2335. __func__, sz, max_ls);
  2336. linkspace = alloc_bootmem(sz);
  2337. memset(linkspace, 0, sz);
  2338. return 0;
  2339. }
  2340. /* Static functions intended only for use in soc_ops field function pointers */
  2341. /**
  2342. * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
  2343. * @oh: struct omap_hwmod *
  2344. *
  2345. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2346. * does not have an IDLEST bit or if the module successfully leaves
  2347. * slave idle; otherwise, pass along the return value of the
  2348. * appropriate *_cm*_wait_module_ready() function.
  2349. */
  2350. static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
  2351. {
  2352. if (!oh)
  2353. return -EINVAL;
  2354. if (oh->flags & HWMOD_NO_IDLEST)
  2355. return 0;
  2356. if (!_find_mpu_rt_port(oh))
  2357. return 0;
  2358. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2359. return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2360. oh->prcm.omap2.idlest_reg_id,
  2361. oh->prcm.omap2.idlest_idle_bit);
  2362. }
  2363. /**
  2364. * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  2365. * @oh: struct omap_hwmod *
  2366. *
  2367. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2368. * does not have an IDLEST bit or if the module successfully leaves
  2369. * slave idle; otherwise, pass along the return value of the
  2370. * appropriate *_cm*_wait_module_ready() function.
  2371. */
  2372. static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
  2373. {
  2374. if (!oh)
  2375. return -EINVAL;
  2376. if (oh->flags & HWMOD_NO_IDLEST)
  2377. return 0;
  2378. if (!_find_mpu_rt_port(oh))
  2379. return 0;
  2380. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2381. return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2382. oh->prcm.omap2.idlest_reg_id,
  2383. oh->prcm.omap2.idlest_idle_bit);
  2384. }
  2385. /**
  2386. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2387. * @oh: struct omap_hwmod *
  2388. *
  2389. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2390. * does not have an IDLEST bit or if the module successfully leaves
  2391. * slave idle; otherwise, pass along the return value of the
  2392. * appropriate *_cm*_wait_module_ready() function.
  2393. */
  2394. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2395. {
  2396. if (!oh)
  2397. return -EINVAL;
  2398. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2399. return 0;
  2400. if (!_find_mpu_rt_port(oh))
  2401. return 0;
  2402. /* XXX check module SIDLEMODE, hardreset status */
  2403. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2404. oh->clkdm->cm_inst,
  2405. oh->clkdm->clkdm_offs,
  2406. oh->prcm.omap4.clkctrl_offs);
  2407. }
  2408. /**
  2409. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2410. * @oh: struct omap_hwmod *
  2411. *
  2412. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2413. * does not have an IDLEST bit or if the module successfully leaves
  2414. * slave idle; otherwise, pass along the return value of the
  2415. * appropriate *_cm*_wait_module_ready() function.
  2416. */
  2417. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2418. {
  2419. if (!oh || !oh->clkdm)
  2420. return -EINVAL;
  2421. if (oh->flags & HWMOD_NO_IDLEST)
  2422. return 0;
  2423. if (!_find_mpu_rt_port(oh))
  2424. return 0;
  2425. /* XXX check module SIDLEMODE, hardreset status */
  2426. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2427. oh->clkdm->clkdm_offs,
  2428. oh->prcm.omap4.clkctrl_offs);
  2429. }
  2430. /**
  2431. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2432. * @oh: struct omap_hwmod * to assert hardreset
  2433. * @ohri: hardreset line data
  2434. *
  2435. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2436. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2437. * use as an soc_ops function pointer. Passes along the return value
  2438. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2439. * for removal when the PRM code is moved into drivers/.
  2440. */
  2441. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2442. struct omap_hwmod_rst_info *ohri)
  2443. {
  2444. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2445. ohri->rst_shift);
  2446. }
  2447. /**
  2448. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2449. * @oh: struct omap_hwmod * to deassert hardreset
  2450. * @ohri: hardreset line data
  2451. *
  2452. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2453. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2454. * use as an soc_ops function pointer. Passes along the return value
  2455. * from omap2_prm_deassert_hardreset(). XXX This function is
  2456. * scheduled for removal when the PRM code is moved into drivers/.
  2457. */
  2458. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2459. struct omap_hwmod_rst_info *ohri)
  2460. {
  2461. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2462. ohri->rst_shift,
  2463. ohri->st_shift);
  2464. }
  2465. /**
  2466. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2467. * @oh: struct omap_hwmod * to test hardreset
  2468. * @ohri: hardreset line data
  2469. *
  2470. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2471. * from the hwmod @oh and the hardreset line data @ohri. Only
  2472. * intended for use as an soc_ops function pointer. Passes along the
  2473. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2474. * function is scheduled for removal when the PRM code is moved into
  2475. * drivers/.
  2476. */
  2477. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2478. struct omap_hwmod_rst_info *ohri)
  2479. {
  2480. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2481. ohri->st_shift);
  2482. }
  2483. /**
  2484. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2485. * @oh: struct omap_hwmod * to assert hardreset
  2486. * @ohri: hardreset line data
  2487. *
  2488. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2489. * from the hwmod @oh and the hardreset line data @ohri. Only
  2490. * intended for use as an soc_ops function pointer. Passes along the
  2491. * return value from omap4_prminst_assert_hardreset(). XXX This
  2492. * function is scheduled for removal when the PRM code is moved into
  2493. * drivers/.
  2494. */
  2495. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2496. struct omap_hwmod_rst_info *ohri)
  2497. {
  2498. if (!oh->clkdm)
  2499. return -EINVAL;
  2500. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2501. oh->clkdm->pwrdm.ptr->prcm_partition,
  2502. oh->clkdm->pwrdm.ptr->prcm_offs,
  2503. oh->prcm.omap4.rstctrl_offs);
  2504. }
  2505. /**
  2506. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2507. * @oh: struct omap_hwmod * to deassert hardreset
  2508. * @ohri: hardreset line data
  2509. *
  2510. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2511. * from the hwmod @oh and the hardreset line data @ohri. Only
  2512. * intended for use as an soc_ops function pointer. Passes along the
  2513. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2514. * function is scheduled for removal when the PRM code is moved into
  2515. * drivers/.
  2516. */
  2517. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2518. struct omap_hwmod_rst_info *ohri)
  2519. {
  2520. if (!oh->clkdm)
  2521. return -EINVAL;
  2522. if (ohri->st_shift)
  2523. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2524. oh->name, ohri->name);
  2525. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2526. oh->clkdm->pwrdm.ptr->prcm_partition,
  2527. oh->clkdm->pwrdm.ptr->prcm_offs,
  2528. oh->prcm.omap4.rstctrl_offs);
  2529. }
  2530. /**
  2531. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2532. * @oh: struct omap_hwmod * to test hardreset
  2533. * @ohri: hardreset line data
  2534. *
  2535. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2536. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2537. * Only intended for use as an soc_ops function pointer. Passes along
  2538. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2539. * This function is scheduled for removal when the PRM code is moved
  2540. * into drivers/.
  2541. */
  2542. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2543. struct omap_hwmod_rst_info *ohri)
  2544. {
  2545. if (!oh->clkdm)
  2546. return -EINVAL;
  2547. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2548. oh->clkdm->pwrdm.ptr->prcm_partition,
  2549. oh->clkdm->pwrdm.ptr->prcm_offs,
  2550. oh->prcm.omap4.rstctrl_offs);
  2551. }
  2552. /**
  2553. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2554. * @oh: struct omap_hwmod * to assert hardreset
  2555. * @ohri: hardreset line data
  2556. *
  2557. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2558. * from the hwmod @oh and the hardreset line data @ohri. Only
  2559. * intended for use as an soc_ops function pointer. Passes along the
  2560. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2561. * function is scheduled for removal when the PRM code is moved into
  2562. * drivers/.
  2563. */
  2564. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2565. struct omap_hwmod_rst_info *ohri)
  2566. {
  2567. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2568. oh->clkdm->pwrdm.ptr->prcm_offs,
  2569. oh->prcm.omap4.rstctrl_offs);
  2570. }
  2571. /**
  2572. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2573. * @oh: struct omap_hwmod * to deassert hardreset
  2574. * @ohri: hardreset line data
  2575. *
  2576. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2577. * from the hwmod @oh and the hardreset line data @ohri. Only
  2578. * intended for use as an soc_ops function pointer. Passes along the
  2579. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2580. * function is scheduled for removal when the PRM code is moved into
  2581. * drivers/.
  2582. */
  2583. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2584. struct omap_hwmod_rst_info *ohri)
  2585. {
  2586. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2587. ohri->st_shift,
  2588. oh->clkdm->pwrdm.ptr->prcm_offs,
  2589. oh->prcm.omap4.rstctrl_offs,
  2590. oh->prcm.omap4.rstst_offs);
  2591. }
  2592. /**
  2593. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2594. * @oh: struct omap_hwmod * to test hardreset
  2595. * @ohri: hardreset line data
  2596. *
  2597. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2598. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2599. * Only intended for use as an soc_ops function pointer. Passes along
  2600. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2601. * This function is scheduled for removal when the PRM code is moved
  2602. * into drivers/.
  2603. */
  2604. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2605. struct omap_hwmod_rst_info *ohri)
  2606. {
  2607. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2608. oh->clkdm->pwrdm.ptr->prcm_offs,
  2609. oh->prcm.omap4.rstctrl_offs);
  2610. }
  2611. /* Public functions */
  2612. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2613. {
  2614. if (oh->flags & HWMOD_16BIT_REG)
  2615. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2616. else
  2617. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2618. }
  2619. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2620. {
  2621. if (oh->flags & HWMOD_16BIT_REG)
  2622. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2623. else
  2624. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2625. }
  2626. /**
  2627. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2628. * @oh: struct omap_hwmod *
  2629. *
  2630. * This is a public function exposed to drivers. Some drivers may need to do
  2631. * some settings before and after resetting the device. Those drivers after
  2632. * doing the necessary settings could use this function to start a reset by
  2633. * setting the SYSCONFIG.SOFTRESET bit.
  2634. */
  2635. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2636. {
  2637. u32 v;
  2638. int ret;
  2639. if (!oh || !(oh->_sysc_cache))
  2640. return -EINVAL;
  2641. v = oh->_sysc_cache;
  2642. ret = _set_softreset(oh, &v);
  2643. if (ret)
  2644. goto error;
  2645. _write_sysconfig(v, oh);
  2646. error:
  2647. return ret;
  2648. }
  2649. /**
  2650. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2651. * @oh: struct omap_hwmod *
  2652. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2653. *
  2654. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2655. * local copy. Intended to be used by drivers that have some erratum
  2656. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2657. * -EINVAL if @oh is null, or passes along the return value from
  2658. * _set_slave_idlemode().
  2659. *
  2660. * XXX Does this function have any current users? If not, we should
  2661. * remove it; it is better to let the rest of the hwmod code handle this.
  2662. * Any users of this function should be scrutinized carefully.
  2663. */
  2664. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2665. {
  2666. u32 v;
  2667. int retval = 0;
  2668. if (!oh)
  2669. return -EINVAL;
  2670. v = oh->_sysc_cache;
  2671. retval = _set_slave_idlemode(oh, idlemode, &v);
  2672. if (!retval)
  2673. _write_sysconfig(v, oh);
  2674. return retval;
  2675. }
  2676. /**
  2677. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2678. * @name: name of the omap_hwmod to look up
  2679. *
  2680. * Given a @name of an omap_hwmod, return a pointer to the registered
  2681. * struct omap_hwmod *, or NULL upon error.
  2682. */
  2683. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2684. {
  2685. struct omap_hwmod *oh;
  2686. if (!name)
  2687. return NULL;
  2688. oh = _lookup(name);
  2689. return oh;
  2690. }
  2691. /**
  2692. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2693. * @fn: pointer to a callback function
  2694. * @data: void * data to pass to callback function
  2695. *
  2696. * Call @fn for each registered omap_hwmod, passing @data to each
  2697. * function. @fn must return 0 for success or any other value for
  2698. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2699. * will stop and the non-zero return value will be passed to the
  2700. * caller of omap_hwmod_for_each(). @fn is called with
  2701. * omap_hwmod_for_each() held.
  2702. */
  2703. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2704. void *data)
  2705. {
  2706. struct omap_hwmod *temp_oh;
  2707. int ret = 0;
  2708. if (!fn)
  2709. return -EINVAL;
  2710. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2711. ret = (*fn)(temp_oh, data);
  2712. if (ret)
  2713. break;
  2714. }
  2715. return ret;
  2716. }
  2717. /**
  2718. * omap_hwmod_register_links - register an array of hwmod links
  2719. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2720. *
  2721. * Intended to be called early in boot before the clock framework is
  2722. * initialized. If @ois is not null, will register all omap_hwmods
  2723. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2724. * omap_hwmod_init() hasn't been called before calling this function,
  2725. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2726. * success.
  2727. */
  2728. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2729. {
  2730. int r, i;
  2731. if (!inited)
  2732. return -EINVAL;
  2733. if (!ois)
  2734. return 0;
  2735. if (!linkspace) {
  2736. if (_alloc_linkspace(ois)) {
  2737. pr_err("omap_hwmod: could not allocate link space\n");
  2738. return -ENOMEM;
  2739. }
  2740. }
  2741. i = 0;
  2742. do {
  2743. r = _register_link(ois[i]);
  2744. WARN(r && r != -EEXIST,
  2745. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2746. ois[i]->master->name, ois[i]->slave->name, r);
  2747. } while (ois[++i]);
  2748. return 0;
  2749. }
  2750. /**
  2751. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2752. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2753. *
  2754. * If the hwmod data corresponding to the MPU subsystem IP block
  2755. * hasn't been initialized and set up yet, do so now. This must be
  2756. * done first since sleep dependencies may be added from other hwmods
  2757. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2758. * return value.
  2759. */
  2760. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2761. {
  2762. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2763. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2764. __func__, MPU_INITIATOR_NAME);
  2765. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2766. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2767. }
  2768. /**
  2769. * omap_hwmod_setup_one - set up a single hwmod
  2770. * @oh_name: const char * name of the already-registered hwmod to set up
  2771. *
  2772. * Initialize and set up a single hwmod. Intended to be used for a
  2773. * small number of early devices, such as the timer IP blocks used for
  2774. * the scheduler clock. Must be called after omap2_clk_init().
  2775. * Resolves the struct clk names to struct clk pointers for each
  2776. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2777. * -EINVAL upon error or 0 upon success.
  2778. */
  2779. int __init omap_hwmod_setup_one(const char *oh_name)
  2780. {
  2781. struct omap_hwmod *oh;
  2782. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2783. oh = _lookup(oh_name);
  2784. if (!oh) {
  2785. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2786. return -EINVAL;
  2787. }
  2788. _ensure_mpu_hwmod_is_setup(oh);
  2789. _init(oh, NULL);
  2790. _setup(oh, NULL);
  2791. return 0;
  2792. }
  2793. /**
  2794. * omap_hwmod_setup_all - set up all registered IP blocks
  2795. *
  2796. * Initialize and set up all IP blocks registered with the hwmod code.
  2797. * Must be called after omap2_clk_init(). Resolves the struct clk
  2798. * names to struct clk pointers for each registered omap_hwmod. Also
  2799. * calls _setup() on each hwmod. Returns 0 upon success.
  2800. */
  2801. static int __init omap_hwmod_setup_all(void)
  2802. {
  2803. _ensure_mpu_hwmod_is_setup(NULL);
  2804. omap_hwmod_for_each(_init, NULL);
  2805. omap_hwmod_for_each(_setup, NULL);
  2806. return 0;
  2807. }
  2808. core_initcall(omap_hwmod_setup_all);
  2809. /**
  2810. * omap_hwmod_enable - enable an omap_hwmod
  2811. * @oh: struct omap_hwmod *
  2812. *
  2813. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2814. * Returns -EINVAL on error or passes along the return value from _enable().
  2815. */
  2816. int omap_hwmod_enable(struct omap_hwmod *oh)
  2817. {
  2818. int r;
  2819. unsigned long flags;
  2820. if (!oh)
  2821. return -EINVAL;
  2822. spin_lock_irqsave(&oh->_lock, flags);
  2823. r = _enable(oh);
  2824. spin_unlock_irqrestore(&oh->_lock, flags);
  2825. return r;
  2826. }
  2827. /**
  2828. * omap_hwmod_idle - idle an omap_hwmod
  2829. * @oh: struct omap_hwmod *
  2830. *
  2831. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2832. * Returns -EINVAL on error or passes along the return value from _idle().
  2833. */
  2834. int omap_hwmod_idle(struct omap_hwmod *oh)
  2835. {
  2836. unsigned long flags;
  2837. if (!oh)
  2838. return -EINVAL;
  2839. spin_lock_irqsave(&oh->_lock, flags);
  2840. _idle(oh);
  2841. spin_unlock_irqrestore(&oh->_lock, flags);
  2842. return 0;
  2843. }
  2844. /**
  2845. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2846. * @oh: struct omap_hwmod *
  2847. *
  2848. * Shutdown an omap_hwmod @oh. Intended to be called by
  2849. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2850. * the return value from _shutdown().
  2851. */
  2852. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2853. {
  2854. unsigned long flags;
  2855. if (!oh)
  2856. return -EINVAL;
  2857. spin_lock_irqsave(&oh->_lock, flags);
  2858. _shutdown(oh);
  2859. spin_unlock_irqrestore(&oh->_lock, flags);
  2860. return 0;
  2861. }
  2862. /**
  2863. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2864. * @oh: struct omap_hwmod *oh
  2865. *
  2866. * Intended to be called by the omap_device code.
  2867. */
  2868. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2869. {
  2870. unsigned long flags;
  2871. spin_lock_irqsave(&oh->_lock, flags);
  2872. _enable_clocks(oh);
  2873. spin_unlock_irqrestore(&oh->_lock, flags);
  2874. return 0;
  2875. }
  2876. /**
  2877. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2878. * @oh: struct omap_hwmod *oh
  2879. *
  2880. * Intended to be called by the omap_device code.
  2881. */
  2882. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2883. {
  2884. unsigned long flags;
  2885. spin_lock_irqsave(&oh->_lock, flags);
  2886. _disable_clocks(oh);
  2887. spin_unlock_irqrestore(&oh->_lock, flags);
  2888. return 0;
  2889. }
  2890. /**
  2891. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2892. * @oh: struct omap_hwmod *oh
  2893. *
  2894. * Intended to be called by drivers and core code when all posted
  2895. * writes to a device must complete before continuing further
  2896. * execution (for example, after clearing some device IRQSTATUS
  2897. * register bits)
  2898. *
  2899. * XXX what about targets with multiple OCP threads?
  2900. */
  2901. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2902. {
  2903. BUG_ON(!oh);
  2904. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2905. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2906. oh->name);
  2907. return;
  2908. }
  2909. /*
  2910. * Forces posted writes to complete on the OCP thread handling
  2911. * register writes
  2912. */
  2913. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2914. }
  2915. /**
  2916. * omap_hwmod_reset - reset the hwmod
  2917. * @oh: struct omap_hwmod *
  2918. *
  2919. * Under some conditions, a driver may wish to reset the entire device.
  2920. * Called from omap_device code. Returns -EINVAL on error or passes along
  2921. * the return value from _reset().
  2922. */
  2923. int omap_hwmod_reset(struct omap_hwmod *oh)
  2924. {
  2925. int r;
  2926. unsigned long flags;
  2927. if (!oh)
  2928. return -EINVAL;
  2929. spin_lock_irqsave(&oh->_lock, flags);
  2930. r = _reset(oh);
  2931. spin_unlock_irqrestore(&oh->_lock, flags);
  2932. return r;
  2933. }
  2934. /*
  2935. * IP block data retrieval functions
  2936. */
  2937. /**
  2938. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2939. * @oh: struct omap_hwmod *
  2940. * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  2941. *
  2942. * Count the number of struct resource array elements necessary to
  2943. * contain omap_hwmod @oh resources. Intended to be called by code
  2944. * that registers omap_devices. Intended to be used to determine the
  2945. * size of a dynamically-allocated struct resource array, before
  2946. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2947. * resource array elements needed.
  2948. *
  2949. * XXX This code is not optimized. It could attempt to merge adjacent
  2950. * resource IDs.
  2951. *
  2952. */
  2953. int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
  2954. {
  2955. int ret = 0;
  2956. if (flags & IORESOURCE_IRQ)
  2957. ret += _count_mpu_irqs(oh);
  2958. if (flags & IORESOURCE_DMA)
  2959. ret += _count_sdma_reqs(oh);
  2960. if (flags & IORESOURCE_MEM) {
  2961. int i = 0;
  2962. struct omap_hwmod_ocp_if *os;
  2963. struct list_head *p = oh->slave_ports.next;
  2964. while (i < oh->slaves_cnt) {
  2965. os = _fetch_next_ocp_if(&p, &i);
  2966. ret += _count_ocp_if_addr_spaces(os);
  2967. }
  2968. }
  2969. return ret;
  2970. }
  2971. /**
  2972. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2973. * @oh: struct omap_hwmod *
  2974. * @res: pointer to the first element of an array of struct resource to fill
  2975. *
  2976. * Fill the struct resource array @res with resource data from the
  2977. * omap_hwmod @oh. Intended to be called by code that registers
  2978. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2979. * number of array elements filled.
  2980. */
  2981. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2982. {
  2983. struct omap_hwmod_ocp_if *os;
  2984. struct list_head *p;
  2985. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2986. int r = 0;
  2987. /* For each IRQ, DMA, memory area, fill in array.*/
  2988. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2989. for (i = 0; i < mpu_irqs_cnt; i++) {
  2990. (res + r)->name = (oh->mpu_irqs + i)->name;
  2991. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2992. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2993. (res + r)->flags = IORESOURCE_IRQ;
  2994. r++;
  2995. }
  2996. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2997. for (i = 0; i < sdma_reqs_cnt; i++) {
  2998. (res + r)->name = (oh->sdma_reqs + i)->name;
  2999. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3000. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3001. (res + r)->flags = IORESOURCE_DMA;
  3002. r++;
  3003. }
  3004. p = oh->slave_ports.next;
  3005. i = 0;
  3006. while (i < oh->slaves_cnt) {
  3007. os = _fetch_next_ocp_if(&p, &i);
  3008. addr_cnt = _count_ocp_if_addr_spaces(os);
  3009. for (j = 0; j < addr_cnt; j++) {
  3010. (res + r)->name = (os->addr + j)->name;
  3011. (res + r)->start = (os->addr + j)->pa_start;
  3012. (res + r)->end = (os->addr + j)->pa_end;
  3013. (res + r)->flags = IORESOURCE_MEM;
  3014. r++;
  3015. }
  3016. }
  3017. return r;
  3018. }
  3019. /**
  3020. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  3021. * @oh: struct omap_hwmod *
  3022. * @res: pointer to the array of struct resource to fill
  3023. *
  3024. * Fill the struct resource array @res with dma resource data from the
  3025. * omap_hwmod @oh. Intended to be called by code that registers
  3026. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3027. * number of array elements filled.
  3028. */
  3029. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  3030. {
  3031. int i, sdma_reqs_cnt;
  3032. int r = 0;
  3033. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3034. for (i = 0; i < sdma_reqs_cnt; i++) {
  3035. (res + r)->name = (oh->sdma_reqs + i)->name;
  3036. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3037. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3038. (res + r)->flags = IORESOURCE_DMA;
  3039. r++;
  3040. }
  3041. return r;
  3042. }
  3043. /**
  3044. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  3045. * @oh: struct omap_hwmod * to operate on
  3046. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  3047. * @name: pointer to the name of the data to fetch (optional)
  3048. * @rsrc: pointer to a struct resource, allocated by the caller
  3049. *
  3050. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  3051. * data for the IP block pointed to by @oh. The data will be filled
  3052. * into a struct resource record pointed to by @rsrc. The struct
  3053. * resource must be allocated by the caller. When @name is non-null,
  3054. * the data associated with the matching entry in the IRQ/SDMA/address
  3055. * space hwmod data arrays will be returned. If @name is null, the
  3056. * first array entry will be returned. Data order is not meaningful
  3057. * in hwmod data, so callers are strongly encouraged to use a non-null
  3058. * @name whenever possible to avoid unpredictable effects if hwmod
  3059. * data is later added that causes data ordering to change. This
  3060. * function is only intended for use by OMAP core code. Device
  3061. * drivers should not call this function - the appropriate bus-related
  3062. * data accessor functions should be used instead. Returns 0 upon
  3063. * success or a negative error code upon error.
  3064. */
  3065. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  3066. const char *name, struct resource *rsrc)
  3067. {
  3068. int r;
  3069. unsigned int irq, dma;
  3070. u32 pa_start, pa_end;
  3071. if (!oh || !rsrc)
  3072. return -EINVAL;
  3073. if (type == IORESOURCE_IRQ) {
  3074. r = _get_mpu_irq_by_name(oh, name, &irq);
  3075. if (r)
  3076. return r;
  3077. rsrc->start = irq;
  3078. rsrc->end = irq;
  3079. } else if (type == IORESOURCE_DMA) {
  3080. r = _get_sdma_req_by_name(oh, name, &dma);
  3081. if (r)
  3082. return r;
  3083. rsrc->start = dma;
  3084. rsrc->end = dma;
  3085. } else if (type == IORESOURCE_MEM) {
  3086. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  3087. if (r)
  3088. return r;
  3089. rsrc->start = pa_start;
  3090. rsrc->end = pa_end;
  3091. } else {
  3092. return -EINVAL;
  3093. }
  3094. rsrc->flags = type;
  3095. rsrc->name = name;
  3096. return 0;
  3097. }
  3098. /**
  3099. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  3100. * @oh: struct omap_hwmod *
  3101. *
  3102. * Return the powerdomain pointer associated with the OMAP module
  3103. * @oh's main clock. If @oh does not have a main clk, return the
  3104. * powerdomain associated with the interface clock associated with the
  3105. * module's MPU port. (XXX Perhaps this should use the SDMA port
  3106. * instead?) Returns NULL on error, or a struct powerdomain * on
  3107. * success.
  3108. */
  3109. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  3110. {
  3111. struct clk *c;
  3112. struct omap_hwmod_ocp_if *oi;
  3113. struct clockdomain *clkdm;
  3114. struct clk_hw_omap *clk;
  3115. if (!oh)
  3116. return NULL;
  3117. if (oh->clkdm)
  3118. return oh->clkdm->pwrdm.ptr;
  3119. if (oh->_clk) {
  3120. c = oh->_clk;
  3121. } else {
  3122. oi = _find_mpu_rt_port(oh);
  3123. if (!oi)
  3124. return NULL;
  3125. c = oi->_clk;
  3126. }
  3127. clk = to_clk_hw_omap(__clk_get_hw(c));
  3128. clkdm = clk->clkdm;
  3129. if (!clkdm)
  3130. return NULL;
  3131. return clkdm->pwrdm.ptr;
  3132. }
  3133. /**
  3134. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3135. * @oh: struct omap_hwmod *
  3136. *
  3137. * Returns the virtual address corresponding to the beginning of the
  3138. * module's register target, in the address range that is intended to
  3139. * be used by the MPU. Returns the virtual address upon success or NULL
  3140. * upon error.
  3141. */
  3142. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3143. {
  3144. if (!oh)
  3145. return NULL;
  3146. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3147. return NULL;
  3148. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3149. return NULL;
  3150. return oh->_mpu_rt_va;
  3151. }
  3152. /**
  3153. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3154. * @oh: struct omap_hwmod *
  3155. * @init_oh: struct omap_hwmod * (initiator)
  3156. *
  3157. * Add a sleep dependency between the initiator @init_oh and @oh.
  3158. * Intended to be called by DSP/Bridge code via platform_data for the
  3159. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3160. * code needs to add/del initiator dependencies dynamically
  3161. * before/after accessing a device. Returns the return value from
  3162. * _add_initiator_dep().
  3163. *
  3164. * XXX Keep a usecount in the clockdomain code
  3165. */
  3166. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3167. struct omap_hwmod *init_oh)
  3168. {
  3169. return _add_initiator_dep(oh, init_oh);
  3170. }
  3171. /*
  3172. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3173. * for context save/restore operations?
  3174. */
  3175. /**
  3176. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3177. * @oh: struct omap_hwmod *
  3178. * @init_oh: struct omap_hwmod * (initiator)
  3179. *
  3180. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3181. * Intended to be called by DSP/Bridge code via platform_data for the
  3182. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3183. * code needs to add/del initiator dependencies dynamically
  3184. * before/after accessing a device. Returns the return value from
  3185. * _del_initiator_dep().
  3186. *
  3187. * XXX Keep a usecount in the clockdomain code
  3188. */
  3189. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3190. struct omap_hwmod *init_oh)
  3191. {
  3192. return _del_initiator_dep(oh, init_oh);
  3193. }
  3194. /**
  3195. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3196. * @oh: struct omap_hwmod *
  3197. *
  3198. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3199. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3200. * this IP block if it has dynamic mux entries. Eventually this
  3201. * should set PRCM wakeup registers to cause the PRCM to receive
  3202. * wakeup events from the module. Does not set any wakeup routing
  3203. * registers beyond this point - if the module is to wake up any other
  3204. * module or subsystem, that must be set separately. Called by
  3205. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3206. */
  3207. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3208. {
  3209. unsigned long flags;
  3210. u32 v;
  3211. spin_lock_irqsave(&oh->_lock, flags);
  3212. if (oh->class->sysc &&
  3213. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3214. v = oh->_sysc_cache;
  3215. _enable_wakeup(oh, &v);
  3216. _write_sysconfig(v, oh);
  3217. }
  3218. _set_idle_ioring_wakeup(oh, true);
  3219. spin_unlock_irqrestore(&oh->_lock, flags);
  3220. return 0;
  3221. }
  3222. /**
  3223. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3224. * @oh: struct omap_hwmod *
  3225. *
  3226. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3227. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3228. * events for this IP block if it has dynamic mux entries. Eventually
  3229. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3230. * wakeup events from the module. Does not set any wakeup routing
  3231. * registers beyond this point - if the module is to wake up any other
  3232. * module or subsystem, that must be set separately. Called by
  3233. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3234. */
  3235. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3236. {
  3237. unsigned long flags;
  3238. u32 v;
  3239. spin_lock_irqsave(&oh->_lock, flags);
  3240. if (oh->class->sysc &&
  3241. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3242. v = oh->_sysc_cache;
  3243. _disable_wakeup(oh, &v);
  3244. _write_sysconfig(v, oh);
  3245. }
  3246. _set_idle_ioring_wakeup(oh, false);
  3247. spin_unlock_irqrestore(&oh->_lock, flags);
  3248. return 0;
  3249. }
  3250. /**
  3251. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3252. * contained in the hwmod module.
  3253. * @oh: struct omap_hwmod *
  3254. * @name: name of the reset line to lookup and assert
  3255. *
  3256. * Some IP like dsp, ipu or iva contain processor that require
  3257. * an HW reset line to be assert / deassert in order to enable fully
  3258. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3259. * yet supported on this OMAP; otherwise, passes along the return value
  3260. * from _assert_hardreset().
  3261. */
  3262. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3263. {
  3264. int ret;
  3265. unsigned long flags;
  3266. if (!oh)
  3267. return -EINVAL;
  3268. spin_lock_irqsave(&oh->_lock, flags);
  3269. ret = _assert_hardreset(oh, name);
  3270. spin_unlock_irqrestore(&oh->_lock, flags);
  3271. return ret;
  3272. }
  3273. /**
  3274. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3275. * contained in the hwmod module.
  3276. * @oh: struct omap_hwmod *
  3277. * @name: name of the reset line to look up and deassert
  3278. *
  3279. * Some IP like dsp, ipu or iva contain processor that require
  3280. * an HW reset line to be assert / deassert in order to enable fully
  3281. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3282. * yet supported on this OMAP; otherwise, passes along the return value
  3283. * from _deassert_hardreset().
  3284. */
  3285. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3286. {
  3287. int ret;
  3288. unsigned long flags;
  3289. if (!oh)
  3290. return -EINVAL;
  3291. spin_lock_irqsave(&oh->_lock, flags);
  3292. ret = _deassert_hardreset(oh, name);
  3293. spin_unlock_irqrestore(&oh->_lock, flags);
  3294. return ret;
  3295. }
  3296. /**
  3297. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3298. * contained in the hwmod module
  3299. * @oh: struct omap_hwmod *
  3300. * @name: name of the reset line to look up and read
  3301. *
  3302. * Return the current state of the hwmod @oh's reset line named @name:
  3303. * returns -EINVAL upon parameter error or if this operation
  3304. * is unsupported on the current OMAP; otherwise, passes along the return
  3305. * value from _read_hardreset().
  3306. */
  3307. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3308. {
  3309. int ret;
  3310. unsigned long flags;
  3311. if (!oh)
  3312. return -EINVAL;
  3313. spin_lock_irqsave(&oh->_lock, flags);
  3314. ret = _read_hardreset(oh, name);
  3315. spin_unlock_irqrestore(&oh->_lock, flags);
  3316. return ret;
  3317. }
  3318. /**
  3319. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3320. * @classname: struct omap_hwmod_class name to search for
  3321. * @fn: callback function pointer to call for each hwmod in class @classname
  3322. * @user: arbitrary context data to pass to the callback function
  3323. *
  3324. * For each omap_hwmod of class @classname, call @fn.
  3325. * If the callback function returns something other than
  3326. * zero, the iterator is terminated, and the callback function's return
  3327. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3328. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3329. */
  3330. int omap_hwmod_for_each_by_class(const char *classname,
  3331. int (*fn)(struct omap_hwmod *oh,
  3332. void *user),
  3333. void *user)
  3334. {
  3335. struct omap_hwmod *temp_oh;
  3336. int ret = 0;
  3337. if (!classname || !fn)
  3338. return -EINVAL;
  3339. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3340. __func__, classname);
  3341. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3342. if (!strcmp(temp_oh->class->name, classname)) {
  3343. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3344. __func__, temp_oh->name);
  3345. ret = (*fn)(temp_oh, user);
  3346. if (ret)
  3347. break;
  3348. }
  3349. }
  3350. if (ret)
  3351. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3352. __func__, ret);
  3353. return ret;
  3354. }
  3355. /**
  3356. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3357. * @oh: struct omap_hwmod *
  3358. * @state: state that _setup() should leave the hwmod in
  3359. *
  3360. * Sets the hwmod state that @oh will enter at the end of _setup()
  3361. * (called by omap_hwmod_setup_*()). See also the documentation
  3362. * for _setup_postsetup(), above. Returns 0 upon success or
  3363. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3364. * in the wrong state.
  3365. */
  3366. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3367. {
  3368. int ret;
  3369. unsigned long flags;
  3370. if (!oh)
  3371. return -EINVAL;
  3372. if (state != _HWMOD_STATE_DISABLED &&
  3373. state != _HWMOD_STATE_ENABLED &&
  3374. state != _HWMOD_STATE_IDLE)
  3375. return -EINVAL;
  3376. spin_lock_irqsave(&oh->_lock, flags);
  3377. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3378. ret = -EINVAL;
  3379. goto ohsps_unlock;
  3380. }
  3381. oh->_postsetup_state = state;
  3382. ret = 0;
  3383. ohsps_unlock:
  3384. spin_unlock_irqrestore(&oh->_lock, flags);
  3385. return ret;
  3386. }
  3387. /**
  3388. * omap_hwmod_get_context_loss_count - get lost context count
  3389. * @oh: struct omap_hwmod *
  3390. *
  3391. * Returns the context loss count of associated @oh
  3392. * upon success, or zero if no context loss data is available.
  3393. *
  3394. * On OMAP4, this queries the per-hwmod context loss register,
  3395. * assuming one exists. If not, or on OMAP2/3, this queries the
  3396. * enclosing powerdomain context loss count.
  3397. */
  3398. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3399. {
  3400. struct powerdomain *pwrdm;
  3401. int ret = 0;
  3402. if (soc_ops.get_context_lost)
  3403. return soc_ops.get_context_lost(oh);
  3404. pwrdm = omap_hwmod_get_pwrdm(oh);
  3405. if (pwrdm)
  3406. ret = pwrdm_get_context_loss_count(pwrdm);
  3407. return ret;
  3408. }
  3409. /**
  3410. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3411. * @oh: struct omap_hwmod *
  3412. *
  3413. * Prevent the hwmod @oh from being reset during the setup process.
  3414. * Intended for use by board-*.c files on boards with devices that
  3415. * cannot tolerate being reset. Must be called before the hwmod has
  3416. * been set up. Returns 0 upon success or negative error code upon
  3417. * failure.
  3418. */
  3419. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3420. {
  3421. if (!oh)
  3422. return -EINVAL;
  3423. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3424. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3425. oh->name);
  3426. return -EINVAL;
  3427. }
  3428. oh->flags |= HWMOD_INIT_NO_RESET;
  3429. return 0;
  3430. }
  3431. /**
  3432. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3433. * @oh: struct omap_hwmod * containing hwmod mux entries
  3434. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3435. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3436. *
  3437. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3438. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3439. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3440. * this function is not called for a given pad_idx, then the ISR
  3441. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3442. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3443. * the _dynamic or wakeup_ entry: if there are other entries not
  3444. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3445. * entries are NOT COUNTED in the dynamic pad index. This function
  3446. * must be called separately for each pad that requires its interrupt
  3447. * to be re-routed this way. Returns -EINVAL if there is an argument
  3448. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3449. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3450. *
  3451. * XXX This function interface is fragile. Rather than using array
  3452. * indexes, which are subject to unpredictable change, it should be
  3453. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3454. * pad records.
  3455. */
  3456. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3457. {
  3458. int nr_irqs;
  3459. might_sleep();
  3460. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3461. pad_idx >= oh->mux->nr_pads_dynamic)
  3462. return -EINVAL;
  3463. /* Check the number of available mpu_irqs */
  3464. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3465. ;
  3466. if (irq_idx >= nr_irqs)
  3467. return -EINVAL;
  3468. if (!oh->mux->irqs) {
  3469. /* XXX What frees this? */
  3470. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3471. GFP_KERNEL);
  3472. if (!oh->mux->irqs)
  3473. return -ENOMEM;
  3474. }
  3475. oh->mux->irqs[pad_idx] = irq_idx;
  3476. return 0;
  3477. }
  3478. /**
  3479. * omap_hwmod_init - initialize the hwmod code
  3480. *
  3481. * Sets up some function pointers needed by the hwmod code to operate on the
  3482. * currently-booted SoC. Intended to be called once during kernel init
  3483. * before any hwmods are registered. No return value.
  3484. */
  3485. void __init omap_hwmod_init(void)
  3486. {
  3487. if (cpu_is_omap24xx()) {
  3488. soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
  3489. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3490. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3491. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3492. } else if (cpu_is_omap34xx()) {
  3493. soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
  3494. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3495. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3496. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3497. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3498. soc_ops.enable_module = _omap4_enable_module;
  3499. soc_ops.disable_module = _omap4_disable_module;
  3500. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3501. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3502. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3503. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3504. soc_ops.init_clkdm = _init_clkdm;
  3505. soc_ops.update_context_lost = _omap4_update_context_lost;
  3506. soc_ops.get_context_lost = _omap4_get_context_lost;
  3507. } else if (soc_is_am33xx()) {
  3508. soc_ops.enable_module = _am33xx_enable_module;
  3509. soc_ops.disable_module = _am33xx_disable_module;
  3510. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3511. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3512. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3513. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3514. soc_ops.init_clkdm = _init_clkdm;
  3515. } else {
  3516. WARN(1, "omap_hwmod: unknown SoC type\n");
  3517. }
  3518. inited = true;
  3519. }
  3520. /**
  3521. * omap_hwmod_get_main_clk - get pointer to main clock name
  3522. * @oh: struct omap_hwmod *
  3523. *
  3524. * Returns the main clock name assocated with @oh upon success,
  3525. * or NULL if @oh is NULL.
  3526. */
  3527. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3528. {
  3529. if (!oh)
  3530. return NULL;
  3531. return oh->main_clk;
  3532. }