ath79_wdt.c 7.1 KB

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  1. /*
  2. * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
  8. * Author: Deepak Saxena <dsaxena@plexity.net>
  9. * Copyright 2004 (c) MontaVista, Software, Inc.
  10. *
  11. * which again was based on sa1100 driver,
  12. * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License version 2 as published
  16. * by the Free Software Foundation.
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/bitops.h>
  21. #include <linux/errno.h>
  22. #include <linux/fs.h>
  23. #include <linux/init.h>
  24. #include <linux/io.h>
  25. #include <linux/kernel.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/types.h>
  31. #include <linux/watchdog.h>
  32. #include <linux/clk.h>
  33. #include <linux/err.h>
  34. #define DRIVER_NAME "ath79-wdt"
  35. #define WDT_TIMEOUT 15 /* seconds */
  36. #define WDOG_REG_CTRL 0x00
  37. #define WDOG_REG_TIMER 0x04
  38. #define WDOG_CTRL_LAST_RESET BIT(31)
  39. #define WDOG_CTRL_ACTION_MASK 3
  40. #define WDOG_CTRL_ACTION_NONE 0 /* no action */
  41. #define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
  42. #define WDOG_CTRL_ACTION_NMI 2 /* NMI */
  43. #define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
  44. static bool nowayout = WATCHDOG_NOWAYOUT;
  45. module_param(nowayout, bool, 0);
  46. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  47. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  48. static int timeout = WDT_TIMEOUT;
  49. module_param(timeout, int, 0);
  50. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
  51. "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
  52. static unsigned long wdt_flags;
  53. #define WDT_FLAGS_BUSY 0
  54. #define WDT_FLAGS_EXPECT_CLOSE 1
  55. static struct clk *wdt_clk;
  56. static unsigned long wdt_freq;
  57. static int boot_status;
  58. static int max_timeout;
  59. static void __iomem *wdt_base;
  60. static inline void ath79_wdt_wr(unsigned reg, u32 val)
  61. {
  62. iowrite32(val, wdt_base + reg);
  63. }
  64. static inline u32 ath79_wdt_rr(unsigned reg)
  65. {
  66. return ioread32(wdt_base + reg);
  67. }
  68. static inline void ath79_wdt_keepalive(void)
  69. {
  70. ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
  71. /* flush write */
  72. ath79_wdt_rr(WDOG_REG_TIMER);
  73. }
  74. static inline void ath79_wdt_enable(void)
  75. {
  76. ath79_wdt_keepalive();
  77. ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
  78. /* flush write */
  79. ath79_wdt_rr(WDOG_REG_CTRL);
  80. }
  81. static inline void ath79_wdt_disable(void)
  82. {
  83. ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
  84. /* flush write */
  85. ath79_wdt_rr(WDOG_REG_CTRL);
  86. }
  87. static int ath79_wdt_set_timeout(int val)
  88. {
  89. if (val < 1 || val > max_timeout)
  90. return -EINVAL;
  91. timeout = val;
  92. ath79_wdt_keepalive();
  93. return 0;
  94. }
  95. static int ath79_wdt_open(struct inode *inode, struct file *file)
  96. {
  97. if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
  98. return -EBUSY;
  99. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  100. ath79_wdt_enable();
  101. return nonseekable_open(inode, file);
  102. }
  103. static int ath79_wdt_release(struct inode *inode, struct file *file)
  104. {
  105. if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
  106. ath79_wdt_disable();
  107. else {
  108. pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
  109. ath79_wdt_keepalive();
  110. }
  111. clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
  112. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  113. return 0;
  114. }
  115. static ssize_t ath79_wdt_write(struct file *file, const char *data,
  116. size_t len, loff_t *ppos)
  117. {
  118. if (len) {
  119. if (!nowayout) {
  120. size_t i;
  121. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  122. for (i = 0; i != len; i++) {
  123. char c;
  124. if (get_user(c, data + i))
  125. return -EFAULT;
  126. if (c == 'V')
  127. set_bit(WDT_FLAGS_EXPECT_CLOSE,
  128. &wdt_flags);
  129. }
  130. }
  131. ath79_wdt_keepalive();
  132. }
  133. return len;
  134. }
  135. static const struct watchdog_info ath79_wdt_info = {
  136. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  137. WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
  138. .firmware_version = 0,
  139. .identity = "ATH79 watchdog",
  140. };
  141. static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
  142. unsigned long arg)
  143. {
  144. void __user *argp = (void __user *)arg;
  145. int __user *p = argp;
  146. int err;
  147. int t;
  148. switch (cmd) {
  149. case WDIOC_GETSUPPORT:
  150. err = copy_to_user(argp, &ath79_wdt_info,
  151. sizeof(ath79_wdt_info)) ? -EFAULT : 0;
  152. break;
  153. case WDIOC_GETSTATUS:
  154. err = put_user(0, p);
  155. break;
  156. case WDIOC_GETBOOTSTATUS:
  157. err = put_user(boot_status, p);
  158. break;
  159. case WDIOC_KEEPALIVE:
  160. ath79_wdt_keepalive();
  161. err = 0;
  162. break;
  163. case WDIOC_SETTIMEOUT:
  164. err = get_user(t, p);
  165. if (err)
  166. break;
  167. err = ath79_wdt_set_timeout(t);
  168. if (err)
  169. break;
  170. /* fallthrough */
  171. case WDIOC_GETTIMEOUT:
  172. err = put_user(timeout, p);
  173. break;
  174. default:
  175. err = -ENOTTY;
  176. break;
  177. }
  178. return err;
  179. }
  180. static const struct file_operations ath79_wdt_fops = {
  181. .owner = THIS_MODULE,
  182. .llseek = no_llseek,
  183. .write = ath79_wdt_write,
  184. .unlocked_ioctl = ath79_wdt_ioctl,
  185. .open = ath79_wdt_open,
  186. .release = ath79_wdt_release,
  187. };
  188. static struct miscdevice ath79_wdt_miscdev = {
  189. .minor = WATCHDOG_MINOR,
  190. .name = "watchdog",
  191. .fops = &ath79_wdt_fops,
  192. };
  193. static int ath79_wdt_probe(struct platform_device *pdev)
  194. {
  195. struct resource *res;
  196. u32 ctrl;
  197. int err;
  198. if (wdt_base)
  199. return -EBUSY;
  200. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  201. if (!res) {
  202. dev_err(&pdev->dev, "no memory resource found\n");
  203. return -EINVAL;
  204. }
  205. wdt_base = devm_request_and_ioremap(&pdev->dev, res);
  206. if (!wdt_base) {
  207. dev_err(&pdev->dev, "unable to remap memory region\n");
  208. return -ENOMEM;
  209. }
  210. wdt_clk = devm_clk_get(&pdev->dev, "wdt");
  211. if (IS_ERR(wdt_clk))
  212. return PTR_ERR(wdt_clk);
  213. err = clk_enable(wdt_clk);
  214. if (err)
  215. return err;
  216. wdt_freq = clk_get_rate(wdt_clk);
  217. if (!wdt_freq) {
  218. err = -EINVAL;
  219. goto err_clk_disable;
  220. }
  221. max_timeout = (0xfffffffful / wdt_freq);
  222. if (timeout < 1 || timeout > max_timeout) {
  223. timeout = max_timeout;
  224. dev_info(&pdev->dev,
  225. "timeout value must be 0 < timeout < %d, using %d\n",
  226. max_timeout, timeout);
  227. }
  228. ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
  229. boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
  230. err = misc_register(&ath79_wdt_miscdev);
  231. if (err) {
  232. dev_err(&pdev->dev,
  233. "unable to register misc device, err=%d\n", err);
  234. goto err_clk_disable;
  235. }
  236. return 0;
  237. err_clk_disable:
  238. clk_disable(wdt_clk);
  239. return err;
  240. }
  241. static int ath79_wdt_remove(struct platform_device *pdev)
  242. {
  243. misc_deregister(&ath79_wdt_miscdev);
  244. clk_disable(wdt_clk);
  245. return 0;
  246. }
  247. static void ath97_wdt_shutdown(struct platform_device *pdev)
  248. {
  249. ath79_wdt_disable();
  250. }
  251. static struct platform_driver ath79_wdt_driver = {
  252. .probe = ath79_wdt_probe,
  253. .remove = ath79_wdt_remove,
  254. .shutdown = ath97_wdt_shutdown,
  255. .driver = {
  256. .name = DRIVER_NAME,
  257. .owner = THIS_MODULE,
  258. },
  259. };
  260. module_platform_driver(ath79_wdt_driver);
  261. MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
  262. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
  263. MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
  264. MODULE_LICENSE("GPL v2");
  265. MODULE_ALIAS("platform:" DRIVER_NAME);
  266. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);