devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <linux/platform_data/omap4-keypad.h>
  21. #include <mach/hardware.h>
  22. #include <mach/irqs.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/pmu.h>
  26. #include "iomap.h"
  27. #include <plat/board.h>
  28. #include <plat/mmc.h>
  29. #include <plat/dma.h>
  30. #include <plat/omap_hwmod.h>
  31. #include <plat/omap_device.h>
  32. #include <plat/omap4-keypad.h>
  33. #include "mux.h"
  34. #include "control.h"
  35. #include "devices.h"
  36. #define L3_MODULES_MAX_LEN 12
  37. #define L3_MODULES 3
  38. static int __init omap3_l3_init(void)
  39. {
  40. struct omap_hwmod *oh;
  41. struct platform_device *pdev;
  42. char oh_name[L3_MODULES_MAX_LEN];
  43. /*
  44. * To avoid code running on other OMAPs in
  45. * multi-omap builds
  46. */
  47. if (!(cpu_is_omap34xx()))
  48. return -ENODEV;
  49. snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  50. oh = omap_hwmod_lookup(oh_name);
  51. if (!oh)
  52. pr_err("could not look up %s\n", oh_name);
  53. pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  54. NULL, 0, 0);
  55. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  56. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  57. }
  58. postcore_initcall(omap3_l3_init);
  59. static int __init omap4_l3_init(void)
  60. {
  61. int i;
  62. struct omap_hwmod *oh[3];
  63. struct platform_device *pdev;
  64. char oh_name[L3_MODULES_MAX_LEN];
  65. /* If dtb is there, the devices will be created dynamically */
  66. if (of_have_populated_dt())
  67. return -ENODEV;
  68. /*
  69. * To avoid code running on other OMAPs in
  70. * multi-omap builds
  71. */
  72. if (!(cpu_is_omap44xx()))
  73. return -ENODEV;
  74. for (i = 0; i < L3_MODULES; i++) {
  75. snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  76. oh[i] = omap_hwmod_lookup(oh_name);
  77. if (!(oh[i]))
  78. pr_err("could not look up %s\n", oh_name);
  79. }
  80. pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  81. 0, NULL, 0, 0);
  82. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  83. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  84. }
  85. postcore_initcall(omap4_l3_init);
  86. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  87. static struct resource omap2cam_resources[] = {
  88. {
  89. .start = OMAP24XX_CAMERA_BASE,
  90. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. {
  94. .start = INT_24XX_CAM_IRQ,
  95. .flags = IORESOURCE_IRQ,
  96. }
  97. };
  98. static struct platform_device omap2cam_device = {
  99. .name = "omap24xxcam",
  100. .id = -1,
  101. .num_resources = ARRAY_SIZE(omap2cam_resources),
  102. .resource = omap2cam_resources,
  103. };
  104. #endif
  105. #if defined(CONFIG_IOMMU_API)
  106. #include <plat/iommu.h>
  107. static struct resource omap3isp_resources[] = {
  108. {
  109. .start = OMAP3430_ISP_BASE,
  110. .end = OMAP3430_ISP_END,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. {
  114. .start = OMAP3430_ISP_CCP2_BASE,
  115. .end = OMAP3430_ISP_CCP2_END,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = OMAP3430_ISP_CCDC_BASE,
  120. .end = OMAP3430_ISP_CCDC_END,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = OMAP3430_ISP_HIST_BASE,
  125. .end = OMAP3430_ISP_HIST_END,
  126. .flags = IORESOURCE_MEM,
  127. },
  128. {
  129. .start = OMAP3430_ISP_H3A_BASE,
  130. .end = OMAP3430_ISP_H3A_END,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. {
  134. .start = OMAP3430_ISP_PREV_BASE,
  135. .end = OMAP3430_ISP_PREV_END,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. {
  139. .start = OMAP3430_ISP_RESZ_BASE,
  140. .end = OMAP3430_ISP_RESZ_END,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. {
  144. .start = OMAP3430_ISP_SBL_BASE,
  145. .end = OMAP3430_ISP_SBL_END,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  150. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  151. .flags = IORESOURCE_MEM,
  152. },
  153. {
  154. .start = OMAP3430_ISP_CSIPHY2_BASE,
  155. .end = OMAP3430_ISP_CSIPHY2_END,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. {
  159. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  160. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. {
  164. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  165. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. {
  169. .start = OMAP3630_ISP_CSIPHY1_BASE,
  170. .end = OMAP3630_ISP_CSIPHY1_END,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. {
  174. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  175. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. {
  179. .start = INT_34XX_CAM_IRQ,
  180. .flags = IORESOURCE_IRQ,
  181. }
  182. };
  183. static struct platform_device omap3isp_device = {
  184. .name = "omap3isp",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(omap3isp_resources),
  187. .resource = omap3isp_resources,
  188. };
  189. static struct omap_iommu_arch_data omap3_isp_iommu = {
  190. .name = "isp",
  191. };
  192. int omap3_init_camera(struct isp_platform_data *pdata)
  193. {
  194. omap3isp_device.dev.platform_data = pdata;
  195. omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
  196. return platform_device_register(&omap3isp_device);
  197. }
  198. #else /* !CONFIG_IOMMU_API */
  199. int omap3_init_camera(struct isp_platform_data *pdata)
  200. {
  201. return 0;
  202. }
  203. #endif
  204. static inline void omap_init_camera(void)
  205. {
  206. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  207. if (cpu_is_omap24xx())
  208. platform_device_register(&omap2cam_device);
  209. #endif
  210. }
  211. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  212. *sdp4430_keypad_data, struct omap_board_data *bdata)
  213. {
  214. struct platform_device *pdev;
  215. struct omap_hwmod *oh;
  216. struct omap4_keypad_platform_data *keypad_data;
  217. unsigned int id = -1;
  218. char *oh_name = "kbd";
  219. char *name = "omap4-keypad";
  220. oh = omap_hwmod_lookup(oh_name);
  221. if (!oh) {
  222. pr_err("Could not look up %s\n", oh_name);
  223. return -ENODEV;
  224. }
  225. keypad_data = sdp4430_keypad_data;
  226. pdev = omap_device_build(name, id, oh, keypad_data,
  227. sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
  228. if (IS_ERR(pdev)) {
  229. WARN(1, "Can't build omap_device for %s:%s.\n",
  230. name, oh->name);
  231. return PTR_ERR(pdev);
  232. }
  233. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  234. return 0;
  235. }
  236. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  237. static inline void __init omap_init_mbox(void)
  238. {
  239. struct omap_hwmod *oh;
  240. struct platform_device *pdev;
  241. oh = omap_hwmod_lookup("mailbox");
  242. if (!oh) {
  243. pr_err("%s: unable to find hwmod\n", __func__);
  244. return;
  245. }
  246. pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
  247. WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
  248. __func__, PTR_ERR(pdev));
  249. }
  250. #else
  251. static inline void omap_init_mbox(void) { }
  252. #endif /* CONFIG_OMAP_MBOX_FWK */
  253. static inline void omap_init_sti(void) {}
  254. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  255. static struct platform_device omap_pcm = {
  256. .name = "omap-pcm-audio",
  257. .id = -1,
  258. };
  259. static void omap_init_audio(void)
  260. {
  261. platform_device_register(&omap_pcm);
  262. }
  263. #else
  264. static inline void omap_init_audio(void) {}
  265. #endif
  266. #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
  267. defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
  268. static void __init omap_init_mcpdm(void)
  269. {
  270. struct omap_hwmod *oh;
  271. struct platform_device *pdev;
  272. oh = omap_hwmod_lookup("mcpdm");
  273. if (!oh) {
  274. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  275. return;
  276. }
  277. pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
  278. WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
  279. }
  280. #else
  281. static inline void omap_init_mcpdm(void) {}
  282. #endif
  283. #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
  284. defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
  285. static void __init omap_init_dmic(void)
  286. {
  287. struct omap_hwmod *oh;
  288. struct platform_device *pdev;
  289. oh = omap_hwmod_lookup("dmic");
  290. if (!oh) {
  291. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  292. return;
  293. }
  294. pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
  295. WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
  296. }
  297. #else
  298. static inline void omap_init_dmic(void) {}
  299. #endif
  300. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  301. #include <plat/mcspi.h>
  302. static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  303. {
  304. struct platform_device *pdev;
  305. char *name = "omap2_mcspi";
  306. struct omap2_mcspi_platform_config *pdata;
  307. static int spi_num;
  308. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  309. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  310. if (!pdata) {
  311. pr_err("Memory allocation for McSPI device failed\n");
  312. return -ENOMEM;
  313. }
  314. pdata->num_cs = mcspi_attrib->num_chipselect;
  315. switch (oh->class->rev) {
  316. case OMAP2_MCSPI_REV:
  317. case OMAP3_MCSPI_REV:
  318. pdata->regs_offset = 0;
  319. break;
  320. case OMAP4_MCSPI_REV:
  321. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  322. break;
  323. default:
  324. pr_err("Invalid McSPI Revision value\n");
  325. kfree(pdata);
  326. return -EINVAL;
  327. }
  328. spi_num++;
  329. pdev = omap_device_build(name, spi_num, oh, pdata,
  330. sizeof(*pdata), NULL, 0, 0);
  331. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
  332. name, oh->name);
  333. kfree(pdata);
  334. return 0;
  335. }
  336. static void omap_init_mcspi(void)
  337. {
  338. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  339. }
  340. #else
  341. static inline void omap_init_mcspi(void) {}
  342. #endif
  343. static struct resource omap2_pmu_resource = {
  344. .start = 3,
  345. .end = 3,
  346. .flags = IORESOURCE_IRQ,
  347. };
  348. static struct resource omap3_pmu_resource = {
  349. .start = INT_34XX_BENCH_MPU_EMUL,
  350. .end = INT_34XX_BENCH_MPU_EMUL,
  351. .flags = IORESOURCE_IRQ,
  352. };
  353. static struct platform_device omap_pmu_device = {
  354. .name = "arm-pmu",
  355. .id = ARM_PMU_DEVICE_CPU,
  356. .num_resources = 1,
  357. };
  358. static void omap_init_pmu(void)
  359. {
  360. if (cpu_is_omap24xx())
  361. omap_pmu_device.resource = &omap2_pmu_resource;
  362. else if (cpu_is_omap34xx())
  363. omap_pmu_device.resource = &omap3_pmu_resource;
  364. else
  365. return;
  366. platform_device_register(&omap_pmu_device);
  367. }
  368. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  369. #ifdef CONFIG_ARCH_OMAP2
  370. static struct resource omap2_sham_resources[] = {
  371. {
  372. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  373. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  374. .flags = IORESOURCE_MEM,
  375. },
  376. {
  377. .start = INT_24XX_SHA1MD5,
  378. .flags = IORESOURCE_IRQ,
  379. }
  380. };
  381. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  382. #else
  383. #define omap2_sham_resources NULL
  384. #define omap2_sham_resources_sz 0
  385. #endif
  386. #ifdef CONFIG_ARCH_OMAP3
  387. static struct resource omap3_sham_resources[] = {
  388. {
  389. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  390. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. {
  394. .start = INT_34XX_SHA1MD52_IRQ,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. {
  398. .start = OMAP34XX_DMA_SHA1MD5_RX,
  399. .flags = IORESOURCE_DMA,
  400. }
  401. };
  402. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  403. #else
  404. #define omap3_sham_resources NULL
  405. #define omap3_sham_resources_sz 0
  406. #endif
  407. static struct platform_device sham_device = {
  408. .name = "omap-sham",
  409. .id = -1,
  410. };
  411. static void omap_init_sham(void)
  412. {
  413. if (cpu_is_omap24xx()) {
  414. sham_device.resource = omap2_sham_resources;
  415. sham_device.num_resources = omap2_sham_resources_sz;
  416. } else if (cpu_is_omap34xx()) {
  417. sham_device.resource = omap3_sham_resources;
  418. sham_device.num_resources = omap3_sham_resources_sz;
  419. } else {
  420. pr_err("%s: platform not supported\n", __func__);
  421. return;
  422. }
  423. platform_device_register(&sham_device);
  424. }
  425. #else
  426. static inline void omap_init_sham(void) { }
  427. #endif
  428. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  429. #ifdef CONFIG_ARCH_OMAP2
  430. static struct resource omap2_aes_resources[] = {
  431. {
  432. .start = OMAP24XX_SEC_AES_BASE,
  433. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  434. .flags = IORESOURCE_MEM,
  435. },
  436. {
  437. .start = OMAP24XX_DMA_AES_TX,
  438. .flags = IORESOURCE_DMA,
  439. },
  440. {
  441. .start = OMAP24XX_DMA_AES_RX,
  442. .flags = IORESOURCE_DMA,
  443. }
  444. };
  445. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  446. #else
  447. #define omap2_aes_resources NULL
  448. #define omap2_aes_resources_sz 0
  449. #endif
  450. #ifdef CONFIG_ARCH_OMAP3
  451. static struct resource omap3_aes_resources[] = {
  452. {
  453. .start = OMAP34XX_SEC_AES_BASE,
  454. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  455. .flags = IORESOURCE_MEM,
  456. },
  457. {
  458. .start = OMAP34XX_DMA_AES2_TX,
  459. .flags = IORESOURCE_DMA,
  460. },
  461. {
  462. .start = OMAP34XX_DMA_AES2_RX,
  463. .flags = IORESOURCE_DMA,
  464. }
  465. };
  466. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  467. #else
  468. #define omap3_aes_resources NULL
  469. #define omap3_aes_resources_sz 0
  470. #endif
  471. static struct platform_device aes_device = {
  472. .name = "omap-aes",
  473. .id = -1,
  474. };
  475. static void omap_init_aes(void)
  476. {
  477. if (cpu_is_omap24xx()) {
  478. aes_device.resource = omap2_aes_resources;
  479. aes_device.num_resources = omap2_aes_resources_sz;
  480. } else if (cpu_is_omap34xx()) {
  481. aes_device.resource = omap3_aes_resources;
  482. aes_device.num_resources = omap3_aes_resources_sz;
  483. } else {
  484. pr_err("%s: platform not supported\n", __func__);
  485. return;
  486. }
  487. platform_device_register(&aes_device);
  488. }
  489. #else
  490. static inline void omap_init_aes(void) { }
  491. #endif
  492. /*-------------------------------------------------------------------------*/
  493. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  494. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  495. *mmc_controller)
  496. {
  497. if ((mmc_controller->slots[0].switch_pin > 0) && \
  498. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  499. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  500. OMAP_PIN_INPUT_PULLUP);
  501. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  502. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  503. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  504. OMAP_PIN_INPUT_PULLUP);
  505. omap_mux_init_signal("sdmmc_cmd", 0);
  506. omap_mux_init_signal("sdmmc_clki", 0);
  507. omap_mux_init_signal("sdmmc_clko", 0);
  508. omap_mux_init_signal("sdmmc_dat0", 0);
  509. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  510. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  511. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  512. omap_mux_init_signal("sdmmc_dat1", 0);
  513. omap_mux_init_signal("sdmmc_dat2", 0);
  514. omap_mux_init_signal("sdmmc_dat3", 0);
  515. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  516. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  517. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  518. }
  519. /*
  520. * Use internal loop-back in MMC/SDIO Module Input Clock
  521. * selection
  522. */
  523. if (mmc_controller->slots[0].internal_clock) {
  524. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  525. v |= (1 << 24);
  526. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  527. }
  528. }
  529. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  530. {
  531. char *name = "mmci-omap";
  532. if (!mmc_data[0]) {
  533. pr_err("%s fails: Incomplete platform data\n", __func__);
  534. return;
  535. }
  536. omap242x_mmc_mux(mmc_data[0]);
  537. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  538. INT_24XX_MMC_IRQ, mmc_data[0]);
  539. }
  540. #endif
  541. /*-------------------------------------------------------------------------*/
  542. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  543. #define OMAP_HDQ_BASE 0x480B2000
  544. static struct resource omap_hdq_resources[] = {
  545. {
  546. .start = OMAP_HDQ_BASE,
  547. .end = OMAP_HDQ_BASE + 0x1C,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. {
  551. .start = INT_24XX_HDQ_IRQ,
  552. .flags = IORESOURCE_IRQ,
  553. },
  554. };
  555. static struct platform_device omap_hdq_dev = {
  556. .name = "omap_hdq",
  557. .id = 0,
  558. .dev = {
  559. .platform_data = NULL,
  560. },
  561. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  562. .resource = omap_hdq_resources,
  563. };
  564. static inline void omap_hdq_init(void)
  565. {
  566. if (cpu_is_omap2420())
  567. return;
  568. platform_device_register(&omap_hdq_dev);
  569. }
  570. #else
  571. static inline void omap_hdq_init(void) {}
  572. #endif
  573. /*---------------------------------------------------------------------------*/
  574. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  575. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  576. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  577. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  578. };
  579. #else
  580. static struct resource omap_vout_resource[2] = {
  581. };
  582. #endif
  583. static struct platform_device omap_vout_device = {
  584. .name = "omap_vout",
  585. .num_resources = ARRAY_SIZE(omap_vout_resource),
  586. .resource = &omap_vout_resource[0],
  587. .id = -1,
  588. };
  589. static void omap_init_vout(void)
  590. {
  591. if (platform_device_register(&omap_vout_device) < 0)
  592. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  593. }
  594. #else
  595. static inline void omap_init_vout(void) {}
  596. #endif
  597. /*-------------------------------------------------------------------------*/
  598. static int __init omap2_init_devices(void)
  599. {
  600. /*
  601. * please keep these calls, and their implementations above,
  602. * in alphabetical order so they're easier to sort through.
  603. */
  604. omap_init_audio();
  605. omap_init_mcpdm();
  606. omap_init_dmic();
  607. omap_init_camera();
  608. omap_init_mbox();
  609. omap_init_mcspi();
  610. omap_init_pmu();
  611. omap_hdq_init();
  612. omap_init_sti();
  613. omap_init_sham();
  614. omap_init_aes();
  615. omap_init_vout();
  616. return 0;
  617. }
  618. arch_initcall(omap2_init_devices);
  619. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  620. static int __init omap_init_wdt(void)
  621. {
  622. int id = -1;
  623. struct platform_device *pdev;
  624. struct omap_hwmod *oh;
  625. char *oh_name = "wd_timer2";
  626. char *dev_name = "omap_wdt";
  627. if (!cpu_class_is_omap2())
  628. return 0;
  629. oh = omap_hwmod_lookup(oh_name);
  630. if (!oh) {
  631. pr_err("Could not look up wd_timer%d hwmod\n", id);
  632. return -EINVAL;
  633. }
  634. pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
  635. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
  636. dev_name, oh->name);
  637. return 0;
  638. }
  639. subsys_initcall(omap_init_wdt);
  640. #endif