board-fsample.c 8.7 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/board-fsample.c
  3. *
  4. * Modified from board-perseus2.c
  5. *
  6. * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
  7. * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/gpio.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/mtd/physmap.h>
  22. #include <linux/input.h>
  23. #include <linux/smc91x.h>
  24. #include <linux/omapfb.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/map.h>
  28. #include <plat/tc.h>
  29. #include <plat/mux.h>
  30. #include <plat/flash.h>
  31. #include <plat/fpga.h>
  32. #include <plat/keypad.h>
  33. #include <plat/board.h>
  34. #include <mach/hardware.h>
  35. #include "iomap.h"
  36. #include "common.h"
  37. /* fsample is pretty close to p2-sample */
  38. #define fsample_cpld_read(reg) __raw_readb(reg)
  39. #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
  40. #define FSAMPLE_CPLD_BASE 0xE8100000
  41. #define FSAMPLE_CPLD_SIZE SZ_4K
  42. #define FSAMPLE_CPLD_START 0x05080000
  43. #define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
  44. #define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
  45. #define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
  46. #define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
  47. #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
  48. #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
  49. #define FSAMPLE_CPLD_BIT_BT_RESET 0
  50. #define FSAMPLE_CPLD_BIT_LCD_RESET 1
  51. #define FSAMPLE_CPLD_BIT_CAM_PWDN 2
  52. #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
  53. #define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
  54. #define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
  55. #define FSAMPLE_CPLD_BIT_BACKLIGHT 6
  56. #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
  57. #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
  58. #define FSAMPLE_CPLD_BIT_OTG_RESET 9
  59. #define fsample_cpld_set(bit) \
  60. fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
  61. #define fsample_cpld_clear(bit) \
  62. fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
  63. static const unsigned int fsample_keymap[] = {
  64. KEY(0, 0, KEY_UP),
  65. KEY(1, 0, KEY_RIGHT),
  66. KEY(2, 0, KEY_LEFT),
  67. KEY(3, 0, KEY_DOWN),
  68. KEY(4, 0, KEY_ENTER),
  69. KEY(0, 1, KEY_F10),
  70. KEY(1, 1, KEY_SEND),
  71. KEY(2, 1, KEY_END),
  72. KEY(3, 1, KEY_VOLUMEDOWN),
  73. KEY(4, 1, KEY_VOLUMEUP),
  74. KEY(5, 1, KEY_RECORD),
  75. KEY(0, 2, KEY_F9),
  76. KEY(1, 2, KEY_3),
  77. KEY(2, 2, KEY_6),
  78. KEY(3, 2, KEY_9),
  79. KEY(4, 2, KEY_KPDOT),
  80. KEY(0, 3, KEY_BACK),
  81. KEY(1, 3, KEY_2),
  82. KEY(2, 3, KEY_5),
  83. KEY(3, 3, KEY_8),
  84. KEY(4, 3, KEY_0),
  85. KEY(5, 3, KEY_KPSLASH),
  86. KEY(0, 4, KEY_HOME),
  87. KEY(1, 4, KEY_1),
  88. KEY(2, 4, KEY_4),
  89. KEY(3, 4, KEY_7),
  90. KEY(4, 4, KEY_KPASTERISK),
  91. KEY(5, 4, KEY_POWER),
  92. };
  93. static struct smc91x_platdata smc91x_info = {
  94. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  95. .leda = RPC_LED_100_10,
  96. .ledb = RPC_LED_TX_RX,
  97. };
  98. static struct resource smc91x_resources[] = {
  99. [0] = {
  100. .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
  101. .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. [1] = {
  105. .start = INT_7XX_MPU_EXT_NIRQ,
  106. .end = 0,
  107. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  108. },
  109. };
  110. static void __init fsample_init_smc91x(void)
  111. {
  112. fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
  113. mdelay(50);
  114. fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
  115. H2P2_DBG_FPGA_LAN_RESET);
  116. mdelay(50);
  117. }
  118. static struct mtd_partition nor_partitions[] = {
  119. /* bootloader (U-Boot, etc) in first sector */
  120. {
  121. .name = "bootloader",
  122. .offset = 0,
  123. .size = SZ_128K,
  124. .mask_flags = MTD_WRITEABLE, /* force read-only */
  125. },
  126. /* bootloader params in the next sector */
  127. {
  128. .name = "params",
  129. .offset = MTDPART_OFS_APPEND,
  130. .size = SZ_128K,
  131. .mask_flags = 0,
  132. },
  133. /* kernel */
  134. {
  135. .name = "kernel",
  136. .offset = MTDPART_OFS_APPEND,
  137. .size = SZ_2M,
  138. .mask_flags = 0
  139. },
  140. /* rest of flash is a file system */
  141. {
  142. .name = "rootfs",
  143. .offset = MTDPART_OFS_APPEND,
  144. .size = MTDPART_SIZ_FULL,
  145. .mask_flags = 0
  146. },
  147. };
  148. static struct physmap_flash_data nor_data = {
  149. .width = 2,
  150. .set_vpp = omap1_set_vpp,
  151. .parts = nor_partitions,
  152. .nr_parts = ARRAY_SIZE(nor_partitions),
  153. };
  154. static struct resource nor_resource = {
  155. .start = OMAP_CS0_PHYS,
  156. .end = OMAP_CS0_PHYS + SZ_32M - 1,
  157. .flags = IORESOURCE_MEM,
  158. };
  159. static struct platform_device nor_device = {
  160. .name = "physmap-flash",
  161. .id = 0,
  162. .dev = {
  163. .platform_data = &nor_data,
  164. },
  165. .num_resources = 1,
  166. .resource = &nor_resource,
  167. };
  168. #define FSAMPLE_NAND_RB_GPIO_PIN 62
  169. static int nand_dev_ready(struct mtd_info *mtd)
  170. {
  171. return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
  172. }
  173. static const char *part_probes[] = { "cmdlinepart", NULL };
  174. static struct platform_nand_data nand_data = {
  175. .chip = {
  176. .nr_chips = 1,
  177. .chip_offset = 0,
  178. .options = NAND_SAMSUNG_LP_OPTIONS,
  179. .part_probe_types = part_probes,
  180. },
  181. .ctrl = {
  182. .cmd_ctrl = omap1_nand_cmd_ctl,
  183. .dev_ready = nand_dev_ready,
  184. },
  185. };
  186. static struct resource nand_resource = {
  187. .start = OMAP_CS3_PHYS,
  188. .end = OMAP_CS3_PHYS + SZ_4K - 1,
  189. .flags = IORESOURCE_MEM,
  190. };
  191. static struct platform_device nand_device = {
  192. .name = "gen_nand",
  193. .id = 0,
  194. .dev = {
  195. .platform_data = &nand_data,
  196. },
  197. .num_resources = 1,
  198. .resource = &nand_resource,
  199. };
  200. static struct platform_device smc91x_device = {
  201. .name = "smc91x",
  202. .id = 0,
  203. .dev = {
  204. .platform_data = &smc91x_info,
  205. },
  206. .num_resources = ARRAY_SIZE(smc91x_resources),
  207. .resource = smc91x_resources,
  208. };
  209. static struct resource kp_resources[] = {
  210. [0] = {
  211. .start = INT_7XX_MPUIO_KEYPAD,
  212. .end = INT_7XX_MPUIO_KEYPAD,
  213. .flags = IORESOURCE_IRQ,
  214. },
  215. };
  216. static const struct matrix_keymap_data fsample_keymap_data = {
  217. .keymap = fsample_keymap,
  218. .keymap_size = ARRAY_SIZE(fsample_keymap),
  219. };
  220. static struct omap_kp_platform_data kp_data = {
  221. .rows = 8,
  222. .cols = 8,
  223. .keymap_data = &fsample_keymap_data,
  224. .delay = 4,
  225. };
  226. static struct platform_device kp_device = {
  227. .name = "omap-keypad",
  228. .id = -1,
  229. .dev = {
  230. .platform_data = &kp_data,
  231. },
  232. .num_resources = ARRAY_SIZE(kp_resources),
  233. .resource = kp_resources,
  234. };
  235. static struct platform_device *devices[] __initdata = {
  236. &nor_device,
  237. &nand_device,
  238. &smc91x_device,
  239. &kp_device,
  240. };
  241. static struct omap_lcd_config fsample_lcd_config = {
  242. .ctrl_name = "internal",
  243. };
  244. static void __init omap_fsample_init(void)
  245. {
  246. /* Early, board-dependent init */
  247. /*
  248. * Hold GSM Reset until needed
  249. */
  250. omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
  251. /*
  252. * UARTs -> done automagically by 8250 driver
  253. */
  254. /*
  255. * CSx timings, GPIO Mux ... setup
  256. */
  257. /* Flash: CS0 timings setup */
  258. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
  259. omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
  260. /*
  261. * Ethernet support through the debug board
  262. * CS1 timings setup
  263. */
  264. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
  265. omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
  266. /*
  267. * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
  268. * It is used as the Ethernet controller interrupt
  269. */
  270. omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
  271. OMAP7XX_IO_CONF_9);
  272. fsample_init_smc91x();
  273. if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
  274. BUG();
  275. gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
  276. omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
  277. omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
  278. /* Mux pins for keypad */
  279. omap_cfg_reg(E2_7XX_KBR0);
  280. omap_cfg_reg(J7_7XX_KBR1);
  281. omap_cfg_reg(E1_7XX_KBR2);
  282. omap_cfg_reg(F3_7XX_KBR3);
  283. omap_cfg_reg(D2_7XX_KBR4);
  284. omap_cfg_reg(C2_7XX_KBC0);
  285. omap_cfg_reg(D3_7XX_KBC1);
  286. omap_cfg_reg(E4_7XX_KBC2);
  287. omap_cfg_reg(F4_7XX_KBC3);
  288. omap_cfg_reg(E3_7XX_KBC4);
  289. platform_add_devices(devices, ARRAY_SIZE(devices));
  290. omap_serial_init();
  291. omap_register_i2c_bus(1, 100, NULL, 0);
  292. omapfb_set_lcd_config(&fsample_lcd_config);
  293. }
  294. /* Only FPGA needs to be mapped here. All others are done with ioremap */
  295. static struct map_desc omap_fsample_io_desc[] __initdata = {
  296. {
  297. .virtual = H2P2_DBG_FPGA_BASE,
  298. .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
  299. .length = H2P2_DBG_FPGA_SIZE,
  300. .type = MT_DEVICE
  301. },
  302. {
  303. .virtual = FSAMPLE_CPLD_BASE,
  304. .pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
  305. .length = FSAMPLE_CPLD_SIZE,
  306. .type = MT_DEVICE
  307. }
  308. };
  309. static void __init omap_fsample_map_io(void)
  310. {
  311. omap15xx_map_io();
  312. iotable_init(omap_fsample_io_desc,
  313. ARRAY_SIZE(omap_fsample_io_desc));
  314. }
  315. MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
  316. /* Maintainer: Brian Swetland <swetland@google.com> */
  317. .atag_offset = 0x100,
  318. .map_io = omap_fsample_map_io,
  319. .init_early = omap1_init_early,
  320. .reserve = omap_reserve,
  321. .init_irq = omap1_init_irq,
  322. .init_machine = omap_fsample_init,
  323. .timer = &omap1_timer,
  324. .restart = omap1_restart,
  325. MACHINE_END