fw-api.h 29 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called COPYING.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. *****************************************************************************/
  63. #ifndef __fw_api_h__
  64. #define __fw_api_h__
  65. #include "fw-api-rs.h"
  66. #include "fw-api-tx.h"
  67. #include "fw-api-sta.h"
  68. #include "fw-api-mac.h"
  69. #include "fw-api-power.h"
  70. #include "fw-api-d3.h"
  71. #include "fw-api-bt-coex.h"
  72. /* queue and FIFO numbers by usage */
  73. enum {
  74. IWL_MVM_OFFCHANNEL_QUEUE = 8,
  75. IWL_MVM_CMD_QUEUE = 9,
  76. IWL_MVM_AUX_QUEUE = 15,
  77. IWL_MVM_FIRST_AGG_QUEUE = 16,
  78. IWL_MVM_NUM_QUEUES = 20,
  79. IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1,
  80. IWL_MVM_CMD_FIFO = 7
  81. };
  82. #define IWL_MVM_STATION_COUNT 16
  83. /* commands */
  84. enum {
  85. MVM_ALIVE = 0x1,
  86. REPLY_ERROR = 0x2,
  87. INIT_COMPLETE_NOTIF = 0x4,
  88. /* PHY context commands */
  89. PHY_CONTEXT_CMD = 0x8,
  90. DBG_CFG = 0x9,
  91. /* station table */
  92. ADD_STA = 0x18,
  93. REMOVE_STA = 0x19,
  94. /* TX */
  95. TX_CMD = 0x1c,
  96. TXPATH_FLUSH = 0x1e,
  97. MGMT_MCAST_KEY = 0x1f,
  98. /* global key */
  99. WEP_KEY = 0x20,
  100. /* MAC and Binding commands */
  101. MAC_CONTEXT_CMD = 0x28,
  102. TIME_EVENT_CMD = 0x29, /* both CMD and response */
  103. TIME_EVENT_NOTIFICATION = 0x2a,
  104. BINDING_CONTEXT_CMD = 0x2b,
  105. TIME_QUOTA_CMD = 0x2c,
  106. LQ_CMD = 0x4e,
  107. /* Calibration */
  108. TEMPERATURE_NOTIFICATION = 0x62,
  109. CALIBRATION_CFG_CMD = 0x65,
  110. CALIBRATION_RES_NOTIFICATION = 0x66,
  111. CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
  112. RADIO_VERSION_NOTIFICATION = 0x68,
  113. /* Scan offload */
  114. SCAN_OFFLOAD_REQUEST_CMD = 0x51,
  115. SCAN_OFFLOAD_ABORT_CMD = 0x52,
  116. SCAN_OFFLOAD_COMPLETE = 0x6D,
  117. SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
  118. SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
  119. /* Phy */
  120. PHY_CONFIGURATION_CMD = 0x6a,
  121. CALIB_RES_NOTIF_PHY_DB = 0x6b,
  122. /* PHY_DB_CMD = 0x6c, */
  123. /* Power */
  124. POWER_TABLE_CMD = 0x77,
  125. /* Scanning */
  126. SCAN_REQUEST_CMD = 0x80,
  127. SCAN_ABORT_CMD = 0x81,
  128. SCAN_START_NOTIFICATION = 0x82,
  129. SCAN_RESULTS_NOTIFICATION = 0x83,
  130. SCAN_COMPLETE_NOTIFICATION = 0x84,
  131. /* NVM */
  132. NVM_ACCESS_CMD = 0x88,
  133. SET_CALIB_DEFAULT_CMD = 0x8e,
  134. BEACON_NOTIFICATION = 0x90,
  135. BEACON_TEMPLATE_CMD = 0x91,
  136. TX_ANT_CONFIGURATION_CMD = 0x98,
  137. BT_CONFIG = 0x9b,
  138. STATISTICS_NOTIFICATION = 0x9d,
  139. /* RF-KILL commands and notifications */
  140. CARD_STATE_CMD = 0xa0,
  141. CARD_STATE_NOTIFICATION = 0xa1,
  142. REPLY_RX_PHY_CMD = 0xc0,
  143. REPLY_RX_MPDU_CMD = 0xc1,
  144. BA_NOTIF = 0xc5,
  145. /* BT Coex */
  146. BT_COEX_PRIO_TABLE = 0xcc,
  147. BT_COEX_PROT_ENV = 0xcd,
  148. BT_PROFILE_NOTIFICATION = 0xce,
  149. REPLY_BEACON_FILTERING_CMD = 0xd2,
  150. REPLY_DEBUG_CMD = 0xf0,
  151. DEBUG_LOG_MSG = 0xf7,
  152. MCAST_FILTER_CMD = 0xd0,
  153. /* D3 commands/notifications */
  154. D3_CONFIG_CMD = 0xd3,
  155. PROT_OFFLOAD_CONFIG_CMD = 0xd4,
  156. OFFLOADS_QUERY_CMD = 0xd5,
  157. REMOTE_WAKE_CONFIG_CMD = 0xd6,
  158. /* for WoWLAN in particular */
  159. WOWLAN_PATTERNS = 0xe0,
  160. WOWLAN_CONFIGURATION = 0xe1,
  161. WOWLAN_TSC_RSC_PARAM = 0xe2,
  162. WOWLAN_TKIP_PARAM = 0xe3,
  163. WOWLAN_KEK_KCK_MATERIAL = 0xe4,
  164. WOWLAN_GET_STATUSES = 0xe5,
  165. WOWLAN_TX_POWER_PER_DB = 0xe6,
  166. /* and for NetDetect */
  167. NET_DETECT_CONFIG_CMD = 0x54,
  168. NET_DETECT_PROFILES_QUERY_CMD = 0x56,
  169. NET_DETECT_PROFILES_CMD = 0x57,
  170. NET_DETECT_HOTSPOTS_CMD = 0x58,
  171. NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
  172. REPLY_MAX = 0xff,
  173. };
  174. /**
  175. * struct iwl_cmd_response - generic response struct for most commands
  176. * @status: status of the command asked, changes for each one
  177. */
  178. struct iwl_cmd_response {
  179. __le32 status;
  180. };
  181. /*
  182. * struct iwl_tx_ant_cfg_cmd
  183. * @valid: valid antenna configuration
  184. */
  185. struct iwl_tx_ant_cfg_cmd {
  186. __le32 valid;
  187. } __packed;
  188. /*
  189. * Calibration control struct.
  190. * Sent as part of the phy configuration command.
  191. * @flow_trigger: bitmap for which calibrations to perform according to
  192. * flow triggers.
  193. * @event_trigger: bitmap for which calibrations to perform according to
  194. * event triggers.
  195. */
  196. struct iwl_calib_ctrl {
  197. __le32 flow_trigger;
  198. __le32 event_trigger;
  199. } __packed;
  200. /* This enum defines the bitmap of various calibrations to enable in both
  201. * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
  202. */
  203. enum iwl_calib_cfg {
  204. IWL_CALIB_CFG_XTAL_IDX = BIT(0),
  205. IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
  206. IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
  207. IWL_CALIB_CFG_PAPD_IDX = BIT(3),
  208. IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
  209. IWL_CALIB_CFG_DC_IDX = BIT(5),
  210. IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
  211. IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
  212. IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
  213. IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
  214. IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
  215. IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
  216. IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
  217. IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
  218. IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
  219. IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
  220. IWL_CALIB_CFG_DAC_IDX = BIT(16),
  221. IWL_CALIB_CFG_ABS_IDX = BIT(17),
  222. IWL_CALIB_CFG_AGC_IDX = BIT(18),
  223. };
  224. /*
  225. * Phy configuration command.
  226. */
  227. struct iwl_phy_cfg_cmd {
  228. __le32 phy_cfg;
  229. struct iwl_calib_ctrl calib_control;
  230. } __packed;
  231. #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
  232. #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
  233. #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
  234. #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
  235. #define PHY_CFG_TX_CHAIN_A BIT(8)
  236. #define PHY_CFG_TX_CHAIN_B BIT(9)
  237. #define PHY_CFG_TX_CHAIN_C BIT(10)
  238. #define PHY_CFG_RX_CHAIN_A BIT(12)
  239. #define PHY_CFG_RX_CHAIN_B BIT(13)
  240. #define PHY_CFG_RX_CHAIN_C BIT(14)
  241. /* Target of the NVM_ACCESS_CMD */
  242. enum {
  243. NVM_ACCESS_TARGET_CACHE = 0,
  244. NVM_ACCESS_TARGET_OTP = 1,
  245. NVM_ACCESS_TARGET_EEPROM = 2,
  246. };
  247. /* Section types for NVM_ACCESS_CMD */
  248. enum {
  249. NVM_SECTION_TYPE_HW = 0,
  250. NVM_SECTION_TYPE_SW,
  251. NVM_SECTION_TYPE_PAPD,
  252. NVM_SECTION_TYPE_BT,
  253. NVM_SECTION_TYPE_CALIBRATION,
  254. NVM_SECTION_TYPE_PRODUCTION,
  255. NVM_SECTION_TYPE_POST_FCS_CALIB,
  256. NVM_NUM_OF_SECTIONS,
  257. };
  258. /**
  259. * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
  260. * @op_code: 0 - read, 1 - write
  261. * @target: NVM_ACCESS_TARGET_*
  262. * @type: NVM_SECTION_TYPE_*
  263. * @offset: offset in bytes into the section
  264. * @length: in bytes, to read/write
  265. * @data: if write operation, the data to write. On read its empty
  266. */
  267. struct iwl_nvm_access_cmd {
  268. u8 op_code;
  269. u8 target;
  270. __le16 type;
  271. __le16 offset;
  272. __le16 length;
  273. u8 data[];
  274. } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
  275. /**
  276. * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
  277. * @offset: offset in bytes into the section
  278. * @length: in bytes, either how much was written or read
  279. * @type: NVM_SECTION_TYPE_*
  280. * @status: 0 for success, fail otherwise
  281. * @data: if read operation, the data returned. Empty on write.
  282. */
  283. struct iwl_nvm_access_resp {
  284. __le16 offset;
  285. __le16 length;
  286. __le16 type;
  287. __le16 status;
  288. u8 data[];
  289. } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
  290. /* MVM_ALIVE 0x1 */
  291. /* alive response is_valid values */
  292. #define ALIVE_RESP_UCODE_OK BIT(0)
  293. #define ALIVE_RESP_RFKILL BIT(1)
  294. /* alive response ver_type values */
  295. enum {
  296. FW_TYPE_HW = 0,
  297. FW_TYPE_PROT = 1,
  298. FW_TYPE_AP = 2,
  299. FW_TYPE_WOWLAN = 3,
  300. FW_TYPE_TIMING = 4,
  301. FW_TYPE_WIPAN = 5
  302. };
  303. /* alive response ver_subtype values */
  304. enum {
  305. FW_SUBTYPE_FULL_FEATURE = 0,
  306. FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
  307. FW_SUBTYPE_REDUCED = 2,
  308. FW_SUBTYPE_ALIVE_ONLY = 3,
  309. FW_SUBTYPE_WOWLAN = 4,
  310. FW_SUBTYPE_AP_SUBTYPE = 5,
  311. FW_SUBTYPE_WIPAN = 6,
  312. FW_SUBTYPE_INITIALIZE = 9
  313. };
  314. #define IWL_ALIVE_STATUS_ERR 0xDEAD
  315. #define IWL_ALIVE_STATUS_OK 0xCAFE
  316. #define IWL_ALIVE_FLG_RFKILL BIT(0)
  317. struct mvm_alive_resp {
  318. __le16 status;
  319. __le16 flags;
  320. u8 ucode_minor;
  321. u8 ucode_major;
  322. __le16 id;
  323. u8 api_minor;
  324. u8 api_major;
  325. u8 ver_subtype;
  326. u8 ver_type;
  327. u8 mac;
  328. u8 opt;
  329. __le16 reserved2;
  330. __le32 timestamp;
  331. __le32 error_event_table_ptr; /* SRAM address for error log */
  332. __le32 log_event_table_ptr; /* SRAM address for event log */
  333. __le32 cpu_register_ptr;
  334. __le32 dbgm_config_ptr;
  335. __le32 alive_counter_ptr;
  336. __le32 scd_base_ptr; /* SRAM address for SCD */
  337. } __packed; /* ALIVE_RES_API_S_VER_1 */
  338. /* Error response/notification */
  339. enum {
  340. FW_ERR_UNKNOWN_CMD = 0x0,
  341. FW_ERR_INVALID_CMD_PARAM = 0x1,
  342. FW_ERR_SERVICE = 0x2,
  343. FW_ERR_ARC_MEMORY = 0x3,
  344. FW_ERR_ARC_CODE = 0x4,
  345. FW_ERR_WATCH_DOG = 0x5,
  346. FW_ERR_WEP_GRP_KEY_INDX = 0x10,
  347. FW_ERR_WEP_KEY_SIZE = 0x11,
  348. FW_ERR_OBSOLETE_FUNC = 0x12,
  349. FW_ERR_UNEXPECTED = 0xFE,
  350. FW_ERR_FATAL = 0xFF
  351. };
  352. /**
  353. * struct iwl_error_resp - FW error indication
  354. * ( REPLY_ERROR = 0x2 )
  355. * @error_type: one of FW_ERR_*
  356. * @cmd_id: the command ID for which the error occured
  357. * @bad_cmd_seq_num: sequence number of the erroneous command
  358. * @error_service: which service created the error, applicable only if
  359. * error_type = 2, otherwise 0
  360. * @timestamp: TSF in usecs.
  361. */
  362. struct iwl_error_resp {
  363. __le32 error_type;
  364. u8 cmd_id;
  365. u8 reserved1;
  366. __le16 bad_cmd_seq_num;
  367. __le32 error_service;
  368. __le64 timestamp;
  369. } __packed;
  370. /* Common PHY, MAC and Bindings definitions */
  371. #define MAX_MACS_IN_BINDING (3)
  372. #define MAX_BINDINGS (4)
  373. #define AUX_BINDING_INDEX (3)
  374. #define MAX_PHYS (4)
  375. /* Used to extract ID and color from the context dword */
  376. #define FW_CTXT_ID_POS (0)
  377. #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
  378. #define FW_CTXT_COLOR_POS (8)
  379. #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
  380. #define FW_CTXT_INVALID (0xffffffff)
  381. #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
  382. (_color << FW_CTXT_COLOR_POS))
  383. /* Possible actions on PHYs, MACs and Bindings */
  384. enum {
  385. FW_CTXT_ACTION_STUB = 0,
  386. FW_CTXT_ACTION_ADD,
  387. FW_CTXT_ACTION_MODIFY,
  388. FW_CTXT_ACTION_REMOVE,
  389. FW_CTXT_ACTION_NUM
  390. }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
  391. /* Time Events */
  392. /* Time Event types, according to MAC type */
  393. enum iwl_time_event_type {
  394. /* BSS Station Events */
  395. TE_BSS_STA_AGGRESSIVE_ASSOC,
  396. TE_BSS_STA_ASSOC,
  397. TE_BSS_EAP_DHCP_PROT,
  398. TE_BSS_QUIET_PERIOD,
  399. /* P2P Device Events */
  400. TE_P2P_DEVICE_DISCOVERABLE,
  401. TE_P2P_DEVICE_LISTEN,
  402. TE_P2P_DEVICE_ACTION_SCAN,
  403. TE_P2P_DEVICE_FULL_SCAN,
  404. /* P2P Client Events */
  405. TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
  406. TE_P2P_CLIENT_ASSOC,
  407. TE_P2P_CLIENT_QUIET_PERIOD,
  408. /* P2P GO Events */
  409. TE_P2P_GO_ASSOC_PROT,
  410. TE_P2P_GO_REPETITIVE_NOA,
  411. TE_P2P_GO_CT_WINDOW,
  412. /* WiDi Sync Events */
  413. TE_WIDI_TX_SYNC,
  414. TE_MAX
  415. }; /* MAC_EVENT_TYPE_API_E_VER_1 */
  416. /* Time Event dependencies: none, on another TE, or in a specific time */
  417. enum {
  418. TE_INDEPENDENT = 0,
  419. TE_DEP_OTHER = 1,
  420. TE_DEP_TSF = 2,
  421. TE_EVENT_SOCIOPATHIC = 4,
  422. }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
  423. /*
  424. * Supported Time event notifications configuration.
  425. * A notification (both event and fragment) includes a status indicating weather
  426. * the FW was able to schedule the event or not. For fragment start/end
  427. * notification the status is always success. There is no start/end fragment
  428. * notification for monolithic events.
  429. *
  430. * @TE_NOTIF_NONE: no notifications
  431. * @TE_NOTIF_HOST_EVENT_START: request/receive notification on event start
  432. * @TE_NOTIF_HOST_EVENT_END:request/receive notification on event end
  433. * @TE_NOTIF_INTERNAL_EVENT_START: internal FW use
  434. * @TE_NOTIF_INTERNAL_EVENT_END: internal FW use.
  435. * @TE_NOTIF_HOST_FRAG_START: request/receive notification on frag start
  436. * @TE_NOTIF_HOST_FRAG_END:request/receive notification on frag end
  437. * @TE_NOTIF_INTERNAL_FRAG_START: internal FW use.
  438. * @TE_NOTIF_INTERNAL_FRAG_END: internal FW use.
  439. */
  440. enum {
  441. TE_NOTIF_NONE = 0,
  442. TE_NOTIF_HOST_EVENT_START = 0x1,
  443. TE_NOTIF_HOST_EVENT_END = 0x2,
  444. TE_NOTIF_INTERNAL_EVENT_START = 0x4,
  445. TE_NOTIF_INTERNAL_EVENT_END = 0x8,
  446. TE_NOTIF_HOST_FRAG_START = 0x10,
  447. TE_NOTIF_HOST_FRAG_END = 0x20,
  448. TE_NOTIF_INTERNAL_FRAG_START = 0x40,
  449. TE_NOTIF_INTERNAL_FRAG_END = 0x80
  450. }; /* MAC_EVENT_ACTION_API_E_VER_2 */
  451. /*
  452. * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
  453. * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
  454. * the first fragment is scheduled.
  455. * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
  456. * the first 2 fragments are scheduled.
  457. * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
  458. * of fragments are valid.
  459. *
  460. * Other than the constant defined above, specifying a fragmentation value 'x'
  461. * means that the event can be fragmented but only the first 'x' will be
  462. * scheduled.
  463. */
  464. enum {
  465. TE_FRAG_NONE = 0,
  466. TE_FRAG_SINGLE = 1,
  467. TE_FRAG_DUAL = 2,
  468. TE_FRAG_ENDLESS = 0xffffffff
  469. };
  470. /* Repeat the time event endlessly (until removed) */
  471. #define TE_REPEAT_ENDLESS (0xffffffff)
  472. /* If a Time Event has bounded repetitions, this is the maximal value */
  473. #define TE_REPEAT_MAX_MSK (0x0fffffff)
  474. /* If a Time Event can be fragmented, this is the max number of fragments */
  475. #define TE_FRAG_MAX_MSK (0x0fffffff)
  476. /**
  477. * struct iwl_time_event_cmd - configuring Time Events
  478. * ( TIME_EVENT_CMD = 0x29 )
  479. * @id_and_color: ID and color of the relevant MAC
  480. * @action: action to perform, one of FW_CTXT_ACTION_*
  481. * @id: this field has two meanings, depending on the action:
  482. * If the action is ADD, then it means the type of event to add.
  483. * For all other actions it is the unique event ID assigned when the
  484. * event was added by the FW.
  485. * @apply_time: When to start the Time Event (in GP2)
  486. * @max_delay: maximum delay to event's start (apply time), in TU
  487. * @depends_on: the unique ID of the event we depend on (if any)
  488. * @interval: interval between repetitions, in TU
  489. * @interval_reciprocal: 2^32 / interval
  490. * @duration: duration of event in TU
  491. * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
  492. * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
  493. * @is_present: 0 or 1, are we present or absent during the Time Event
  494. * @max_frags: maximal number of fragments the Time Event can be divided to
  495. * @notify: notifications using TE_NOTIF_* (whom to notify when)
  496. */
  497. struct iwl_time_event_cmd {
  498. /* COMMON_INDEX_HDR_API_S_VER_1 */
  499. __le32 id_and_color;
  500. __le32 action;
  501. __le32 id;
  502. /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
  503. __le32 apply_time;
  504. __le32 max_delay;
  505. __le32 dep_policy;
  506. __le32 depends_on;
  507. __le32 is_present;
  508. __le32 max_frags;
  509. __le32 interval;
  510. __le32 interval_reciprocal;
  511. __le32 duration;
  512. __le32 repeat;
  513. __le32 notify;
  514. } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
  515. /**
  516. * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
  517. * @status: bit 0 indicates success, all others specify errors
  518. * @id: the Time Event type
  519. * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
  520. * @id_and_color: ID and color of the relevant MAC
  521. */
  522. struct iwl_time_event_resp {
  523. __le32 status;
  524. __le32 id;
  525. __le32 unique_id;
  526. __le32 id_and_color;
  527. } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
  528. /**
  529. * struct iwl_time_event_notif - notifications of time event start/stop
  530. * ( TIME_EVENT_NOTIFICATION = 0x2a )
  531. * @timestamp: action timestamp in GP2
  532. * @session_id: session's unique id
  533. * @unique_id: unique id of the Time Event itself
  534. * @id_and_color: ID and color of the relevant MAC
  535. * @action: one of TE_NOTIF_START or TE_NOTIF_END
  536. * @status: true if scheduled, false otherwise (not executed)
  537. */
  538. struct iwl_time_event_notif {
  539. __le32 timestamp;
  540. __le32 session_id;
  541. __le32 unique_id;
  542. __le32 id_and_color;
  543. __le32 action;
  544. __le32 status;
  545. } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
  546. /* Bindings and Time Quota */
  547. /**
  548. * struct iwl_binding_cmd - configuring bindings
  549. * ( BINDING_CONTEXT_CMD = 0x2b )
  550. * @id_and_color: ID and color of the relevant Binding
  551. * @action: action to perform, one of FW_CTXT_ACTION_*
  552. * @macs: array of MAC id and colors which belong to the binding
  553. * @phy: PHY id and color which belongs to the binding
  554. */
  555. struct iwl_binding_cmd {
  556. /* COMMON_INDEX_HDR_API_S_VER_1 */
  557. __le32 id_and_color;
  558. __le32 action;
  559. /* BINDING_DATA_API_S_VER_1 */
  560. __le32 macs[MAX_MACS_IN_BINDING];
  561. __le32 phy;
  562. } __packed; /* BINDING_CMD_API_S_VER_1 */
  563. /* The maximal number of fragments in the FW's schedule session */
  564. #define IWL_MVM_MAX_QUOTA 128
  565. /**
  566. * struct iwl_time_quota_data - configuration of time quota per binding
  567. * @id_and_color: ID and color of the relevant Binding
  568. * @quota: absolute time quota in TU. The scheduler will try to divide the
  569. * remainig quota (after Time Events) according to this quota.
  570. * @max_duration: max uninterrupted context duration in TU
  571. */
  572. struct iwl_time_quota_data {
  573. __le32 id_and_color;
  574. __le32 quota;
  575. __le32 max_duration;
  576. } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
  577. /**
  578. * struct iwl_time_quota_cmd - configuration of time quota between bindings
  579. * ( TIME_QUOTA_CMD = 0x2c )
  580. * @quotas: allocations per binding
  581. */
  582. struct iwl_time_quota_cmd {
  583. struct iwl_time_quota_data quotas[MAX_BINDINGS];
  584. } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
  585. /* PHY context */
  586. /* Supported bands */
  587. #define PHY_BAND_5 (0)
  588. #define PHY_BAND_24 (1)
  589. /* Supported channel width, vary if there is VHT support */
  590. #define PHY_VHT_CHANNEL_MODE20 (0x0)
  591. #define PHY_VHT_CHANNEL_MODE40 (0x1)
  592. #define PHY_VHT_CHANNEL_MODE80 (0x2)
  593. #define PHY_VHT_CHANNEL_MODE160 (0x3)
  594. /*
  595. * Control channel position:
  596. * For legacy set bit means upper channel, otherwise lower.
  597. * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
  598. * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
  599. * center_freq
  600. * |
  601. * 40Mhz |_______|_______|
  602. * 80Mhz |_______|_______|_______|_______|
  603. * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
  604. * code 011 010 001 000 | 100 101 110 111
  605. */
  606. #define PHY_VHT_CTRL_POS_1_BELOW (0x0)
  607. #define PHY_VHT_CTRL_POS_2_BELOW (0x1)
  608. #define PHY_VHT_CTRL_POS_3_BELOW (0x2)
  609. #define PHY_VHT_CTRL_POS_4_BELOW (0x3)
  610. #define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
  611. #define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
  612. #define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
  613. #define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
  614. /*
  615. * @band: PHY_BAND_*
  616. * @channel: channel number
  617. * @width: PHY_[VHT|LEGACY]_CHANNEL_*
  618. * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
  619. */
  620. struct iwl_fw_channel_info {
  621. u8 band;
  622. u8 channel;
  623. u8 width;
  624. u8 ctrl_pos;
  625. } __packed;
  626. #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
  627. #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
  628. (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
  629. #define PHY_RX_CHAIN_VALID_POS (1)
  630. #define PHY_RX_CHAIN_VALID_MSK \
  631. (0x7 << PHY_RX_CHAIN_VALID_POS)
  632. #define PHY_RX_CHAIN_FORCE_SEL_POS (4)
  633. #define PHY_RX_CHAIN_FORCE_SEL_MSK \
  634. (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
  635. #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
  636. #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
  637. (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
  638. #define PHY_RX_CHAIN_CNT_POS (10)
  639. #define PHY_RX_CHAIN_CNT_MSK \
  640. (0x3 << PHY_RX_CHAIN_CNT_POS)
  641. #define PHY_RX_CHAIN_MIMO_CNT_POS (12)
  642. #define PHY_RX_CHAIN_MIMO_CNT_MSK \
  643. (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
  644. #define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
  645. #define PHY_RX_CHAIN_MIMO_FORCE_MSK \
  646. (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
  647. /* TODO: fix the value, make it depend on firmware at runtime? */
  648. #define NUM_PHY_CTX 3
  649. /* TODO: complete missing documentation */
  650. /**
  651. * struct iwl_phy_context_cmd - config of the PHY context
  652. * ( PHY_CONTEXT_CMD = 0x8 )
  653. * @id_and_color: ID and color of the relevant Binding
  654. * @action: action to perform, one of FW_CTXT_ACTION_*
  655. * @apply_time: 0 means immediate apply and context switch.
  656. * other value means apply new params after X usecs
  657. * @tx_param_color: ???
  658. * @channel_info:
  659. * @txchain_info: ???
  660. * @rxchain_info: ???
  661. * @acquisition_data: ???
  662. * @dsp_cfg_flags: set to 0
  663. */
  664. struct iwl_phy_context_cmd {
  665. /* COMMON_INDEX_HDR_API_S_VER_1 */
  666. __le32 id_and_color;
  667. __le32 action;
  668. /* PHY_CONTEXT_DATA_API_S_VER_1 */
  669. __le32 apply_time;
  670. __le32 tx_param_color;
  671. struct iwl_fw_channel_info ci;
  672. __le32 txchain_info;
  673. __le32 rxchain_info;
  674. __le32 acquisition_data;
  675. __le32 dsp_cfg_flags;
  676. } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
  677. #define IWL_RX_INFO_PHY_CNT 8
  678. #define IWL_RX_INFO_AGC_IDX 1
  679. #define IWL_RX_INFO_RSSI_AB_IDX 2
  680. #define IWL_OFDM_AGC_A_MSK 0x0000007f
  681. #define IWL_OFDM_AGC_A_POS 0
  682. #define IWL_OFDM_AGC_B_MSK 0x00003f80
  683. #define IWL_OFDM_AGC_B_POS 7
  684. #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
  685. #define IWL_OFDM_AGC_CODE_POS 20
  686. #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
  687. #define IWL_OFDM_RSSI_A_POS 0
  688. #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
  689. #define IWL_OFDM_RSSI_ALLBAND_A_POS 8
  690. #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
  691. #define IWL_OFDM_RSSI_B_POS 16
  692. #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
  693. #define IWL_OFDM_RSSI_ALLBAND_B_POS 24
  694. /**
  695. * struct iwl_rx_phy_info - phy info
  696. * (REPLY_RX_PHY_CMD = 0xc0)
  697. * @non_cfg_phy_cnt: non configurable DSP phy data byte count
  698. * @cfg_phy_cnt: configurable DSP phy data byte count
  699. * @stat_id: configurable DSP phy data set ID
  700. * @reserved1:
  701. * @system_timestamp: GP2 at on air rise
  702. * @timestamp: TSF at on air rise
  703. * @beacon_time_stamp: beacon at on-air rise
  704. * @phy_flags: general phy flags: band, modulation, ...
  705. * @channel: channel number
  706. * @non_cfg_phy_buf: for various implementations of non_cfg_phy
  707. * @rate_n_flags: RATE_MCS_*
  708. * @byte_count: frame's byte-count
  709. * @frame_time: frame's time on the air, based on byte count and frame rate
  710. * calculation
  711. * @mac_active_msk: what MACs were active when the frame was received
  712. *
  713. * Before each Rx, the device sends this data. It contains PHY information
  714. * about the reception of the packet.
  715. */
  716. struct iwl_rx_phy_info {
  717. u8 non_cfg_phy_cnt;
  718. u8 cfg_phy_cnt;
  719. u8 stat_id;
  720. u8 reserved1;
  721. __le32 system_timestamp;
  722. __le64 timestamp;
  723. __le32 beacon_time_stamp;
  724. __le16 phy_flags;
  725. __le16 channel;
  726. __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
  727. __le32 rate_n_flags;
  728. __le32 byte_count;
  729. __le16 mac_active_msk;
  730. __le16 frame_time;
  731. } __packed;
  732. struct iwl_rx_mpdu_res_start {
  733. __le16 byte_count;
  734. __le16 reserved;
  735. } __packed;
  736. /**
  737. * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
  738. * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
  739. * @RX_RES_PHY_FLAGS_MOD_CCK:
  740. * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
  741. * @RX_RES_PHY_FLAGS_NARROW_BAND:
  742. * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
  743. * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
  744. * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
  745. * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
  746. * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
  747. */
  748. enum iwl_rx_phy_flags {
  749. RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
  750. RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
  751. RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
  752. RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
  753. RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
  754. RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
  755. RX_RES_PHY_FLAGS_AGG = BIT(7),
  756. RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
  757. RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
  758. RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
  759. };
  760. /**
  761. * enum iwl_mvm_rx_status - written by fw for each Rx packet
  762. * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
  763. * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
  764. * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
  765. * @RX_MPDU_RES_STATUS_KEY_VALID:
  766. * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
  767. * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
  768. * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
  769. * in the driver.
  770. * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
  771. * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
  772. * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
  773. * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
  774. * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
  775. * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
  776. * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
  777. * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
  778. * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
  779. * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
  780. * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
  781. * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
  782. * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
  783. * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
  784. * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
  785. * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
  786. * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
  787. * @RX_MPDU_RES_STATUS_STA_ID_MSK:
  788. * @RX_MPDU_RES_STATUS_RRF_KILL:
  789. * @RX_MPDU_RES_STATUS_FILTERING_MSK:
  790. * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
  791. */
  792. enum iwl_mvm_rx_status {
  793. RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
  794. RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
  795. RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
  796. RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
  797. RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
  798. RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
  799. RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
  800. RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
  801. RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
  802. RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
  803. RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
  804. RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
  805. RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
  806. RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
  807. RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
  808. RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
  809. RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
  810. RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
  811. RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
  812. RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
  813. RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
  814. RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
  815. RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
  816. RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
  817. RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
  818. RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
  819. };
  820. /**
  821. * struct iwl_radio_version_notif - information on the radio version
  822. * ( RADIO_VERSION_NOTIFICATION = 0x68 )
  823. * @radio_flavor:
  824. * @radio_step:
  825. * @radio_dash:
  826. */
  827. struct iwl_radio_version_notif {
  828. __le32 radio_flavor;
  829. __le32 radio_step;
  830. __le32 radio_dash;
  831. } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
  832. enum iwl_card_state_flags {
  833. CARD_ENABLED = 0x00,
  834. HW_CARD_DISABLED = 0x01,
  835. SW_CARD_DISABLED = 0x02,
  836. CT_KILL_CARD_DISABLED = 0x04,
  837. HALT_CARD_DISABLED = 0x08,
  838. CARD_DISABLED_MSK = 0x0f,
  839. CARD_IS_RX_ON = 0x10,
  840. };
  841. /**
  842. * struct iwl_radio_version_notif - information on the radio version
  843. * ( CARD_STATE_NOTIFICATION = 0xa1 )
  844. * @flags: %iwl_card_state_flags
  845. */
  846. struct iwl_card_state_notif {
  847. __le32 flags;
  848. } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
  849. /**
  850. * struct iwl_set_calib_default_cmd - set default value for calibration.
  851. * ( SET_CALIB_DEFAULT_CMD = 0x8e )
  852. * @calib_index: the calibration to set value for
  853. * @length: of data
  854. * @data: the value to set for the calibration result
  855. */
  856. struct iwl_set_calib_default_cmd {
  857. __le16 calib_index;
  858. __le16 length;
  859. u8 data[0];
  860. } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
  861. #define MAX_PORT_ID_NUM 2
  862. /**
  863. * struct iwl_mcast_filter_cmd - configure multicast filter.
  864. * @filter_own: Set 1 to filter out multicast packets sent by station itself
  865. * @port_id: Multicast MAC addresses array specifier. This is a strange way
  866. * to identify network interface adopted in host-device IF.
  867. * It is used by FW as index in array of addresses. This array has
  868. * MAX_PORT_ID_NUM members.
  869. * @count: Number of MAC addresses in the array
  870. * @pass_all: Set 1 to pass all multicast packets.
  871. * @bssid: current association BSSID.
  872. * @addr_list: Place holder for array of MAC addresses.
  873. * IMPORTANT: add padding if necessary to ensure DWORD alignment.
  874. */
  875. struct iwl_mcast_filter_cmd {
  876. u8 filter_own;
  877. u8 port_id;
  878. u8 count;
  879. u8 pass_all;
  880. u8 bssid[6];
  881. u8 reserved[2];
  882. u8 addr_list[0];
  883. } __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
  884. #endif /* __fw_api_h__ */