mac_esp.c 16 KB

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  1. /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
  2. *
  3. * Adapted from jazz_esp.c and the old mac_esp.c.
  4. *
  5. * The pseudo DMA algorithm is based on the one used in NetBSD.
  6. * See sys/arch/mac68k/obio/esp.c for some background information.
  7. *
  8. * Copyright (C) 2007-2008 Finn Thain
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/delay.h>
  19. #include <linux/io.h>
  20. #include <linux/nubus.h>
  21. #include <asm/irq.h>
  22. #include <asm/dma.h>
  23. #include <asm/macints.h>
  24. #include <asm/macintosh.h>
  25. #include <scsi/scsi_host.h>
  26. #include "esp_scsi.h"
  27. #define DRV_MODULE_NAME "mac_esp"
  28. #define PFX DRV_MODULE_NAME ": "
  29. #define DRV_VERSION "1.000"
  30. #define DRV_MODULE_RELDATE "Sept 15, 2007"
  31. #define MAC_ESP_IO_BASE 0x50F00000
  32. #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
  33. #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
  34. #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
  35. #define MAC_ESP_REGS_SPACING 0x402
  36. #define MAC_ESP_PDMA_REG 0xF9800024
  37. #define MAC_ESP_PDMA_REG_SPACING 0x4
  38. #define MAC_ESP_PDMA_IO_OFFSET 0x100
  39. #define esp_read8(REG) mac_esp_read8(esp, REG)
  40. #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
  41. struct mac_esp_priv {
  42. struct esp *esp;
  43. void __iomem *pdma_regs;
  44. void __iomem *pdma_io;
  45. int error;
  46. };
  47. static struct platform_device *internal_esp, *external_esp;
  48. #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
  49. platform_get_drvdata((struct platform_device *) \
  50. (esp->dev)))
  51. static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
  52. {
  53. nubus_writeb(val, esp->regs + reg * 16);
  54. }
  55. static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
  56. {
  57. return nubus_readb(esp->regs + reg * 16);
  58. }
  59. /* For pseudo DMA and PIO we need the virtual address
  60. * so this address mapping is the identity mapping.
  61. */
  62. static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
  63. size_t sz, int dir)
  64. {
  65. return (dma_addr_t)buf;
  66. }
  67. static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
  68. int num_sg, int dir)
  69. {
  70. int i;
  71. for (i = 0; i < num_sg; i++)
  72. sg[i].dma_address = (u32)sg_virt(&sg[i]);
  73. return num_sg;
  74. }
  75. static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
  76. size_t sz, int dir)
  77. {
  78. /* Nothing to do. */
  79. }
  80. static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
  81. int num_sg, int dir)
  82. {
  83. /* Nothing to do. */
  84. }
  85. static void mac_esp_reset_dma(struct esp *esp)
  86. {
  87. /* Nothing to do. */
  88. }
  89. static void mac_esp_dma_drain(struct esp *esp)
  90. {
  91. /* Nothing to do. */
  92. }
  93. static void mac_esp_dma_invalidate(struct esp *esp)
  94. {
  95. /* Nothing to do. */
  96. }
  97. static int mac_esp_dma_error(struct esp *esp)
  98. {
  99. return MAC_ESP_GET_PRIV(esp)->error;
  100. }
  101. static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
  102. {
  103. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  104. int i = 500000;
  105. do {
  106. if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
  107. return 0;
  108. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  109. return 1;
  110. udelay(2);
  111. } while (--i);
  112. printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
  113. esp_read8(ESP_STATUS));
  114. mep->error = 1;
  115. return 1;
  116. }
  117. static inline int mac_esp_wait_for_dreq(struct esp *esp)
  118. {
  119. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  120. int i = 500000;
  121. do {
  122. if (mep->pdma_regs == NULL) {
  123. if (mac_irq_pending(IRQ_MAC_SCSIDRQ))
  124. return 0;
  125. } else {
  126. if (nubus_readl(mep->pdma_regs) & 0x200)
  127. return 0;
  128. }
  129. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  130. return 1;
  131. udelay(2);
  132. } while (--i);
  133. printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
  134. esp_read8(ESP_STATUS));
  135. mep->error = 1;
  136. return 1;
  137. }
  138. #define MAC_ESP_PDMA_LOOP(operands) \
  139. asm volatile ( \
  140. " tstw %1 \n" \
  141. " jbeq 20f \n" \
  142. "1: movew " operands " \n" \
  143. "2: movew " operands " \n" \
  144. "3: movew " operands " \n" \
  145. "4: movew " operands " \n" \
  146. "5: movew " operands " \n" \
  147. "6: movew " operands " \n" \
  148. "7: movew " operands " \n" \
  149. "8: movew " operands " \n" \
  150. "9: movew " operands " \n" \
  151. "10: movew " operands " \n" \
  152. "11: movew " operands " \n" \
  153. "12: movew " operands " \n" \
  154. "13: movew " operands " \n" \
  155. "14: movew " operands " \n" \
  156. "15: movew " operands " \n" \
  157. "16: movew " operands " \n" \
  158. " subqw #1,%1 \n" \
  159. " jbne 1b \n" \
  160. "20: tstw %2 \n" \
  161. " jbeq 30f \n" \
  162. "21: movew " operands " \n" \
  163. " subqw #1,%2 \n" \
  164. " jbne 21b \n" \
  165. "30: tstw %3 \n" \
  166. " jbeq 40f \n" \
  167. "31: moveb " operands " \n" \
  168. "32: nop \n" \
  169. "40: \n" \
  170. " \n" \
  171. " .section __ex_table,\"a\" \n" \
  172. " .align 4 \n" \
  173. " .long 1b,40b \n" \
  174. " .long 2b,40b \n" \
  175. " .long 3b,40b \n" \
  176. " .long 4b,40b \n" \
  177. " .long 5b,40b \n" \
  178. " .long 6b,40b \n" \
  179. " .long 7b,40b \n" \
  180. " .long 8b,40b \n" \
  181. " .long 9b,40b \n" \
  182. " .long 10b,40b \n" \
  183. " .long 11b,40b \n" \
  184. " .long 12b,40b \n" \
  185. " .long 13b,40b \n" \
  186. " .long 14b,40b \n" \
  187. " .long 15b,40b \n" \
  188. " .long 16b,40b \n" \
  189. " .long 21b,40b \n" \
  190. " .long 31b,40b \n" \
  191. " .long 32b,40b \n" \
  192. " .previous \n" \
  193. : "+a" (addr), "+r" (count32), "+r" (count2) \
  194. : "g" (count1), "a" (mep->pdma_io))
  195. static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
  196. u32 dma_count, int write, u8 cmd)
  197. {
  198. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  199. unsigned long flags;
  200. local_irq_save(flags);
  201. mep->error = 0;
  202. if (!write)
  203. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  204. esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
  205. esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
  206. scsi_esp_cmd(esp, cmd);
  207. do {
  208. unsigned int count32 = esp_count >> 5;
  209. unsigned int count2 = (esp_count & 0x1F) >> 1;
  210. unsigned int count1 = esp_count & 1;
  211. unsigned int start_addr = addr;
  212. if (mac_esp_wait_for_dreq(esp))
  213. break;
  214. if (write) {
  215. MAC_ESP_PDMA_LOOP("%4@,%0@+");
  216. esp_count -= addr - start_addr;
  217. } else {
  218. unsigned int n;
  219. MAC_ESP_PDMA_LOOP("%0@+,%4@");
  220. if (mac_esp_wait_for_empty_fifo(esp))
  221. break;
  222. n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
  223. addr = start_addr + esp_count - n;
  224. esp_count = n;
  225. }
  226. } while (esp_count);
  227. local_irq_restore(flags);
  228. }
  229. /*
  230. * Programmed IO routines follow.
  231. */
  232. static inline int mac_esp_wait_for_fifo(struct esp *esp)
  233. {
  234. int i = 500000;
  235. do {
  236. if (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES)
  237. return 0;
  238. udelay(2);
  239. } while (--i);
  240. printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
  241. esp_read8(ESP_STATUS));
  242. return 1;
  243. }
  244. static inline int mac_esp_wait_for_intr(struct esp *esp)
  245. {
  246. int i = 500000;
  247. do {
  248. esp->sreg = esp_read8(ESP_STATUS);
  249. if (esp->sreg & ESP_STAT_INTR)
  250. return 0;
  251. udelay(2);
  252. } while (--i);
  253. printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
  254. return 1;
  255. }
  256. #define MAC_ESP_PIO_LOOP(operands, reg1) \
  257. asm volatile ( \
  258. "1: moveb " operands " \n" \
  259. " subqw #1,%1 \n" \
  260. " jbne 1b \n" \
  261. : "+a" (addr), "+r" (reg1) \
  262. : "a" (fifo))
  263. #define MAC_ESP_PIO_FILL(operands, reg1) \
  264. asm volatile ( \
  265. " moveb " operands " \n" \
  266. " moveb " operands " \n" \
  267. " moveb " operands " \n" \
  268. " moveb " operands " \n" \
  269. " moveb " operands " \n" \
  270. " moveb " operands " \n" \
  271. " moveb " operands " \n" \
  272. " moveb " operands " \n" \
  273. " moveb " operands " \n" \
  274. " moveb " operands " \n" \
  275. " moveb " operands " \n" \
  276. " moveb " operands " \n" \
  277. " moveb " operands " \n" \
  278. " moveb " operands " \n" \
  279. " moveb " operands " \n" \
  280. " moveb " operands " \n" \
  281. " subqw #8,%1 \n" \
  282. " subqw #8,%1 \n" \
  283. : "+a" (addr), "+r" (reg1) \
  284. : "a" (fifo))
  285. #define MAC_ESP_FIFO_SIZE 16
  286. static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
  287. u32 dma_count, int write, u8 cmd)
  288. {
  289. unsigned long flags;
  290. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  291. u8 *fifo = esp->regs + ESP_FDATA * 16;
  292. local_irq_save(flags);
  293. cmd &= ~ESP_CMD_DMA;
  294. mep->error = 0;
  295. if (write) {
  296. scsi_esp_cmd(esp, cmd);
  297. if (!mac_esp_wait_for_intr(esp)) {
  298. if (mac_esp_wait_for_fifo(esp))
  299. esp_count = 0;
  300. } else {
  301. esp_count = 0;
  302. }
  303. } else {
  304. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  305. if (esp_count >= MAC_ESP_FIFO_SIZE)
  306. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  307. else
  308. MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
  309. scsi_esp_cmd(esp, cmd);
  310. }
  311. while (esp_count) {
  312. unsigned int n;
  313. if (mac_esp_wait_for_intr(esp)) {
  314. mep->error = 1;
  315. break;
  316. }
  317. if (esp->sreg & ESP_STAT_SPAM) {
  318. printk(KERN_ERR PFX "gross error\n");
  319. mep->error = 1;
  320. break;
  321. }
  322. n = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  323. if (write) {
  324. if (n > esp_count)
  325. n = esp_count;
  326. esp_count -= n;
  327. MAC_ESP_PIO_LOOP("%2@,%0@+", n);
  328. if ((esp->sreg & ESP_STAT_PMASK) == ESP_STATP)
  329. break;
  330. if (esp_count) {
  331. esp->ireg = esp_read8(ESP_INTRPT);
  332. if (esp->ireg & ESP_INTR_DC)
  333. break;
  334. scsi_esp_cmd(esp, ESP_CMD_TI);
  335. }
  336. } else {
  337. esp->ireg = esp_read8(ESP_INTRPT);
  338. if (esp->ireg & ESP_INTR_DC)
  339. break;
  340. n = MAC_ESP_FIFO_SIZE - n;
  341. if (n > esp_count)
  342. n = esp_count;
  343. if (n == MAC_ESP_FIFO_SIZE) {
  344. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  345. } else {
  346. esp_count -= n;
  347. MAC_ESP_PIO_LOOP("%0@+,%2@", n);
  348. }
  349. scsi_esp_cmd(esp, ESP_CMD_TI);
  350. }
  351. }
  352. local_irq_restore(flags);
  353. }
  354. static int mac_esp_irq_pending(struct esp *esp)
  355. {
  356. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  357. return 1;
  358. return 0;
  359. }
  360. static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  361. {
  362. return dma_len > 0xFFFF ? 0xFFFF : dma_len;
  363. }
  364. static struct esp_driver_ops mac_esp_ops = {
  365. .esp_write8 = mac_esp_write8,
  366. .esp_read8 = mac_esp_read8,
  367. .map_single = mac_esp_map_single,
  368. .map_sg = mac_esp_map_sg,
  369. .unmap_single = mac_esp_unmap_single,
  370. .unmap_sg = mac_esp_unmap_sg,
  371. .irq_pending = mac_esp_irq_pending,
  372. .dma_length_limit = mac_esp_dma_length_limit,
  373. .reset_dma = mac_esp_reset_dma,
  374. .dma_drain = mac_esp_dma_drain,
  375. .dma_invalidate = mac_esp_dma_invalidate,
  376. .send_dma_cmd = mac_esp_send_pdma_cmd,
  377. .dma_error = mac_esp_dma_error,
  378. };
  379. static int __devinit esp_mac_probe(struct platform_device *dev)
  380. {
  381. struct scsi_host_template *tpnt = &scsi_esp_template;
  382. struct Scsi_Host *host;
  383. struct esp *esp;
  384. int err;
  385. int chips_present;
  386. struct mac_esp_priv *mep;
  387. if (!MACH_IS_MAC)
  388. return -ENODEV;
  389. switch (macintosh_config->scsi_type) {
  390. case MAC_SCSI_QUADRA:
  391. case MAC_SCSI_QUADRA3:
  392. chips_present = 1;
  393. break;
  394. case MAC_SCSI_QUADRA2:
  395. if ((macintosh_config->ident == MAC_MODEL_Q900) ||
  396. (macintosh_config->ident == MAC_MODEL_Q950))
  397. chips_present = 2;
  398. else
  399. chips_present = 1;
  400. break;
  401. default:
  402. chips_present = 0;
  403. }
  404. if (dev->id + 1 > chips_present)
  405. return -ENODEV;
  406. host = scsi_host_alloc(tpnt, sizeof(struct esp));
  407. err = -ENOMEM;
  408. if (!host)
  409. goto fail;
  410. host->max_id = 8;
  411. host->use_clustering = DISABLE_CLUSTERING;
  412. esp = shost_priv(host);
  413. esp->host = host;
  414. esp->dev = dev;
  415. esp->command_block = kzalloc(16, GFP_KERNEL);
  416. if (!esp->command_block)
  417. goto fail_unlink;
  418. esp->command_block_dma = (dma_addr_t)esp->command_block;
  419. esp->scsi_id = 7;
  420. host->this_id = esp->scsi_id;
  421. esp->scsi_id_mask = 1 << esp->scsi_id;
  422. mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
  423. if (!mep)
  424. goto fail_free_command_block;
  425. mep->esp = esp;
  426. platform_set_drvdata(dev, mep);
  427. switch (macintosh_config->scsi_type) {
  428. case MAC_SCSI_QUADRA:
  429. esp->cfreq = 16500000;
  430. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
  431. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  432. mep->pdma_regs = NULL;
  433. break;
  434. case MAC_SCSI_QUADRA2:
  435. esp->cfreq = 25000000;
  436. esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
  437. dev->id * MAC_ESP_REGS_SPACING);
  438. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  439. mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
  440. dev->id * MAC_ESP_PDMA_REG_SPACING);
  441. nubus_writel(0x1d1, mep->pdma_regs);
  442. break;
  443. case MAC_SCSI_QUADRA3:
  444. /* These quadras have a real DMA controller (the PSC) but we
  445. * don't know how to drive it so we must use PIO instead.
  446. */
  447. esp->cfreq = 25000000;
  448. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
  449. mep->pdma_io = NULL;
  450. mep->pdma_regs = NULL;
  451. break;
  452. }
  453. esp->ops = &mac_esp_ops;
  454. if (mep->pdma_io == NULL) {
  455. printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
  456. esp_write8(0, ESP_TCLOW);
  457. esp_write8(0, ESP_TCMED);
  458. esp->flags = ESP_FLAG_DISABLE_SYNC;
  459. mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
  460. } else {
  461. printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
  462. }
  463. host->irq = IRQ_MAC_SCSI;
  464. err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, "Mac ESP",
  465. esp);
  466. if (err < 0)
  467. goto fail_free_priv;
  468. err = scsi_esp_register(esp, &dev->dev);
  469. if (err)
  470. goto fail_free_irq;
  471. return 0;
  472. fail_free_irq:
  473. free_irq(host->irq, esp);
  474. fail_free_priv:
  475. kfree(mep);
  476. fail_free_command_block:
  477. kfree(esp->command_block);
  478. fail_unlink:
  479. scsi_host_put(host);
  480. fail:
  481. return err;
  482. }
  483. static int __devexit esp_mac_remove(struct platform_device *dev)
  484. {
  485. struct mac_esp_priv *mep = platform_get_drvdata(dev);
  486. struct esp *esp = mep->esp;
  487. unsigned int irq = esp->host->irq;
  488. scsi_esp_unregister(esp);
  489. free_irq(irq, esp);
  490. kfree(mep);
  491. kfree(esp->command_block);
  492. scsi_host_put(esp->host);
  493. return 0;
  494. }
  495. static struct platform_driver esp_mac_driver = {
  496. .probe = esp_mac_probe,
  497. .remove = __devexit_p(esp_mac_remove),
  498. .driver = {
  499. .name = DRV_MODULE_NAME,
  500. },
  501. };
  502. static int __init mac_esp_init(void)
  503. {
  504. int err;
  505. err = platform_driver_register(&esp_mac_driver);
  506. if (err)
  507. return err;
  508. internal_esp = platform_device_alloc(DRV_MODULE_NAME, 0);
  509. if (internal_esp && platform_device_add(internal_esp)) {
  510. platform_device_put(internal_esp);
  511. internal_esp = NULL;
  512. }
  513. external_esp = platform_device_alloc(DRV_MODULE_NAME, 1);
  514. if (external_esp && platform_device_add(external_esp)) {
  515. platform_device_put(external_esp);
  516. external_esp = NULL;
  517. }
  518. if (internal_esp || external_esp) {
  519. return 0;
  520. } else {
  521. platform_driver_unregister(&esp_mac_driver);
  522. return -ENOMEM;
  523. }
  524. }
  525. static void __exit mac_esp_exit(void)
  526. {
  527. platform_driver_unregister(&esp_mac_driver);
  528. if (internal_esp) {
  529. platform_device_unregister(internal_esp);
  530. internal_esp = NULL;
  531. }
  532. if (external_esp) {
  533. platform_device_unregister(external_esp);
  534. external_esp = NULL;
  535. }
  536. }
  537. MODULE_DESCRIPTION("Mac ESP SCSI driver");
  538. MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
  539. MODULE_LICENSE("GPL v2");
  540. MODULE_VERSION(DRV_VERSION);
  541. module_init(mac_esp_init);
  542. module_exit(mac_esp_exit);