tvaudio.c 52 KB

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  1. /*
  2. * experimental driver for simple i2c audio chips.
  3. *
  4. * Copyright (c) 2000 Gerd Knorr
  5. * based on code by:
  6. * Eric Sandeen (eric_sandeen@bigfoot.com)
  7. * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
  8. * Greg Alexander (galexand@acm.org)
  9. *
  10. * This code is placed under the terms of the GNU General Public License
  11. *
  12. * OPTIONS:
  13. * debug - set to 1 if you'd like to see debug messages
  14. *
  15. */
  16. #include <linux/config.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/string.h>
  22. #include <linux/timer.h>
  23. #include <linux/delay.h>
  24. #include <linux/errno.h>
  25. #include <linux/slab.h>
  26. #include <linux/videodev.h>
  27. #include <linux/i2c.h>
  28. #include <linux/i2c-algo-bit.h>
  29. #include <linux/init.h>
  30. #include <linux/smp_lock.h>
  31. #include <media/audiochip.h>
  32. #include <media/v4l2-common.h>
  33. #include <media/i2c-addr.h>
  34. /* ---------------------------------------------------------------------- */
  35. /* insmod args */
  36. static int debug = 0; /* insmod parameter */
  37. module_param(debug, int, 0644);
  38. MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
  39. MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
  40. MODULE_LICENSE("GPL");
  41. #define UNSET (-1U)
  42. /* ---------------------------------------------------------------------- */
  43. /* our structs */
  44. #define MAXREGS 64
  45. struct CHIPSTATE;
  46. typedef int (*getvalue)(int);
  47. typedef int (*checkit)(struct CHIPSTATE*);
  48. typedef int (*initialize)(struct CHIPSTATE*);
  49. typedef int (*getmode)(struct CHIPSTATE*);
  50. typedef void (*setmode)(struct CHIPSTATE*, int mode);
  51. typedef void (*checkmode)(struct CHIPSTATE*);
  52. /* i2c command */
  53. typedef struct AUDIOCMD {
  54. int count; /* # of bytes to send */
  55. unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
  56. } audiocmd;
  57. /* chip description */
  58. struct CHIPDESC {
  59. char *name; /* chip name */
  60. int id; /* ID */
  61. int addr_lo, addr_hi; /* i2c address range */
  62. int registers; /* # of registers */
  63. int *insmodopt;
  64. checkit checkit;
  65. initialize initialize;
  66. int flags;
  67. #define CHIP_HAS_VOLUME 1
  68. #define CHIP_HAS_BASSTREBLE 2
  69. #define CHIP_HAS_INPUTSEL 4
  70. /* various i2c command sequences */
  71. audiocmd init;
  72. /* which register has which value */
  73. int leftreg,rightreg,treblereg,bassreg;
  74. /* initialize with (defaults to 65535/65535/32768/32768 */
  75. int leftinit,rightinit,trebleinit,bassinit;
  76. /* functions to convert the values (v4l -> chip) */
  77. getvalue volfunc,treblefunc,bassfunc;
  78. /* get/set mode */
  79. getmode getmode;
  80. setmode setmode;
  81. /* check / autoswitch audio after channel switches */
  82. checkmode checkmode;
  83. /* input switch register + values for v4l inputs */
  84. int inputreg;
  85. int inputmap[8];
  86. int inputmute;
  87. int inputmask;
  88. };
  89. static struct CHIPDESC chiplist[];
  90. /* current state of the chip */
  91. struct CHIPSTATE {
  92. struct i2c_client c;
  93. /* index into CHIPDESC array */
  94. int type;
  95. /* shadow register set */
  96. audiocmd shadow;
  97. /* current settings */
  98. __u16 left,right,treble,bass,mode;
  99. int prevmode;
  100. int radio;
  101. /* thread */
  102. pid_t tpid;
  103. struct completion texit;
  104. wait_queue_head_t wq;
  105. struct timer_list wt;
  106. int done;
  107. int watch_stereo;
  108. int audmode;
  109. };
  110. /* ---------------------------------------------------------------------- */
  111. /* i2c addresses */
  112. static unsigned short normal_i2c[] = {
  113. I2C_ADDR_TDA8425 >> 1,
  114. I2C_ADDR_TEA6300 >> 1,
  115. I2C_ADDR_TEA6420 >> 1,
  116. I2C_ADDR_TDA9840 >> 1,
  117. I2C_ADDR_TDA985x_L >> 1,
  118. I2C_ADDR_TDA985x_H >> 1,
  119. I2C_ADDR_TDA9874 >> 1,
  120. I2C_ADDR_PIC16C54 >> 1,
  121. I2C_CLIENT_END };
  122. I2C_CLIENT_INSMOD;
  123. static struct i2c_driver driver;
  124. static struct i2c_client client_template;
  125. /* ---------------------------------------------------------------------- */
  126. /* i2c I/O functions */
  127. static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
  128. {
  129. unsigned char buffer[2];
  130. if (-1 == subaddr) {
  131. v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
  132. chip->c.name, val);
  133. chip->shadow.bytes[1] = val;
  134. buffer[0] = val;
  135. if (1 != i2c_master_send(&chip->c,buffer,1)) {
  136. v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
  137. chip->c.name, val);
  138. return -1;
  139. }
  140. } else {
  141. v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
  142. chip->c.name, subaddr, val);
  143. chip->shadow.bytes[subaddr+1] = val;
  144. buffer[0] = subaddr;
  145. buffer[1] = val;
  146. if (2 != i2c_master_send(&chip->c,buffer,2)) {
  147. v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
  148. chip->c.name, subaddr, val);
  149. return -1;
  150. }
  151. }
  152. return 0;
  153. }
  154. static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
  155. {
  156. if (mask != 0) {
  157. if (-1 == subaddr) {
  158. val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
  159. } else {
  160. val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
  161. }
  162. }
  163. return chip_write(chip, subaddr, val);
  164. }
  165. static int chip_read(struct CHIPSTATE *chip)
  166. {
  167. unsigned char buffer;
  168. if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
  169. v4l_warn(&chip->c, "%s: I/O error (read)\n",
  170. chip->c.name);
  171. return -1;
  172. }
  173. v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
  174. return buffer;
  175. }
  176. static int chip_read2(struct CHIPSTATE *chip, int subaddr)
  177. {
  178. unsigned char write[1];
  179. unsigned char read[1];
  180. struct i2c_msg msgs[2] = {
  181. { chip->c.addr, 0, 1, write },
  182. { chip->c.addr, I2C_M_RD, 1, read }
  183. };
  184. write[0] = subaddr;
  185. if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
  186. v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
  187. return -1;
  188. }
  189. v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
  190. chip->c.name, subaddr,read[0]);
  191. return read[0];
  192. }
  193. static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
  194. {
  195. int i;
  196. if (0 == cmd->count)
  197. return 0;
  198. /* update our shadow register set; print bytes if (debug > 0) */
  199. v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
  200. chip->c.name, name,cmd->bytes[0]);
  201. for (i = 1; i < cmd->count; i++) {
  202. if (debug)
  203. printk(" 0x%x",cmd->bytes[i]);
  204. chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
  205. }
  206. if (debug)
  207. printk("\n");
  208. /* send data to the chip */
  209. if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
  210. v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
  211. return -1;
  212. }
  213. return 0;
  214. }
  215. /* ---------------------------------------------------------------------- */
  216. /* kernel thread for doing i2c stuff asyncronly
  217. * right now it is used only to check the audio mode (mono/stereo/whatever)
  218. * some time after switching to another TV channel, then turn on stereo
  219. * if available, ...
  220. */
  221. static void chip_thread_wake(unsigned long data)
  222. {
  223. struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
  224. wake_up_interruptible(&chip->wq);
  225. }
  226. static int chip_thread(void *data)
  227. {
  228. DECLARE_WAITQUEUE(wait, current);
  229. struct CHIPSTATE *chip = data;
  230. struct CHIPDESC *desc = chiplist + chip->type;
  231. daemonize("%s", chip->c.name);
  232. allow_signal(SIGTERM);
  233. v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
  234. for (;;) {
  235. add_wait_queue(&chip->wq, &wait);
  236. if (!chip->done) {
  237. set_current_state(TASK_INTERRUPTIBLE);
  238. schedule();
  239. }
  240. remove_wait_queue(&chip->wq, &wait);
  241. try_to_freeze();
  242. if (chip->done || signal_pending(current))
  243. break;
  244. v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
  245. /* don't do anything for radio or if mode != auto */
  246. if (chip->radio || chip->mode != 0)
  247. continue;
  248. /* have a look what's going on */
  249. desc->checkmode(chip);
  250. /* schedule next check */
  251. mod_timer(&chip->wt, jiffies+2*HZ);
  252. }
  253. v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
  254. complete_and_exit(&chip->texit, 0);
  255. return 0;
  256. }
  257. static void generic_checkmode(struct CHIPSTATE *chip)
  258. {
  259. struct CHIPDESC *desc = chiplist + chip->type;
  260. int mode = desc->getmode(chip);
  261. if (mode == chip->prevmode)
  262. return;
  263. v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
  264. chip->prevmode = mode;
  265. if (mode & VIDEO_SOUND_STEREO)
  266. desc->setmode(chip,VIDEO_SOUND_STEREO);
  267. else if (mode & VIDEO_SOUND_LANG1)
  268. desc->setmode(chip,VIDEO_SOUND_LANG1);
  269. else if (mode & VIDEO_SOUND_LANG2)
  270. desc->setmode(chip,VIDEO_SOUND_LANG2);
  271. else
  272. desc->setmode(chip,VIDEO_SOUND_MONO);
  273. }
  274. /* ---------------------------------------------------------------------- */
  275. /* audio chip descriptions - defines+functions for tda9840 */
  276. #define TDA9840_SW 0x00
  277. #define TDA9840_LVADJ 0x02
  278. #define TDA9840_STADJ 0x03
  279. #define TDA9840_TEST 0x04
  280. #define TDA9840_MONO 0x10
  281. #define TDA9840_STEREO 0x2a
  282. #define TDA9840_DUALA 0x12
  283. #define TDA9840_DUALB 0x1e
  284. #define TDA9840_DUALAB 0x1a
  285. #define TDA9840_DUALBA 0x16
  286. #define TDA9840_EXTERNAL 0x7a
  287. #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
  288. #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
  289. #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
  290. #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
  291. #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
  292. static int tda9840_getmode(struct CHIPSTATE *chip)
  293. {
  294. int val, mode;
  295. val = chip_read(chip);
  296. mode = VIDEO_SOUND_MONO;
  297. if (val & TDA9840_DS_DUAL)
  298. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  299. if (val & TDA9840_ST_STEREO)
  300. mode |= VIDEO_SOUND_STEREO;
  301. v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
  302. val, mode);
  303. return mode;
  304. }
  305. static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
  306. {
  307. int update = 1;
  308. int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
  309. switch (mode) {
  310. case VIDEO_SOUND_MONO:
  311. t |= TDA9840_MONO;
  312. break;
  313. case VIDEO_SOUND_STEREO:
  314. t |= TDA9840_STEREO;
  315. break;
  316. case VIDEO_SOUND_LANG1:
  317. t |= TDA9840_DUALA;
  318. break;
  319. case VIDEO_SOUND_LANG2:
  320. t |= TDA9840_DUALB;
  321. break;
  322. default:
  323. update = 0;
  324. }
  325. if (update)
  326. chip_write(chip, TDA9840_SW, t);
  327. }
  328. static int tda9840_checkit(struct CHIPSTATE *chip)
  329. {
  330. int rc;
  331. rc = chip_read(chip);
  332. /* lower 5 bits should be 0 */
  333. return ((rc & 0x1f) == 0) ? 1 : 0;
  334. }
  335. /* ---------------------------------------------------------------------- */
  336. /* audio chip descriptions - defines+functions for tda985x */
  337. /* subaddresses for TDA9855 */
  338. #define TDA9855_VR 0x00 /* Volume, right */
  339. #define TDA9855_VL 0x01 /* Volume, left */
  340. #define TDA9855_BA 0x02 /* Bass */
  341. #define TDA9855_TR 0x03 /* Treble */
  342. #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
  343. /* subaddresses for TDA9850 */
  344. #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
  345. /* subaddesses for both chips */
  346. #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
  347. #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
  348. #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
  349. #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
  350. #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
  351. #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
  352. /* Masks for bits in TDA9855 subaddresses */
  353. /* 0x00 - VR in TDA9855 */
  354. /* 0x01 - VL in TDA9855 */
  355. /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
  356. * in 1dB steps - mute is 0x27 */
  357. /* 0x02 - BA in TDA9855 */
  358. /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
  359. * in .5dB steps - 0 is 0x0E */
  360. /* 0x03 - TR in TDA9855 */
  361. /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
  362. * in 3dB steps - 0 is 0x7 */
  363. /* Masks for bits in both chips' subaddresses */
  364. /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
  365. /* Unique to TDA9855: */
  366. /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
  367. * in 3dB steps - mute is 0x0 */
  368. /* Unique to TDA9850: */
  369. /* lower 4 bits control stereo noise threshold, over which stereo turns off
  370. * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
  371. /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
  372. /* Unique to TDA9855: */
  373. #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
  374. #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
  375. #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
  376. #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
  377. /* Bits 0 to 3 select various combinations
  378. * of line in and line out, only the
  379. * interesting ones are defined */
  380. #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
  381. #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
  382. /* Unique to TDA9850: */
  383. /* lower 4 bits contol SAP noise threshold, over which SAP turns off
  384. * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
  385. /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
  386. /* Common to TDA9855 and TDA9850: */
  387. #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
  388. #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
  389. #define TDA985x_MONO 0 /* Forces Mono output */
  390. #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
  391. /* Unique to TDA9855: */
  392. #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
  393. #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
  394. #define TDA9855_LINEAR 0 /* Linear Stereo */
  395. #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
  396. #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
  397. #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
  398. #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
  399. /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
  400. /* Common to both TDA9855 and TDA9850: */
  401. /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
  402. * in .5dB steps - 0dB is 0x7 */
  403. /* 0x08, 0x09 - A1 and A2 (read/write) */
  404. /* Common to both TDA9855 and TDA9850: */
  405. /* lower 5 bites are wideband and spectral expander alignment
  406. * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
  407. #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
  408. #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
  409. #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
  410. /* 0x0a - A3 */
  411. /* Common to both TDA9855 and TDA9850: */
  412. /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
  413. * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
  414. #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
  415. static int tda9855_volume(int val) { return val/0x2e8+0x27; }
  416. static int tda9855_bass(int val) { return val/0xccc+0x06; }
  417. static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
  418. static int tda985x_getmode(struct CHIPSTATE *chip)
  419. {
  420. int mode;
  421. mode = ((TDA985x_STP | TDA985x_SAPP) &
  422. chip_read(chip)) >> 4;
  423. /* Add mono mode regardless of SAP and stereo */
  424. /* Allows forced mono */
  425. return mode | VIDEO_SOUND_MONO;
  426. }
  427. static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
  428. {
  429. int update = 1;
  430. int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
  431. switch (mode) {
  432. case VIDEO_SOUND_MONO:
  433. c6 |= TDA985x_MONO;
  434. break;
  435. case VIDEO_SOUND_STEREO:
  436. c6 |= TDA985x_STEREO;
  437. break;
  438. case VIDEO_SOUND_LANG1:
  439. c6 |= TDA985x_SAP;
  440. break;
  441. default:
  442. update = 0;
  443. }
  444. if (update)
  445. chip_write(chip,TDA985x_C6,c6);
  446. }
  447. /* ---------------------------------------------------------------------- */
  448. /* audio chip descriptions - defines+functions for tda9873h */
  449. /* Subaddresses for TDA9873H */
  450. #define TDA9873_SW 0x00 /* Switching */
  451. #define TDA9873_AD 0x01 /* Adjust */
  452. #define TDA9873_PT 0x02 /* Port */
  453. /* Subaddress 0x00: Switching Data
  454. * B7..B0:
  455. *
  456. * B1, B0: Input source selection
  457. * 0, 0 internal
  458. * 1, 0 external stereo
  459. * 0, 1 external mono
  460. */
  461. #define TDA9873_INP_MASK 3
  462. #define TDA9873_INTERNAL 0
  463. #define TDA9873_EXT_STEREO 2
  464. #define TDA9873_EXT_MONO 1
  465. /* B3, B2: output signal select
  466. * B4 : transmission mode
  467. * 0, 0, 1 Mono
  468. * 1, 0, 0 Stereo
  469. * 1, 1, 1 Stereo (reversed channel)
  470. * 0, 0, 0 Dual AB
  471. * 0, 0, 1 Dual AA
  472. * 0, 1, 0 Dual BB
  473. * 0, 1, 1 Dual BA
  474. */
  475. #define TDA9873_TR_MASK (7 << 2)
  476. #define TDA9873_TR_MONO 4
  477. #define TDA9873_TR_STEREO 1 << 4
  478. #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
  479. #define TDA9873_TR_DUALA 1 << 2
  480. #define TDA9873_TR_DUALB 1 << 3
  481. /* output level controls
  482. * B5: output level switch (0 = reduced gain, 1 = normal gain)
  483. * B6: mute (1 = muted)
  484. * B7: auto-mute (1 = auto-mute enabled)
  485. */
  486. #define TDA9873_GAIN_NORMAL 1 << 5
  487. #define TDA9873_MUTE 1 << 6
  488. #define TDA9873_AUTOMUTE 1 << 7
  489. /* Subaddress 0x01: Adjust/standard */
  490. /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
  491. * Recommended value is +0 dB
  492. */
  493. #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
  494. /* Bits C6..C4 control FM stantard
  495. * C6, C5, C4
  496. * 0, 0, 0 B/G (PAL FM)
  497. * 0, 0, 1 M
  498. * 0, 1, 0 D/K(1)
  499. * 0, 1, 1 D/K(2)
  500. * 1, 0, 0 D/K(3)
  501. * 1, 0, 1 I
  502. */
  503. #define TDA9873_BG 0
  504. #define TDA9873_M 1
  505. #define TDA9873_DK1 2
  506. #define TDA9873_DK2 3
  507. #define TDA9873_DK3 4
  508. #define TDA9873_I 5
  509. /* C7 controls identification response time (1=fast/0=normal)
  510. */
  511. #define TDA9873_IDR_NORM 0
  512. #define TDA9873_IDR_FAST 1 << 7
  513. /* Subaddress 0x02: Port data */
  514. /* E1, E0 free programmable ports P1/P2
  515. 0, 0 both ports low
  516. 0, 1 P1 high
  517. 1, 0 P2 high
  518. 1, 1 both ports high
  519. */
  520. #define TDA9873_PORTS 3
  521. /* E2: test port */
  522. #define TDA9873_TST_PORT 1 << 2
  523. /* E5..E3 control mono output channel (together with transmission mode bit B4)
  524. *
  525. * E5 E4 E3 B4 OUTM
  526. * 0 0 0 0 mono
  527. * 0 0 1 0 DUAL B
  528. * 0 1 0 1 mono (from stereo decoder)
  529. */
  530. #define TDA9873_MOUT_MONO 0
  531. #define TDA9873_MOUT_FMONO 0
  532. #define TDA9873_MOUT_DUALA 0
  533. #define TDA9873_MOUT_DUALB 1 << 3
  534. #define TDA9873_MOUT_ST 1 << 4
  535. #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
  536. #define TDA9873_MOUT_EXTL 1 << 5
  537. #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
  538. #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
  539. #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
  540. /* Status bits: (chip read) */
  541. #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
  542. #define TDA9873_STEREO 2 /* Stereo sound is identified */
  543. #define TDA9873_DUAL 4 /* Dual sound is identified */
  544. static int tda9873_getmode(struct CHIPSTATE *chip)
  545. {
  546. int val,mode;
  547. val = chip_read(chip);
  548. mode = VIDEO_SOUND_MONO;
  549. if (val & TDA9873_STEREO)
  550. mode |= VIDEO_SOUND_STEREO;
  551. if (val & TDA9873_DUAL)
  552. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  553. v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
  554. val, mode);
  555. return mode;
  556. }
  557. static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
  558. {
  559. int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
  560. /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
  561. if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
  562. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
  563. return;
  564. }
  565. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
  566. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
  567. switch (mode) {
  568. case VIDEO_SOUND_MONO:
  569. sw_data |= TDA9873_TR_MONO;
  570. break;
  571. case VIDEO_SOUND_STEREO:
  572. sw_data |= TDA9873_TR_STEREO;
  573. break;
  574. case VIDEO_SOUND_LANG1:
  575. sw_data |= TDA9873_TR_DUALA;
  576. break;
  577. case VIDEO_SOUND_LANG2:
  578. sw_data |= TDA9873_TR_DUALB;
  579. break;
  580. default:
  581. chip->mode = 0;
  582. return;
  583. }
  584. chip_write(chip, TDA9873_SW, sw_data);
  585. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
  586. mode, sw_data);
  587. }
  588. static int tda9873_checkit(struct CHIPSTATE *chip)
  589. {
  590. int rc;
  591. if (-1 == (rc = chip_read2(chip,254)))
  592. return 0;
  593. return (rc & ~0x1f) == 0x80;
  594. }
  595. /* ---------------------------------------------------------------------- */
  596. /* audio chip description - defines+functions for tda9874h and tda9874a */
  597. /* Dariusz Kowalewski <darekk@automex.pl> */
  598. /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
  599. #define TDA9874A_AGCGR 0x00 /* AGC gain */
  600. #define TDA9874A_GCONR 0x01 /* general config */
  601. #define TDA9874A_MSR 0x02 /* monitor select */
  602. #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
  603. #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
  604. #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
  605. #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
  606. #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
  607. #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
  608. #define TDA9874A_DCR 0x09 /* demodulator config */
  609. #define TDA9874A_FMER 0x0a /* FM de-emphasis */
  610. #define TDA9874A_FMMR 0x0b /* FM dematrix */
  611. #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
  612. #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
  613. #define TDA9874A_NCONR 0x0e /* NICAM config */
  614. #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
  615. #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
  616. #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
  617. #define TDA9874A_AMCONR 0x12 /* audio mute control */
  618. #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
  619. #define TDA9874A_AOSR 0x14 /* analog output select */
  620. #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
  621. #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
  622. #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
  623. #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
  624. #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
  625. /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
  626. #define TDA9874A_DSR 0x00 /* device status */
  627. #define TDA9874A_NSR 0x01 /* NICAM status */
  628. #define TDA9874A_NECR 0x02 /* NICAM error count */
  629. #define TDA9874A_DR1 0x03 /* add. data LSB */
  630. #define TDA9874A_DR2 0x04 /* add. data MSB */
  631. #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
  632. #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
  633. #define TDA9874A_SIFLR 0x07 /* SIF level */
  634. #define TDA9874A_TR2 252 /* test reg. 2 */
  635. #define TDA9874A_TR1 253 /* test reg. 1 */
  636. #define TDA9874A_DIC 254 /* device id. code */
  637. #define TDA9874A_SIC 255 /* software id. code */
  638. static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
  639. static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
  640. static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
  641. static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
  642. static int tda9874a_dic = -1; /* device id. code */
  643. /* insmod options for tda9874a */
  644. static unsigned int tda9874a_SIF = UNSET;
  645. static unsigned int tda9874a_AMSEL = UNSET;
  646. static unsigned int tda9874a_STD = UNSET;
  647. module_param(tda9874a_SIF, int, 0444);
  648. module_param(tda9874a_AMSEL, int, 0444);
  649. module_param(tda9874a_STD, int, 0444);
  650. /*
  651. * initialization table for tda9874 decoder:
  652. * - carrier 1 freq. registers (3 bytes)
  653. * - carrier 2 freq. registers (3 bytes)
  654. * - demudulator config register
  655. * - FM de-emphasis register (slow identification mode)
  656. * Note: frequency registers must be written in single i2c transfer.
  657. */
  658. static struct tda9874a_MODES {
  659. char *name;
  660. audiocmd cmd;
  661. } tda9874a_modelist[9] = {
  662. { "A2, B/G",
  663. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
  664. { "A2, M (Korea)",
  665. { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
  666. { "A2, D/K (1)",
  667. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
  668. { "A2, D/K (2)",
  669. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
  670. { "A2, D/K (3)",
  671. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
  672. { "NICAM, I",
  673. { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
  674. { "NICAM, B/G",
  675. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  676. { "NICAM, D/K", /* default */
  677. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  678. { "NICAM, L",
  679. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
  680. };
  681. static int tda9874a_setup(struct CHIPSTATE *chip)
  682. {
  683. chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
  684. chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
  685. chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
  686. if(tda9874a_dic == 0x11) {
  687. chip_write(chip, TDA9874A_FMMR, 0x80);
  688. } else { /* dic == 0x07 */
  689. chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
  690. chip_write(chip, TDA9874A_FMMR, 0x00);
  691. }
  692. chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
  693. chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
  694. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  695. chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
  696. /* Note: If signal quality is poor you may want to change NICAM */
  697. /* error limit registers (NLELR and NUELR) to some greater values. */
  698. /* Then the sound would remain stereo, but won't be so clear. */
  699. chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
  700. chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
  701. if(tda9874a_dic == 0x11) {
  702. chip_write(chip, TDA9874A_AMCONR, 0xf9);
  703. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  704. chip_write(chip, TDA9874A_AOSR, 0x80);
  705. chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
  706. chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
  707. } else { /* dic == 0x07 */
  708. chip_write(chip, TDA9874A_AMCONR, 0xfb);
  709. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  710. chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
  711. }
  712. v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
  713. tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
  714. return 1;
  715. }
  716. static int tda9874a_getmode(struct CHIPSTATE *chip)
  717. {
  718. int dsr,nsr,mode;
  719. int necr; /* just for debugging */
  720. mode = VIDEO_SOUND_MONO;
  721. if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
  722. return mode;
  723. if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
  724. return mode;
  725. if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
  726. return mode;
  727. /* need to store dsr/nsr somewhere */
  728. chip->shadow.bytes[MAXREGS-2] = dsr;
  729. chip->shadow.bytes[MAXREGS-1] = nsr;
  730. if(tda9874a_mode) {
  731. /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
  732. * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
  733. * that sound has (temporarily) switched from NICAM to
  734. * mono FM (or AM) on 1st sound carrier due to high NICAM bit
  735. * error count. So in fact there is no stereo in this case :-(
  736. * But changing the mode to VIDEO_SOUND_MONO would switch
  737. * external 4052 multiplexer in audio_hook().
  738. */
  739. if(nsr & 0x02) /* NSR.S/MB=1 */
  740. mode |= VIDEO_SOUND_STEREO;
  741. if(nsr & 0x01) /* NSR.D/SB=1 */
  742. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  743. } else {
  744. if(dsr & 0x02) /* DSR.IDSTE=1 */
  745. mode |= VIDEO_SOUND_STEREO;
  746. if(dsr & 0x04) /* DSR.IDDUA=1 */
  747. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  748. }
  749. v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
  750. dsr, nsr, necr, mode);
  751. return mode;
  752. }
  753. static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
  754. {
  755. /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
  756. /* If auto-muting is disabled, we can hear a signal of degrading quality. */
  757. if(tda9874a_mode) {
  758. if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
  759. tda9874a_NCONR &= 0xfe; /* enable */
  760. else
  761. tda9874a_NCONR |= 0x01; /* disable */
  762. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  763. }
  764. /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
  765. * and has auto-select function for audio output (AOSR register).
  766. * Old TDA9874H doesn't support these features.
  767. * TDA9874A also has additional mono output pin (OUTM), which
  768. * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
  769. */
  770. if(tda9874a_dic == 0x11) {
  771. int aosr = 0x80;
  772. int mdacosr = (tda9874a_mode) ? 0x82:0x80;
  773. switch(mode) {
  774. case VIDEO_SOUND_MONO:
  775. case VIDEO_SOUND_STEREO:
  776. break;
  777. case VIDEO_SOUND_LANG1:
  778. aosr = 0x80; /* auto-select, dual A/A */
  779. mdacosr = (tda9874a_mode) ? 0x82:0x80;
  780. break;
  781. case VIDEO_SOUND_LANG2:
  782. aosr = 0xa0; /* auto-select, dual B/B */
  783. mdacosr = (tda9874a_mode) ? 0x83:0x81;
  784. break;
  785. default:
  786. chip->mode = 0;
  787. return;
  788. }
  789. chip_write(chip, TDA9874A_AOSR, aosr);
  790. chip_write(chip, TDA9874A_MDACOSR, mdacosr);
  791. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
  792. mode, aosr, mdacosr);
  793. } else { /* dic == 0x07 */
  794. int fmmr,aosr;
  795. switch(mode) {
  796. case VIDEO_SOUND_MONO:
  797. fmmr = 0x00; /* mono */
  798. aosr = 0x10; /* A/A */
  799. break;
  800. case VIDEO_SOUND_STEREO:
  801. if(tda9874a_mode) {
  802. fmmr = 0x00;
  803. aosr = 0x00; /* handled by NICAM auto-mute */
  804. } else {
  805. fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
  806. aosr = 0x00;
  807. }
  808. break;
  809. case VIDEO_SOUND_LANG1:
  810. fmmr = 0x02; /* dual */
  811. aosr = 0x10; /* dual A/A */
  812. break;
  813. case VIDEO_SOUND_LANG2:
  814. fmmr = 0x02; /* dual */
  815. aosr = 0x20; /* dual B/B */
  816. break;
  817. default:
  818. chip->mode = 0;
  819. return;
  820. }
  821. chip_write(chip, TDA9874A_FMMR, fmmr);
  822. chip_write(chip, TDA9874A_AOSR, aosr);
  823. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
  824. mode, fmmr, aosr);
  825. }
  826. }
  827. static int tda9874a_checkit(struct CHIPSTATE *chip)
  828. {
  829. int dic,sic; /* device id. and software id. codes */
  830. if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
  831. return 0;
  832. if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
  833. return 0;
  834. v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
  835. if((dic == 0x11)||(dic == 0x07)) {
  836. v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
  837. tda9874a_dic = dic; /* remember device id. */
  838. return 1;
  839. }
  840. return 0; /* not found */
  841. }
  842. static int tda9874a_initialize(struct CHIPSTATE *chip)
  843. {
  844. if (tda9874a_SIF > 2)
  845. tda9874a_SIF = 1;
  846. if (tda9874a_STD > 8)
  847. tda9874a_STD = 0;
  848. if(tda9874a_AMSEL > 1)
  849. tda9874a_AMSEL = 0;
  850. if(tda9874a_SIF == 1)
  851. tda9874a_GCONR = 0xc0; /* sound IF input 1 */
  852. else
  853. tda9874a_GCONR = 0xc1; /* sound IF input 2 */
  854. tda9874a_ESP = tda9874a_STD;
  855. tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
  856. if(tda9874a_AMSEL == 0)
  857. tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
  858. else
  859. tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
  860. tda9874a_setup(chip);
  861. return 0;
  862. }
  863. /* ---------------------------------------------------------------------- */
  864. /* audio chip descriptions - defines+functions for tea6420 */
  865. #define TEA6300_VL 0x00 /* volume left */
  866. #define TEA6300_VR 0x01 /* volume right */
  867. #define TEA6300_BA 0x02 /* bass */
  868. #define TEA6300_TR 0x03 /* treble */
  869. #define TEA6300_FA 0x04 /* fader control */
  870. #define TEA6300_S 0x05 /* switch register */
  871. /* values for those registers: */
  872. #define TEA6300_S_SA 0x01 /* stereo A input */
  873. #define TEA6300_S_SB 0x02 /* stereo B */
  874. #define TEA6300_S_SC 0x04 /* stereo C */
  875. #define TEA6300_S_GMU 0x80 /* general mute */
  876. #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
  877. #define TEA6320_FFR 0x01 /* fader front right (0-5) */
  878. #define TEA6320_FFL 0x02 /* fader front left (0-5) */
  879. #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
  880. #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
  881. #define TEA6320_BA 0x05 /* bass (0-4) */
  882. #define TEA6320_TR 0x06 /* treble (0-4) */
  883. #define TEA6320_S 0x07 /* switch register */
  884. /* values for those registers: */
  885. #define TEA6320_S_SA 0x07 /* stereo A input */
  886. #define TEA6320_S_SB 0x06 /* stereo B */
  887. #define TEA6320_S_SC 0x05 /* stereo C */
  888. #define TEA6320_S_SD 0x04 /* stereo D */
  889. #define TEA6320_S_GMU 0x80 /* general mute */
  890. #define TEA6420_S_SA 0x00 /* stereo A input */
  891. #define TEA6420_S_SB 0x01 /* stereo B */
  892. #define TEA6420_S_SC 0x02 /* stereo C */
  893. #define TEA6420_S_SD 0x03 /* stereo D */
  894. #define TEA6420_S_SE 0x04 /* stereo E */
  895. #define TEA6420_S_GMU 0x05 /* general mute */
  896. static int tea6300_shift10(int val) { return val >> 10; }
  897. static int tea6300_shift12(int val) { return val >> 12; }
  898. /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
  899. /* 0x0c mirror those immediately higher) */
  900. static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
  901. static int tea6320_shift11(int val) { return val >> 11; }
  902. static int tea6320_initialize(struct CHIPSTATE * chip)
  903. {
  904. chip_write(chip, TEA6320_FFR, 0x3f);
  905. chip_write(chip, TEA6320_FFL, 0x3f);
  906. chip_write(chip, TEA6320_FRR, 0x3f);
  907. chip_write(chip, TEA6320_FRL, 0x3f);
  908. return 0;
  909. }
  910. /* ---------------------------------------------------------------------- */
  911. /* audio chip descriptions - defines+functions for tda8425 */
  912. #define TDA8425_VL 0x00 /* volume left */
  913. #define TDA8425_VR 0x01 /* volume right */
  914. #define TDA8425_BA 0x02 /* bass */
  915. #define TDA8425_TR 0x03 /* treble */
  916. #define TDA8425_S1 0x08 /* switch functions */
  917. /* values for those registers: */
  918. #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
  919. #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
  920. #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
  921. #define TDA8425_S1_MU 0x20 /* mute bit */
  922. #define TDA8425_S1_STEREO 0x18 /* stereo bits */
  923. #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
  924. #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
  925. #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
  926. #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
  927. #define TDA8425_S1_ML 0x06 /* language selector */
  928. #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
  929. #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
  930. #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
  931. #define TDA8425_S1_IS 0x01 /* channel selector */
  932. static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
  933. static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
  934. static int tda8425_initialize(struct CHIPSTATE *chip)
  935. {
  936. struct CHIPDESC *desc = chiplist + chip->type;
  937. int inputmap[8] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
  938. /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF,
  939. /* off */ TDA8425_S1_OFF, /* on */ TDA8425_S1_CH2};
  940. if (chip->c.adapter->id == I2C_HW_B_RIVA) {
  941. memcpy (desc->inputmap, inputmap, sizeof (inputmap));
  942. }
  943. return 0;
  944. }
  945. static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
  946. {
  947. int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
  948. if (mode & VIDEO_SOUND_LANG1) {
  949. s1 |= TDA8425_S1_ML_SOUND_A;
  950. s1 |= TDA8425_S1_STEREO_PSEUDO;
  951. } else if (mode & VIDEO_SOUND_LANG2) {
  952. s1 |= TDA8425_S1_ML_SOUND_B;
  953. s1 |= TDA8425_S1_STEREO_PSEUDO;
  954. } else {
  955. s1 |= TDA8425_S1_ML_STEREO;
  956. if (mode & VIDEO_SOUND_MONO)
  957. s1 |= TDA8425_S1_STEREO_MONO;
  958. if (mode & VIDEO_SOUND_STEREO)
  959. s1 |= TDA8425_S1_STEREO_SPATIAL;
  960. }
  961. chip_write(chip,TDA8425_S1,s1);
  962. }
  963. /* ---------------------------------------------------------------------- */
  964. /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
  965. /* the registers of 16C54, I2C sub address. */
  966. #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
  967. #define PIC16C54_REG_MISC 0x02
  968. /* bit definition of the RESET register, I2C data. */
  969. #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
  970. /* code of remote controller */
  971. #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
  972. #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
  973. #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
  974. #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
  975. #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
  976. #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
  977. #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
  978. /* ---------------------------------------------------------------------- */
  979. /* audio chip descriptions - defines+functions for TA8874Z */
  980. /* write 1st byte */
  981. #define TA8874Z_LED_STE 0x80
  982. #define TA8874Z_LED_BIL 0x40
  983. #define TA8874Z_LED_EXT 0x20
  984. #define TA8874Z_MONO_SET 0x10
  985. #define TA8874Z_MUTE 0x08
  986. #define TA8874Z_F_MONO 0x04
  987. #define TA8874Z_MODE_SUB 0x02
  988. #define TA8874Z_MODE_MAIN 0x01
  989. /* write 2nd byte */
  990. /*#define TA8874Z_TI 0x80 */ /* test mode */
  991. #define TA8874Z_SEPARATION 0x3f
  992. #define TA8874Z_SEPARATION_DEFAULT 0x10
  993. /* read */
  994. #define TA8874Z_B1 0x80
  995. #define TA8874Z_B0 0x40
  996. #define TA8874Z_CHAG_FLAG 0x20
  997. /*
  998. * B1 B0
  999. * mono L H
  1000. * stereo L L
  1001. * BIL H L
  1002. */
  1003. static int ta8874z_getmode(struct CHIPSTATE *chip)
  1004. {
  1005. int val, mode;
  1006. val = chip_read(chip);
  1007. mode = VIDEO_SOUND_MONO;
  1008. if (val & TA8874Z_B1){
  1009. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  1010. }else if (!(val & TA8874Z_B0)){
  1011. mode |= VIDEO_SOUND_STEREO;
  1012. }
  1013. /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
  1014. return mode;
  1015. }
  1016. static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
  1017. static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
  1018. static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
  1019. static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
  1020. static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
  1021. {
  1022. int update = 1;
  1023. audiocmd *t = NULL;
  1024. v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
  1025. switch(mode){
  1026. case VIDEO_SOUND_MONO:
  1027. t = &ta8874z_mono;
  1028. break;
  1029. case VIDEO_SOUND_STEREO:
  1030. t = &ta8874z_stereo;
  1031. break;
  1032. case VIDEO_SOUND_LANG1:
  1033. t = &ta8874z_main;
  1034. break;
  1035. case VIDEO_SOUND_LANG2:
  1036. t = &ta8874z_sub;
  1037. break;
  1038. default:
  1039. update = 0;
  1040. }
  1041. if(update)
  1042. chip_cmd(chip, "TA8874Z", t);
  1043. }
  1044. static int ta8874z_checkit(struct CHIPSTATE *chip)
  1045. {
  1046. int rc;
  1047. rc = chip_read(chip);
  1048. return ((rc & 0x1f) == 0x1f) ? 1 : 0;
  1049. }
  1050. /* ---------------------------------------------------------------------- */
  1051. /* audio chip descriptions - struct CHIPDESC */
  1052. /* insmod options to enable/disable individual audio chips */
  1053. static int tda8425 = 1;
  1054. static int tda9840 = 1;
  1055. static int tda9850 = 1;
  1056. static int tda9855 = 1;
  1057. static int tda9873 = 1;
  1058. static int tda9874a = 1;
  1059. static int tea6300 = 0; /* address clash with msp34xx */
  1060. static int tea6320 = 0; /* address clash with msp34xx */
  1061. static int tea6420 = 1;
  1062. static int pic16c54 = 1;
  1063. static int ta8874z = 0; /* address clash with tda9840 */
  1064. module_param(tda8425, int, 0444);
  1065. module_param(tda9840, int, 0444);
  1066. module_param(tda9850, int, 0444);
  1067. module_param(tda9855, int, 0444);
  1068. module_param(tda9873, int, 0444);
  1069. module_param(tda9874a, int, 0444);
  1070. module_param(tea6300, int, 0444);
  1071. module_param(tea6320, int, 0444);
  1072. module_param(tea6420, int, 0444);
  1073. module_param(pic16c54, int, 0444);
  1074. module_param(ta8874z, int, 0444);
  1075. static struct CHIPDESC chiplist[] = {
  1076. {
  1077. .name = "tda9840",
  1078. .id = I2C_DRIVERID_TDA9840,
  1079. .insmodopt = &tda9840,
  1080. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1081. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1082. .registers = 5,
  1083. .checkit = tda9840_checkit,
  1084. .getmode = tda9840_getmode,
  1085. .setmode = tda9840_setmode,
  1086. .checkmode = generic_checkmode,
  1087. .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
  1088. /* ,TDA9840_SW, TDA9840_MONO */} }
  1089. },
  1090. {
  1091. .name = "tda9873h",
  1092. .id = I2C_DRIVERID_TDA9873,
  1093. .checkit = tda9873_checkit,
  1094. .insmodopt = &tda9873,
  1095. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1096. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1097. .registers = 3,
  1098. .flags = CHIP_HAS_INPUTSEL,
  1099. .getmode = tda9873_getmode,
  1100. .setmode = tda9873_setmode,
  1101. .checkmode = generic_checkmode,
  1102. .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
  1103. .inputreg = TDA9873_SW,
  1104. .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
  1105. .inputmap = {0xa0, 0xa2, 0xa0, 0xa0, 0xc0},
  1106. .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
  1107. },
  1108. {
  1109. .name = "tda9874h/a",
  1110. .id = I2C_DRIVERID_TDA9874,
  1111. .checkit = tda9874a_checkit,
  1112. .initialize = tda9874a_initialize,
  1113. .insmodopt = &tda9874a,
  1114. .addr_lo = I2C_ADDR_TDA9874 >> 1,
  1115. .addr_hi = I2C_ADDR_TDA9874 >> 1,
  1116. .getmode = tda9874a_getmode,
  1117. .setmode = tda9874a_setmode,
  1118. .checkmode = generic_checkmode,
  1119. },
  1120. {
  1121. .name = "tda9850",
  1122. .id = I2C_DRIVERID_TDA9850,
  1123. .insmodopt = &tda9850,
  1124. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1125. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1126. .registers = 11,
  1127. .getmode = tda985x_getmode,
  1128. .setmode = tda985x_setmode,
  1129. .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
  1130. },
  1131. {
  1132. .name = "tda9855",
  1133. .id = I2C_DRIVERID_TDA9855,
  1134. .insmodopt = &tda9855,
  1135. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1136. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1137. .registers = 11,
  1138. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
  1139. .leftreg = TDA9855_VL,
  1140. .rightreg = TDA9855_VR,
  1141. .bassreg = TDA9855_BA,
  1142. .treblereg = TDA9855_TR,
  1143. .volfunc = tda9855_volume,
  1144. .bassfunc = tda9855_bass,
  1145. .treblefunc = tda9855_treble,
  1146. .getmode = tda985x_getmode,
  1147. .setmode = tda985x_setmode,
  1148. .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
  1149. TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
  1150. TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
  1151. 0x07, 0x10, 0x10, 0x03 }}
  1152. },
  1153. {
  1154. .name = "tea6300",
  1155. .id = I2C_DRIVERID_TEA6300,
  1156. .insmodopt = &tea6300,
  1157. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1158. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1159. .registers = 6,
  1160. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1161. .leftreg = TEA6300_VR,
  1162. .rightreg = TEA6300_VL,
  1163. .bassreg = TEA6300_BA,
  1164. .treblereg = TEA6300_TR,
  1165. .volfunc = tea6300_shift10,
  1166. .bassfunc = tea6300_shift12,
  1167. .treblefunc = tea6300_shift12,
  1168. .inputreg = TEA6300_S,
  1169. .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
  1170. .inputmute = TEA6300_S_GMU,
  1171. },
  1172. {
  1173. .name = "tea6320",
  1174. .id = I2C_DRIVERID_TEA6300,
  1175. .initialize = tea6320_initialize,
  1176. .insmodopt = &tea6320,
  1177. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1178. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1179. .registers = 8,
  1180. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1181. .leftreg = TEA6320_V,
  1182. .rightreg = TEA6320_V,
  1183. .bassreg = TEA6320_BA,
  1184. .treblereg = TEA6320_TR,
  1185. .volfunc = tea6320_volume,
  1186. .bassfunc = tea6320_shift11,
  1187. .treblefunc = tea6320_shift11,
  1188. .inputreg = TEA6320_S,
  1189. .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
  1190. .inputmute = TEA6300_S_GMU,
  1191. },
  1192. {
  1193. .name = "tea6420",
  1194. .id = I2C_DRIVERID_TEA6420,
  1195. .insmodopt = &tea6420,
  1196. .addr_lo = I2C_ADDR_TEA6420 >> 1,
  1197. .addr_hi = I2C_ADDR_TEA6420 >> 1,
  1198. .registers = 1,
  1199. .flags = CHIP_HAS_INPUTSEL,
  1200. .inputreg = -1,
  1201. .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
  1202. .inputmute = TEA6300_S_GMU,
  1203. },
  1204. {
  1205. .name = "tda8425",
  1206. .id = I2C_DRIVERID_TDA8425,
  1207. .insmodopt = &tda8425,
  1208. .addr_lo = I2C_ADDR_TDA8425 >> 1,
  1209. .addr_hi = I2C_ADDR_TDA8425 >> 1,
  1210. .registers = 9,
  1211. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1212. .leftreg = TDA8425_VL,
  1213. .rightreg = TDA8425_VR,
  1214. .bassreg = TDA8425_BA,
  1215. .treblereg = TDA8425_TR,
  1216. .volfunc = tda8425_shift10,
  1217. .bassfunc = tda8425_shift12,
  1218. .treblefunc = tda8425_shift12,
  1219. .inputreg = TDA8425_S1,
  1220. .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
  1221. .inputmute = TDA8425_S1_OFF,
  1222. .setmode = tda8425_setmode,
  1223. .initialize = tda8425_initialize,
  1224. },
  1225. {
  1226. .name = "pic16c54 (PV951)",
  1227. .id = I2C_DRIVERID_PIC16C54_PV9,
  1228. .insmodopt = &pic16c54,
  1229. .addr_lo = I2C_ADDR_PIC16C54 >> 1,
  1230. .addr_hi = I2C_ADDR_PIC16C54>> 1,
  1231. .registers = 2,
  1232. .flags = CHIP_HAS_INPUTSEL,
  1233. .inputreg = PIC16C54_REG_MISC,
  1234. .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
  1235. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1236. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1237. PIC16C54_MISC_SND_MUTE,PIC16C54_MISC_SND_MUTE,
  1238. PIC16C54_MISC_SND_NOTMUTE},
  1239. .inputmute = PIC16C54_MISC_SND_MUTE,
  1240. },
  1241. {
  1242. .name = "ta8874z",
  1243. .id = -1,
  1244. /*.id = I2C_DRIVERID_TA8874Z, */
  1245. .checkit = ta8874z_checkit,
  1246. .insmodopt = &ta8874z,
  1247. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1248. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1249. .registers = 2,
  1250. .getmode = ta8874z_getmode,
  1251. .setmode = ta8874z_setmode,
  1252. .checkmode = generic_checkmode,
  1253. .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
  1254. },
  1255. { .name = NULL } /* EOF */
  1256. };
  1257. /* ---------------------------------------------------------------------- */
  1258. /* i2c registration */
  1259. static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
  1260. {
  1261. struct CHIPSTATE *chip;
  1262. struct CHIPDESC *desc;
  1263. chip = kzalloc(sizeof(*chip),GFP_KERNEL);
  1264. if (!chip)
  1265. return -ENOMEM;
  1266. memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
  1267. chip->c.adapter = adap;
  1268. chip->c.addr = addr;
  1269. i2c_set_clientdata(&chip->c, chip);
  1270. /* find description for the chip */
  1271. v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
  1272. for (desc = chiplist; desc->name != NULL; desc++) {
  1273. if (0 == *(desc->insmodopt))
  1274. continue;
  1275. if (addr < desc->addr_lo ||
  1276. addr > desc->addr_hi)
  1277. continue;
  1278. if (desc->checkit && !desc->checkit(chip))
  1279. continue;
  1280. break;
  1281. }
  1282. if (desc->name == NULL) {
  1283. v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
  1284. return -EIO;
  1285. }
  1286. v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
  1287. if (desc->flags) {
  1288. v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
  1289. (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
  1290. (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
  1291. (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
  1292. }
  1293. /* fill required data structures */
  1294. strcpy(chip->c.name, desc->name);
  1295. chip->type = desc-chiplist;
  1296. chip->shadow.count = desc->registers+1;
  1297. chip->prevmode = -1;
  1298. chip->audmode = V4L2_TUNER_MODE_LANG1;
  1299. /* register */
  1300. i2c_attach_client(&chip->c);
  1301. /* initialization */
  1302. if (desc->initialize != NULL)
  1303. desc->initialize(chip);
  1304. else
  1305. chip_cmd(chip,"init",&desc->init);
  1306. if (desc->flags & CHIP_HAS_VOLUME) {
  1307. chip->left = desc->leftinit ? desc->leftinit : 65535;
  1308. chip->right = desc->rightinit ? desc->rightinit : 65535;
  1309. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1310. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1311. }
  1312. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1313. chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
  1314. chip->bass = desc->bassinit ? desc->bassinit : 32768;
  1315. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1316. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1317. }
  1318. chip->tpid = -1;
  1319. if (desc->checkmode) {
  1320. /* start async thread */
  1321. init_timer(&chip->wt);
  1322. chip->wt.function = chip_thread_wake;
  1323. chip->wt.data = (unsigned long)chip;
  1324. init_waitqueue_head(&chip->wq);
  1325. init_completion(&chip->texit);
  1326. chip->tpid = kernel_thread(chip_thread,(void *)chip,0);
  1327. if (chip->tpid < 0)
  1328. v4l_warn(&chip->c, "%s: kernel_thread() failed\n",
  1329. chip->c.name);
  1330. wake_up_interruptible(&chip->wq);
  1331. }
  1332. return 0;
  1333. }
  1334. static int chip_probe(struct i2c_adapter *adap)
  1335. {
  1336. /* don't attach on saa7146 based cards,
  1337. because dedicated drivers are used */
  1338. if ((adap->id == I2C_HW_SAA7146))
  1339. return 0;
  1340. if (adap->class & I2C_CLASS_TV_ANALOG)
  1341. return i2c_probe(adap, &addr_data, chip_attach);
  1342. return 0;
  1343. }
  1344. static int chip_detach(struct i2c_client *client)
  1345. {
  1346. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1347. del_timer_sync(&chip->wt);
  1348. if (chip->tpid >= 0) {
  1349. /* shutdown async thread */
  1350. chip->done = 1;
  1351. wake_up_interruptible(&chip->wq);
  1352. wait_for_completion(&chip->texit);
  1353. }
  1354. i2c_detach_client(&chip->c);
  1355. kfree(chip);
  1356. return 0;
  1357. }
  1358. /* ---------------------------------------------------------------------- */
  1359. /* video4linux interface */
  1360. static int chip_command(struct i2c_client *client,
  1361. unsigned int cmd, void *arg)
  1362. {
  1363. __u16 *sarg = arg;
  1364. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1365. struct CHIPDESC *desc = chiplist + chip->type;
  1366. v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
  1367. switch (cmd) {
  1368. case AUDC_SET_INPUT:
  1369. if (desc->flags & CHIP_HAS_INPUTSEL) {
  1370. if (*sarg & 0x80)
  1371. chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
  1372. else
  1373. chip_write_masked(chip,desc->inputreg,desc->inputmap[*sarg],desc->inputmask);
  1374. }
  1375. break;
  1376. case AUDC_SET_RADIO:
  1377. chip->radio = 1;
  1378. chip->watch_stereo = 0;
  1379. /* del_timer(&chip->wt); */
  1380. break;
  1381. /* --- v4l ioctls --- */
  1382. /* take care: bttv does userspace copying, we'll get a
  1383. kernel pointer here... */
  1384. case VIDIOCGAUDIO:
  1385. {
  1386. struct video_audio *va = arg;
  1387. if (desc->flags & CHIP_HAS_VOLUME) {
  1388. va->flags |= VIDEO_AUDIO_VOLUME;
  1389. va->volume = max(chip->left,chip->right);
  1390. if (va->volume)
  1391. va->balance = (32768*min(chip->left,chip->right))/
  1392. va->volume;
  1393. else
  1394. va->balance = 32768;
  1395. }
  1396. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1397. va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
  1398. va->bass = chip->bass;
  1399. va->treble = chip->treble;
  1400. }
  1401. if (!chip->radio) {
  1402. if (desc->getmode)
  1403. va->mode = desc->getmode(chip);
  1404. else
  1405. va->mode = VIDEO_SOUND_MONO;
  1406. }
  1407. break;
  1408. }
  1409. case VIDIOCSAUDIO:
  1410. {
  1411. struct video_audio *va = arg;
  1412. if (desc->flags & CHIP_HAS_VOLUME) {
  1413. chip->left = (min(65536 - va->balance,32768) *
  1414. va->volume) / 32768;
  1415. chip->right = (min(va->balance,(__u16)32768) *
  1416. va->volume) / 32768;
  1417. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1418. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1419. }
  1420. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1421. chip->bass = va->bass;
  1422. chip->treble = va->treble;
  1423. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1424. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1425. }
  1426. if (desc->setmode && va->mode) {
  1427. chip->watch_stereo = 0;
  1428. /* del_timer(&chip->wt); */
  1429. chip->mode = va->mode;
  1430. desc->setmode(chip,va->mode);
  1431. }
  1432. break;
  1433. }
  1434. case VIDIOC_S_TUNER:
  1435. {
  1436. struct v4l2_tuner *vt = arg;
  1437. int mode = 0;
  1438. if (chip->radio)
  1439. break;
  1440. switch (vt->audmode) {
  1441. case V4L2_TUNER_MODE_MONO:
  1442. mode = VIDEO_SOUND_MONO;
  1443. break;
  1444. case V4L2_TUNER_MODE_STEREO:
  1445. mode = VIDEO_SOUND_STEREO;
  1446. break;
  1447. case V4L2_TUNER_MODE_LANG1:
  1448. mode = VIDEO_SOUND_LANG1;
  1449. break;
  1450. case V4L2_TUNER_MODE_LANG2:
  1451. mode = VIDEO_SOUND_LANG2;
  1452. break;
  1453. default:
  1454. return -EINVAL;
  1455. }
  1456. chip->audmode = vt->audmode;
  1457. if (desc->setmode && mode) {
  1458. chip->watch_stereo = 0;
  1459. /* del_timer(&chip->wt); */
  1460. chip->mode = mode;
  1461. desc->setmode(chip, mode);
  1462. }
  1463. break;
  1464. }
  1465. case VIDIOC_G_TUNER:
  1466. {
  1467. struct v4l2_tuner *vt = arg;
  1468. int mode = VIDEO_SOUND_MONO;
  1469. if (chip->radio)
  1470. break;
  1471. vt->audmode = chip->audmode;
  1472. vt->rxsubchans = 0;
  1473. vt->capability = V4L2_TUNER_CAP_STEREO |
  1474. V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
  1475. if (desc->getmode)
  1476. mode = desc->getmode(chip);
  1477. if (mode & VIDEO_SOUND_MONO)
  1478. vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
  1479. if (mode & VIDEO_SOUND_STEREO)
  1480. vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
  1481. /* Note: for SAP it should be mono/lang2 or stereo/lang2.
  1482. When this module is converted fully to v4l2, then this
  1483. should change for those chips that can detect SAP. */
  1484. if (mode & VIDEO_SOUND_LANG1)
  1485. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
  1486. V4L2_TUNER_SUB_LANG2;
  1487. break;
  1488. }
  1489. case VIDIOCSCHAN:
  1490. case VIDIOC_S_STD:
  1491. chip->radio = 0;
  1492. break;
  1493. case VIDIOCSFREQ:
  1494. case VIDIOC_S_FREQUENCY:
  1495. chip->mode = 0; /* automatic */
  1496. if (desc->checkmode) {
  1497. desc->setmode(chip,VIDEO_SOUND_MONO);
  1498. if (chip->prevmode != VIDEO_SOUND_MONO)
  1499. chip->prevmode = -1; /* reset previous mode */
  1500. mod_timer(&chip->wt, jiffies+2*HZ);
  1501. /* the thread will call checkmode() later */
  1502. }
  1503. break;
  1504. }
  1505. return 0;
  1506. }
  1507. static struct i2c_driver driver = {
  1508. .driver = {
  1509. .name = "tvaudio",
  1510. },
  1511. .id = I2C_DRIVERID_TVAUDIO,
  1512. .attach_adapter = chip_probe,
  1513. .detach_client = chip_detach,
  1514. .command = chip_command,
  1515. };
  1516. static struct i2c_client client_template =
  1517. {
  1518. .name = "(unset)",
  1519. .driver = &driver,
  1520. };
  1521. static int __init audiochip_init_module(void)
  1522. {
  1523. struct CHIPDESC *desc;
  1524. if (debug) {
  1525. printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
  1526. printk(KERN_INFO "tvaudio: known chips: ");
  1527. for (desc = chiplist; desc->name != NULL; desc++)
  1528. printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
  1529. printk("\n");
  1530. }
  1531. return i2c_add_driver(&driver);
  1532. }
  1533. static void __exit audiochip_cleanup_module(void)
  1534. {
  1535. i2c_del_driver(&driver);
  1536. }
  1537. module_init(audiochip_init_module);
  1538. module_exit(audiochip_cleanup_module);
  1539. /*
  1540. * Local variables:
  1541. * c-basic-offset: 8
  1542. * End:
  1543. */