omap_hwmod.c 113 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include <plat/clock.h>
  141. #include <plat/omap_hwmod.h>
  142. #include <plat/prcm.h>
  143. #include "soc.h"
  144. #include "common.h"
  145. #include "clockdomain.h"
  146. #include "powerdomain.h"
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "cm33xx.h"
  150. #include "prm2xxx_3xxx.h"
  151. #include "prm44xx.h"
  152. #include "prm33xx.h"
  153. #include "prminst44xx.h"
  154. #include "mux.h"
  155. #include "pm.h"
  156. /* Maximum microseconds to wait for OMAP module to softreset */
  157. #define MAX_MODULE_SOFTRESET_WAIT 10000
  158. /* Name of the OMAP hwmod for the MPU */
  159. #define MPU_INITIATOR_NAME "mpu"
  160. /*
  161. * Number of struct omap_hwmod_link records per struct
  162. * omap_hwmod_ocp_if record (master->slave and slave->master)
  163. */
  164. #define LINKS_PER_OCP_IF 2
  165. /**
  166. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  167. * @enable_module: function to enable a module (via MODULEMODE)
  168. * @disable_module: function to disable a module (via MODULEMODE)
  169. *
  170. * XXX Eventually this functionality will be hidden inside the PRM/CM
  171. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  172. * conditionals in this code.
  173. */
  174. struct omap_hwmod_soc_ops {
  175. void (*enable_module)(struct omap_hwmod *oh);
  176. int (*disable_module)(struct omap_hwmod *oh);
  177. int (*wait_target_ready)(struct omap_hwmod *oh);
  178. int (*assert_hardreset)(struct omap_hwmod *oh,
  179. struct omap_hwmod_rst_info *ohri);
  180. int (*deassert_hardreset)(struct omap_hwmod *oh,
  181. struct omap_hwmod_rst_info *ohri);
  182. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  183. struct omap_hwmod_rst_info *ohri);
  184. int (*init_clkdm)(struct omap_hwmod *oh);
  185. };
  186. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  187. static struct omap_hwmod_soc_ops soc_ops;
  188. /* omap_hwmod_list contains all registered struct omap_hwmods */
  189. static LIST_HEAD(omap_hwmod_list);
  190. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  191. static struct omap_hwmod *mpu_oh;
  192. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  193. static DEFINE_SPINLOCK(io_chain_lock);
  194. /*
  195. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  196. * allocated from - used to reduce the number of small memory
  197. * allocations, which has a significant impact on performance
  198. */
  199. static struct omap_hwmod_link *linkspace;
  200. /*
  201. * free_ls, max_ls: array indexes into linkspace; representing the
  202. * next free struct omap_hwmod_link index, and the maximum number of
  203. * struct omap_hwmod_link records allocated (respectively)
  204. */
  205. static unsigned short free_ls, max_ls, ls_supp;
  206. /* inited: set to true once the hwmod code is initialized */
  207. static bool inited;
  208. /* Private functions */
  209. /**
  210. * _fetch_next_ocp_if - return the next OCP interface in a list
  211. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  212. * @i: pointer to the index of the element pointed to by @p in the list
  213. *
  214. * Return a pointer to the struct omap_hwmod_ocp_if record
  215. * containing the struct list_head pointed to by @p, and increment
  216. * @p such that a future call to this routine will return the next
  217. * record.
  218. */
  219. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  220. int *i)
  221. {
  222. struct omap_hwmod_ocp_if *oi;
  223. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  224. *p = (*p)->next;
  225. *i = *i + 1;
  226. return oi;
  227. }
  228. /**
  229. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  230. * @oh: struct omap_hwmod *
  231. *
  232. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  233. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  234. * OCP_SYSCONFIG register or 0 upon success.
  235. */
  236. static int _update_sysc_cache(struct omap_hwmod *oh)
  237. {
  238. if (!oh->class->sysc) {
  239. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  240. return -EINVAL;
  241. }
  242. /* XXX ensure module interface clock is up */
  243. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  244. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  245. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  246. return 0;
  247. }
  248. /**
  249. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  250. * @v: OCP_SYSCONFIG value to write
  251. * @oh: struct omap_hwmod *
  252. *
  253. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  254. * one. No return value.
  255. */
  256. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  257. {
  258. if (!oh->class->sysc) {
  259. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  260. return;
  261. }
  262. /* XXX ensure module interface clock is up */
  263. /* Module might have lost context, always update cache and register */
  264. oh->_sysc_cache = v;
  265. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  266. }
  267. /**
  268. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  269. * @oh: struct omap_hwmod *
  270. * @standbymode: MIDLEMODE field bits
  271. * @v: pointer to register contents to modify
  272. *
  273. * Update the master standby mode bits in @v to be @standbymode for
  274. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  275. * upon error or 0 upon success.
  276. */
  277. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  278. u32 *v)
  279. {
  280. u32 mstandby_mask;
  281. u8 mstandby_shift;
  282. if (!oh->class->sysc ||
  283. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  284. return -EINVAL;
  285. if (!oh->class->sysc->sysc_fields) {
  286. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  287. return -EINVAL;
  288. }
  289. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  290. mstandby_mask = (0x3 << mstandby_shift);
  291. *v &= ~mstandby_mask;
  292. *v |= __ffs(standbymode) << mstandby_shift;
  293. return 0;
  294. }
  295. /**
  296. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  297. * @oh: struct omap_hwmod *
  298. * @idlemode: SIDLEMODE field bits
  299. * @v: pointer to register contents to modify
  300. *
  301. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  302. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  303. * or 0 upon success.
  304. */
  305. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  306. {
  307. u32 sidle_mask;
  308. u8 sidle_shift;
  309. if (!oh->class->sysc ||
  310. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  311. return -EINVAL;
  312. if (!oh->class->sysc->sysc_fields) {
  313. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  314. return -EINVAL;
  315. }
  316. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  317. sidle_mask = (0x3 << sidle_shift);
  318. *v &= ~sidle_mask;
  319. *v |= __ffs(idlemode) << sidle_shift;
  320. return 0;
  321. }
  322. /**
  323. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  324. * @oh: struct omap_hwmod *
  325. * @clockact: CLOCKACTIVITY field bits
  326. * @v: pointer to register contents to modify
  327. *
  328. * Update the clockactivity mode bits in @v to be @clockact for the
  329. * @oh hwmod. Used for additional powersaving on some modules. Does
  330. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  331. * success.
  332. */
  333. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  334. {
  335. u32 clkact_mask;
  336. u8 clkact_shift;
  337. if (!oh->class->sysc ||
  338. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  339. return -EINVAL;
  340. if (!oh->class->sysc->sysc_fields) {
  341. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  342. return -EINVAL;
  343. }
  344. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  345. clkact_mask = (0x3 << clkact_shift);
  346. *v &= ~clkact_mask;
  347. *v |= clockact << clkact_shift;
  348. return 0;
  349. }
  350. /**
  351. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  352. * @oh: struct omap_hwmod *
  353. * @v: pointer to register contents to modify
  354. *
  355. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  356. * error or 0 upon success.
  357. */
  358. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  359. {
  360. u32 softrst_mask;
  361. if (!oh->class->sysc ||
  362. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  363. return -EINVAL;
  364. if (!oh->class->sysc->sysc_fields) {
  365. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  366. return -EINVAL;
  367. }
  368. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  369. *v |= softrst_mask;
  370. return 0;
  371. }
  372. /**
  373. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  374. * @oh: struct omap_hwmod *
  375. *
  376. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  377. * of some modules. When the DMA must perform read/write accesses, the
  378. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  379. * for power management, software must set the DMADISABLE bit back to 1.
  380. *
  381. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  382. * error or 0 upon success.
  383. */
  384. static int _set_dmadisable(struct omap_hwmod *oh)
  385. {
  386. u32 v;
  387. u32 dmadisable_mask;
  388. if (!oh->class->sysc ||
  389. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  390. return -EINVAL;
  391. if (!oh->class->sysc->sysc_fields) {
  392. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  393. return -EINVAL;
  394. }
  395. /* clocks must be on for this operation */
  396. if (oh->_state != _HWMOD_STATE_ENABLED) {
  397. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  398. return -EINVAL;
  399. }
  400. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  401. v = oh->_sysc_cache;
  402. dmadisable_mask =
  403. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  404. v |= dmadisable_mask;
  405. _write_sysconfig(v, oh);
  406. return 0;
  407. }
  408. /**
  409. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  410. * @oh: struct omap_hwmod *
  411. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  412. * @v: pointer to register contents to modify
  413. *
  414. * Update the module autoidle bit in @v to be @autoidle for the @oh
  415. * hwmod. The autoidle bit controls whether the module can gate
  416. * internal clocks automatically when it isn't doing anything; the
  417. * exact function of this bit varies on a per-module basis. This
  418. * function does not write to the hardware. Returns -EINVAL upon
  419. * error or 0 upon success.
  420. */
  421. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  422. u32 *v)
  423. {
  424. u32 autoidle_mask;
  425. u8 autoidle_shift;
  426. if (!oh->class->sysc ||
  427. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  428. return -EINVAL;
  429. if (!oh->class->sysc->sysc_fields) {
  430. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  431. return -EINVAL;
  432. }
  433. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  434. autoidle_mask = (0x1 << autoidle_shift);
  435. *v &= ~autoidle_mask;
  436. *v |= autoidle << autoidle_shift;
  437. return 0;
  438. }
  439. /**
  440. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  441. * @oh: struct omap_hwmod *
  442. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  443. *
  444. * Set or clear the I/O pad wakeup flag in the mux entries for the
  445. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  446. * in memory. If the hwmod is currently idled, and the new idle
  447. * values don't match the previous ones, this function will also
  448. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  449. * currently idled, this function won't touch the hardware: the new
  450. * mux settings are written to the SCM PADCTRL registers when the
  451. * hwmod is idled. No return value.
  452. */
  453. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  454. {
  455. struct omap_device_pad *pad;
  456. bool change = false;
  457. u16 prev_idle;
  458. int j;
  459. if (!oh->mux || !oh->mux->enabled)
  460. return;
  461. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  462. pad = oh->mux->pads_dynamic[j];
  463. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  464. continue;
  465. prev_idle = pad->idle;
  466. if (set_wake)
  467. pad->idle |= OMAP_WAKEUP_EN;
  468. else
  469. pad->idle &= ~OMAP_WAKEUP_EN;
  470. if (prev_idle != pad->idle)
  471. change = true;
  472. }
  473. if (change && oh->_state == _HWMOD_STATE_IDLE)
  474. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  475. }
  476. /**
  477. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  478. * @oh: struct omap_hwmod *
  479. *
  480. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  481. * upon error or 0 upon success.
  482. */
  483. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  484. {
  485. if (!oh->class->sysc ||
  486. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  487. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  488. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  489. return -EINVAL;
  490. if (!oh->class->sysc->sysc_fields) {
  491. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  492. return -EINVAL;
  493. }
  494. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  495. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  496. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  497. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  498. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  499. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  500. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  501. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  502. return 0;
  503. }
  504. /**
  505. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  506. * @oh: struct omap_hwmod *
  507. *
  508. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  509. * upon error or 0 upon success.
  510. */
  511. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  512. {
  513. if (!oh->class->sysc ||
  514. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  515. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  516. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  517. return -EINVAL;
  518. if (!oh->class->sysc->sysc_fields) {
  519. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  520. return -EINVAL;
  521. }
  522. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  523. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  524. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  525. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  526. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  527. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  528. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  529. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  530. return 0;
  531. }
  532. /**
  533. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  534. * @oh: struct omap_hwmod *
  535. *
  536. * Prevent the hardware module @oh from entering idle while the
  537. * hardare module initiator @init_oh is active. Useful when a module
  538. * will be accessed by a particular initiator (e.g., if a module will
  539. * be accessed by the IVA, there should be a sleepdep between the IVA
  540. * initiator and the module). Only applies to modules in smart-idle
  541. * mode. If the clockdomain is marked as not needing autodeps, return
  542. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  543. * passes along clkdm_add_sleepdep() value upon success.
  544. */
  545. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  546. {
  547. if (!oh->_clk)
  548. return -EINVAL;
  549. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  550. return 0;
  551. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  552. }
  553. /**
  554. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  555. * @oh: struct omap_hwmod *
  556. *
  557. * Allow the hardware module @oh to enter idle while the hardare
  558. * module initiator @init_oh is active. Useful when a module will not
  559. * be accessed by a particular initiator (e.g., if a module will not
  560. * be accessed by the IVA, there should be no sleepdep between the IVA
  561. * initiator and the module). Only applies to modules in smart-idle
  562. * mode. If the clockdomain is marked as not needing autodeps, return
  563. * 0 without doing anything. Returns -EINVAL upon error or passes
  564. * along clkdm_del_sleepdep() value upon success.
  565. */
  566. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  567. {
  568. if (!oh->_clk)
  569. return -EINVAL;
  570. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  571. return 0;
  572. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  573. }
  574. /**
  575. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  576. * @oh: struct omap_hwmod *
  577. *
  578. * Called from _init_clocks(). Populates the @oh _clk (main
  579. * functional clock pointer) if a main_clk is present. Returns 0 on
  580. * success or -EINVAL on error.
  581. */
  582. static int _init_main_clk(struct omap_hwmod *oh)
  583. {
  584. int ret = 0;
  585. if (!oh->main_clk)
  586. return 0;
  587. oh->_clk = clk_get(NULL, oh->main_clk);
  588. if (IS_ERR(oh->_clk)) {
  589. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  590. oh->name, oh->main_clk);
  591. return -EINVAL;
  592. }
  593. /*
  594. * HACK: This needs a re-visit once clk_prepare() is implemented
  595. * to do something meaningful. Today its just a no-op.
  596. * If clk_prepare() is used at some point to do things like
  597. * voltage scaling etc, then this would have to be moved to
  598. * some point where subsystems like i2c and pmic become
  599. * available.
  600. */
  601. clk_prepare(oh->_clk);
  602. if (!oh->_clk->clkdm)
  603. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  604. oh->name, oh->main_clk);
  605. return ret;
  606. }
  607. /**
  608. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  609. * @oh: struct omap_hwmod *
  610. *
  611. * Called from _init_clocks(). Populates the @oh OCP slave interface
  612. * clock pointers. Returns 0 on success or -EINVAL on error.
  613. */
  614. static int _init_interface_clks(struct omap_hwmod *oh)
  615. {
  616. struct omap_hwmod_ocp_if *os;
  617. struct list_head *p;
  618. struct clk *c;
  619. int i = 0;
  620. int ret = 0;
  621. p = oh->slave_ports.next;
  622. while (i < oh->slaves_cnt) {
  623. os = _fetch_next_ocp_if(&p, &i);
  624. if (!os->clk)
  625. continue;
  626. c = clk_get(NULL, os->clk);
  627. if (IS_ERR(c)) {
  628. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  629. oh->name, os->clk);
  630. ret = -EINVAL;
  631. }
  632. os->_clk = c;
  633. /*
  634. * HACK: This needs a re-visit once clk_prepare() is implemented
  635. * to do something meaningful. Today its just a no-op.
  636. * If clk_prepare() is used at some point to do things like
  637. * voltage scaling etc, then this would have to be moved to
  638. * some point where subsystems like i2c and pmic become
  639. * available.
  640. */
  641. clk_prepare(os->_clk);
  642. }
  643. return ret;
  644. }
  645. /**
  646. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  647. * @oh: struct omap_hwmod *
  648. *
  649. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  650. * clock pointers. Returns 0 on success or -EINVAL on error.
  651. */
  652. static int _init_opt_clks(struct omap_hwmod *oh)
  653. {
  654. struct omap_hwmod_opt_clk *oc;
  655. struct clk *c;
  656. int i;
  657. int ret = 0;
  658. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  659. c = clk_get(NULL, oc->clk);
  660. if (IS_ERR(c)) {
  661. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  662. oh->name, oc->clk);
  663. ret = -EINVAL;
  664. }
  665. oc->_clk = c;
  666. /*
  667. * HACK: This needs a re-visit once clk_prepare() is implemented
  668. * to do something meaningful. Today its just a no-op.
  669. * If clk_prepare() is used at some point to do things like
  670. * voltage scaling etc, then this would have to be moved to
  671. * some point where subsystems like i2c and pmic become
  672. * available.
  673. */
  674. clk_prepare(oc->_clk);
  675. }
  676. return ret;
  677. }
  678. /**
  679. * _enable_clocks - enable hwmod main clock and interface clocks
  680. * @oh: struct omap_hwmod *
  681. *
  682. * Enables all clocks necessary for register reads and writes to succeed
  683. * on the hwmod @oh. Returns 0.
  684. */
  685. static int _enable_clocks(struct omap_hwmod *oh)
  686. {
  687. struct omap_hwmod_ocp_if *os;
  688. struct list_head *p;
  689. int i = 0;
  690. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  691. if (oh->_clk)
  692. clk_enable(oh->_clk);
  693. p = oh->slave_ports.next;
  694. while (i < oh->slaves_cnt) {
  695. os = _fetch_next_ocp_if(&p, &i);
  696. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  697. clk_enable(os->_clk);
  698. }
  699. /* The opt clocks are controlled by the device driver. */
  700. return 0;
  701. }
  702. /**
  703. * _disable_clocks - disable hwmod main clock and interface clocks
  704. * @oh: struct omap_hwmod *
  705. *
  706. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  707. */
  708. static int _disable_clocks(struct omap_hwmod *oh)
  709. {
  710. struct omap_hwmod_ocp_if *os;
  711. struct list_head *p;
  712. int i = 0;
  713. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  714. if (oh->_clk)
  715. clk_disable(oh->_clk);
  716. p = oh->slave_ports.next;
  717. while (i < oh->slaves_cnt) {
  718. os = _fetch_next_ocp_if(&p, &i);
  719. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  720. clk_disable(os->_clk);
  721. }
  722. /* The opt clocks are controlled by the device driver. */
  723. return 0;
  724. }
  725. static void _enable_optional_clocks(struct omap_hwmod *oh)
  726. {
  727. struct omap_hwmod_opt_clk *oc;
  728. int i;
  729. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  730. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  731. if (oc->_clk) {
  732. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  733. __clk_get_name(oc->_clk));
  734. clk_enable(oc->_clk);
  735. }
  736. }
  737. static void _disable_optional_clocks(struct omap_hwmod *oh)
  738. {
  739. struct omap_hwmod_opt_clk *oc;
  740. int i;
  741. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  742. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  743. if (oc->_clk) {
  744. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  745. __clk_get_name(oc->_clk));
  746. clk_disable(oc->_clk);
  747. }
  748. }
  749. /**
  750. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  751. * @oh: struct omap_hwmod *
  752. *
  753. * Enables the PRCM module mode related to the hwmod @oh.
  754. * No return value.
  755. */
  756. static void _omap4_enable_module(struct omap_hwmod *oh)
  757. {
  758. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  759. return;
  760. pr_debug("omap_hwmod: %s: %s: %d\n",
  761. oh->name, __func__, oh->prcm.omap4.modulemode);
  762. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  763. oh->clkdm->prcm_partition,
  764. oh->clkdm->cm_inst,
  765. oh->clkdm->clkdm_offs,
  766. oh->prcm.omap4.clkctrl_offs);
  767. }
  768. /**
  769. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  770. * @oh: struct omap_hwmod *
  771. *
  772. * Enables the PRCM module mode related to the hwmod @oh.
  773. * No return value.
  774. */
  775. static void _am33xx_enable_module(struct omap_hwmod *oh)
  776. {
  777. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  778. return;
  779. pr_debug("omap_hwmod: %s: %s: %d\n",
  780. oh->name, __func__, oh->prcm.omap4.modulemode);
  781. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  782. oh->clkdm->clkdm_offs,
  783. oh->prcm.omap4.clkctrl_offs);
  784. }
  785. /**
  786. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  787. * @oh: struct omap_hwmod *
  788. *
  789. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  790. * does not have an IDLEST bit or if the module successfully enters
  791. * slave idle; otherwise, pass along the return value of the
  792. * appropriate *_cm*_wait_module_idle() function.
  793. */
  794. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  795. {
  796. if (!oh)
  797. return -EINVAL;
  798. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  799. return 0;
  800. if (oh->flags & HWMOD_NO_IDLEST)
  801. return 0;
  802. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  803. oh->clkdm->cm_inst,
  804. oh->clkdm->clkdm_offs,
  805. oh->prcm.omap4.clkctrl_offs);
  806. }
  807. /**
  808. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  809. * @oh: struct omap_hwmod *
  810. *
  811. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  812. * does not have an IDLEST bit or if the module successfully enters
  813. * slave idle; otherwise, pass along the return value of the
  814. * appropriate *_cm*_wait_module_idle() function.
  815. */
  816. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  817. {
  818. if (!oh)
  819. return -EINVAL;
  820. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  821. return 0;
  822. if (oh->flags & HWMOD_NO_IDLEST)
  823. return 0;
  824. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  825. oh->clkdm->clkdm_offs,
  826. oh->prcm.omap4.clkctrl_offs);
  827. }
  828. /**
  829. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  830. * @oh: struct omap_hwmod *oh
  831. *
  832. * Count and return the number of MPU IRQs associated with the hwmod
  833. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  834. * NULL.
  835. */
  836. static int _count_mpu_irqs(struct omap_hwmod *oh)
  837. {
  838. struct omap_hwmod_irq_info *ohii;
  839. int i = 0;
  840. if (!oh || !oh->mpu_irqs)
  841. return 0;
  842. do {
  843. ohii = &oh->mpu_irqs[i++];
  844. } while (ohii->irq != -1);
  845. return i-1;
  846. }
  847. /**
  848. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  849. * @oh: struct omap_hwmod *oh
  850. *
  851. * Count and return the number of SDMA request lines associated with
  852. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  853. * if @oh is NULL.
  854. */
  855. static int _count_sdma_reqs(struct omap_hwmod *oh)
  856. {
  857. struct omap_hwmod_dma_info *ohdi;
  858. int i = 0;
  859. if (!oh || !oh->sdma_reqs)
  860. return 0;
  861. do {
  862. ohdi = &oh->sdma_reqs[i++];
  863. } while (ohdi->dma_req != -1);
  864. return i-1;
  865. }
  866. /**
  867. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  868. * @oh: struct omap_hwmod *oh
  869. *
  870. * Count and return the number of address space ranges associated with
  871. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  872. * if @oh is NULL.
  873. */
  874. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  875. {
  876. struct omap_hwmod_addr_space *mem;
  877. int i = 0;
  878. if (!os || !os->addr)
  879. return 0;
  880. do {
  881. mem = &os->addr[i++];
  882. } while (mem->pa_start != mem->pa_end);
  883. return i-1;
  884. }
  885. /**
  886. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  887. * @oh: struct omap_hwmod * to operate on
  888. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  889. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  890. *
  891. * Retrieve a MPU hardware IRQ line number named by @name associated
  892. * with the IP block pointed to by @oh. The IRQ number will be filled
  893. * into the address pointed to by @dma. When @name is non-null, the
  894. * IRQ line number associated with the named entry will be returned.
  895. * If @name is null, the first matching entry will be returned. Data
  896. * order is not meaningful in hwmod data, so callers are strongly
  897. * encouraged to use a non-null @name whenever possible to avoid
  898. * unpredictable effects if hwmod data is later added that causes data
  899. * ordering to change. Returns 0 upon success or a negative error
  900. * code upon error.
  901. */
  902. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  903. unsigned int *irq)
  904. {
  905. int i;
  906. bool found = false;
  907. if (!oh->mpu_irqs)
  908. return -ENOENT;
  909. i = 0;
  910. while (oh->mpu_irqs[i].irq != -1) {
  911. if (name == oh->mpu_irqs[i].name ||
  912. !strcmp(name, oh->mpu_irqs[i].name)) {
  913. found = true;
  914. break;
  915. }
  916. i++;
  917. }
  918. if (!found)
  919. return -ENOENT;
  920. *irq = oh->mpu_irqs[i].irq;
  921. return 0;
  922. }
  923. /**
  924. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  925. * @oh: struct omap_hwmod * to operate on
  926. * @name: pointer to the name of the SDMA request line to fetch (optional)
  927. * @dma: pointer to an unsigned int to store the request line ID to
  928. *
  929. * Retrieve an SDMA request line ID named by @name on the IP block
  930. * pointed to by @oh. The ID will be filled into the address pointed
  931. * to by @dma. When @name is non-null, the request line ID associated
  932. * with the named entry will be returned. If @name is null, the first
  933. * matching entry will be returned. Data order is not meaningful in
  934. * hwmod data, so callers are strongly encouraged to use a non-null
  935. * @name whenever possible to avoid unpredictable effects if hwmod
  936. * data is later added that causes data ordering to change. Returns 0
  937. * upon success or a negative error code upon error.
  938. */
  939. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  940. unsigned int *dma)
  941. {
  942. int i;
  943. bool found = false;
  944. if (!oh->sdma_reqs)
  945. return -ENOENT;
  946. i = 0;
  947. while (oh->sdma_reqs[i].dma_req != -1) {
  948. if (name == oh->sdma_reqs[i].name ||
  949. !strcmp(name, oh->sdma_reqs[i].name)) {
  950. found = true;
  951. break;
  952. }
  953. i++;
  954. }
  955. if (!found)
  956. return -ENOENT;
  957. *dma = oh->sdma_reqs[i].dma_req;
  958. return 0;
  959. }
  960. /**
  961. * _get_addr_space_by_name - fetch address space start & end by name
  962. * @oh: struct omap_hwmod * to operate on
  963. * @name: pointer to the name of the address space to fetch (optional)
  964. * @pa_start: pointer to a u32 to store the starting address to
  965. * @pa_end: pointer to a u32 to store the ending address to
  966. *
  967. * Retrieve address space start and end addresses for the IP block
  968. * pointed to by @oh. The data will be filled into the addresses
  969. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  970. * address space data associated with the named entry will be
  971. * returned. If @name is null, the first matching entry will be
  972. * returned. Data order is not meaningful in hwmod data, so callers
  973. * are strongly encouraged to use a non-null @name whenever possible
  974. * to avoid unpredictable effects if hwmod data is later added that
  975. * causes data ordering to change. Returns 0 upon success or a
  976. * negative error code upon error.
  977. */
  978. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  979. u32 *pa_start, u32 *pa_end)
  980. {
  981. int i, j;
  982. struct omap_hwmod_ocp_if *os;
  983. struct list_head *p = NULL;
  984. bool found = false;
  985. p = oh->slave_ports.next;
  986. i = 0;
  987. while (i < oh->slaves_cnt) {
  988. os = _fetch_next_ocp_if(&p, &i);
  989. if (!os->addr)
  990. return -ENOENT;
  991. j = 0;
  992. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  993. if (name == os->addr[j].name ||
  994. !strcmp(name, os->addr[j].name)) {
  995. found = true;
  996. break;
  997. }
  998. j++;
  999. }
  1000. if (found)
  1001. break;
  1002. }
  1003. if (!found)
  1004. return -ENOENT;
  1005. *pa_start = os->addr[j].pa_start;
  1006. *pa_end = os->addr[j].pa_end;
  1007. return 0;
  1008. }
  1009. /**
  1010. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1011. * @oh: struct omap_hwmod *
  1012. *
  1013. * Determines the array index of the OCP slave port that the MPU uses
  1014. * to address the device, and saves it into the struct omap_hwmod.
  1015. * Intended to be called during hwmod registration only. No return
  1016. * value.
  1017. */
  1018. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1019. {
  1020. struct omap_hwmod_ocp_if *os = NULL;
  1021. struct list_head *p;
  1022. int i = 0;
  1023. if (!oh)
  1024. return;
  1025. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1026. p = oh->slave_ports.next;
  1027. while (i < oh->slaves_cnt) {
  1028. os = _fetch_next_ocp_if(&p, &i);
  1029. if (os->user & OCP_USER_MPU) {
  1030. oh->_mpu_port = os;
  1031. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1032. break;
  1033. }
  1034. }
  1035. return;
  1036. }
  1037. /**
  1038. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1039. * @oh: struct omap_hwmod *
  1040. *
  1041. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1042. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1043. * communicate with the IP block. This interface need not be directly
  1044. * connected to the MPU (and almost certainly is not), but is directly
  1045. * connected to the IP block represented by @oh. Returns a pointer
  1046. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1047. * error or if there does not appear to be a path from the MPU to this
  1048. * IP block.
  1049. */
  1050. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1051. {
  1052. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1053. return NULL;
  1054. return oh->_mpu_port;
  1055. };
  1056. /**
  1057. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1058. * @oh: struct omap_hwmod *
  1059. *
  1060. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1061. * the register target MPU address space; or returns NULL upon error.
  1062. */
  1063. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1064. {
  1065. struct omap_hwmod_ocp_if *os;
  1066. struct omap_hwmod_addr_space *mem;
  1067. int found = 0, i = 0;
  1068. os = _find_mpu_rt_port(oh);
  1069. if (!os || !os->addr)
  1070. return NULL;
  1071. do {
  1072. mem = &os->addr[i++];
  1073. if (mem->flags & ADDR_TYPE_RT)
  1074. found = 1;
  1075. } while (!found && mem->pa_start != mem->pa_end);
  1076. return (found) ? mem : NULL;
  1077. }
  1078. /**
  1079. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1080. * @oh: struct omap_hwmod *
  1081. *
  1082. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1083. * by @oh is set to indicate to the PRCM that the IP block is active.
  1084. * Usually this means placing the module into smart-idle mode and
  1085. * smart-standby, but if there is a bug in the automatic idle handling
  1086. * for the IP block, it may need to be placed into the force-idle or
  1087. * no-idle variants of these modes. No return value.
  1088. */
  1089. static void _enable_sysc(struct omap_hwmod *oh)
  1090. {
  1091. u8 idlemode, sf;
  1092. u32 v;
  1093. bool clkdm_act;
  1094. if (!oh->class->sysc)
  1095. return;
  1096. v = oh->_sysc_cache;
  1097. sf = oh->class->sysc->sysc_flags;
  1098. if (sf & SYSC_HAS_SIDLEMODE) {
  1099. clkdm_act = ((oh->clkdm &&
  1100. oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
  1101. (oh->_clk && oh->_clk->clkdm &&
  1102. oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
  1103. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1104. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1105. idlemode = HWMOD_IDLEMODE_FORCE;
  1106. else
  1107. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1108. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1109. _set_slave_idlemode(oh, idlemode, &v);
  1110. }
  1111. if (sf & SYSC_HAS_MIDLEMODE) {
  1112. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1113. idlemode = HWMOD_IDLEMODE_NO;
  1114. } else {
  1115. if (sf & SYSC_HAS_ENAWAKEUP)
  1116. _enable_wakeup(oh, &v);
  1117. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1118. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1119. else
  1120. idlemode = HWMOD_IDLEMODE_SMART;
  1121. }
  1122. _set_master_standbymode(oh, idlemode, &v);
  1123. }
  1124. /*
  1125. * XXX The clock framework should handle this, by
  1126. * calling into this code. But this must wait until the
  1127. * clock structures are tagged with omap_hwmod entries
  1128. */
  1129. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1130. (sf & SYSC_HAS_CLOCKACTIVITY))
  1131. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1132. /* If slave is in SMARTIDLE, also enable wakeup */
  1133. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1134. _enable_wakeup(oh, &v);
  1135. _write_sysconfig(v, oh);
  1136. /*
  1137. * Set the autoidle bit only after setting the smartidle bit
  1138. * Setting this will not have any impact on the other modules.
  1139. */
  1140. if (sf & SYSC_HAS_AUTOIDLE) {
  1141. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1142. 0 : 1;
  1143. _set_module_autoidle(oh, idlemode, &v);
  1144. _write_sysconfig(v, oh);
  1145. }
  1146. }
  1147. /**
  1148. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1149. * @oh: struct omap_hwmod *
  1150. *
  1151. * If module is marked as SWSUP_SIDLE, force the module into slave
  1152. * idle; otherwise, configure it for smart-idle. If module is marked
  1153. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1154. * configure it for smart-standby. No return value.
  1155. */
  1156. static void _idle_sysc(struct omap_hwmod *oh)
  1157. {
  1158. u8 idlemode, sf;
  1159. u32 v;
  1160. if (!oh->class->sysc)
  1161. return;
  1162. v = oh->_sysc_cache;
  1163. sf = oh->class->sysc->sysc_flags;
  1164. if (sf & SYSC_HAS_SIDLEMODE) {
  1165. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1166. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1167. !(oh->class->sysc->idlemodes &
  1168. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1169. idlemode = HWMOD_IDLEMODE_FORCE;
  1170. else
  1171. idlemode = HWMOD_IDLEMODE_SMART;
  1172. _set_slave_idlemode(oh, idlemode, &v);
  1173. }
  1174. if (sf & SYSC_HAS_MIDLEMODE) {
  1175. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1176. idlemode = HWMOD_IDLEMODE_FORCE;
  1177. } else {
  1178. if (sf & SYSC_HAS_ENAWAKEUP)
  1179. _enable_wakeup(oh, &v);
  1180. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1181. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1182. else
  1183. idlemode = HWMOD_IDLEMODE_SMART;
  1184. }
  1185. _set_master_standbymode(oh, idlemode, &v);
  1186. }
  1187. /* If slave is in SMARTIDLE, also enable wakeup */
  1188. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1189. _enable_wakeup(oh, &v);
  1190. _write_sysconfig(v, oh);
  1191. }
  1192. /**
  1193. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1194. * @oh: struct omap_hwmod *
  1195. *
  1196. * Force the module into slave idle and master suspend. No return
  1197. * value.
  1198. */
  1199. static void _shutdown_sysc(struct omap_hwmod *oh)
  1200. {
  1201. u32 v;
  1202. u8 sf;
  1203. if (!oh->class->sysc)
  1204. return;
  1205. v = oh->_sysc_cache;
  1206. sf = oh->class->sysc->sysc_flags;
  1207. if (sf & SYSC_HAS_SIDLEMODE)
  1208. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1209. if (sf & SYSC_HAS_MIDLEMODE)
  1210. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1211. if (sf & SYSC_HAS_AUTOIDLE)
  1212. _set_module_autoidle(oh, 1, &v);
  1213. _write_sysconfig(v, oh);
  1214. }
  1215. /**
  1216. * _lookup - find an omap_hwmod by name
  1217. * @name: find an omap_hwmod by name
  1218. *
  1219. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1220. */
  1221. static struct omap_hwmod *_lookup(const char *name)
  1222. {
  1223. struct omap_hwmod *oh, *temp_oh;
  1224. oh = NULL;
  1225. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1226. if (!strcmp(name, temp_oh->name)) {
  1227. oh = temp_oh;
  1228. break;
  1229. }
  1230. }
  1231. return oh;
  1232. }
  1233. /**
  1234. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1235. * @oh: struct omap_hwmod *
  1236. *
  1237. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1238. * clockdomain pointer, and save it into the struct omap_hwmod.
  1239. * Return -EINVAL if the clkdm_name lookup failed.
  1240. */
  1241. static int _init_clkdm(struct omap_hwmod *oh)
  1242. {
  1243. if (!oh->clkdm_name) {
  1244. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1245. return 0;
  1246. }
  1247. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1248. if (!oh->clkdm) {
  1249. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1250. oh->name, oh->clkdm_name);
  1251. return -EINVAL;
  1252. }
  1253. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1254. oh->name, oh->clkdm_name);
  1255. return 0;
  1256. }
  1257. /**
  1258. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1259. * well the clockdomain.
  1260. * @oh: struct omap_hwmod *
  1261. * @data: not used; pass NULL
  1262. *
  1263. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1264. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1265. * success, or a negative error code on failure.
  1266. */
  1267. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1268. {
  1269. int ret = 0;
  1270. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1271. return 0;
  1272. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1273. ret |= _init_main_clk(oh);
  1274. ret |= _init_interface_clks(oh);
  1275. ret |= _init_opt_clks(oh);
  1276. if (soc_ops.init_clkdm)
  1277. ret |= soc_ops.init_clkdm(oh);
  1278. if (!ret)
  1279. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1280. else
  1281. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1282. return ret;
  1283. }
  1284. /**
  1285. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1286. * @oh: struct omap_hwmod *
  1287. * @name: name of the reset line in the context of this hwmod
  1288. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1289. *
  1290. * Return the bit position of the reset line that match the
  1291. * input name. Return -ENOENT if not found.
  1292. */
  1293. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1294. struct omap_hwmod_rst_info *ohri)
  1295. {
  1296. int i;
  1297. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1298. const char *rst_line = oh->rst_lines[i].name;
  1299. if (!strcmp(rst_line, name)) {
  1300. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1301. ohri->st_shift = oh->rst_lines[i].st_shift;
  1302. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1303. oh->name, __func__, rst_line, ohri->rst_shift,
  1304. ohri->st_shift);
  1305. return 0;
  1306. }
  1307. }
  1308. return -ENOENT;
  1309. }
  1310. /**
  1311. * _assert_hardreset - assert the HW reset line of submodules
  1312. * contained in the hwmod module.
  1313. * @oh: struct omap_hwmod *
  1314. * @name: name of the reset line to lookup and assert
  1315. *
  1316. * Some IP like dsp, ipu or iva contain processor that require an HW
  1317. * reset line to be assert / deassert in order to enable fully the IP.
  1318. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1319. * asserting the hardreset line on the currently-booted SoC, or passes
  1320. * along the return value from _lookup_hardreset() or the SoC's
  1321. * assert_hardreset code.
  1322. */
  1323. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1324. {
  1325. struct omap_hwmod_rst_info ohri;
  1326. int ret = -EINVAL;
  1327. if (!oh)
  1328. return -EINVAL;
  1329. if (!soc_ops.assert_hardreset)
  1330. return -ENOSYS;
  1331. ret = _lookup_hardreset(oh, name, &ohri);
  1332. if (ret < 0)
  1333. return ret;
  1334. ret = soc_ops.assert_hardreset(oh, &ohri);
  1335. return ret;
  1336. }
  1337. /**
  1338. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1339. * in the hwmod module.
  1340. * @oh: struct omap_hwmod *
  1341. * @name: name of the reset line to look up and deassert
  1342. *
  1343. * Some IP like dsp, ipu or iva contain processor that require an HW
  1344. * reset line to be assert / deassert in order to enable fully the IP.
  1345. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1346. * deasserting the hardreset line on the currently-booted SoC, or passes
  1347. * along the return value from _lookup_hardreset() or the SoC's
  1348. * deassert_hardreset code.
  1349. */
  1350. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1351. {
  1352. struct omap_hwmod_rst_info ohri;
  1353. int ret = -EINVAL;
  1354. int hwsup = 0;
  1355. if (!oh)
  1356. return -EINVAL;
  1357. if (!soc_ops.deassert_hardreset)
  1358. return -ENOSYS;
  1359. ret = _lookup_hardreset(oh, name, &ohri);
  1360. if (IS_ERR_VALUE(ret))
  1361. return ret;
  1362. if (oh->clkdm) {
  1363. /*
  1364. * A clockdomain must be in SW_SUP otherwise reset
  1365. * might not be completed. The clockdomain can be set
  1366. * in HW_AUTO only when the module become ready.
  1367. */
  1368. hwsup = clkdm_in_hwsup(oh->clkdm);
  1369. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1370. if (ret) {
  1371. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1372. oh->name, oh->clkdm->name, ret);
  1373. return ret;
  1374. }
  1375. }
  1376. _enable_clocks(oh);
  1377. if (soc_ops.enable_module)
  1378. soc_ops.enable_module(oh);
  1379. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1380. if (soc_ops.disable_module)
  1381. soc_ops.disable_module(oh);
  1382. _disable_clocks(oh);
  1383. if (ret == -EBUSY)
  1384. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1385. if (!ret) {
  1386. /*
  1387. * Set the clockdomain to HW_AUTO, assuming that the
  1388. * previous state was HW_AUTO.
  1389. */
  1390. if (oh->clkdm && hwsup)
  1391. clkdm_allow_idle(oh->clkdm);
  1392. } else {
  1393. if (oh->clkdm)
  1394. clkdm_hwmod_disable(oh->clkdm, oh);
  1395. }
  1396. return ret;
  1397. }
  1398. /**
  1399. * _read_hardreset - read the HW reset line state of submodules
  1400. * contained in the hwmod module
  1401. * @oh: struct omap_hwmod *
  1402. * @name: name of the reset line to look up and read
  1403. *
  1404. * Return the state of the reset line. Returns -EINVAL if @oh is
  1405. * null, -ENOSYS if we have no way of reading the hardreset line
  1406. * status on the currently-booted SoC, or passes along the return
  1407. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1408. * code.
  1409. */
  1410. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1411. {
  1412. struct omap_hwmod_rst_info ohri;
  1413. int ret = -EINVAL;
  1414. if (!oh)
  1415. return -EINVAL;
  1416. if (!soc_ops.is_hardreset_asserted)
  1417. return -ENOSYS;
  1418. ret = _lookup_hardreset(oh, name, &ohri);
  1419. if (ret < 0)
  1420. return ret;
  1421. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1422. }
  1423. /**
  1424. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1425. * @oh: struct omap_hwmod *
  1426. *
  1427. * If all hardreset lines associated with @oh are asserted, then return true.
  1428. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1429. * associated with @oh are asserted, then return false.
  1430. * This function is used to avoid executing some parts of the IP block
  1431. * enable/disable sequence if its hardreset line is set.
  1432. */
  1433. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1434. {
  1435. int i, rst_cnt = 0;
  1436. if (oh->rst_lines_cnt == 0)
  1437. return false;
  1438. for (i = 0; i < oh->rst_lines_cnt; i++)
  1439. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1440. rst_cnt++;
  1441. if (oh->rst_lines_cnt == rst_cnt)
  1442. return true;
  1443. return false;
  1444. }
  1445. /**
  1446. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1447. * @oh: struct omap_hwmod *
  1448. *
  1449. * Disable the PRCM module mode related to the hwmod @oh.
  1450. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1451. */
  1452. static int _omap4_disable_module(struct omap_hwmod *oh)
  1453. {
  1454. int v;
  1455. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1456. return -EINVAL;
  1457. /*
  1458. * Since integration code might still be doing something, only
  1459. * disable if all lines are under hardreset.
  1460. */
  1461. if (!_are_all_hardreset_lines_asserted(oh))
  1462. return 0;
  1463. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1464. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1465. oh->clkdm->cm_inst,
  1466. oh->clkdm->clkdm_offs,
  1467. oh->prcm.omap4.clkctrl_offs);
  1468. v = _omap4_wait_target_disable(oh);
  1469. if (v)
  1470. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1471. oh->name);
  1472. return 0;
  1473. }
  1474. /**
  1475. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1476. * @oh: struct omap_hwmod *
  1477. *
  1478. * Disable the PRCM module mode related to the hwmod @oh.
  1479. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1480. */
  1481. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1482. {
  1483. int v;
  1484. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1485. return -EINVAL;
  1486. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1487. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1488. oh->prcm.omap4.clkctrl_offs);
  1489. if (_are_all_hardreset_lines_asserted(oh))
  1490. return 0;
  1491. v = _am33xx_wait_target_disable(oh);
  1492. if (v)
  1493. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1494. oh->name);
  1495. return 0;
  1496. }
  1497. /**
  1498. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1499. * @oh: struct omap_hwmod *
  1500. *
  1501. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1502. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1503. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1504. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1505. *
  1506. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1507. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1508. * use the SYSCONFIG softreset bit to provide the status.
  1509. *
  1510. * Note that some IP like McBSP do have reset control but don't have
  1511. * reset status.
  1512. */
  1513. static int _ocp_softreset(struct omap_hwmod *oh)
  1514. {
  1515. u32 v, softrst_mask;
  1516. int c = 0;
  1517. int ret = 0;
  1518. if (!oh->class->sysc ||
  1519. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1520. return -ENOENT;
  1521. /* clocks must be on for this operation */
  1522. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1523. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1524. oh->name);
  1525. return -EINVAL;
  1526. }
  1527. /* For some modules, all optionnal clocks need to be enabled as well */
  1528. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1529. _enable_optional_clocks(oh);
  1530. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1531. v = oh->_sysc_cache;
  1532. ret = _set_softreset(oh, &v);
  1533. if (ret)
  1534. goto dis_opt_clks;
  1535. _write_sysconfig(v, oh);
  1536. if (oh->class->sysc->srst_udelay)
  1537. udelay(oh->class->sysc->srst_udelay);
  1538. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1539. omap_test_timeout((omap_hwmod_read(oh,
  1540. oh->class->sysc->syss_offs)
  1541. & SYSS_RESETDONE_MASK),
  1542. MAX_MODULE_SOFTRESET_WAIT, c);
  1543. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1544. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1545. omap_test_timeout(!(omap_hwmod_read(oh,
  1546. oh->class->sysc->sysc_offs)
  1547. & softrst_mask),
  1548. MAX_MODULE_SOFTRESET_WAIT, c);
  1549. }
  1550. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1551. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1552. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1553. else
  1554. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1555. /*
  1556. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1557. * _wait_target_ready() or _reset()
  1558. */
  1559. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1560. dis_opt_clks:
  1561. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1562. _disable_optional_clocks(oh);
  1563. return ret;
  1564. }
  1565. /**
  1566. * _reset - reset an omap_hwmod
  1567. * @oh: struct omap_hwmod *
  1568. *
  1569. * Resets an omap_hwmod @oh. If the module has a custom reset
  1570. * function pointer defined, then call it to reset the IP block, and
  1571. * pass along its return value to the caller. Otherwise, if the IP
  1572. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1573. * associated with it, call a function to reset the IP block via that
  1574. * method, and pass along the return value to the caller. Finally, if
  1575. * the IP block has some hardreset lines associated with it, assert
  1576. * all of those, but do _not_ deassert them. (This is because driver
  1577. * authors have expressed an apparent requirement to control the
  1578. * deassertion of the hardreset lines themselves.)
  1579. *
  1580. * The default software reset mechanism for most OMAP IP blocks is
  1581. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1582. * hwmods cannot be reset via this method. Some are not targets and
  1583. * therefore have no OCP header registers to access. Others (like the
  1584. * IVA) have idiosyncratic reset sequences. So for these relatively
  1585. * rare cases, custom reset code can be supplied in the struct
  1586. * omap_hwmod_class .reset function pointer.
  1587. *
  1588. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1589. * does not prevent idling of the system. This is necessary for cases
  1590. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1591. * kernel without disabling dma.
  1592. *
  1593. * Passes along the return value from either _ocp_softreset() or the
  1594. * custom reset function - these must return -EINVAL if the hwmod
  1595. * cannot be reset this way or if the hwmod is in the wrong state,
  1596. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1597. */
  1598. static int _reset(struct omap_hwmod *oh)
  1599. {
  1600. int i, r;
  1601. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1602. if (oh->class->reset) {
  1603. r = oh->class->reset(oh);
  1604. } else {
  1605. if (oh->rst_lines_cnt > 0) {
  1606. for (i = 0; i < oh->rst_lines_cnt; i++)
  1607. _assert_hardreset(oh, oh->rst_lines[i].name);
  1608. return 0;
  1609. } else {
  1610. r = _ocp_softreset(oh);
  1611. if (r == -ENOENT)
  1612. r = 0;
  1613. }
  1614. }
  1615. _set_dmadisable(oh);
  1616. /*
  1617. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1618. * softreset. The _enable() function should be split to avoid
  1619. * the rewrite of the OCP_SYSCONFIG register.
  1620. */
  1621. if (oh->class->sysc) {
  1622. _update_sysc_cache(oh);
  1623. _enable_sysc(oh);
  1624. }
  1625. return r;
  1626. }
  1627. /**
  1628. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1629. *
  1630. * Call the appropriate PRM function to clear any logged I/O chain
  1631. * wakeups and to reconfigure the chain. This apparently needs to be
  1632. * done upon every mux change. Since hwmods can be concurrently
  1633. * enabled and idled, hold a spinlock around the I/O chain
  1634. * reconfiguration sequence. No return value.
  1635. *
  1636. * XXX When the PRM code is moved to drivers, this function can be removed,
  1637. * as the PRM infrastructure should abstract this.
  1638. */
  1639. static void _reconfigure_io_chain(void)
  1640. {
  1641. unsigned long flags;
  1642. spin_lock_irqsave(&io_chain_lock, flags);
  1643. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1644. omap3xxx_prm_reconfigure_io_chain();
  1645. else if (cpu_is_omap44xx())
  1646. omap44xx_prm_reconfigure_io_chain();
  1647. spin_unlock_irqrestore(&io_chain_lock, flags);
  1648. }
  1649. /**
  1650. * _enable - enable an omap_hwmod
  1651. * @oh: struct omap_hwmod *
  1652. *
  1653. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1654. * register target. Returns -EINVAL if the hwmod is in the wrong
  1655. * state or passes along the return value of _wait_target_ready().
  1656. */
  1657. static int _enable(struct omap_hwmod *oh)
  1658. {
  1659. int r;
  1660. int hwsup = 0;
  1661. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1662. /*
  1663. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1664. * state at init. Now that someone is really trying to enable
  1665. * them, just ensure that the hwmod mux is set.
  1666. */
  1667. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1668. /*
  1669. * If the caller has mux data populated, do the mux'ing
  1670. * which wouldn't have been done as part of the _enable()
  1671. * done during setup.
  1672. */
  1673. if (oh->mux)
  1674. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1675. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1676. return 0;
  1677. }
  1678. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1679. oh->_state != _HWMOD_STATE_IDLE &&
  1680. oh->_state != _HWMOD_STATE_DISABLED) {
  1681. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1682. oh->name);
  1683. return -EINVAL;
  1684. }
  1685. /*
  1686. * If an IP block contains HW reset lines and all of them are
  1687. * asserted, we let integration code associated with that
  1688. * block handle the enable. We've received very little
  1689. * information on what those driver authors need, and until
  1690. * detailed information is provided and the driver code is
  1691. * posted to the public lists, this is probably the best we
  1692. * can do.
  1693. */
  1694. if (_are_all_hardreset_lines_asserted(oh))
  1695. return 0;
  1696. /* Mux pins for device runtime if populated */
  1697. if (oh->mux && (!oh->mux->enabled ||
  1698. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1699. oh->mux->pads_dynamic))) {
  1700. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1701. _reconfigure_io_chain();
  1702. }
  1703. _add_initiator_dep(oh, mpu_oh);
  1704. if (oh->clkdm) {
  1705. /*
  1706. * A clockdomain must be in SW_SUP before enabling
  1707. * completely the module. The clockdomain can be set
  1708. * in HW_AUTO only when the module become ready.
  1709. */
  1710. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1711. !clkdm_missing_idle_reporting(oh->clkdm);
  1712. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1713. if (r) {
  1714. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1715. oh->name, oh->clkdm->name, r);
  1716. return r;
  1717. }
  1718. }
  1719. _enable_clocks(oh);
  1720. if (soc_ops.enable_module)
  1721. soc_ops.enable_module(oh);
  1722. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1723. -EINVAL;
  1724. if (!r) {
  1725. /*
  1726. * Set the clockdomain to HW_AUTO only if the target is ready,
  1727. * assuming that the previous state was HW_AUTO
  1728. */
  1729. if (oh->clkdm && hwsup)
  1730. clkdm_allow_idle(oh->clkdm);
  1731. oh->_state = _HWMOD_STATE_ENABLED;
  1732. /* Access the sysconfig only if the target is ready */
  1733. if (oh->class->sysc) {
  1734. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1735. _update_sysc_cache(oh);
  1736. _enable_sysc(oh);
  1737. }
  1738. } else {
  1739. _omap4_disable_module(oh);
  1740. _disable_clocks(oh);
  1741. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1742. oh->name, r);
  1743. if (oh->clkdm)
  1744. clkdm_hwmod_disable(oh->clkdm, oh);
  1745. }
  1746. return r;
  1747. }
  1748. /**
  1749. * _idle - idle an omap_hwmod
  1750. * @oh: struct omap_hwmod *
  1751. *
  1752. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1753. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1754. * state or returns 0.
  1755. */
  1756. static int _idle(struct omap_hwmod *oh)
  1757. {
  1758. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1759. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1760. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1761. oh->name);
  1762. return -EINVAL;
  1763. }
  1764. if (_are_all_hardreset_lines_asserted(oh))
  1765. return 0;
  1766. if (oh->class->sysc)
  1767. _idle_sysc(oh);
  1768. _del_initiator_dep(oh, mpu_oh);
  1769. if (soc_ops.disable_module)
  1770. soc_ops.disable_module(oh);
  1771. /*
  1772. * The module must be in idle mode before disabling any parents
  1773. * clocks. Otherwise, the parent clock might be disabled before
  1774. * the module transition is done, and thus will prevent the
  1775. * transition to complete properly.
  1776. */
  1777. _disable_clocks(oh);
  1778. if (oh->clkdm)
  1779. clkdm_hwmod_disable(oh->clkdm, oh);
  1780. /* Mux pins for device idle if populated */
  1781. if (oh->mux && oh->mux->pads_dynamic) {
  1782. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1783. _reconfigure_io_chain();
  1784. }
  1785. oh->_state = _HWMOD_STATE_IDLE;
  1786. return 0;
  1787. }
  1788. /**
  1789. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1790. * @oh: struct omap_hwmod *
  1791. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1792. *
  1793. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1794. * local copy. Intended to be used by drivers that require
  1795. * direct manipulation of the AUTOIDLE bits.
  1796. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1797. * along the return value from _set_module_autoidle().
  1798. *
  1799. * Any users of this function should be scrutinized carefully.
  1800. */
  1801. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1802. {
  1803. u32 v;
  1804. int retval = 0;
  1805. unsigned long flags;
  1806. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1807. return -EINVAL;
  1808. spin_lock_irqsave(&oh->_lock, flags);
  1809. v = oh->_sysc_cache;
  1810. retval = _set_module_autoidle(oh, autoidle, &v);
  1811. if (!retval)
  1812. _write_sysconfig(v, oh);
  1813. spin_unlock_irqrestore(&oh->_lock, flags);
  1814. return retval;
  1815. }
  1816. /**
  1817. * _shutdown - shutdown an omap_hwmod
  1818. * @oh: struct omap_hwmod *
  1819. *
  1820. * Shut down an omap_hwmod @oh. This should be called when the driver
  1821. * used for the hwmod is removed or unloaded or if the driver is not
  1822. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1823. * state or returns 0.
  1824. */
  1825. static int _shutdown(struct omap_hwmod *oh)
  1826. {
  1827. int ret, i;
  1828. u8 prev_state;
  1829. if (oh->_state != _HWMOD_STATE_IDLE &&
  1830. oh->_state != _HWMOD_STATE_ENABLED) {
  1831. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1832. oh->name);
  1833. return -EINVAL;
  1834. }
  1835. if (_are_all_hardreset_lines_asserted(oh))
  1836. return 0;
  1837. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1838. if (oh->class->pre_shutdown) {
  1839. prev_state = oh->_state;
  1840. if (oh->_state == _HWMOD_STATE_IDLE)
  1841. _enable(oh);
  1842. ret = oh->class->pre_shutdown(oh);
  1843. if (ret) {
  1844. if (prev_state == _HWMOD_STATE_IDLE)
  1845. _idle(oh);
  1846. return ret;
  1847. }
  1848. }
  1849. if (oh->class->sysc) {
  1850. if (oh->_state == _HWMOD_STATE_IDLE)
  1851. _enable(oh);
  1852. _shutdown_sysc(oh);
  1853. }
  1854. /* clocks and deps are already disabled in idle */
  1855. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1856. _del_initiator_dep(oh, mpu_oh);
  1857. /* XXX what about the other system initiators here? dma, dsp */
  1858. if (soc_ops.disable_module)
  1859. soc_ops.disable_module(oh);
  1860. _disable_clocks(oh);
  1861. if (oh->clkdm)
  1862. clkdm_hwmod_disable(oh->clkdm, oh);
  1863. }
  1864. /* XXX Should this code also force-disable the optional clocks? */
  1865. for (i = 0; i < oh->rst_lines_cnt; i++)
  1866. _assert_hardreset(oh, oh->rst_lines[i].name);
  1867. /* Mux pins to safe mode or use populated off mode values */
  1868. if (oh->mux)
  1869. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1870. oh->_state = _HWMOD_STATE_DISABLED;
  1871. return 0;
  1872. }
  1873. /**
  1874. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1875. * @oh: struct omap_hwmod * to locate the virtual address
  1876. *
  1877. * Cache the virtual address used by the MPU to access this IP block's
  1878. * registers. This address is needed early so the OCP registers that
  1879. * are part of the device's address space can be ioremapped properly.
  1880. * No return value.
  1881. */
  1882. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1883. {
  1884. struct omap_hwmod_addr_space *mem;
  1885. void __iomem *va_start;
  1886. if (!oh)
  1887. return;
  1888. _save_mpu_port_index(oh);
  1889. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1890. return;
  1891. mem = _find_mpu_rt_addr_space(oh);
  1892. if (!mem) {
  1893. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1894. oh->name);
  1895. return;
  1896. }
  1897. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1898. if (!va_start) {
  1899. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1900. return;
  1901. }
  1902. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1903. oh->name, va_start);
  1904. oh->_mpu_rt_va = va_start;
  1905. }
  1906. /**
  1907. * _init - initialize internal data for the hwmod @oh
  1908. * @oh: struct omap_hwmod *
  1909. * @n: (unused)
  1910. *
  1911. * Look up the clocks and the address space used by the MPU to access
  1912. * registers belonging to the hwmod @oh. @oh must already be
  1913. * registered at this point. This is the first of two phases for
  1914. * hwmod initialization. Code called here does not touch any hardware
  1915. * registers, it simply prepares internal data structures. Returns 0
  1916. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1917. * failure.
  1918. */
  1919. static int __init _init(struct omap_hwmod *oh, void *data)
  1920. {
  1921. int r;
  1922. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1923. return 0;
  1924. _init_mpu_rt_base(oh, NULL);
  1925. r = _init_clocks(oh, NULL);
  1926. if (IS_ERR_VALUE(r)) {
  1927. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1928. return -EINVAL;
  1929. }
  1930. oh->_state = _HWMOD_STATE_INITIALIZED;
  1931. return 0;
  1932. }
  1933. /**
  1934. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1935. * @oh: struct omap_hwmod *
  1936. *
  1937. * Set up the module's interface clocks. XXX This function is still mostly
  1938. * a stub; implementing this properly requires iclk autoidle usecounting in
  1939. * the clock code. No return value.
  1940. */
  1941. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1942. {
  1943. struct omap_hwmod_ocp_if *os;
  1944. struct list_head *p;
  1945. int i = 0;
  1946. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1947. return;
  1948. p = oh->slave_ports.next;
  1949. while (i < oh->slaves_cnt) {
  1950. os = _fetch_next_ocp_if(&p, &i);
  1951. if (!os->_clk)
  1952. continue;
  1953. if (os->flags & OCPIF_SWSUP_IDLE) {
  1954. /* XXX omap_iclk_deny_idle(c); */
  1955. } else {
  1956. /* XXX omap_iclk_allow_idle(c); */
  1957. clk_enable(os->_clk);
  1958. }
  1959. }
  1960. return;
  1961. }
  1962. /**
  1963. * _setup_reset - reset an IP block during the setup process
  1964. * @oh: struct omap_hwmod *
  1965. *
  1966. * Reset the IP block corresponding to the hwmod @oh during the setup
  1967. * process. The IP block is first enabled so it can be successfully
  1968. * reset. Returns 0 upon success or a negative error code upon
  1969. * failure.
  1970. */
  1971. static int __init _setup_reset(struct omap_hwmod *oh)
  1972. {
  1973. int r;
  1974. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1975. return -EINVAL;
  1976. if (oh->rst_lines_cnt == 0) {
  1977. r = _enable(oh);
  1978. if (r) {
  1979. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1980. oh->name, oh->_state);
  1981. return -EINVAL;
  1982. }
  1983. }
  1984. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1985. r = _reset(oh);
  1986. return r;
  1987. }
  1988. /**
  1989. * _setup_postsetup - transition to the appropriate state after _setup
  1990. * @oh: struct omap_hwmod *
  1991. *
  1992. * Place an IP block represented by @oh into a "post-setup" state --
  1993. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1994. * this function is called at the end of _setup().) The postsetup
  1995. * state for an IP block can be changed by calling
  1996. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1997. * before one of the omap_hwmod_setup*() functions are called for the
  1998. * IP block.
  1999. *
  2000. * The IP block stays in this state until a PM runtime-based driver is
  2001. * loaded for that IP block. A post-setup state of IDLE is
  2002. * appropriate for almost all IP blocks with runtime PM-enabled
  2003. * drivers, since those drivers are able to enable the IP block. A
  2004. * post-setup state of ENABLED is appropriate for kernels with PM
  2005. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2006. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2007. * included, since the WDTIMER starts running on reset and will reset
  2008. * the MPU if left active.
  2009. *
  2010. * This post-setup mechanism is deprecated. Once all of the OMAP
  2011. * drivers have been converted to use PM runtime, and all of the IP
  2012. * block data and interconnect data is available to the hwmod code, it
  2013. * should be possible to replace this mechanism with a "lazy reset"
  2014. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2015. * when the driver first probes, then all remaining IP blocks without
  2016. * drivers are either shut down or enabled after the drivers have
  2017. * loaded. However, this cannot take place until the above
  2018. * preconditions have been met, since otherwise the late reset code
  2019. * has no way of knowing which IP blocks are in use by drivers, and
  2020. * which ones are unused.
  2021. *
  2022. * No return value.
  2023. */
  2024. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2025. {
  2026. u8 postsetup_state;
  2027. if (oh->rst_lines_cnt > 0)
  2028. return;
  2029. postsetup_state = oh->_postsetup_state;
  2030. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2031. postsetup_state = _HWMOD_STATE_ENABLED;
  2032. /*
  2033. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2034. * it should be set by the core code as a runtime flag during startup
  2035. */
  2036. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2037. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2038. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2039. postsetup_state = _HWMOD_STATE_ENABLED;
  2040. }
  2041. if (postsetup_state == _HWMOD_STATE_IDLE)
  2042. _idle(oh);
  2043. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2044. _shutdown(oh);
  2045. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2046. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2047. oh->name, postsetup_state);
  2048. return;
  2049. }
  2050. /**
  2051. * _setup - prepare IP block hardware for use
  2052. * @oh: struct omap_hwmod *
  2053. * @n: (unused, pass NULL)
  2054. *
  2055. * Configure the IP block represented by @oh. This may include
  2056. * enabling the IP block, resetting it, and placing it into a
  2057. * post-setup state, depending on the type of IP block and applicable
  2058. * flags. IP blocks are reset to prevent any previous configuration
  2059. * by the bootloader or previous operating system from interfering
  2060. * with power management or other parts of the system. The reset can
  2061. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2062. * two phases for hwmod initialization. Code called here generally
  2063. * affects the IP block hardware, or system integration hardware
  2064. * associated with the IP block. Returns 0.
  2065. */
  2066. static int __init _setup(struct omap_hwmod *oh, void *data)
  2067. {
  2068. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2069. return 0;
  2070. _setup_iclk_autoidle(oh);
  2071. if (!_setup_reset(oh))
  2072. _setup_postsetup(oh);
  2073. return 0;
  2074. }
  2075. /**
  2076. * _register - register a struct omap_hwmod
  2077. * @oh: struct omap_hwmod *
  2078. *
  2079. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2080. * already has been registered by the same name; -EINVAL if the
  2081. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2082. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2083. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2084. * success.
  2085. *
  2086. * XXX The data should be copied into bootmem, so the original data
  2087. * should be marked __initdata and freed after init. This would allow
  2088. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2089. * that the copy process would be relatively complex due to the large number
  2090. * of substructures.
  2091. */
  2092. static int __init _register(struct omap_hwmod *oh)
  2093. {
  2094. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2095. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2096. return -EINVAL;
  2097. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2098. if (_lookup(oh->name))
  2099. return -EEXIST;
  2100. list_add_tail(&oh->node, &omap_hwmod_list);
  2101. INIT_LIST_HEAD(&oh->master_ports);
  2102. INIT_LIST_HEAD(&oh->slave_ports);
  2103. spin_lock_init(&oh->_lock);
  2104. oh->_state = _HWMOD_STATE_REGISTERED;
  2105. /*
  2106. * XXX Rather than doing a strcmp(), this should test a flag
  2107. * set in the hwmod data, inserted by the autogenerator code.
  2108. */
  2109. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2110. mpu_oh = oh;
  2111. return 0;
  2112. }
  2113. /**
  2114. * _alloc_links - return allocated memory for hwmod links
  2115. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2116. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2117. *
  2118. * Return pointers to two struct omap_hwmod_link records, via the
  2119. * addresses pointed to by @ml and @sl. Will first attempt to return
  2120. * memory allocated as part of a large initial block, but if that has
  2121. * been exhausted, will allocate memory itself. Since ideally this
  2122. * second allocation path will never occur, the number of these
  2123. * 'supplemental' allocations will be logged when debugging is
  2124. * enabled. Returns 0.
  2125. */
  2126. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2127. struct omap_hwmod_link **sl)
  2128. {
  2129. unsigned int sz;
  2130. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2131. *ml = &linkspace[free_ls++];
  2132. *sl = &linkspace[free_ls++];
  2133. return 0;
  2134. }
  2135. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2136. *sl = NULL;
  2137. *ml = alloc_bootmem(sz);
  2138. memset(*ml, 0, sz);
  2139. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2140. ls_supp++;
  2141. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2142. ls_supp * LINKS_PER_OCP_IF);
  2143. return 0;
  2144. };
  2145. /**
  2146. * _add_link - add an interconnect between two IP blocks
  2147. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2148. *
  2149. * Add struct omap_hwmod_link records connecting the master IP block
  2150. * specified in @oi->master to @oi, and connecting the slave IP block
  2151. * specified in @oi->slave to @oi. This code is assumed to run before
  2152. * preemption or SMP has been enabled, thus avoiding the need for
  2153. * locking in this code. Changes to this assumption will require
  2154. * additional locking. Returns 0.
  2155. */
  2156. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2157. {
  2158. struct omap_hwmod_link *ml, *sl;
  2159. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2160. oi->slave->name);
  2161. _alloc_links(&ml, &sl);
  2162. ml->ocp_if = oi;
  2163. INIT_LIST_HEAD(&ml->node);
  2164. list_add(&ml->node, &oi->master->master_ports);
  2165. oi->master->masters_cnt++;
  2166. sl->ocp_if = oi;
  2167. INIT_LIST_HEAD(&sl->node);
  2168. list_add(&sl->node, &oi->slave->slave_ports);
  2169. oi->slave->slaves_cnt++;
  2170. return 0;
  2171. }
  2172. /**
  2173. * _register_link - register a struct omap_hwmod_ocp_if
  2174. * @oi: struct omap_hwmod_ocp_if *
  2175. *
  2176. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2177. * has already been registered; -EINVAL if @oi is NULL or if the
  2178. * record pointed to by @oi is missing required fields; or 0 upon
  2179. * success.
  2180. *
  2181. * XXX The data should be copied into bootmem, so the original data
  2182. * should be marked __initdata and freed after init. This would allow
  2183. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2184. */
  2185. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2186. {
  2187. if (!oi || !oi->master || !oi->slave || !oi->user)
  2188. return -EINVAL;
  2189. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2190. return -EEXIST;
  2191. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2192. oi->master->name, oi->slave->name);
  2193. /*
  2194. * Register the connected hwmods, if they haven't been
  2195. * registered already
  2196. */
  2197. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2198. _register(oi->master);
  2199. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2200. _register(oi->slave);
  2201. _add_link(oi);
  2202. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2203. return 0;
  2204. }
  2205. /**
  2206. * _alloc_linkspace - allocate large block of hwmod links
  2207. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2208. *
  2209. * Allocate a large block of struct omap_hwmod_link records. This
  2210. * improves boot time significantly by avoiding the need to allocate
  2211. * individual records one by one. If the number of records to
  2212. * allocate in the block hasn't been manually specified, this function
  2213. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2214. * and use that to determine the allocation size. For SoC families
  2215. * that require multiple list registrations, such as OMAP3xxx, this
  2216. * estimation process isn't optimal, so manual estimation is advised
  2217. * in those cases. Returns -EEXIST if the allocation has already occurred
  2218. * or 0 upon success.
  2219. */
  2220. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2221. {
  2222. unsigned int i = 0;
  2223. unsigned int sz;
  2224. if (linkspace) {
  2225. WARN(1, "linkspace already allocated\n");
  2226. return -EEXIST;
  2227. }
  2228. if (max_ls == 0)
  2229. while (ois[i++])
  2230. max_ls += LINKS_PER_OCP_IF;
  2231. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2232. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2233. __func__, sz, max_ls);
  2234. linkspace = alloc_bootmem(sz);
  2235. memset(linkspace, 0, sz);
  2236. return 0;
  2237. }
  2238. /* Static functions intended only for use in soc_ops field function pointers */
  2239. /**
  2240. * _omap2_wait_target_ready - wait for a module to leave slave idle
  2241. * @oh: struct omap_hwmod *
  2242. *
  2243. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2244. * does not have an IDLEST bit or if the module successfully leaves
  2245. * slave idle; otherwise, pass along the return value of the
  2246. * appropriate *_cm*_wait_module_ready() function.
  2247. */
  2248. static int _omap2_wait_target_ready(struct omap_hwmod *oh)
  2249. {
  2250. if (!oh)
  2251. return -EINVAL;
  2252. if (oh->flags & HWMOD_NO_IDLEST)
  2253. return 0;
  2254. if (!_find_mpu_rt_port(oh))
  2255. return 0;
  2256. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2257. return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2258. oh->prcm.omap2.idlest_reg_id,
  2259. oh->prcm.omap2.idlest_idle_bit);
  2260. }
  2261. /**
  2262. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2263. * @oh: struct omap_hwmod *
  2264. *
  2265. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2266. * does not have an IDLEST bit or if the module successfully leaves
  2267. * slave idle; otherwise, pass along the return value of the
  2268. * appropriate *_cm*_wait_module_ready() function.
  2269. */
  2270. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2271. {
  2272. if (!oh)
  2273. return -EINVAL;
  2274. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2275. return 0;
  2276. if (!_find_mpu_rt_port(oh))
  2277. return 0;
  2278. /* XXX check module SIDLEMODE, hardreset status */
  2279. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2280. oh->clkdm->cm_inst,
  2281. oh->clkdm->clkdm_offs,
  2282. oh->prcm.omap4.clkctrl_offs);
  2283. }
  2284. /**
  2285. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2286. * @oh: struct omap_hwmod *
  2287. *
  2288. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2289. * does not have an IDLEST bit or if the module successfully leaves
  2290. * slave idle; otherwise, pass along the return value of the
  2291. * appropriate *_cm*_wait_module_ready() function.
  2292. */
  2293. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2294. {
  2295. if (!oh || !oh->clkdm)
  2296. return -EINVAL;
  2297. if (oh->flags & HWMOD_NO_IDLEST)
  2298. return 0;
  2299. if (!_find_mpu_rt_port(oh))
  2300. return 0;
  2301. /* XXX check module SIDLEMODE, hardreset status */
  2302. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2303. oh->clkdm->clkdm_offs,
  2304. oh->prcm.omap4.clkctrl_offs);
  2305. }
  2306. /**
  2307. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2308. * @oh: struct omap_hwmod * to assert hardreset
  2309. * @ohri: hardreset line data
  2310. *
  2311. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2312. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2313. * use as an soc_ops function pointer. Passes along the return value
  2314. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2315. * for removal when the PRM code is moved into drivers/.
  2316. */
  2317. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2318. struct omap_hwmod_rst_info *ohri)
  2319. {
  2320. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2321. ohri->rst_shift);
  2322. }
  2323. /**
  2324. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2325. * @oh: struct omap_hwmod * to deassert hardreset
  2326. * @ohri: hardreset line data
  2327. *
  2328. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2329. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2330. * use as an soc_ops function pointer. Passes along the return value
  2331. * from omap2_prm_deassert_hardreset(). XXX This function is
  2332. * scheduled for removal when the PRM code is moved into drivers/.
  2333. */
  2334. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2335. struct omap_hwmod_rst_info *ohri)
  2336. {
  2337. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2338. ohri->rst_shift,
  2339. ohri->st_shift);
  2340. }
  2341. /**
  2342. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2343. * @oh: struct omap_hwmod * to test hardreset
  2344. * @ohri: hardreset line data
  2345. *
  2346. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2347. * from the hwmod @oh and the hardreset line data @ohri. Only
  2348. * intended for use as an soc_ops function pointer. Passes along the
  2349. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2350. * function is scheduled for removal when the PRM code is moved into
  2351. * drivers/.
  2352. */
  2353. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2354. struct omap_hwmod_rst_info *ohri)
  2355. {
  2356. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2357. ohri->st_shift);
  2358. }
  2359. /**
  2360. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2361. * @oh: struct omap_hwmod * to assert hardreset
  2362. * @ohri: hardreset line data
  2363. *
  2364. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2365. * from the hwmod @oh and the hardreset line data @ohri. Only
  2366. * intended for use as an soc_ops function pointer. Passes along the
  2367. * return value from omap4_prminst_assert_hardreset(). XXX This
  2368. * function is scheduled for removal when the PRM code is moved into
  2369. * drivers/.
  2370. */
  2371. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2372. struct omap_hwmod_rst_info *ohri)
  2373. {
  2374. if (!oh->clkdm)
  2375. return -EINVAL;
  2376. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2377. oh->clkdm->pwrdm.ptr->prcm_partition,
  2378. oh->clkdm->pwrdm.ptr->prcm_offs,
  2379. oh->prcm.omap4.rstctrl_offs);
  2380. }
  2381. /**
  2382. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2383. * @oh: struct omap_hwmod * to deassert hardreset
  2384. * @ohri: hardreset line data
  2385. *
  2386. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2387. * from the hwmod @oh and the hardreset line data @ohri. Only
  2388. * intended for use as an soc_ops function pointer. Passes along the
  2389. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2390. * function is scheduled for removal when the PRM code is moved into
  2391. * drivers/.
  2392. */
  2393. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2394. struct omap_hwmod_rst_info *ohri)
  2395. {
  2396. if (!oh->clkdm)
  2397. return -EINVAL;
  2398. if (ohri->st_shift)
  2399. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2400. oh->name, ohri->name);
  2401. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2402. oh->clkdm->pwrdm.ptr->prcm_partition,
  2403. oh->clkdm->pwrdm.ptr->prcm_offs,
  2404. oh->prcm.omap4.rstctrl_offs);
  2405. }
  2406. /**
  2407. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2408. * @oh: struct omap_hwmod * to test hardreset
  2409. * @ohri: hardreset line data
  2410. *
  2411. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2412. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2413. * Only intended for use as an soc_ops function pointer. Passes along
  2414. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2415. * This function is scheduled for removal when the PRM code is moved
  2416. * into drivers/.
  2417. */
  2418. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2419. struct omap_hwmod_rst_info *ohri)
  2420. {
  2421. if (!oh->clkdm)
  2422. return -EINVAL;
  2423. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2424. oh->clkdm->pwrdm.ptr->prcm_partition,
  2425. oh->clkdm->pwrdm.ptr->prcm_offs,
  2426. oh->prcm.omap4.rstctrl_offs);
  2427. }
  2428. /**
  2429. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2430. * @oh: struct omap_hwmod * to assert hardreset
  2431. * @ohri: hardreset line data
  2432. *
  2433. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2434. * from the hwmod @oh and the hardreset line data @ohri. Only
  2435. * intended for use as an soc_ops function pointer. Passes along the
  2436. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2437. * function is scheduled for removal when the PRM code is moved into
  2438. * drivers/.
  2439. */
  2440. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2441. struct omap_hwmod_rst_info *ohri)
  2442. {
  2443. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2444. oh->clkdm->pwrdm.ptr->prcm_offs,
  2445. oh->prcm.omap4.rstctrl_offs);
  2446. }
  2447. /**
  2448. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2449. * @oh: struct omap_hwmod * to deassert hardreset
  2450. * @ohri: hardreset line data
  2451. *
  2452. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2453. * from the hwmod @oh and the hardreset line data @ohri. Only
  2454. * intended for use as an soc_ops function pointer. Passes along the
  2455. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2456. * function is scheduled for removal when the PRM code is moved into
  2457. * drivers/.
  2458. */
  2459. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2460. struct omap_hwmod_rst_info *ohri)
  2461. {
  2462. if (ohri->st_shift)
  2463. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2464. oh->name, ohri->name);
  2465. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2466. oh->clkdm->pwrdm.ptr->prcm_offs,
  2467. oh->prcm.omap4.rstctrl_offs,
  2468. oh->prcm.omap4.rstst_offs);
  2469. }
  2470. /**
  2471. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2472. * @oh: struct omap_hwmod * to test hardreset
  2473. * @ohri: hardreset line data
  2474. *
  2475. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2476. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2477. * Only intended for use as an soc_ops function pointer. Passes along
  2478. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2479. * This function is scheduled for removal when the PRM code is moved
  2480. * into drivers/.
  2481. */
  2482. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2483. struct omap_hwmod_rst_info *ohri)
  2484. {
  2485. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2486. oh->clkdm->pwrdm.ptr->prcm_offs,
  2487. oh->prcm.omap4.rstctrl_offs);
  2488. }
  2489. /* Public functions */
  2490. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2491. {
  2492. if (oh->flags & HWMOD_16BIT_REG)
  2493. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2494. else
  2495. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2496. }
  2497. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2498. {
  2499. if (oh->flags & HWMOD_16BIT_REG)
  2500. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2501. else
  2502. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2503. }
  2504. /**
  2505. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2506. * @oh: struct omap_hwmod *
  2507. *
  2508. * This is a public function exposed to drivers. Some drivers may need to do
  2509. * some settings before and after resetting the device. Those drivers after
  2510. * doing the necessary settings could use this function to start a reset by
  2511. * setting the SYSCONFIG.SOFTRESET bit.
  2512. */
  2513. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2514. {
  2515. u32 v;
  2516. int ret;
  2517. if (!oh || !(oh->_sysc_cache))
  2518. return -EINVAL;
  2519. v = oh->_sysc_cache;
  2520. ret = _set_softreset(oh, &v);
  2521. if (ret)
  2522. goto error;
  2523. _write_sysconfig(v, oh);
  2524. error:
  2525. return ret;
  2526. }
  2527. /**
  2528. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2529. * @oh: struct omap_hwmod *
  2530. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2531. *
  2532. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2533. * local copy. Intended to be used by drivers that have some erratum
  2534. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2535. * -EINVAL if @oh is null, or passes along the return value from
  2536. * _set_slave_idlemode().
  2537. *
  2538. * XXX Does this function have any current users? If not, we should
  2539. * remove it; it is better to let the rest of the hwmod code handle this.
  2540. * Any users of this function should be scrutinized carefully.
  2541. */
  2542. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2543. {
  2544. u32 v;
  2545. int retval = 0;
  2546. if (!oh)
  2547. return -EINVAL;
  2548. v = oh->_sysc_cache;
  2549. retval = _set_slave_idlemode(oh, idlemode, &v);
  2550. if (!retval)
  2551. _write_sysconfig(v, oh);
  2552. return retval;
  2553. }
  2554. /**
  2555. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2556. * @name: name of the omap_hwmod to look up
  2557. *
  2558. * Given a @name of an omap_hwmod, return a pointer to the registered
  2559. * struct omap_hwmod *, or NULL upon error.
  2560. */
  2561. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2562. {
  2563. struct omap_hwmod *oh;
  2564. if (!name)
  2565. return NULL;
  2566. oh = _lookup(name);
  2567. return oh;
  2568. }
  2569. /**
  2570. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2571. * @fn: pointer to a callback function
  2572. * @data: void * data to pass to callback function
  2573. *
  2574. * Call @fn for each registered omap_hwmod, passing @data to each
  2575. * function. @fn must return 0 for success or any other value for
  2576. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2577. * will stop and the non-zero return value will be passed to the
  2578. * caller of omap_hwmod_for_each(). @fn is called with
  2579. * omap_hwmod_for_each() held.
  2580. */
  2581. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2582. void *data)
  2583. {
  2584. struct omap_hwmod *temp_oh;
  2585. int ret = 0;
  2586. if (!fn)
  2587. return -EINVAL;
  2588. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2589. ret = (*fn)(temp_oh, data);
  2590. if (ret)
  2591. break;
  2592. }
  2593. return ret;
  2594. }
  2595. /**
  2596. * omap_hwmod_register_links - register an array of hwmod links
  2597. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2598. *
  2599. * Intended to be called early in boot before the clock framework is
  2600. * initialized. If @ois is not null, will register all omap_hwmods
  2601. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2602. * omap_hwmod_init() hasn't been called before calling this function,
  2603. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2604. * success.
  2605. */
  2606. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2607. {
  2608. int r, i;
  2609. if (!inited)
  2610. return -EINVAL;
  2611. if (!ois)
  2612. return 0;
  2613. if (!linkspace) {
  2614. if (_alloc_linkspace(ois)) {
  2615. pr_err("omap_hwmod: could not allocate link space\n");
  2616. return -ENOMEM;
  2617. }
  2618. }
  2619. i = 0;
  2620. do {
  2621. r = _register_link(ois[i]);
  2622. WARN(r && r != -EEXIST,
  2623. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2624. ois[i]->master->name, ois[i]->slave->name, r);
  2625. } while (ois[++i]);
  2626. return 0;
  2627. }
  2628. /**
  2629. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2630. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2631. *
  2632. * If the hwmod data corresponding to the MPU subsystem IP block
  2633. * hasn't been initialized and set up yet, do so now. This must be
  2634. * done first since sleep dependencies may be added from other hwmods
  2635. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2636. * return value.
  2637. */
  2638. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2639. {
  2640. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2641. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2642. __func__, MPU_INITIATOR_NAME);
  2643. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2644. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2645. }
  2646. /**
  2647. * omap_hwmod_setup_one - set up a single hwmod
  2648. * @oh_name: const char * name of the already-registered hwmod to set up
  2649. *
  2650. * Initialize and set up a single hwmod. Intended to be used for a
  2651. * small number of early devices, such as the timer IP blocks used for
  2652. * the scheduler clock. Must be called after omap2_clk_init().
  2653. * Resolves the struct clk names to struct clk pointers for each
  2654. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2655. * -EINVAL upon error or 0 upon success.
  2656. */
  2657. int __init omap_hwmod_setup_one(const char *oh_name)
  2658. {
  2659. struct omap_hwmod *oh;
  2660. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2661. oh = _lookup(oh_name);
  2662. if (!oh) {
  2663. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2664. return -EINVAL;
  2665. }
  2666. _ensure_mpu_hwmod_is_setup(oh);
  2667. _init(oh, NULL);
  2668. _setup(oh, NULL);
  2669. return 0;
  2670. }
  2671. /**
  2672. * omap_hwmod_setup_all - set up all registered IP blocks
  2673. *
  2674. * Initialize and set up all IP blocks registered with the hwmod code.
  2675. * Must be called after omap2_clk_init(). Resolves the struct clk
  2676. * names to struct clk pointers for each registered omap_hwmod. Also
  2677. * calls _setup() on each hwmod. Returns 0 upon success.
  2678. */
  2679. static int __init omap_hwmod_setup_all(void)
  2680. {
  2681. _ensure_mpu_hwmod_is_setup(NULL);
  2682. omap_hwmod_for_each(_init, NULL);
  2683. omap_hwmod_for_each(_setup, NULL);
  2684. return 0;
  2685. }
  2686. core_initcall(omap_hwmod_setup_all);
  2687. /**
  2688. * omap_hwmod_enable - enable an omap_hwmod
  2689. * @oh: struct omap_hwmod *
  2690. *
  2691. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2692. * Returns -EINVAL on error or passes along the return value from _enable().
  2693. */
  2694. int omap_hwmod_enable(struct omap_hwmod *oh)
  2695. {
  2696. int r;
  2697. unsigned long flags;
  2698. if (!oh)
  2699. return -EINVAL;
  2700. spin_lock_irqsave(&oh->_lock, flags);
  2701. r = _enable(oh);
  2702. spin_unlock_irqrestore(&oh->_lock, flags);
  2703. return r;
  2704. }
  2705. /**
  2706. * omap_hwmod_idle - idle an omap_hwmod
  2707. * @oh: struct omap_hwmod *
  2708. *
  2709. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2710. * Returns -EINVAL on error or passes along the return value from _idle().
  2711. */
  2712. int omap_hwmod_idle(struct omap_hwmod *oh)
  2713. {
  2714. unsigned long flags;
  2715. if (!oh)
  2716. return -EINVAL;
  2717. spin_lock_irqsave(&oh->_lock, flags);
  2718. _idle(oh);
  2719. spin_unlock_irqrestore(&oh->_lock, flags);
  2720. return 0;
  2721. }
  2722. /**
  2723. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2724. * @oh: struct omap_hwmod *
  2725. *
  2726. * Shutdown an omap_hwmod @oh. Intended to be called by
  2727. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2728. * the return value from _shutdown().
  2729. */
  2730. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2731. {
  2732. unsigned long flags;
  2733. if (!oh)
  2734. return -EINVAL;
  2735. spin_lock_irqsave(&oh->_lock, flags);
  2736. _shutdown(oh);
  2737. spin_unlock_irqrestore(&oh->_lock, flags);
  2738. return 0;
  2739. }
  2740. /**
  2741. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2742. * @oh: struct omap_hwmod *oh
  2743. *
  2744. * Intended to be called by the omap_device code.
  2745. */
  2746. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2747. {
  2748. unsigned long flags;
  2749. spin_lock_irqsave(&oh->_lock, flags);
  2750. _enable_clocks(oh);
  2751. spin_unlock_irqrestore(&oh->_lock, flags);
  2752. return 0;
  2753. }
  2754. /**
  2755. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2756. * @oh: struct omap_hwmod *oh
  2757. *
  2758. * Intended to be called by the omap_device code.
  2759. */
  2760. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2761. {
  2762. unsigned long flags;
  2763. spin_lock_irqsave(&oh->_lock, flags);
  2764. _disable_clocks(oh);
  2765. spin_unlock_irqrestore(&oh->_lock, flags);
  2766. return 0;
  2767. }
  2768. /**
  2769. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2770. * @oh: struct omap_hwmod *oh
  2771. *
  2772. * Intended to be called by drivers and core code when all posted
  2773. * writes to a device must complete before continuing further
  2774. * execution (for example, after clearing some device IRQSTATUS
  2775. * register bits)
  2776. *
  2777. * XXX what about targets with multiple OCP threads?
  2778. */
  2779. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2780. {
  2781. BUG_ON(!oh);
  2782. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2783. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2784. oh->name);
  2785. return;
  2786. }
  2787. /*
  2788. * Forces posted writes to complete on the OCP thread handling
  2789. * register writes
  2790. */
  2791. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2792. }
  2793. /**
  2794. * omap_hwmod_reset - reset the hwmod
  2795. * @oh: struct omap_hwmod *
  2796. *
  2797. * Under some conditions, a driver may wish to reset the entire device.
  2798. * Called from omap_device code. Returns -EINVAL on error or passes along
  2799. * the return value from _reset().
  2800. */
  2801. int omap_hwmod_reset(struct omap_hwmod *oh)
  2802. {
  2803. int r;
  2804. unsigned long flags;
  2805. if (!oh)
  2806. return -EINVAL;
  2807. spin_lock_irqsave(&oh->_lock, flags);
  2808. r = _reset(oh);
  2809. spin_unlock_irqrestore(&oh->_lock, flags);
  2810. return r;
  2811. }
  2812. /*
  2813. * IP block data retrieval functions
  2814. */
  2815. /**
  2816. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2817. * @oh: struct omap_hwmod *
  2818. * @res: pointer to the first element of an array of struct resource to fill
  2819. *
  2820. * Count the number of struct resource array elements necessary to
  2821. * contain omap_hwmod @oh resources. Intended to be called by code
  2822. * that registers omap_devices. Intended to be used to determine the
  2823. * size of a dynamically-allocated struct resource array, before
  2824. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2825. * resource array elements needed.
  2826. *
  2827. * XXX This code is not optimized. It could attempt to merge adjacent
  2828. * resource IDs.
  2829. *
  2830. */
  2831. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2832. {
  2833. struct omap_hwmod_ocp_if *os;
  2834. struct list_head *p;
  2835. int ret;
  2836. int i = 0;
  2837. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2838. p = oh->slave_ports.next;
  2839. while (i < oh->slaves_cnt) {
  2840. os = _fetch_next_ocp_if(&p, &i);
  2841. ret += _count_ocp_if_addr_spaces(os);
  2842. }
  2843. return ret;
  2844. }
  2845. /**
  2846. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2847. * @oh: struct omap_hwmod *
  2848. * @res: pointer to the first element of an array of struct resource to fill
  2849. *
  2850. * Fill the struct resource array @res with resource data from the
  2851. * omap_hwmod @oh. Intended to be called by code that registers
  2852. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2853. * number of array elements filled.
  2854. */
  2855. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2856. {
  2857. struct omap_hwmod_ocp_if *os;
  2858. struct list_head *p;
  2859. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2860. int r = 0;
  2861. /* For each IRQ, DMA, memory area, fill in array.*/
  2862. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2863. for (i = 0; i < mpu_irqs_cnt; i++) {
  2864. (res + r)->name = (oh->mpu_irqs + i)->name;
  2865. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2866. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2867. (res + r)->flags = IORESOURCE_IRQ;
  2868. r++;
  2869. }
  2870. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2871. for (i = 0; i < sdma_reqs_cnt; i++) {
  2872. (res + r)->name = (oh->sdma_reqs + i)->name;
  2873. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2874. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2875. (res + r)->flags = IORESOURCE_DMA;
  2876. r++;
  2877. }
  2878. p = oh->slave_ports.next;
  2879. i = 0;
  2880. while (i < oh->slaves_cnt) {
  2881. os = _fetch_next_ocp_if(&p, &i);
  2882. addr_cnt = _count_ocp_if_addr_spaces(os);
  2883. for (j = 0; j < addr_cnt; j++) {
  2884. (res + r)->name = (os->addr + j)->name;
  2885. (res + r)->start = (os->addr + j)->pa_start;
  2886. (res + r)->end = (os->addr + j)->pa_end;
  2887. (res + r)->flags = IORESOURCE_MEM;
  2888. r++;
  2889. }
  2890. }
  2891. return r;
  2892. }
  2893. /**
  2894. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  2895. * @oh: struct omap_hwmod *
  2896. * @res: pointer to the array of struct resource to fill
  2897. *
  2898. * Fill the struct resource array @res with dma resource data from the
  2899. * omap_hwmod @oh. Intended to be called by code that registers
  2900. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2901. * number of array elements filled.
  2902. */
  2903. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  2904. {
  2905. int i, sdma_reqs_cnt;
  2906. int r = 0;
  2907. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2908. for (i = 0; i < sdma_reqs_cnt; i++) {
  2909. (res + r)->name = (oh->sdma_reqs + i)->name;
  2910. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2911. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2912. (res + r)->flags = IORESOURCE_DMA;
  2913. r++;
  2914. }
  2915. return r;
  2916. }
  2917. /**
  2918. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2919. * @oh: struct omap_hwmod * to operate on
  2920. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2921. * @name: pointer to the name of the data to fetch (optional)
  2922. * @rsrc: pointer to a struct resource, allocated by the caller
  2923. *
  2924. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2925. * data for the IP block pointed to by @oh. The data will be filled
  2926. * into a struct resource record pointed to by @rsrc. The struct
  2927. * resource must be allocated by the caller. When @name is non-null,
  2928. * the data associated with the matching entry in the IRQ/SDMA/address
  2929. * space hwmod data arrays will be returned. If @name is null, the
  2930. * first array entry will be returned. Data order is not meaningful
  2931. * in hwmod data, so callers are strongly encouraged to use a non-null
  2932. * @name whenever possible to avoid unpredictable effects if hwmod
  2933. * data is later added that causes data ordering to change. This
  2934. * function is only intended for use by OMAP core code. Device
  2935. * drivers should not call this function - the appropriate bus-related
  2936. * data accessor functions should be used instead. Returns 0 upon
  2937. * success or a negative error code upon error.
  2938. */
  2939. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2940. const char *name, struct resource *rsrc)
  2941. {
  2942. int r;
  2943. unsigned int irq, dma;
  2944. u32 pa_start, pa_end;
  2945. if (!oh || !rsrc)
  2946. return -EINVAL;
  2947. if (type == IORESOURCE_IRQ) {
  2948. r = _get_mpu_irq_by_name(oh, name, &irq);
  2949. if (r)
  2950. return r;
  2951. rsrc->start = irq;
  2952. rsrc->end = irq;
  2953. } else if (type == IORESOURCE_DMA) {
  2954. r = _get_sdma_req_by_name(oh, name, &dma);
  2955. if (r)
  2956. return r;
  2957. rsrc->start = dma;
  2958. rsrc->end = dma;
  2959. } else if (type == IORESOURCE_MEM) {
  2960. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2961. if (r)
  2962. return r;
  2963. rsrc->start = pa_start;
  2964. rsrc->end = pa_end;
  2965. } else {
  2966. return -EINVAL;
  2967. }
  2968. rsrc->flags = type;
  2969. rsrc->name = name;
  2970. return 0;
  2971. }
  2972. /**
  2973. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2974. * @oh: struct omap_hwmod *
  2975. *
  2976. * Return the powerdomain pointer associated with the OMAP module
  2977. * @oh's main clock. If @oh does not have a main clk, return the
  2978. * powerdomain associated with the interface clock associated with the
  2979. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2980. * instead?) Returns NULL on error, or a struct powerdomain * on
  2981. * success.
  2982. */
  2983. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2984. {
  2985. struct clk *c;
  2986. struct omap_hwmod_ocp_if *oi;
  2987. if (!oh)
  2988. return NULL;
  2989. if (oh->_clk) {
  2990. c = oh->_clk;
  2991. } else {
  2992. oi = _find_mpu_rt_port(oh);
  2993. if (!oi)
  2994. return NULL;
  2995. c = oi->_clk;
  2996. }
  2997. if (!c->clkdm)
  2998. return NULL;
  2999. return c->clkdm->pwrdm.ptr;
  3000. }
  3001. /**
  3002. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3003. * @oh: struct omap_hwmod *
  3004. *
  3005. * Returns the virtual address corresponding to the beginning of the
  3006. * module's register target, in the address range that is intended to
  3007. * be used by the MPU. Returns the virtual address upon success or NULL
  3008. * upon error.
  3009. */
  3010. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3011. {
  3012. if (!oh)
  3013. return NULL;
  3014. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3015. return NULL;
  3016. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3017. return NULL;
  3018. return oh->_mpu_rt_va;
  3019. }
  3020. /**
  3021. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3022. * @oh: struct omap_hwmod *
  3023. * @init_oh: struct omap_hwmod * (initiator)
  3024. *
  3025. * Add a sleep dependency between the initiator @init_oh and @oh.
  3026. * Intended to be called by DSP/Bridge code via platform_data for the
  3027. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3028. * code needs to add/del initiator dependencies dynamically
  3029. * before/after accessing a device. Returns the return value from
  3030. * _add_initiator_dep().
  3031. *
  3032. * XXX Keep a usecount in the clockdomain code
  3033. */
  3034. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3035. struct omap_hwmod *init_oh)
  3036. {
  3037. return _add_initiator_dep(oh, init_oh);
  3038. }
  3039. /*
  3040. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3041. * for context save/restore operations?
  3042. */
  3043. /**
  3044. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3045. * @oh: struct omap_hwmod *
  3046. * @init_oh: struct omap_hwmod * (initiator)
  3047. *
  3048. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3049. * Intended to be called by DSP/Bridge code via platform_data for the
  3050. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3051. * code needs to add/del initiator dependencies dynamically
  3052. * before/after accessing a device. Returns the return value from
  3053. * _del_initiator_dep().
  3054. *
  3055. * XXX Keep a usecount in the clockdomain code
  3056. */
  3057. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3058. struct omap_hwmod *init_oh)
  3059. {
  3060. return _del_initiator_dep(oh, init_oh);
  3061. }
  3062. /**
  3063. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3064. * @oh: struct omap_hwmod *
  3065. *
  3066. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3067. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3068. * this IP block if it has dynamic mux entries. Eventually this
  3069. * should set PRCM wakeup registers to cause the PRCM to receive
  3070. * wakeup events from the module. Does not set any wakeup routing
  3071. * registers beyond this point - if the module is to wake up any other
  3072. * module or subsystem, that must be set separately. Called by
  3073. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3074. */
  3075. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3076. {
  3077. unsigned long flags;
  3078. u32 v;
  3079. spin_lock_irqsave(&oh->_lock, flags);
  3080. if (oh->class->sysc &&
  3081. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3082. v = oh->_sysc_cache;
  3083. _enable_wakeup(oh, &v);
  3084. _write_sysconfig(v, oh);
  3085. }
  3086. _set_idle_ioring_wakeup(oh, true);
  3087. spin_unlock_irqrestore(&oh->_lock, flags);
  3088. return 0;
  3089. }
  3090. /**
  3091. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3092. * @oh: struct omap_hwmod *
  3093. *
  3094. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3095. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3096. * events for this IP block if it has dynamic mux entries. Eventually
  3097. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3098. * wakeup events from the module. Does not set any wakeup routing
  3099. * registers beyond this point - if the module is to wake up any other
  3100. * module or subsystem, that must be set separately. Called by
  3101. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3102. */
  3103. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3104. {
  3105. unsigned long flags;
  3106. u32 v;
  3107. spin_lock_irqsave(&oh->_lock, flags);
  3108. if (oh->class->sysc &&
  3109. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3110. v = oh->_sysc_cache;
  3111. _disable_wakeup(oh, &v);
  3112. _write_sysconfig(v, oh);
  3113. }
  3114. _set_idle_ioring_wakeup(oh, false);
  3115. spin_unlock_irqrestore(&oh->_lock, flags);
  3116. return 0;
  3117. }
  3118. /**
  3119. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3120. * contained in the hwmod module.
  3121. * @oh: struct omap_hwmod *
  3122. * @name: name of the reset line to lookup and assert
  3123. *
  3124. * Some IP like dsp, ipu or iva contain processor that require
  3125. * an HW reset line to be assert / deassert in order to enable fully
  3126. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3127. * yet supported on this OMAP; otherwise, passes along the return value
  3128. * from _assert_hardreset().
  3129. */
  3130. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3131. {
  3132. int ret;
  3133. unsigned long flags;
  3134. if (!oh)
  3135. return -EINVAL;
  3136. spin_lock_irqsave(&oh->_lock, flags);
  3137. ret = _assert_hardreset(oh, name);
  3138. spin_unlock_irqrestore(&oh->_lock, flags);
  3139. return ret;
  3140. }
  3141. /**
  3142. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3143. * contained in the hwmod module.
  3144. * @oh: struct omap_hwmod *
  3145. * @name: name of the reset line to look up and deassert
  3146. *
  3147. * Some IP like dsp, ipu or iva contain processor that require
  3148. * an HW reset line to be assert / deassert in order to enable fully
  3149. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3150. * yet supported on this OMAP; otherwise, passes along the return value
  3151. * from _deassert_hardreset().
  3152. */
  3153. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3154. {
  3155. int ret;
  3156. unsigned long flags;
  3157. if (!oh)
  3158. return -EINVAL;
  3159. spin_lock_irqsave(&oh->_lock, flags);
  3160. ret = _deassert_hardreset(oh, name);
  3161. spin_unlock_irqrestore(&oh->_lock, flags);
  3162. return ret;
  3163. }
  3164. /**
  3165. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3166. * contained in the hwmod module
  3167. * @oh: struct omap_hwmod *
  3168. * @name: name of the reset line to look up and read
  3169. *
  3170. * Return the current state of the hwmod @oh's reset line named @name:
  3171. * returns -EINVAL upon parameter error or if this operation
  3172. * is unsupported on the current OMAP; otherwise, passes along the return
  3173. * value from _read_hardreset().
  3174. */
  3175. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3176. {
  3177. int ret;
  3178. unsigned long flags;
  3179. if (!oh)
  3180. return -EINVAL;
  3181. spin_lock_irqsave(&oh->_lock, flags);
  3182. ret = _read_hardreset(oh, name);
  3183. spin_unlock_irqrestore(&oh->_lock, flags);
  3184. return ret;
  3185. }
  3186. /**
  3187. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3188. * @classname: struct omap_hwmod_class name to search for
  3189. * @fn: callback function pointer to call for each hwmod in class @classname
  3190. * @user: arbitrary context data to pass to the callback function
  3191. *
  3192. * For each omap_hwmod of class @classname, call @fn.
  3193. * If the callback function returns something other than
  3194. * zero, the iterator is terminated, and the callback function's return
  3195. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3196. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3197. */
  3198. int omap_hwmod_for_each_by_class(const char *classname,
  3199. int (*fn)(struct omap_hwmod *oh,
  3200. void *user),
  3201. void *user)
  3202. {
  3203. struct omap_hwmod *temp_oh;
  3204. int ret = 0;
  3205. if (!classname || !fn)
  3206. return -EINVAL;
  3207. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3208. __func__, classname);
  3209. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3210. if (!strcmp(temp_oh->class->name, classname)) {
  3211. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3212. __func__, temp_oh->name);
  3213. ret = (*fn)(temp_oh, user);
  3214. if (ret)
  3215. break;
  3216. }
  3217. }
  3218. if (ret)
  3219. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3220. __func__, ret);
  3221. return ret;
  3222. }
  3223. /**
  3224. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3225. * @oh: struct omap_hwmod *
  3226. * @state: state that _setup() should leave the hwmod in
  3227. *
  3228. * Sets the hwmod state that @oh will enter at the end of _setup()
  3229. * (called by omap_hwmod_setup_*()). See also the documentation
  3230. * for _setup_postsetup(), above. Returns 0 upon success or
  3231. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3232. * in the wrong state.
  3233. */
  3234. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3235. {
  3236. int ret;
  3237. unsigned long flags;
  3238. if (!oh)
  3239. return -EINVAL;
  3240. if (state != _HWMOD_STATE_DISABLED &&
  3241. state != _HWMOD_STATE_ENABLED &&
  3242. state != _HWMOD_STATE_IDLE)
  3243. return -EINVAL;
  3244. spin_lock_irqsave(&oh->_lock, flags);
  3245. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3246. ret = -EINVAL;
  3247. goto ohsps_unlock;
  3248. }
  3249. oh->_postsetup_state = state;
  3250. ret = 0;
  3251. ohsps_unlock:
  3252. spin_unlock_irqrestore(&oh->_lock, flags);
  3253. return ret;
  3254. }
  3255. /**
  3256. * omap_hwmod_get_context_loss_count - get lost context count
  3257. * @oh: struct omap_hwmod *
  3258. *
  3259. * Query the powerdomain of of @oh to get the context loss
  3260. * count for this device.
  3261. *
  3262. * Returns the context loss count of the powerdomain assocated with @oh
  3263. * upon success, or zero if no powerdomain exists for @oh.
  3264. */
  3265. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3266. {
  3267. struct powerdomain *pwrdm;
  3268. int ret = 0;
  3269. pwrdm = omap_hwmod_get_pwrdm(oh);
  3270. if (pwrdm)
  3271. ret = pwrdm_get_context_loss_count(pwrdm);
  3272. return ret;
  3273. }
  3274. /**
  3275. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3276. * @oh: struct omap_hwmod *
  3277. *
  3278. * Prevent the hwmod @oh from being reset during the setup process.
  3279. * Intended for use by board-*.c files on boards with devices that
  3280. * cannot tolerate being reset. Must be called before the hwmod has
  3281. * been set up. Returns 0 upon success or negative error code upon
  3282. * failure.
  3283. */
  3284. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3285. {
  3286. if (!oh)
  3287. return -EINVAL;
  3288. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3289. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3290. oh->name);
  3291. return -EINVAL;
  3292. }
  3293. oh->flags |= HWMOD_INIT_NO_RESET;
  3294. return 0;
  3295. }
  3296. /**
  3297. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3298. * @oh: struct omap_hwmod * containing hwmod mux entries
  3299. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3300. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3301. *
  3302. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3303. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3304. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3305. * this function is not called for a given pad_idx, then the ISR
  3306. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3307. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3308. * the _dynamic or wakeup_ entry: if there are other entries not
  3309. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3310. * entries are NOT COUNTED in the dynamic pad index. This function
  3311. * must be called separately for each pad that requires its interrupt
  3312. * to be re-routed this way. Returns -EINVAL if there is an argument
  3313. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3314. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3315. *
  3316. * XXX This function interface is fragile. Rather than using array
  3317. * indexes, which are subject to unpredictable change, it should be
  3318. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3319. * pad records.
  3320. */
  3321. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3322. {
  3323. int nr_irqs;
  3324. might_sleep();
  3325. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3326. pad_idx >= oh->mux->nr_pads_dynamic)
  3327. return -EINVAL;
  3328. /* Check the number of available mpu_irqs */
  3329. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3330. ;
  3331. if (irq_idx >= nr_irqs)
  3332. return -EINVAL;
  3333. if (!oh->mux->irqs) {
  3334. /* XXX What frees this? */
  3335. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3336. GFP_KERNEL);
  3337. if (!oh->mux->irqs)
  3338. return -ENOMEM;
  3339. }
  3340. oh->mux->irqs[pad_idx] = irq_idx;
  3341. return 0;
  3342. }
  3343. /**
  3344. * omap_hwmod_init - initialize the hwmod code
  3345. *
  3346. * Sets up some function pointers needed by the hwmod code to operate on the
  3347. * currently-booted SoC. Intended to be called once during kernel init
  3348. * before any hwmods are registered. No return value.
  3349. */
  3350. void __init omap_hwmod_init(void)
  3351. {
  3352. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  3353. soc_ops.wait_target_ready = _omap2_wait_target_ready;
  3354. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3355. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3356. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3357. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3358. soc_ops.enable_module = _omap4_enable_module;
  3359. soc_ops.disable_module = _omap4_disable_module;
  3360. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3361. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3362. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3363. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3364. soc_ops.init_clkdm = _init_clkdm;
  3365. } else if (soc_is_am33xx()) {
  3366. soc_ops.enable_module = _am33xx_enable_module;
  3367. soc_ops.disable_module = _am33xx_disable_module;
  3368. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3369. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3370. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3371. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3372. soc_ops.init_clkdm = _init_clkdm;
  3373. } else {
  3374. WARN(1, "omap_hwmod: unknown SoC type\n");
  3375. }
  3376. inited = true;
  3377. }
  3378. /**
  3379. * omap_hwmod_get_main_clk - get pointer to main clock name
  3380. * @oh: struct omap_hwmod *
  3381. *
  3382. * Returns the main clock name assocated with @oh upon success,
  3383. * or NULL if @oh is NULL.
  3384. */
  3385. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3386. {
  3387. if (!oh)
  3388. return NULL;
  3389. return oh->main_clk;
  3390. }