omap2430.c 13 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/io.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/pm_runtime.h>
  36. #include <linux/err.h>
  37. #include "musb_core.h"
  38. #include "omap2430.h"
  39. struct omap2430_glue {
  40. struct device *dev;
  41. struct platform_device *musb;
  42. };
  43. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  44. static struct timer_list musb_idle_timer;
  45. static void musb_do_idle(unsigned long _musb)
  46. {
  47. struct musb *musb = (void *)_musb;
  48. unsigned long flags;
  49. u8 power;
  50. u8 devctl;
  51. spin_lock_irqsave(&musb->lock, flags);
  52. switch (musb->xceiv->state) {
  53. case OTG_STATE_A_WAIT_BCON:
  54. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  55. if (devctl & MUSB_DEVCTL_BDEVICE) {
  56. musb->xceiv->state = OTG_STATE_B_IDLE;
  57. MUSB_DEV_MODE(musb);
  58. } else {
  59. musb->xceiv->state = OTG_STATE_A_IDLE;
  60. MUSB_HST_MODE(musb);
  61. }
  62. break;
  63. case OTG_STATE_A_SUSPEND:
  64. /* finish RESUME signaling? */
  65. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  66. power = musb_readb(musb->mregs, MUSB_POWER);
  67. power &= ~MUSB_POWER_RESUME;
  68. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  69. musb_writeb(musb->mregs, MUSB_POWER, power);
  70. musb->is_active = 1;
  71. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  72. | MUSB_PORT_STAT_RESUME);
  73. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  74. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  75. /* NOTE: it might really be A_WAIT_BCON ... */
  76. musb->xceiv->state = OTG_STATE_A_HOST;
  77. }
  78. break;
  79. case OTG_STATE_A_HOST:
  80. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  81. if (devctl & MUSB_DEVCTL_BDEVICE)
  82. musb->xceiv->state = OTG_STATE_B_IDLE;
  83. else
  84. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  85. default:
  86. break;
  87. }
  88. spin_unlock_irqrestore(&musb->lock, flags);
  89. }
  90. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  91. {
  92. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  93. static unsigned long last_timer;
  94. if (timeout == 0)
  95. timeout = default_timeout;
  96. /* Never idle if active, or when VBUS timeout is not set as host */
  97. if (musb->is_active || ((musb->a_wait_bcon == 0)
  98. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  99. dev_dbg(musb->controller, "%s active, deleting timer\n",
  100. otg_state_string(musb->xceiv->state));
  101. del_timer(&musb_idle_timer);
  102. last_timer = jiffies;
  103. return;
  104. }
  105. if (time_after(last_timer, timeout)) {
  106. if (!timer_pending(&musb_idle_timer))
  107. last_timer = timeout;
  108. else {
  109. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  110. return;
  111. }
  112. }
  113. last_timer = timeout;
  114. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  115. otg_state_string(musb->xceiv->state),
  116. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  117. mod_timer(&musb_idle_timer, timeout);
  118. }
  119. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  120. {
  121. u8 devctl;
  122. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  123. int ret = 1;
  124. /* HDRC controls CPEN, but beware current surges during device
  125. * connect. They can trigger transient overcurrent conditions
  126. * that must be ignored.
  127. */
  128. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  129. if (is_on) {
  130. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  131. /* start the session */
  132. devctl |= MUSB_DEVCTL_SESSION;
  133. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  134. /*
  135. * Wait for the musb to set as A device to enable the
  136. * VBUS
  137. */
  138. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  139. cpu_relax();
  140. if (time_after(jiffies, timeout)) {
  141. dev_err(musb->controller,
  142. "configured as A device timeout");
  143. ret = -EINVAL;
  144. break;
  145. }
  146. }
  147. if (ret && musb->xceiv->set_vbus)
  148. otg_set_vbus(musb->xceiv, 1);
  149. } else {
  150. musb->is_active = 1;
  151. musb->xceiv->default_a = 1;
  152. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  153. devctl |= MUSB_DEVCTL_SESSION;
  154. MUSB_HST_MODE(musb);
  155. }
  156. } else {
  157. musb->is_active = 0;
  158. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  159. * jumping right to B_IDLE...
  160. */
  161. musb->xceiv->default_a = 0;
  162. musb->xceiv->state = OTG_STATE_B_IDLE;
  163. devctl &= ~MUSB_DEVCTL_SESSION;
  164. MUSB_DEV_MODE(musb);
  165. }
  166. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  167. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  168. /* otg %3x conf %08x prcm %08x */ "\n",
  169. otg_state_string(musb->xceiv->state),
  170. musb_readb(musb->mregs, MUSB_DEVCTL));
  171. }
  172. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  173. {
  174. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  175. devctl |= MUSB_DEVCTL_SESSION;
  176. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  177. return 0;
  178. }
  179. static inline void omap2430_low_level_exit(struct musb *musb)
  180. {
  181. u32 l;
  182. /* in any role */
  183. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  184. l |= ENABLEFORCE; /* enable MSTANDBY */
  185. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  186. }
  187. static inline void omap2430_low_level_init(struct musb *musb)
  188. {
  189. u32 l;
  190. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  191. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  192. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  193. }
  194. /* blocking notifier support */
  195. static int musb_otg_notifications(struct notifier_block *nb,
  196. unsigned long event, void *unused)
  197. {
  198. struct musb *musb = container_of(nb, struct musb, nb);
  199. musb->xceiv_event = event;
  200. schedule_work(&musb->otg_notifier_work);
  201. return 0;
  202. }
  203. static void musb_otg_notifier_work(struct work_struct *data_notifier_work)
  204. {
  205. struct musb *musb = container_of(data_notifier_work, struct musb, otg_notifier_work);
  206. struct device *dev = musb->controller;
  207. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  208. struct omap_musb_board_data *data = pdata->board_data;
  209. switch (musb->xceiv_event) {
  210. case USB_EVENT_ID:
  211. dev_dbg(musb->controller, "ID GND\n");
  212. if (!is_otg_enabled(musb) || musb->gadget_driver) {
  213. pm_runtime_get_sync(musb->controller);
  214. otg_init(musb->xceiv);
  215. omap2430_musb_set_vbus(musb, 1);
  216. }
  217. break;
  218. case USB_EVENT_VBUS:
  219. dev_dbg(musb->controller, "VBUS Connect\n");
  220. if (musb->gadget_driver)
  221. pm_runtime_get_sync(musb->controller);
  222. otg_init(musb->xceiv);
  223. break;
  224. case USB_EVENT_NONE:
  225. dev_dbg(musb->controller, "VBUS Disconnect\n");
  226. if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
  227. if (musb->gadget_driver) {
  228. pm_runtime_mark_last_busy(musb->controller);
  229. pm_runtime_put_autosuspend(musb->controller);
  230. }
  231. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  232. if (musb->xceiv->set_vbus)
  233. otg_set_vbus(musb->xceiv, 0);
  234. }
  235. otg_shutdown(musb->xceiv);
  236. break;
  237. default:
  238. dev_dbg(musb->controller, "ID float\n");
  239. }
  240. }
  241. static int omap2430_musb_init(struct musb *musb)
  242. {
  243. u32 l, status = 0;
  244. struct device *dev = musb->controller;
  245. struct musb_hdrc_platform_data *plat = dev->platform_data;
  246. struct omap_musb_board_data *data = plat->board_data;
  247. /* We require some kind of external transceiver, hooked
  248. * up through ULPI. TWL4030-family PMICs include one,
  249. * which needs a driver, drivers aren't always needed.
  250. */
  251. musb->xceiv = otg_get_transceiver();
  252. if (!musb->xceiv) {
  253. pr_err("HS USB OTG: no transceiver configured\n");
  254. return -ENODEV;
  255. }
  256. INIT_WORK(&musb->otg_notifier_work, musb_otg_notifier_work);
  257. status = pm_runtime_get_sync(dev);
  258. if (status < 0) {
  259. dev_err(dev, "pm_runtime_get_sync FAILED");
  260. goto err1;
  261. }
  262. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  263. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  264. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  265. l &= ~ULPI_12PIN; /* Disable ULPI */
  266. l |= UTMI_8BIT; /* Enable UTMI */
  267. } else {
  268. l |= ULPI_12PIN;
  269. }
  270. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  271. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  272. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  273. musb_readl(musb->mregs, OTG_REVISION),
  274. musb_readl(musb->mregs, OTG_SYSCONFIG),
  275. musb_readl(musb->mregs, OTG_SYSSTATUS),
  276. musb_readl(musb->mregs, OTG_INTERFSEL),
  277. musb_readl(musb->mregs, OTG_SIMENABLE));
  278. musb->nb.notifier_call = musb_otg_notifications;
  279. status = otg_register_notifier(musb->xceiv, &musb->nb);
  280. if (status)
  281. dev_dbg(musb->controller, "notification register failed\n");
  282. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  283. return 0;
  284. err1:
  285. return status;
  286. }
  287. static void omap2430_musb_enable(struct musb *musb)
  288. {
  289. u8 devctl;
  290. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  291. struct device *dev = musb->controller;
  292. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  293. struct omap_musb_board_data *data = pdata->board_data;
  294. switch (musb->xceiv->last_event) {
  295. case USB_EVENT_ID:
  296. otg_init(musb->xceiv);
  297. if (data->interface_type != MUSB_INTERFACE_UTMI)
  298. break;
  299. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  300. /* start the session */
  301. devctl |= MUSB_DEVCTL_SESSION;
  302. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  303. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  304. MUSB_DEVCTL_BDEVICE) {
  305. cpu_relax();
  306. if (time_after(jiffies, timeout)) {
  307. dev_err(dev, "configured as A device timeout");
  308. break;
  309. }
  310. }
  311. break;
  312. case USB_EVENT_VBUS:
  313. otg_init(musb->xceiv);
  314. break;
  315. default:
  316. break;
  317. }
  318. }
  319. static void omap2430_musb_disable(struct musb *musb)
  320. {
  321. if (musb->xceiv->last_event)
  322. otg_shutdown(musb->xceiv);
  323. }
  324. static int omap2430_musb_exit(struct musb *musb)
  325. {
  326. del_timer_sync(&musb_idle_timer);
  327. omap2430_low_level_exit(musb);
  328. otg_put_transceiver(musb->xceiv);
  329. return 0;
  330. }
  331. static const struct musb_platform_ops omap2430_ops = {
  332. .init = omap2430_musb_init,
  333. .exit = omap2430_musb_exit,
  334. .set_mode = omap2430_musb_set_mode,
  335. .try_idle = omap2430_musb_try_idle,
  336. .set_vbus = omap2430_musb_set_vbus,
  337. .enable = omap2430_musb_enable,
  338. .disable = omap2430_musb_disable,
  339. };
  340. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  341. static int __init omap2430_probe(struct platform_device *pdev)
  342. {
  343. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  344. struct platform_device *musb;
  345. struct omap2430_glue *glue;
  346. int ret = -ENOMEM;
  347. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  348. if (!glue) {
  349. dev_err(&pdev->dev, "failed to allocate glue context\n");
  350. goto err0;
  351. }
  352. musb = platform_device_alloc("musb-hdrc", -1);
  353. if (!musb) {
  354. dev_err(&pdev->dev, "failed to allocate musb device\n");
  355. goto err1;
  356. }
  357. musb->dev.parent = &pdev->dev;
  358. musb->dev.dma_mask = &omap2430_dmamask;
  359. musb->dev.coherent_dma_mask = omap2430_dmamask;
  360. glue->dev = &pdev->dev;
  361. glue->musb = musb;
  362. pdata->platform_ops = &omap2430_ops;
  363. platform_set_drvdata(pdev, glue);
  364. ret = platform_device_add_resources(musb, pdev->resource,
  365. pdev->num_resources);
  366. if (ret) {
  367. dev_err(&pdev->dev, "failed to add resources\n");
  368. goto err2;
  369. }
  370. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  371. if (ret) {
  372. dev_err(&pdev->dev, "failed to add platform_data\n");
  373. goto err2;
  374. }
  375. ret = platform_device_add(musb);
  376. if (ret) {
  377. dev_err(&pdev->dev, "failed to register musb device\n");
  378. goto err2;
  379. }
  380. pm_runtime_enable(&pdev->dev);
  381. return 0;
  382. err2:
  383. platform_device_put(musb);
  384. err1:
  385. kfree(glue);
  386. err0:
  387. return ret;
  388. }
  389. static int __exit omap2430_remove(struct platform_device *pdev)
  390. {
  391. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  392. platform_device_del(glue->musb);
  393. platform_device_put(glue->musb);
  394. pm_runtime_put(&pdev->dev);
  395. kfree(glue);
  396. return 0;
  397. }
  398. #ifdef CONFIG_PM
  399. static int omap2430_runtime_suspend(struct device *dev)
  400. {
  401. struct omap2430_glue *glue = dev_get_drvdata(dev);
  402. struct musb *musb = glue_to_musb(glue);
  403. musb->context.otg_interfsel = musb_readl(musb->mregs,
  404. OTG_INTERFSEL);
  405. omap2430_low_level_exit(musb);
  406. otg_set_suspend(musb->xceiv, 1);
  407. return 0;
  408. }
  409. static int omap2430_runtime_resume(struct device *dev)
  410. {
  411. struct omap2430_glue *glue = dev_get_drvdata(dev);
  412. struct musb *musb = glue_to_musb(glue);
  413. omap2430_low_level_init(musb);
  414. musb_writel(musb->mregs, OTG_INTERFSEL,
  415. musb->context.otg_interfsel);
  416. otg_set_suspend(musb->xceiv, 0);
  417. return 0;
  418. }
  419. static struct dev_pm_ops omap2430_pm_ops = {
  420. .runtime_suspend = omap2430_runtime_suspend,
  421. .runtime_resume = omap2430_runtime_resume,
  422. };
  423. #define DEV_PM_OPS (&omap2430_pm_ops)
  424. #else
  425. #define DEV_PM_OPS NULL
  426. #endif
  427. static struct platform_driver omap2430_driver = {
  428. .remove = __exit_p(omap2430_remove),
  429. .driver = {
  430. .name = "musb-omap2430",
  431. .pm = DEV_PM_OPS,
  432. },
  433. };
  434. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  435. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  436. MODULE_LICENSE("GPL v2");
  437. static int __init omap2430_init(void)
  438. {
  439. return platform_driver_probe(&omap2430_driver, omap2430_probe);
  440. }
  441. subsys_initcall(omap2430_init);
  442. static void __exit omap2430_exit(void)
  443. {
  444. platform_driver_unregister(&omap2430_driver);
  445. }
  446. module_exit(omap2430_exit);