ehci-fsl.c 18 KB

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  1. /*
  2. * Copyright 2005-2009 MontaVista Software, Inc.
  3. * Copyright 2008 Freescale Semiconductor, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  13. * for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software Foundation,
  17. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
  20. * by Hunter Wu.
  21. * Power Management support by Dave Liu <daveliu@freescale.com>,
  22. * Jerry Huang <Chang-Ming.Huang@freescale.com> and
  23. * Anton Vorontsov <avorontsov@ru.mvista.com>.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/types.h>
  27. #include <linux/delay.h>
  28. #include <linux/pm.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/fsl_devices.h>
  31. #include "ehci-fsl.h"
  32. /* configure so an HC device and id are always provided */
  33. /* always called with process context; sleeping is OK */
  34. /**
  35. * usb_hcd_fsl_probe - initialize FSL-based HCDs
  36. * @drvier: Driver to be used for this HCD
  37. * @pdev: USB Host Controller being probed
  38. * Context: !in_interrupt()
  39. *
  40. * Allocates basic resources for this USB host controller.
  41. *
  42. */
  43. static int usb_hcd_fsl_probe(const struct hc_driver *driver,
  44. struct platform_device *pdev)
  45. {
  46. struct fsl_usb2_platform_data *pdata;
  47. struct usb_hcd *hcd;
  48. struct resource *res;
  49. int irq;
  50. int retval;
  51. pr_debug("initializing FSL-SOC USB Controller\n");
  52. /* Need platform data for setup */
  53. pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
  54. if (!pdata) {
  55. dev_err(&pdev->dev,
  56. "No platform data for %s.\n", dev_name(&pdev->dev));
  57. return -ENODEV;
  58. }
  59. /*
  60. * This is a host mode driver, verify that we're supposed to be
  61. * in host mode.
  62. */
  63. if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  64. (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
  65. (pdata->operating_mode == FSL_USB2_DR_OTG))) {
  66. dev_err(&pdev->dev,
  67. "Non Host Mode configured for %s. Wrong driver linked.\n",
  68. dev_name(&pdev->dev));
  69. return -ENODEV;
  70. }
  71. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  72. if (!res) {
  73. dev_err(&pdev->dev,
  74. "Found HC with no IRQ. Check %s setup!\n",
  75. dev_name(&pdev->dev));
  76. return -ENODEV;
  77. }
  78. irq = res->start;
  79. hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
  80. if (!hcd) {
  81. retval = -ENOMEM;
  82. goto err1;
  83. }
  84. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  85. if (!res) {
  86. dev_err(&pdev->dev,
  87. "Found HC with no register addr. Check %s setup!\n",
  88. dev_name(&pdev->dev));
  89. retval = -ENODEV;
  90. goto err2;
  91. }
  92. hcd->rsrc_start = res->start;
  93. hcd->rsrc_len = resource_size(res);
  94. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  95. driver->description)) {
  96. dev_dbg(&pdev->dev, "controller already in use\n");
  97. retval = -EBUSY;
  98. goto err2;
  99. }
  100. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  101. if (hcd->regs == NULL) {
  102. dev_dbg(&pdev->dev, "error mapping memory\n");
  103. retval = -EFAULT;
  104. goto err3;
  105. }
  106. pdata->regs = hcd->regs;
  107. if (pdata->power_budget)
  108. hcd->power_budget = pdata->power_budget;
  109. /*
  110. * do platform specific init: check the clock, grab/config pins, etc.
  111. */
  112. if (pdata->init && pdata->init(pdev)) {
  113. retval = -ENODEV;
  114. goto err3;
  115. }
  116. /* Enable USB controller, 83xx or 8536 */
  117. if (pdata->have_sysif_regs)
  118. setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
  119. /* Don't need to set host mode here. It will be done by tdi_reset() */
  120. retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
  121. if (retval != 0)
  122. goto err4;
  123. #ifdef CONFIG_USB_OTG
  124. if (pdata->operating_mode == FSL_USB2_DR_OTG) {
  125. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  126. ehci->transceiver = otg_get_transceiver();
  127. dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n",
  128. hcd, ehci, ehci->transceiver);
  129. if (ehci->transceiver) {
  130. retval = otg_set_host(ehci->transceiver,
  131. &ehci_to_hcd(ehci)->self);
  132. if (retval) {
  133. if (ehci->transceiver)
  134. put_device(ehci->transceiver->dev);
  135. goto err4;
  136. }
  137. } else {
  138. dev_err(&pdev->dev, "can't find transceiver\n");
  139. retval = -ENODEV;
  140. goto err4;
  141. }
  142. }
  143. #endif
  144. return retval;
  145. err4:
  146. iounmap(hcd->regs);
  147. err3:
  148. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  149. err2:
  150. usb_put_hcd(hcd);
  151. err1:
  152. dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
  153. if (pdata->exit)
  154. pdata->exit(pdev);
  155. return retval;
  156. }
  157. /* may be called without controller electrically present */
  158. /* may be called with controller, bus, and devices active */
  159. /**
  160. * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
  161. * @dev: USB Host Controller being removed
  162. * Context: !in_interrupt()
  163. *
  164. * Reverses the effect of usb_hcd_fsl_probe().
  165. *
  166. */
  167. static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
  168. struct platform_device *pdev)
  169. {
  170. struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
  171. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  172. if (ehci->transceiver) {
  173. otg_set_host(ehci->transceiver, NULL);
  174. put_device(ehci->transceiver->dev);
  175. }
  176. usb_remove_hcd(hcd);
  177. /*
  178. * do platform specific un-initialization:
  179. * release iomux pins, disable clock, etc.
  180. */
  181. if (pdata->exit)
  182. pdata->exit(pdev);
  183. iounmap(hcd->regs);
  184. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  185. usb_put_hcd(hcd);
  186. }
  187. static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
  188. enum fsl_usb2_phy_modes phy_mode,
  189. unsigned int port_offset)
  190. {
  191. u32 portsc;
  192. portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
  193. portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
  194. switch (phy_mode) {
  195. case FSL_USB2_PHY_ULPI:
  196. portsc |= PORT_PTS_ULPI;
  197. break;
  198. case FSL_USB2_PHY_SERIAL:
  199. portsc |= PORT_PTS_SERIAL;
  200. break;
  201. case FSL_USB2_PHY_UTMI_WIDE:
  202. portsc |= PORT_PTS_PTW;
  203. /* fall through */
  204. case FSL_USB2_PHY_UTMI:
  205. portsc |= PORT_PTS_UTMI;
  206. break;
  207. case FSL_USB2_PHY_NONE:
  208. break;
  209. }
  210. ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
  211. }
  212. static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
  213. {
  214. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  215. struct fsl_usb2_platform_data *pdata;
  216. void __iomem *non_ehci = hcd->regs;
  217. u32 temp;
  218. pdata = hcd->self.controller->platform_data;
  219. /* Enable PHY interface in the control reg. */
  220. if (pdata->have_sysif_regs) {
  221. temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  222. out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
  223. out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
  224. }
  225. #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
  226. /*
  227. * Turn on cache snooping hardware, since some PowerPC platforms
  228. * wholly rely on hardware to deal with cache coherent
  229. */
  230. /* Setup Snooping for all the 4GB space */
  231. /* SNOOP1 starts from 0x0, size 2G */
  232. out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
  233. /* SNOOP2 starts from 0x80000000, size 2G */
  234. out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
  235. #endif
  236. if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  237. (pdata->operating_mode == FSL_USB2_DR_OTG))
  238. ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
  239. if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
  240. unsigned int chip, rev, svr;
  241. svr = mfspr(SPRN_SVR);
  242. chip = svr >> 16;
  243. rev = (svr >> 4) & 0xf;
  244. /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
  245. if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
  246. ehci->has_fsl_port_bug = 1;
  247. if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
  248. ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
  249. if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
  250. ehci_fsl_setup_phy(ehci, pdata->phy_mode, 1);
  251. }
  252. if (pdata->have_sysif_regs) {
  253. #ifdef CONFIG_PPC_85xx
  254. out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
  255. out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
  256. #else
  257. out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
  258. out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
  259. #endif
  260. out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
  261. }
  262. }
  263. /* called after powerup, by probe or system-pm "wakeup" */
  264. static int ehci_fsl_reinit(struct ehci_hcd *ehci)
  265. {
  266. ehci_fsl_usb_setup(ehci);
  267. ehci_port_power(ehci, 0);
  268. return 0;
  269. }
  270. /* called during probe() after chip reset completes */
  271. static int ehci_fsl_setup(struct usb_hcd *hcd)
  272. {
  273. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  274. int retval;
  275. struct fsl_usb2_platform_data *pdata;
  276. struct device *dev;
  277. dev = hcd->self.controller;
  278. pdata = hcd->self.controller->platform_data;
  279. ehci->big_endian_desc = pdata->big_endian_desc;
  280. ehci->big_endian_mmio = pdata->big_endian_mmio;
  281. /* EHCI registers start at offset 0x100 */
  282. ehci->caps = hcd->regs + 0x100;
  283. ehci->regs = hcd->regs + 0x100 +
  284. HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  285. dbg_hcs_params(ehci, "reset");
  286. dbg_hcc_params(ehci, "reset");
  287. /* cache this readonly data; minimize chip reads */
  288. ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
  289. hcd->has_tt = 1;
  290. retval = ehci_halt(ehci);
  291. if (retval)
  292. return retval;
  293. /* data structure init */
  294. retval = ehci_init(hcd);
  295. if (retval)
  296. return retval;
  297. ehci->sbrn = 0x20;
  298. ehci_reset(ehci);
  299. if (of_device_is_compatible(dev->parent->of_node,
  300. "fsl,mpc5121-usb2-dr")) {
  301. /*
  302. * set SBUSCFG:AHBBRST so that control msgs don't
  303. * fail when doing heavy PATA writes.
  304. */
  305. ehci_writel(ehci, SBUSCFG_INCR8,
  306. hcd->regs + FSL_SOC_USB_SBUSCFG);
  307. }
  308. retval = ehci_fsl_reinit(ehci);
  309. return retval;
  310. }
  311. struct ehci_fsl {
  312. struct ehci_hcd ehci;
  313. #ifdef CONFIG_PM
  314. /* Saved USB PHY settings, need to restore after deep sleep. */
  315. u32 usb_ctrl;
  316. #endif
  317. };
  318. #ifdef CONFIG_PM
  319. #ifdef CONFIG_PPC_MPC512x
  320. static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
  321. {
  322. struct usb_hcd *hcd = dev_get_drvdata(dev);
  323. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  324. struct fsl_usb2_platform_data *pdata = dev->platform_data;
  325. u32 tmp;
  326. #ifdef DEBUG
  327. u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
  328. mode &= USBMODE_CM_MASK;
  329. tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
  330. dev_dbg(dev, "suspend=%d already_suspended=%d "
  331. "mode=%d usbcmd %08x\n", pdata->suspended,
  332. pdata->already_suspended, mode, tmp);
  333. #endif
  334. /*
  335. * If the controller is already suspended, then this must be a
  336. * PM suspend. Remember this fact, so that we will leave the
  337. * controller suspended at PM resume time.
  338. */
  339. if (pdata->suspended) {
  340. dev_dbg(dev, "already suspended, leaving early\n");
  341. pdata->already_suspended = 1;
  342. return 0;
  343. }
  344. dev_dbg(dev, "suspending...\n");
  345. ehci->rh_state = EHCI_RH_SUSPENDED;
  346. dev->power.power_state = PMSG_SUSPEND;
  347. /* ignore non-host interrupts */
  348. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  349. /* stop the controller */
  350. tmp = ehci_readl(ehci, &ehci->regs->command);
  351. tmp &= ~CMD_RUN;
  352. ehci_writel(ehci, tmp, &ehci->regs->command);
  353. /* save EHCI registers */
  354. pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
  355. pdata->pm_command &= ~CMD_RUN;
  356. pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
  357. pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
  358. pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
  359. pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
  360. pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
  361. pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
  362. pdata->pm_configured_flag =
  363. ehci_readl(ehci, &ehci->regs->configured_flag);
  364. pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
  365. pdata->pm_usbgenctrl = ehci_readl(ehci,
  366. hcd->regs + FSL_SOC_USB_USBGENCTRL);
  367. /* clear the W1C bits */
  368. pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
  369. pdata->suspended = 1;
  370. /* clear PP to cut power to the port */
  371. tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
  372. tmp &= ~PORT_POWER;
  373. ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
  374. return 0;
  375. }
  376. static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
  377. {
  378. struct usb_hcd *hcd = dev_get_drvdata(dev);
  379. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  380. struct fsl_usb2_platform_data *pdata = dev->platform_data;
  381. u32 tmp;
  382. dev_dbg(dev, "suspend=%d already_suspended=%d\n",
  383. pdata->suspended, pdata->already_suspended);
  384. /*
  385. * If the controller was already suspended at suspend time,
  386. * then don't resume it now.
  387. */
  388. if (pdata->already_suspended) {
  389. dev_dbg(dev, "already suspended, leaving early\n");
  390. pdata->already_suspended = 0;
  391. return 0;
  392. }
  393. if (!pdata->suspended) {
  394. dev_dbg(dev, "not suspended, leaving early\n");
  395. return 0;
  396. }
  397. pdata->suspended = 0;
  398. dev_dbg(dev, "resuming...\n");
  399. /* set host mode */
  400. tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
  401. ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
  402. ehci_writel(ehci, pdata->pm_usbgenctrl,
  403. hcd->regs + FSL_SOC_USB_USBGENCTRL);
  404. ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
  405. hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
  406. ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
  407. /* restore EHCI registers */
  408. ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
  409. ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
  410. ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
  411. ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
  412. ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
  413. ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
  414. ehci_writel(ehci, pdata->pm_configured_flag,
  415. &ehci->regs->configured_flag);
  416. ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
  417. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  418. ehci->rh_state = EHCI_RH_RUNNING;
  419. dev->power.power_state = PMSG_ON;
  420. tmp = ehci_readl(ehci, &ehci->regs->command);
  421. tmp |= CMD_RUN;
  422. ehci_writel(ehci, tmp, &ehci->regs->command);
  423. usb_hcd_resume_root_hub(hcd);
  424. return 0;
  425. }
  426. #else
  427. static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
  428. {
  429. return 0;
  430. }
  431. static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
  432. {
  433. return 0;
  434. }
  435. #endif /* CONFIG_PPC_MPC512x */
  436. static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
  437. {
  438. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  439. return container_of(ehci, struct ehci_fsl, ehci);
  440. }
  441. static int ehci_fsl_drv_suspend(struct device *dev)
  442. {
  443. struct usb_hcd *hcd = dev_get_drvdata(dev);
  444. struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
  445. void __iomem *non_ehci = hcd->regs;
  446. if (of_device_is_compatible(dev->parent->of_node,
  447. "fsl,mpc5121-usb2-dr")) {
  448. return ehci_fsl_mpc512x_drv_suspend(dev);
  449. }
  450. ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
  451. device_may_wakeup(dev));
  452. if (!fsl_deep_sleep())
  453. return 0;
  454. ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  455. return 0;
  456. }
  457. static int ehci_fsl_drv_resume(struct device *dev)
  458. {
  459. struct usb_hcd *hcd = dev_get_drvdata(dev);
  460. struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
  461. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  462. void __iomem *non_ehci = hcd->regs;
  463. if (of_device_is_compatible(dev->parent->of_node,
  464. "fsl,mpc5121-usb2-dr")) {
  465. return ehci_fsl_mpc512x_drv_resume(dev);
  466. }
  467. ehci_prepare_ports_for_controller_resume(ehci);
  468. if (!fsl_deep_sleep())
  469. return 0;
  470. usb_root_hub_lost_power(hcd->self.root_hub);
  471. /* Restore USB PHY settings and enable the controller. */
  472. out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
  473. ehci_reset(ehci);
  474. ehci_fsl_reinit(ehci);
  475. return 0;
  476. }
  477. static int ehci_fsl_drv_restore(struct device *dev)
  478. {
  479. struct usb_hcd *hcd = dev_get_drvdata(dev);
  480. usb_root_hub_lost_power(hcd->self.root_hub);
  481. return 0;
  482. }
  483. static struct dev_pm_ops ehci_fsl_pm_ops = {
  484. .suspend = ehci_fsl_drv_suspend,
  485. .resume = ehci_fsl_drv_resume,
  486. .restore = ehci_fsl_drv_restore,
  487. };
  488. #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
  489. #else
  490. #define EHCI_FSL_PM_OPS NULL
  491. #endif /* CONFIG_PM */
  492. #ifdef CONFIG_USB_OTG
  493. static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
  494. {
  495. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  496. u32 status;
  497. if (!port)
  498. return -EINVAL;
  499. port--;
  500. /* start port reset before HNP protocol time out */
  501. status = readl(&ehci->regs->port_status[port]);
  502. if (!(status & PORT_CONNECT))
  503. return -ENODEV;
  504. /* khubd will finish the reset later */
  505. if (ehci_is_TDI(ehci)) {
  506. writel(PORT_RESET |
  507. (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
  508. &ehci->regs->port_status[port]);
  509. } else {
  510. writel(PORT_RESET, &ehci->regs->port_status[port]);
  511. }
  512. return 0;
  513. }
  514. #else
  515. #define ehci_start_port_reset NULL
  516. #endif /* CONFIG_USB_OTG */
  517. static const struct hc_driver ehci_fsl_hc_driver = {
  518. .description = hcd_name,
  519. .product_desc = "Freescale On-Chip EHCI Host Controller",
  520. .hcd_priv_size = sizeof(struct ehci_fsl),
  521. /*
  522. * generic hardware linkage
  523. */
  524. .irq = ehci_irq,
  525. .flags = HCD_USB2 | HCD_MEMORY,
  526. /*
  527. * basic lifecycle operations
  528. */
  529. .reset = ehci_fsl_setup,
  530. .start = ehci_run,
  531. .stop = ehci_stop,
  532. .shutdown = ehci_shutdown,
  533. /*
  534. * managing i/o requests and associated device resources
  535. */
  536. .urb_enqueue = ehci_urb_enqueue,
  537. .urb_dequeue = ehci_urb_dequeue,
  538. .endpoint_disable = ehci_endpoint_disable,
  539. .endpoint_reset = ehci_endpoint_reset,
  540. /*
  541. * scheduling support
  542. */
  543. .get_frame_number = ehci_get_frame,
  544. /*
  545. * root hub support
  546. */
  547. .hub_status_data = ehci_hub_status_data,
  548. .hub_control = ehci_hub_control,
  549. .bus_suspend = ehci_bus_suspend,
  550. .bus_resume = ehci_bus_resume,
  551. .start_port_reset = ehci_start_port_reset,
  552. .relinquish_port = ehci_relinquish_port,
  553. .port_handed_over = ehci_port_handed_over,
  554. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  555. };
  556. static int ehci_fsl_drv_probe(struct platform_device *pdev)
  557. {
  558. if (usb_disabled())
  559. return -ENODEV;
  560. /* FIXME we only want one one probe() not two */
  561. return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
  562. }
  563. static int ehci_fsl_drv_remove(struct platform_device *pdev)
  564. {
  565. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  566. /* FIXME we only want one one remove() not two */
  567. usb_hcd_fsl_remove(hcd, pdev);
  568. return 0;
  569. }
  570. MODULE_ALIAS("platform:fsl-ehci");
  571. static struct platform_driver ehci_fsl_driver = {
  572. .probe = ehci_fsl_drv_probe,
  573. .remove = ehci_fsl_drv_remove,
  574. .shutdown = usb_hcd_platform_shutdown,
  575. .driver = {
  576. .name = "fsl-ehci",
  577. .pm = EHCI_FSL_PM_OPS,
  578. },
  579. };