e1000_main.c 138 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921
  1. /*******************************************************************************
  2. Intel PRO/1000 Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.2.7-k2"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  69. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  90. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10A4),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  94. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  95. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  100. int e1000_up(struct e1000_adapter *adapter);
  101. void e1000_down(struct e1000_adapter *adapter);
  102. void e1000_reinit_locked(struct e1000_adapter *adapter);
  103. void e1000_reset(struct e1000_adapter *adapter);
  104. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  105. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  106. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  107. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  108. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  109. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  110. struct e1000_tx_ring *txdr);
  111. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  112. struct e1000_rx_ring *rxdr);
  113. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  114. struct e1000_tx_ring *tx_ring);
  115. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  116. struct e1000_rx_ring *rx_ring);
  117. void e1000_update_stats(struct e1000_adapter *adapter);
  118. static int e1000_init_module(void);
  119. static void e1000_exit_module(void);
  120. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  121. static void __devexit e1000_remove(struct pci_dev *pdev);
  122. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  123. static int e1000_sw_init(struct e1000_adapter *adapter);
  124. static int e1000_open(struct net_device *netdev);
  125. static int e1000_close(struct net_device *netdev);
  126. static void e1000_configure_tx(struct e1000_adapter *adapter);
  127. static void e1000_configure_rx(struct e1000_adapter *adapter);
  128. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  129. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  130. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  131. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  132. struct e1000_tx_ring *tx_ring);
  133. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  134. struct e1000_rx_ring *rx_ring);
  135. static void e1000_set_multi(struct net_device *netdev);
  136. static void e1000_update_phy_info(unsigned long data);
  137. static void e1000_watchdog(unsigned long data);
  138. static void e1000_82547_tx_fifo_stall(unsigned long data);
  139. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  140. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  141. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  142. static int e1000_set_mac(struct net_device *netdev, void *p);
  143. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  144. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  145. struct e1000_tx_ring *tx_ring);
  146. #ifdef CONFIG_E1000_NAPI
  147. static int e1000_clean(struct net_device *poll_dev, int *budget);
  148. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring,
  150. int *work_done, int work_to_do);
  151. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  152. struct e1000_rx_ring *rx_ring,
  153. int *work_done, int work_to_do);
  154. #else
  155. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  156. struct e1000_rx_ring *rx_ring);
  157. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  158. struct e1000_rx_ring *rx_ring);
  159. #endif
  160. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  161. struct e1000_rx_ring *rx_ring,
  162. int cleaned_count);
  163. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  164. struct e1000_rx_ring *rx_ring,
  165. int cleaned_count);
  166. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  167. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  168. int cmd);
  169. void e1000_set_ethtool_ops(struct net_device *netdev);
  170. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  171. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  172. static void e1000_tx_timeout(struct net_device *dev);
  173. static void e1000_reset_task(struct net_device *dev);
  174. static void e1000_smartspeed(struct e1000_adapter *adapter);
  175. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  176. struct sk_buff *skb);
  177. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  178. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  179. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  180. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  181. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  182. #ifdef CONFIG_PM
  183. static int e1000_resume(struct pci_dev *pdev);
  184. #endif
  185. static void e1000_shutdown(struct pci_dev *pdev);
  186. #ifdef CONFIG_NET_POLL_CONTROLLER
  187. /* for netdump / net console */
  188. static void e1000_netpoll (struct net_device *netdev);
  189. #endif
  190. extern void e1000_check_options(struct e1000_adapter *adapter);
  191. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  192. pci_channel_state_t state);
  193. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  194. static void e1000_io_resume(struct pci_dev *pdev);
  195. static struct pci_error_handlers e1000_err_handler = {
  196. .error_detected = e1000_io_error_detected,
  197. .slot_reset = e1000_io_slot_reset,
  198. .resume = e1000_io_resume,
  199. };
  200. static struct pci_driver e1000_driver = {
  201. .name = e1000_driver_name,
  202. .id_table = e1000_pci_tbl,
  203. .probe = e1000_probe,
  204. .remove = __devexit_p(e1000_remove),
  205. #ifdef CONFIG_PM
  206. /* Power Managment Hooks */
  207. .suspend = e1000_suspend,
  208. .resume = e1000_resume,
  209. #endif
  210. .shutdown = e1000_shutdown,
  211. .err_handler = &e1000_err_handler
  212. };
  213. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  214. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  215. MODULE_LICENSE("GPL");
  216. MODULE_VERSION(DRV_VERSION);
  217. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  218. module_param(debug, int, 0);
  219. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  220. /**
  221. * e1000_init_module - Driver Registration Routine
  222. *
  223. * e1000_init_module is the first routine called when the driver is
  224. * loaded. All it does is register with the PCI subsystem.
  225. **/
  226. static int __init
  227. e1000_init_module(void)
  228. {
  229. int ret;
  230. printk(KERN_INFO "%s - version %s\n",
  231. e1000_driver_string, e1000_driver_version);
  232. printk(KERN_INFO "%s\n", e1000_copyright);
  233. ret = pci_register_driver(&e1000_driver);
  234. return ret;
  235. }
  236. module_init(e1000_init_module);
  237. /**
  238. * e1000_exit_module - Driver Exit Cleanup Routine
  239. *
  240. * e1000_exit_module is called just before the driver is removed
  241. * from memory.
  242. **/
  243. static void __exit
  244. e1000_exit_module(void)
  245. {
  246. pci_unregister_driver(&e1000_driver);
  247. }
  248. module_exit(e1000_exit_module);
  249. static int e1000_request_irq(struct e1000_adapter *adapter)
  250. {
  251. struct net_device *netdev = adapter->netdev;
  252. int flags, err = 0;
  253. flags = IRQF_SHARED;
  254. #ifdef CONFIG_PCI_MSI
  255. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  256. adapter->have_msi = TRUE;
  257. if ((err = pci_enable_msi(adapter->pdev))) {
  258. DPRINTK(PROBE, ERR,
  259. "Unable to allocate MSI interrupt Error: %d\n", err);
  260. adapter->have_msi = FALSE;
  261. }
  262. }
  263. if (adapter->have_msi)
  264. flags &= ~IRQF_SHARED;
  265. #endif
  266. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  267. netdev->name, netdev)))
  268. DPRINTK(PROBE, ERR,
  269. "Unable to allocate interrupt Error: %d\n", err);
  270. return err;
  271. }
  272. static void e1000_free_irq(struct e1000_adapter *adapter)
  273. {
  274. struct net_device *netdev = adapter->netdev;
  275. free_irq(adapter->pdev->irq, netdev);
  276. #ifdef CONFIG_PCI_MSI
  277. if (adapter->have_msi)
  278. pci_disable_msi(adapter->pdev);
  279. #endif
  280. }
  281. /**
  282. * e1000_irq_disable - Mask off interrupt generation on the NIC
  283. * @adapter: board private structure
  284. **/
  285. static void
  286. e1000_irq_disable(struct e1000_adapter *adapter)
  287. {
  288. atomic_inc(&adapter->irq_sem);
  289. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  290. E1000_WRITE_FLUSH(&adapter->hw);
  291. synchronize_irq(adapter->pdev->irq);
  292. }
  293. /**
  294. * e1000_irq_enable - Enable default interrupt generation settings
  295. * @adapter: board private structure
  296. **/
  297. static void
  298. e1000_irq_enable(struct e1000_adapter *adapter)
  299. {
  300. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  301. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  302. E1000_WRITE_FLUSH(&adapter->hw);
  303. }
  304. }
  305. static void
  306. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  307. {
  308. struct net_device *netdev = adapter->netdev;
  309. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  310. uint16_t old_vid = adapter->mng_vlan_id;
  311. if (adapter->vlgrp) {
  312. if (!adapter->vlgrp->vlan_devices[vid]) {
  313. if (adapter->hw.mng_cookie.status &
  314. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  315. e1000_vlan_rx_add_vid(netdev, vid);
  316. adapter->mng_vlan_id = vid;
  317. } else
  318. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  319. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  320. (vid != old_vid) &&
  321. !adapter->vlgrp->vlan_devices[old_vid])
  322. e1000_vlan_rx_kill_vid(netdev, old_vid);
  323. } else
  324. adapter->mng_vlan_id = vid;
  325. }
  326. }
  327. /**
  328. * e1000_release_hw_control - release control of the h/w to f/w
  329. * @adapter: address of board private structure
  330. *
  331. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  332. * For ASF and Pass Through versions of f/w this means that the
  333. * driver is no longer loaded. For AMT version (only with 82573) i
  334. * of the f/w this means that the netowrk i/f is closed.
  335. *
  336. **/
  337. static void
  338. e1000_release_hw_control(struct e1000_adapter *adapter)
  339. {
  340. uint32_t ctrl_ext;
  341. uint32_t swsm;
  342. uint32_t extcnf;
  343. /* Let firmware taken over control of h/w */
  344. switch (adapter->hw.mac_type) {
  345. case e1000_82571:
  346. case e1000_82572:
  347. case e1000_80003es2lan:
  348. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  349. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  350. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  351. break;
  352. case e1000_82573:
  353. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  354. E1000_WRITE_REG(&adapter->hw, SWSM,
  355. swsm & ~E1000_SWSM_DRV_LOAD);
  356. case e1000_ich8lan:
  357. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  358. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  359. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  360. break;
  361. default:
  362. break;
  363. }
  364. }
  365. /**
  366. * e1000_get_hw_control - get control of the h/w from f/w
  367. * @adapter: address of board private structure
  368. *
  369. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  370. * For ASF and Pass Through versions of f/w this means that
  371. * the driver is loaded. For AMT version (only with 82573)
  372. * of the f/w this means that the netowrk i/f is open.
  373. *
  374. **/
  375. static void
  376. e1000_get_hw_control(struct e1000_adapter *adapter)
  377. {
  378. uint32_t ctrl_ext;
  379. uint32_t swsm;
  380. uint32_t extcnf;
  381. /* Let firmware know the driver has taken over */
  382. switch (adapter->hw.mac_type) {
  383. case e1000_82571:
  384. case e1000_82572:
  385. case e1000_80003es2lan:
  386. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  387. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  388. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  389. break;
  390. case e1000_82573:
  391. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  392. E1000_WRITE_REG(&adapter->hw, SWSM,
  393. swsm | E1000_SWSM_DRV_LOAD);
  394. break;
  395. case e1000_ich8lan:
  396. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  397. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  398. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  399. break;
  400. default:
  401. break;
  402. }
  403. }
  404. int
  405. e1000_up(struct e1000_adapter *adapter)
  406. {
  407. struct net_device *netdev = adapter->netdev;
  408. int i;
  409. /* hardware has been reset, we need to reload some things */
  410. e1000_set_multi(netdev);
  411. e1000_restore_vlan(adapter);
  412. e1000_configure_tx(adapter);
  413. e1000_setup_rctl(adapter);
  414. e1000_configure_rx(adapter);
  415. /* call E1000_DESC_UNUSED which always leaves
  416. * at least 1 descriptor unused to make sure
  417. * next_to_use != next_to_clean */
  418. for (i = 0; i < adapter->num_rx_queues; i++) {
  419. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  420. adapter->alloc_rx_buf(adapter, ring,
  421. E1000_DESC_UNUSED(ring));
  422. }
  423. adapter->tx_queue_len = netdev->tx_queue_len;
  424. mod_timer(&adapter->watchdog_timer, jiffies);
  425. #ifdef CONFIG_E1000_NAPI
  426. netif_poll_enable(netdev);
  427. #endif
  428. e1000_irq_enable(adapter);
  429. return 0;
  430. }
  431. /**
  432. * e1000_power_up_phy - restore link in case the phy was powered down
  433. * @adapter: address of board private structure
  434. *
  435. * The phy may be powered down to save power and turn off link when the
  436. * driver is unloaded and wake on lan is not enabled (among others)
  437. * *** this routine MUST be followed by a call to e1000_reset ***
  438. *
  439. **/
  440. void e1000_power_up_phy(struct e1000_adapter *adapter)
  441. {
  442. uint16_t mii_reg = 0;
  443. /* Just clear the power down bit to wake the phy back up */
  444. if (adapter->hw.media_type == e1000_media_type_copper) {
  445. /* according to the manual, the phy will retain its
  446. * settings across a power-down/up cycle */
  447. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  448. mii_reg &= ~MII_CR_POWER_DOWN;
  449. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  450. }
  451. }
  452. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  453. {
  454. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  455. e1000_check_mng_mode(&adapter->hw);
  456. /* Power down the PHY so no link is implied when interface is down
  457. * The PHY cannot be powered down if any of the following is TRUE
  458. * (a) WoL is enabled
  459. * (b) AMT is active
  460. * (c) SoL/IDER session is active */
  461. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  462. adapter->hw.mac_type != e1000_ich8lan &&
  463. adapter->hw.media_type == e1000_media_type_copper &&
  464. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  465. !mng_mode_enabled &&
  466. !e1000_check_phy_reset_block(&adapter->hw)) {
  467. uint16_t mii_reg = 0;
  468. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  469. mii_reg |= MII_CR_POWER_DOWN;
  470. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  471. mdelay(1);
  472. }
  473. }
  474. void
  475. e1000_down(struct e1000_adapter *adapter)
  476. {
  477. struct net_device *netdev = adapter->netdev;
  478. e1000_irq_disable(adapter);
  479. del_timer_sync(&adapter->tx_fifo_stall_timer);
  480. del_timer_sync(&adapter->watchdog_timer);
  481. del_timer_sync(&adapter->phy_info_timer);
  482. #ifdef CONFIG_E1000_NAPI
  483. netif_poll_disable(netdev);
  484. #endif
  485. netdev->tx_queue_len = adapter->tx_queue_len;
  486. adapter->link_speed = 0;
  487. adapter->link_duplex = 0;
  488. netif_carrier_off(netdev);
  489. netif_stop_queue(netdev);
  490. e1000_reset(adapter);
  491. e1000_clean_all_tx_rings(adapter);
  492. e1000_clean_all_rx_rings(adapter);
  493. }
  494. void
  495. e1000_reinit_locked(struct e1000_adapter *adapter)
  496. {
  497. WARN_ON(in_interrupt());
  498. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  499. msleep(1);
  500. e1000_down(adapter);
  501. e1000_up(adapter);
  502. clear_bit(__E1000_RESETTING, &adapter->flags);
  503. }
  504. void
  505. e1000_reset(struct e1000_adapter *adapter)
  506. {
  507. uint32_t pba, manc;
  508. #ifdef DISABLE_MULR
  509. uint32_t tctl;
  510. #endif
  511. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  512. /* Repartition Pba for greater than 9k mtu
  513. * To take effect CTRL.RST is required.
  514. */
  515. switch (adapter->hw.mac_type) {
  516. case e1000_82547:
  517. case e1000_82547_rev_2:
  518. pba = E1000_PBA_30K;
  519. break;
  520. case e1000_82571:
  521. case e1000_82572:
  522. case e1000_80003es2lan:
  523. pba = E1000_PBA_38K;
  524. break;
  525. case e1000_82573:
  526. pba = E1000_PBA_12K;
  527. break;
  528. case e1000_ich8lan:
  529. pba = E1000_PBA_8K;
  530. break;
  531. default:
  532. pba = E1000_PBA_48K;
  533. break;
  534. }
  535. if ((adapter->hw.mac_type != e1000_82573) &&
  536. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  537. pba -= 8; /* allocate more FIFO for Tx */
  538. if (adapter->hw.mac_type == e1000_82547) {
  539. adapter->tx_fifo_head = 0;
  540. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  541. adapter->tx_fifo_size =
  542. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  543. atomic_set(&adapter->tx_fifo_stall, 0);
  544. }
  545. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  546. /* flow control settings */
  547. /* Set the FC high water mark to 90% of the FIFO size.
  548. * Required to clear last 3 LSB */
  549. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  550. /* We can't use 90% on small FIFOs because the remainder
  551. * would be less than 1 full frame. In this case, we size
  552. * it to allow at least a full frame above the high water
  553. * mark. */
  554. if (pba < E1000_PBA_16K)
  555. fc_high_water_mark = (pba * 1024) - 1600;
  556. adapter->hw.fc_high_water = fc_high_water_mark;
  557. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  558. if (adapter->hw.mac_type == e1000_80003es2lan)
  559. adapter->hw.fc_pause_time = 0xFFFF;
  560. else
  561. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  562. adapter->hw.fc_send_xon = 1;
  563. adapter->hw.fc = adapter->hw.original_fc;
  564. /* Allow time for pending master requests to run */
  565. e1000_reset_hw(&adapter->hw);
  566. if (adapter->hw.mac_type >= e1000_82544)
  567. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  568. #ifdef DISABLE_MULR
  569. /* disable Multiple Reads in Transmit Control Register for debugging */
  570. tctl = E1000_READ_REG(hw, TCTL);
  571. E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
  572. #endif
  573. if (e1000_init_hw(&adapter->hw))
  574. DPRINTK(PROBE, ERR, "Hardware Error\n");
  575. e1000_update_mng_vlan(adapter);
  576. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  577. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  578. e1000_reset_adaptive(&adapter->hw);
  579. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  580. if (!adapter->smart_power_down &&
  581. (adapter->hw.mac_type == e1000_82571 ||
  582. adapter->hw.mac_type == e1000_82572)) {
  583. uint16_t phy_data = 0;
  584. /* speed up time to link by disabling smart power down, ignore
  585. * the return value of this function because there is nothing
  586. * different we would do if it failed */
  587. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  588. &phy_data);
  589. phy_data &= ~IGP02E1000_PM_SPD;
  590. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  591. phy_data);
  592. }
  593. if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) {
  594. manc = E1000_READ_REG(&adapter->hw, MANC);
  595. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  596. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  597. }
  598. }
  599. /**
  600. * e1000_probe - Device Initialization Routine
  601. * @pdev: PCI device information struct
  602. * @ent: entry in e1000_pci_tbl
  603. *
  604. * Returns 0 on success, negative on failure
  605. *
  606. * e1000_probe initializes an adapter identified by a pci_dev structure.
  607. * The OS initialization, configuring of the adapter private structure,
  608. * and a hardware reset occur.
  609. **/
  610. static int __devinit
  611. e1000_probe(struct pci_dev *pdev,
  612. const struct pci_device_id *ent)
  613. {
  614. struct net_device *netdev;
  615. struct e1000_adapter *adapter;
  616. unsigned long mmio_start, mmio_len;
  617. unsigned long flash_start, flash_len;
  618. static int cards_found = 0;
  619. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  620. int i, err, pci_using_dac;
  621. uint16_t eeprom_data = 0;
  622. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  623. if ((err = pci_enable_device(pdev)))
  624. return err;
  625. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  626. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  627. pci_using_dac = 1;
  628. } else {
  629. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  630. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  631. E1000_ERR("No usable DMA configuration, aborting\n");
  632. goto err_dma;
  633. }
  634. pci_using_dac = 0;
  635. }
  636. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  637. goto err_pci_reg;
  638. pci_set_master(pdev);
  639. err = -ENOMEM;
  640. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  641. if (!netdev)
  642. goto err_alloc_etherdev;
  643. SET_MODULE_OWNER(netdev);
  644. SET_NETDEV_DEV(netdev, &pdev->dev);
  645. pci_set_drvdata(pdev, netdev);
  646. adapter = netdev_priv(netdev);
  647. adapter->netdev = netdev;
  648. adapter->pdev = pdev;
  649. adapter->hw.back = adapter;
  650. adapter->msg_enable = (1 << debug) - 1;
  651. mmio_start = pci_resource_start(pdev, BAR_0);
  652. mmio_len = pci_resource_len(pdev, BAR_0);
  653. err = -EIO;
  654. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  655. if (!adapter->hw.hw_addr)
  656. goto err_ioremap;
  657. for (i = BAR_1; i <= BAR_5; i++) {
  658. if (pci_resource_len(pdev, i) == 0)
  659. continue;
  660. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  661. adapter->hw.io_base = pci_resource_start(pdev, i);
  662. break;
  663. }
  664. }
  665. netdev->open = &e1000_open;
  666. netdev->stop = &e1000_close;
  667. netdev->hard_start_xmit = &e1000_xmit_frame;
  668. netdev->get_stats = &e1000_get_stats;
  669. netdev->set_multicast_list = &e1000_set_multi;
  670. netdev->set_mac_address = &e1000_set_mac;
  671. netdev->change_mtu = &e1000_change_mtu;
  672. netdev->do_ioctl = &e1000_ioctl;
  673. e1000_set_ethtool_ops(netdev);
  674. netdev->tx_timeout = &e1000_tx_timeout;
  675. netdev->watchdog_timeo = 5 * HZ;
  676. #ifdef CONFIG_E1000_NAPI
  677. netdev->poll = &e1000_clean;
  678. netdev->weight = 64;
  679. #endif
  680. netdev->vlan_rx_register = e1000_vlan_rx_register;
  681. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  682. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  683. #ifdef CONFIG_NET_POLL_CONTROLLER
  684. netdev->poll_controller = e1000_netpoll;
  685. #endif
  686. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  687. netdev->mem_start = mmio_start;
  688. netdev->mem_end = mmio_start + mmio_len;
  689. netdev->base_addr = adapter->hw.io_base;
  690. adapter->bd_number = cards_found;
  691. /* setup the private structure */
  692. if ((err = e1000_sw_init(adapter)))
  693. goto err_sw_init;
  694. err = -EIO;
  695. /* Flash BAR mapping must happen after e1000_sw_init
  696. * because it depends on mac_type */
  697. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  698. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  699. flash_start = pci_resource_start(pdev, 1);
  700. flash_len = pci_resource_len(pdev, 1);
  701. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  702. if (!adapter->hw.flash_address)
  703. goto err_flashmap;
  704. }
  705. if (e1000_check_phy_reset_block(&adapter->hw))
  706. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  707. if (adapter->hw.mac_type >= e1000_82543) {
  708. netdev->features = NETIF_F_SG |
  709. NETIF_F_HW_CSUM |
  710. NETIF_F_HW_VLAN_TX |
  711. NETIF_F_HW_VLAN_RX |
  712. NETIF_F_HW_VLAN_FILTER;
  713. if (adapter->hw.mac_type == e1000_ich8lan)
  714. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  715. }
  716. #ifdef NETIF_F_TSO
  717. if ((adapter->hw.mac_type >= e1000_82544) &&
  718. (adapter->hw.mac_type != e1000_82547))
  719. netdev->features |= NETIF_F_TSO;
  720. #ifdef NETIF_F_TSO_IPV6
  721. if (adapter->hw.mac_type > e1000_82547_rev_2)
  722. netdev->features |= NETIF_F_TSO_IPV6;
  723. #endif
  724. #endif
  725. if (pci_using_dac)
  726. netdev->features |= NETIF_F_HIGHDMA;
  727. netdev->features |= NETIF_F_LLTX;
  728. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  729. /* initialize eeprom parameters */
  730. if (e1000_init_eeprom_params(&adapter->hw)) {
  731. E1000_ERR("EEPROM initialization failed\n");
  732. goto err_eeprom;
  733. }
  734. /* before reading the EEPROM, reset the controller to
  735. * put the device in a known good starting state */
  736. e1000_reset_hw(&adapter->hw);
  737. /* make sure the EEPROM is good */
  738. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  739. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  740. goto err_eeprom;
  741. }
  742. /* copy the MAC address out of the EEPROM */
  743. if (e1000_read_mac_addr(&adapter->hw))
  744. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  745. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  746. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  747. if (!is_valid_ether_addr(netdev->perm_addr)) {
  748. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  749. goto err_eeprom;
  750. }
  751. e1000_get_bus_info(&adapter->hw);
  752. init_timer(&adapter->tx_fifo_stall_timer);
  753. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  754. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  755. init_timer(&adapter->watchdog_timer);
  756. adapter->watchdog_timer.function = &e1000_watchdog;
  757. adapter->watchdog_timer.data = (unsigned long) adapter;
  758. init_timer(&adapter->phy_info_timer);
  759. adapter->phy_info_timer.function = &e1000_update_phy_info;
  760. adapter->phy_info_timer.data = (unsigned long) adapter;
  761. INIT_WORK(&adapter->reset_task,
  762. (void (*)(void *))e1000_reset_task, netdev);
  763. /* we're going to reset, so assume we have no link for now */
  764. netif_carrier_off(netdev);
  765. netif_stop_queue(netdev);
  766. e1000_check_options(adapter);
  767. /* Initial Wake on LAN setting
  768. * If APM wake is enabled in the EEPROM,
  769. * enable the ACPI Magic Packet filter
  770. */
  771. switch (adapter->hw.mac_type) {
  772. case e1000_82542_rev2_0:
  773. case e1000_82542_rev2_1:
  774. case e1000_82543:
  775. break;
  776. case e1000_82544:
  777. e1000_read_eeprom(&adapter->hw,
  778. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  779. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  780. break;
  781. case e1000_ich8lan:
  782. e1000_read_eeprom(&adapter->hw,
  783. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  784. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  785. break;
  786. case e1000_82546:
  787. case e1000_82546_rev_3:
  788. case e1000_82571:
  789. case e1000_80003es2lan:
  790. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  791. e1000_read_eeprom(&adapter->hw,
  792. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  793. break;
  794. }
  795. /* Fall Through */
  796. default:
  797. e1000_read_eeprom(&adapter->hw,
  798. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  799. break;
  800. }
  801. if (eeprom_data & eeprom_apme_mask)
  802. adapter->eeprom_wol |= E1000_WUFC_MAG;
  803. /* now that we have the eeprom settings, apply the special cases
  804. * where the eeprom may be wrong or the board simply won't support
  805. * wake on lan on a particular port */
  806. switch (pdev->device) {
  807. case E1000_DEV_ID_82546GB_PCIE:
  808. adapter->eeprom_wol = 0;
  809. break;
  810. case E1000_DEV_ID_82546EB_FIBER:
  811. case E1000_DEV_ID_82546GB_FIBER:
  812. case E1000_DEV_ID_82571EB_FIBER:
  813. /* Wake events only supported on port A for dual fiber
  814. * regardless of eeprom setting */
  815. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  816. adapter->eeprom_wol = 0;
  817. break;
  818. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  819. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  820. /* if quad port adapter, disable WoL on all but port A */
  821. if (global_quad_port_a != 0)
  822. adapter->eeprom_wol = 0;
  823. else
  824. adapter->quad_port_a = 1;
  825. /* Reset for multiple quad port adapters */
  826. if (++global_quad_port_a == 4)
  827. global_quad_port_a = 0;
  828. break;
  829. }
  830. /* initialize the wol settings based on the eeprom settings */
  831. adapter->wol = adapter->eeprom_wol;
  832. /* print bus type/speed/width info */
  833. {
  834. struct e1000_hw *hw = &adapter->hw;
  835. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  836. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  837. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  838. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  839. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  840. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  841. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  842. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  843. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  844. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  845. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  846. "32-bit"));
  847. }
  848. for (i = 0; i < 6; i++)
  849. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  850. /* reset the hardware with the new settings */
  851. e1000_reset(adapter);
  852. /* If the controller is 82573 and f/w is AMT, do not set
  853. * DRV_LOAD until the interface is up. For all other cases,
  854. * let the f/w know that the h/w is now under the control
  855. * of the driver. */
  856. if (adapter->hw.mac_type != e1000_82573 ||
  857. !e1000_check_mng_mode(&adapter->hw))
  858. e1000_get_hw_control(adapter);
  859. strcpy(netdev->name, "eth%d");
  860. if ((err = register_netdev(netdev)))
  861. goto err_register;
  862. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  863. cards_found++;
  864. return 0;
  865. err_register:
  866. e1000_release_hw_control(adapter);
  867. err_eeprom:
  868. if (!e1000_check_phy_reset_block(&adapter->hw))
  869. e1000_phy_hw_reset(&adapter->hw);
  870. if (adapter->hw.flash_address)
  871. iounmap(adapter->hw.flash_address);
  872. err_flashmap:
  873. #ifdef CONFIG_E1000_NAPI
  874. for (i = 0; i < adapter->num_rx_queues; i++)
  875. dev_put(&adapter->polling_netdev[i]);
  876. #endif
  877. kfree(adapter->tx_ring);
  878. kfree(adapter->rx_ring);
  879. #ifdef CONFIG_E1000_NAPI
  880. kfree(adapter->polling_netdev);
  881. #endif
  882. err_sw_init:
  883. iounmap(adapter->hw.hw_addr);
  884. err_ioremap:
  885. free_netdev(netdev);
  886. err_alloc_etherdev:
  887. pci_release_regions(pdev);
  888. err_pci_reg:
  889. err_dma:
  890. pci_disable_device(pdev);
  891. return err;
  892. }
  893. /**
  894. * e1000_remove - Device Removal Routine
  895. * @pdev: PCI device information struct
  896. *
  897. * e1000_remove is called by the PCI subsystem to alert the driver
  898. * that it should release a PCI device. The could be caused by a
  899. * Hot-Plug event, or because the driver is going to be removed from
  900. * memory.
  901. **/
  902. static void __devexit
  903. e1000_remove(struct pci_dev *pdev)
  904. {
  905. struct net_device *netdev = pci_get_drvdata(pdev);
  906. struct e1000_adapter *adapter = netdev_priv(netdev);
  907. uint32_t manc;
  908. #ifdef CONFIG_E1000_NAPI
  909. int i;
  910. #endif
  911. flush_scheduled_work();
  912. if (adapter->hw.mac_type < e1000_82571 &&
  913. adapter->hw.media_type == e1000_media_type_copper) {
  914. manc = E1000_READ_REG(&adapter->hw, MANC);
  915. if (manc & E1000_MANC_SMBUS_EN) {
  916. manc |= E1000_MANC_ARP_EN;
  917. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  918. }
  919. }
  920. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  921. * would have already happened in close and is redundant. */
  922. e1000_release_hw_control(adapter);
  923. unregister_netdev(netdev);
  924. #ifdef CONFIG_E1000_NAPI
  925. for (i = 0; i < adapter->num_rx_queues; i++)
  926. dev_put(&adapter->polling_netdev[i]);
  927. #endif
  928. if (!e1000_check_phy_reset_block(&adapter->hw))
  929. e1000_phy_hw_reset(&adapter->hw);
  930. kfree(adapter->tx_ring);
  931. kfree(adapter->rx_ring);
  932. #ifdef CONFIG_E1000_NAPI
  933. kfree(adapter->polling_netdev);
  934. #endif
  935. iounmap(adapter->hw.hw_addr);
  936. if (adapter->hw.flash_address)
  937. iounmap(adapter->hw.flash_address);
  938. pci_release_regions(pdev);
  939. free_netdev(netdev);
  940. pci_disable_device(pdev);
  941. }
  942. /**
  943. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  944. * @adapter: board private structure to initialize
  945. *
  946. * e1000_sw_init initializes the Adapter private data structure.
  947. * Fields are initialized based on PCI device information and
  948. * OS network device settings (MTU size).
  949. **/
  950. static int __devinit
  951. e1000_sw_init(struct e1000_adapter *adapter)
  952. {
  953. struct e1000_hw *hw = &adapter->hw;
  954. struct net_device *netdev = adapter->netdev;
  955. struct pci_dev *pdev = adapter->pdev;
  956. #ifdef CONFIG_E1000_NAPI
  957. int i;
  958. #endif
  959. /* PCI config space info */
  960. hw->vendor_id = pdev->vendor;
  961. hw->device_id = pdev->device;
  962. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  963. hw->subsystem_id = pdev->subsystem_device;
  964. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  965. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  966. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  967. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  968. hw->max_frame_size = netdev->mtu +
  969. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  970. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  971. /* identify the MAC */
  972. if (e1000_set_mac_type(hw)) {
  973. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  974. return -EIO;
  975. }
  976. switch (hw->mac_type) {
  977. default:
  978. break;
  979. case e1000_82541:
  980. case e1000_82547:
  981. case e1000_82541_rev_2:
  982. case e1000_82547_rev_2:
  983. hw->phy_init_script = 1;
  984. break;
  985. }
  986. e1000_set_media_type(hw);
  987. hw->wait_autoneg_complete = FALSE;
  988. hw->tbi_compatibility_en = TRUE;
  989. hw->adaptive_ifs = TRUE;
  990. /* Copper options */
  991. if (hw->media_type == e1000_media_type_copper) {
  992. hw->mdix = AUTO_ALL_MODES;
  993. hw->disable_polarity_correction = FALSE;
  994. hw->master_slave = E1000_MASTER_SLAVE;
  995. }
  996. adapter->num_tx_queues = 1;
  997. adapter->num_rx_queues = 1;
  998. if (e1000_alloc_queues(adapter)) {
  999. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  1000. return -ENOMEM;
  1001. }
  1002. #ifdef CONFIG_E1000_NAPI
  1003. for (i = 0; i < adapter->num_rx_queues; i++) {
  1004. adapter->polling_netdev[i].priv = adapter;
  1005. adapter->polling_netdev[i].poll = &e1000_clean;
  1006. adapter->polling_netdev[i].weight = 64;
  1007. dev_hold(&adapter->polling_netdev[i]);
  1008. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  1009. }
  1010. spin_lock_init(&adapter->tx_queue_lock);
  1011. #endif
  1012. atomic_set(&adapter->irq_sem, 1);
  1013. spin_lock_init(&adapter->stats_lock);
  1014. return 0;
  1015. }
  1016. /**
  1017. * e1000_alloc_queues - Allocate memory for all rings
  1018. * @adapter: board private structure to initialize
  1019. *
  1020. * We allocate one ring per queue at run-time since we don't know the
  1021. * number of queues at compile-time. The polling_netdev array is
  1022. * intended for Multiqueue, but should work fine with a single queue.
  1023. **/
  1024. static int __devinit
  1025. e1000_alloc_queues(struct e1000_adapter *adapter)
  1026. {
  1027. int size;
  1028. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  1029. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  1030. if (!adapter->tx_ring)
  1031. return -ENOMEM;
  1032. memset(adapter->tx_ring, 0, size);
  1033. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  1034. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  1035. if (!adapter->rx_ring) {
  1036. kfree(adapter->tx_ring);
  1037. return -ENOMEM;
  1038. }
  1039. memset(adapter->rx_ring, 0, size);
  1040. #ifdef CONFIG_E1000_NAPI
  1041. size = sizeof(struct net_device) * adapter->num_rx_queues;
  1042. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  1043. if (!adapter->polling_netdev) {
  1044. kfree(adapter->tx_ring);
  1045. kfree(adapter->rx_ring);
  1046. return -ENOMEM;
  1047. }
  1048. memset(adapter->polling_netdev, 0, size);
  1049. #endif
  1050. return E1000_SUCCESS;
  1051. }
  1052. /**
  1053. * e1000_open - Called when a network interface is made active
  1054. * @netdev: network interface device structure
  1055. *
  1056. * Returns 0 on success, negative value on failure
  1057. *
  1058. * The open entry point is called when a network interface is made
  1059. * active by the system (IFF_UP). At this point all resources needed
  1060. * for transmit and receive operations are allocated, the interrupt
  1061. * handler is registered with the OS, the watchdog timer is started,
  1062. * and the stack is notified that the interface is ready.
  1063. **/
  1064. static int
  1065. e1000_open(struct net_device *netdev)
  1066. {
  1067. struct e1000_adapter *adapter = netdev_priv(netdev);
  1068. int err;
  1069. /* disallow open during test */
  1070. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1071. return -EBUSY;
  1072. /* allocate transmit descriptors */
  1073. if ((err = e1000_setup_all_tx_resources(adapter)))
  1074. goto err_setup_tx;
  1075. /* allocate receive descriptors */
  1076. if ((err = e1000_setup_all_rx_resources(adapter)))
  1077. goto err_setup_rx;
  1078. err = e1000_request_irq(adapter);
  1079. if (err)
  1080. goto err_req_irq;
  1081. e1000_power_up_phy(adapter);
  1082. if ((err = e1000_up(adapter)))
  1083. goto err_up;
  1084. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1085. if ((adapter->hw.mng_cookie.status &
  1086. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1087. e1000_update_mng_vlan(adapter);
  1088. }
  1089. /* If AMT is enabled, let the firmware know that the network
  1090. * interface is now open */
  1091. if (adapter->hw.mac_type == e1000_82573 &&
  1092. e1000_check_mng_mode(&adapter->hw))
  1093. e1000_get_hw_control(adapter);
  1094. return E1000_SUCCESS;
  1095. err_up:
  1096. e1000_power_down_phy(adapter);
  1097. e1000_free_irq(adapter);
  1098. err_req_irq:
  1099. e1000_free_all_rx_resources(adapter);
  1100. err_setup_rx:
  1101. e1000_free_all_tx_resources(adapter);
  1102. err_setup_tx:
  1103. e1000_reset(adapter);
  1104. return err;
  1105. }
  1106. /**
  1107. * e1000_close - Disables a network interface
  1108. * @netdev: network interface device structure
  1109. *
  1110. * Returns 0, this is not allowed to fail
  1111. *
  1112. * The close entry point is called when an interface is de-activated
  1113. * by the OS. The hardware is still under the drivers control, but
  1114. * needs to be disabled. A global MAC reset is issued to stop the
  1115. * hardware, and all transmit and receive resources are freed.
  1116. **/
  1117. static int
  1118. e1000_close(struct net_device *netdev)
  1119. {
  1120. struct e1000_adapter *adapter = netdev_priv(netdev);
  1121. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1122. e1000_down(adapter);
  1123. e1000_power_down_phy(adapter);
  1124. e1000_free_irq(adapter);
  1125. e1000_free_all_tx_resources(adapter);
  1126. e1000_free_all_rx_resources(adapter);
  1127. if ((adapter->hw.mng_cookie.status &
  1128. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1129. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1130. }
  1131. /* If AMT is enabled, let the firmware know that the network
  1132. * interface is now closed */
  1133. if (adapter->hw.mac_type == e1000_82573 &&
  1134. e1000_check_mng_mode(&adapter->hw))
  1135. e1000_release_hw_control(adapter);
  1136. return 0;
  1137. }
  1138. /**
  1139. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1140. * @adapter: address of board private structure
  1141. * @start: address of beginning of memory
  1142. * @len: length of memory
  1143. **/
  1144. static boolean_t
  1145. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1146. void *start, unsigned long len)
  1147. {
  1148. unsigned long begin = (unsigned long) start;
  1149. unsigned long end = begin + len;
  1150. /* First rev 82545 and 82546 need to not allow any memory
  1151. * write location to cross 64k boundary due to errata 23 */
  1152. if (adapter->hw.mac_type == e1000_82545 ||
  1153. adapter->hw.mac_type == e1000_82546) {
  1154. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1155. }
  1156. return TRUE;
  1157. }
  1158. /**
  1159. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1160. * @adapter: board private structure
  1161. * @txdr: tx descriptor ring (for a specific queue) to setup
  1162. *
  1163. * Return 0 on success, negative on failure
  1164. **/
  1165. static int
  1166. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1167. struct e1000_tx_ring *txdr)
  1168. {
  1169. struct pci_dev *pdev = adapter->pdev;
  1170. int size;
  1171. size = sizeof(struct e1000_buffer) * txdr->count;
  1172. txdr->buffer_info = vmalloc(size);
  1173. if (!txdr->buffer_info) {
  1174. DPRINTK(PROBE, ERR,
  1175. "Unable to allocate memory for the transmit descriptor ring\n");
  1176. return -ENOMEM;
  1177. }
  1178. memset(txdr->buffer_info, 0, size);
  1179. /* round up to nearest 4K */
  1180. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1181. E1000_ROUNDUP(txdr->size, 4096);
  1182. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1183. if (!txdr->desc) {
  1184. setup_tx_desc_die:
  1185. vfree(txdr->buffer_info);
  1186. DPRINTK(PROBE, ERR,
  1187. "Unable to allocate memory for the transmit descriptor ring\n");
  1188. return -ENOMEM;
  1189. }
  1190. /* Fix for errata 23, can't cross 64kB boundary */
  1191. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1192. void *olddesc = txdr->desc;
  1193. dma_addr_t olddma = txdr->dma;
  1194. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1195. "at %p\n", txdr->size, txdr->desc);
  1196. /* Try again, without freeing the previous */
  1197. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1198. /* Failed allocation, critical failure */
  1199. if (!txdr->desc) {
  1200. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1201. goto setup_tx_desc_die;
  1202. }
  1203. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1204. /* give up */
  1205. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1206. txdr->dma);
  1207. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1208. DPRINTK(PROBE, ERR,
  1209. "Unable to allocate aligned memory "
  1210. "for the transmit descriptor ring\n");
  1211. vfree(txdr->buffer_info);
  1212. return -ENOMEM;
  1213. } else {
  1214. /* Free old allocation, new allocation was successful */
  1215. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1216. }
  1217. }
  1218. memset(txdr->desc, 0, txdr->size);
  1219. txdr->next_to_use = 0;
  1220. txdr->next_to_clean = 0;
  1221. spin_lock_init(&txdr->tx_lock);
  1222. return 0;
  1223. }
  1224. /**
  1225. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1226. * (Descriptors) for all queues
  1227. * @adapter: board private structure
  1228. *
  1229. * Return 0 on success, negative on failure
  1230. **/
  1231. int
  1232. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1233. {
  1234. int i, err = 0;
  1235. for (i = 0; i < adapter->num_tx_queues; i++) {
  1236. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1237. if (err) {
  1238. DPRINTK(PROBE, ERR,
  1239. "Allocation for Tx Queue %u failed\n", i);
  1240. for (i-- ; i >= 0; i--)
  1241. e1000_free_tx_resources(adapter,
  1242. &adapter->tx_ring[i]);
  1243. break;
  1244. }
  1245. }
  1246. return err;
  1247. }
  1248. /**
  1249. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1250. * @adapter: board private structure
  1251. *
  1252. * Configure the Tx unit of the MAC after a reset.
  1253. **/
  1254. static void
  1255. e1000_configure_tx(struct e1000_adapter *adapter)
  1256. {
  1257. uint64_t tdba;
  1258. struct e1000_hw *hw = &adapter->hw;
  1259. uint32_t tdlen, tctl, tipg, tarc;
  1260. uint32_t ipgr1, ipgr2;
  1261. /* Setup the HW Tx Head and Tail descriptor pointers */
  1262. switch (adapter->num_tx_queues) {
  1263. case 1:
  1264. default:
  1265. tdba = adapter->tx_ring[0].dma;
  1266. tdlen = adapter->tx_ring[0].count *
  1267. sizeof(struct e1000_tx_desc);
  1268. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1269. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1270. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1271. E1000_WRITE_REG(hw, TDT, 0);
  1272. E1000_WRITE_REG(hw, TDH, 0);
  1273. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  1274. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  1275. break;
  1276. }
  1277. /* Set the default values for the Tx Inter Packet Gap timer */
  1278. if (hw->media_type == e1000_media_type_fiber ||
  1279. hw->media_type == e1000_media_type_internal_serdes)
  1280. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1281. else
  1282. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1283. switch (hw->mac_type) {
  1284. case e1000_82542_rev2_0:
  1285. case e1000_82542_rev2_1:
  1286. tipg = DEFAULT_82542_TIPG_IPGT;
  1287. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1288. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1289. break;
  1290. case e1000_80003es2lan:
  1291. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1292. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1293. break;
  1294. default:
  1295. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1296. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1297. break;
  1298. }
  1299. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1300. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1301. E1000_WRITE_REG(hw, TIPG, tipg);
  1302. /* Set the Tx Interrupt Delay register */
  1303. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1304. if (hw->mac_type >= e1000_82540)
  1305. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1306. /* Program the Transmit Control Register */
  1307. tctl = E1000_READ_REG(hw, TCTL);
  1308. tctl &= ~E1000_TCTL_CT;
  1309. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1310. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1311. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1312. tarc = E1000_READ_REG(hw, TARC0);
  1313. tarc |= (1 << 21);
  1314. E1000_WRITE_REG(hw, TARC0, tarc);
  1315. } else if (hw->mac_type == e1000_80003es2lan) {
  1316. tarc = E1000_READ_REG(hw, TARC0);
  1317. tarc |= 1;
  1318. E1000_WRITE_REG(hw, TARC0, tarc);
  1319. tarc = E1000_READ_REG(hw, TARC1);
  1320. tarc |= 1;
  1321. E1000_WRITE_REG(hw, TARC1, tarc);
  1322. }
  1323. e1000_config_collision_dist(hw);
  1324. /* Setup Transmit Descriptor Settings for eop descriptor */
  1325. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1326. E1000_TXD_CMD_IFCS;
  1327. if (hw->mac_type < e1000_82543)
  1328. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1329. else
  1330. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1331. /* Cache if we're 82544 running in PCI-X because we'll
  1332. * need this to apply a workaround later in the send path. */
  1333. if (hw->mac_type == e1000_82544 &&
  1334. hw->bus_type == e1000_bus_type_pcix)
  1335. adapter->pcix_82544 = 1;
  1336. E1000_WRITE_REG(hw, TCTL, tctl);
  1337. }
  1338. /**
  1339. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1340. * @adapter: board private structure
  1341. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1342. *
  1343. * Returns 0 on success, negative on failure
  1344. **/
  1345. static int
  1346. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1347. struct e1000_rx_ring *rxdr)
  1348. {
  1349. struct pci_dev *pdev = adapter->pdev;
  1350. int size, desc_len;
  1351. size = sizeof(struct e1000_buffer) * rxdr->count;
  1352. rxdr->buffer_info = vmalloc(size);
  1353. if (!rxdr->buffer_info) {
  1354. DPRINTK(PROBE, ERR,
  1355. "Unable to allocate memory for the receive descriptor ring\n");
  1356. return -ENOMEM;
  1357. }
  1358. memset(rxdr->buffer_info, 0, size);
  1359. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1360. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1361. if (!rxdr->ps_page) {
  1362. vfree(rxdr->buffer_info);
  1363. DPRINTK(PROBE, ERR,
  1364. "Unable to allocate memory for the receive descriptor ring\n");
  1365. return -ENOMEM;
  1366. }
  1367. memset(rxdr->ps_page, 0, size);
  1368. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1369. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1370. if (!rxdr->ps_page_dma) {
  1371. vfree(rxdr->buffer_info);
  1372. kfree(rxdr->ps_page);
  1373. DPRINTK(PROBE, ERR,
  1374. "Unable to allocate memory for the receive descriptor ring\n");
  1375. return -ENOMEM;
  1376. }
  1377. memset(rxdr->ps_page_dma, 0, size);
  1378. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1379. desc_len = sizeof(struct e1000_rx_desc);
  1380. else
  1381. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1382. /* Round up to nearest 4K */
  1383. rxdr->size = rxdr->count * desc_len;
  1384. E1000_ROUNDUP(rxdr->size, 4096);
  1385. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1386. if (!rxdr->desc) {
  1387. DPRINTK(PROBE, ERR,
  1388. "Unable to allocate memory for the receive descriptor ring\n");
  1389. setup_rx_desc_die:
  1390. vfree(rxdr->buffer_info);
  1391. kfree(rxdr->ps_page);
  1392. kfree(rxdr->ps_page_dma);
  1393. return -ENOMEM;
  1394. }
  1395. /* Fix for errata 23, can't cross 64kB boundary */
  1396. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1397. void *olddesc = rxdr->desc;
  1398. dma_addr_t olddma = rxdr->dma;
  1399. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1400. "at %p\n", rxdr->size, rxdr->desc);
  1401. /* Try again, without freeing the previous */
  1402. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1403. /* Failed allocation, critical failure */
  1404. if (!rxdr->desc) {
  1405. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1406. DPRINTK(PROBE, ERR,
  1407. "Unable to allocate memory "
  1408. "for the receive descriptor ring\n");
  1409. goto setup_rx_desc_die;
  1410. }
  1411. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1412. /* give up */
  1413. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1414. rxdr->dma);
  1415. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1416. DPRINTK(PROBE, ERR,
  1417. "Unable to allocate aligned memory "
  1418. "for the receive descriptor ring\n");
  1419. goto setup_rx_desc_die;
  1420. } else {
  1421. /* Free old allocation, new allocation was successful */
  1422. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1423. }
  1424. }
  1425. memset(rxdr->desc, 0, rxdr->size);
  1426. rxdr->next_to_clean = 0;
  1427. rxdr->next_to_use = 0;
  1428. return 0;
  1429. }
  1430. /**
  1431. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1432. * (Descriptors) for all queues
  1433. * @adapter: board private structure
  1434. *
  1435. * Return 0 on success, negative on failure
  1436. **/
  1437. int
  1438. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1439. {
  1440. int i, err = 0;
  1441. for (i = 0; i < adapter->num_rx_queues; i++) {
  1442. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1443. if (err) {
  1444. DPRINTK(PROBE, ERR,
  1445. "Allocation for Rx Queue %u failed\n", i);
  1446. for (i-- ; i >= 0; i--)
  1447. e1000_free_rx_resources(adapter,
  1448. &adapter->rx_ring[i]);
  1449. break;
  1450. }
  1451. }
  1452. return err;
  1453. }
  1454. /**
  1455. * e1000_setup_rctl - configure the receive control registers
  1456. * @adapter: Board private structure
  1457. **/
  1458. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1459. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1460. static void
  1461. e1000_setup_rctl(struct e1000_adapter *adapter)
  1462. {
  1463. uint32_t rctl, rfctl;
  1464. uint32_t psrctl = 0;
  1465. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1466. uint32_t pages = 0;
  1467. #endif
  1468. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1469. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1470. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1471. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1472. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1473. if (adapter->hw.tbi_compatibility_on == 1)
  1474. rctl |= E1000_RCTL_SBP;
  1475. else
  1476. rctl &= ~E1000_RCTL_SBP;
  1477. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1478. rctl &= ~E1000_RCTL_LPE;
  1479. else
  1480. rctl |= E1000_RCTL_LPE;
  1481. /* Setup buffer sizes */
  1482. rctl &= ~E1000_RCTL_SZ_4096;
  1483. rctl |= E1000_RCTL_BSEX;
  1484. switch (adapter->rx_buffer_len) {
  1485. case E1000_RXBUFFER_256:
  1486. rctl |= E1000_RCTL_SZ_256;
  1487. rctl &= ~E1000_RCTL_BSEX;
  1488. break;
  1489. case E1000_RXBUFFER_512:
  1490. rctl |= E1000_RCTL_SZ_512;
  1491. rctl &= ~E1000_RCTL_BSEX;
  1492. break;
  1493. case E1000_RXBUFFER_1024:
  1494. rctl |= E1000_RCTL_SZ_1024;
  1495. rctl &= ~E1000_RCTL_BSEX;
  1496. break;
  1497. case E1000_RXBUFFER_2048:
  1498. default:
  1499. rctl |= E1000_RCTL_SZ_2048;
  1500. rctl &= ~E1000_RCTL_BSEX;
  1501. break;
  1502. case E1000_RXBUFFER_4096:
  1503. rctl |= E1000_RCTL_SZ_4096;
  1504. break;
  1505. case E1000_RXBUFFER_8192:
  1506. rctl |= E1000_RCTL_SZ_8192;
  1507. break;
  1508. case E1000_RXBUFFER_16384:
  1509. rctl |= E1000_RCTL_SZ_16384;
  1510. break;
  1511. }
  1512. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1513. /* 82571 and greater support packet-split where the protocol
  1514. * header is placed in skb->data and the packet data is
  1515. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1516. * In the case of a non-split, skb->data is linearly filled,
  1517. * followed by the page buffers. Therefore, skb->data is
  1518. * sized to hold the largest protocol header.
  1519. */
  1520. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1521. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1522. PAGE_SIZE <= 16384)
  1523. adapter->rx_ps_pages = pages;
  1524. else
  1525. adapter->rx_ps_pages = 0;
  1526. #endif
  1527. if (adapter->rx_ps_pages) {
  1528. /* Configure extra packet-split registers */
  1529. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1530. rfctl |= E1000_RFCTL_EXTEN;
  1531. /* disable IPv6 packet split support */
  1532. rfctl |= E1000_RFCTL_IPV6_DIS;
  1533. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1534. rctl |= E1000_RCTL_DTYP_PS;
  1535. psrctl |= adapter->rx_ps_bsize0 >>
  1536. E1000_PSRCTL_BSIZE0_SHIFT;
  1537. switch (adapter->rx_ps_pages) {
  1538. case 3:
  1539. psrctl |= PAGE_SIZE <<
  1540. E1000_PSRCTL_BSIZE3_SHIFT;
  1541. case 2:
  1542. psrctl |= PAGE_SIZE <<
  1543. E1000_PSRCTL_BSIZE2_SHIFT;
  1544. case 1:
  1545. psrctl |= PAGE_SIZE >>
  1546. E1000_PSRCTL_BSIZE1_SHIFT;
  1547. break;
  1548. }
  1549. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1550. }
  1551. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1552. }
  1553. /**
  1554. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1555. * @adapter: board private structure
  1556. *
  1557. * Configure the Rx unit of the MAC after a reset.
  1558. **/
  1559. static void
  1560. e1000_configure_rx(struct e1000_adapter *adapter)
  1561. {
  1562. uint64_t rdba;
  1563. struct e1000_hw *hw = &adapter->hw;
  1564. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1565. if (adapter->rx_ps_pages) {
  1566. /* this is a 32 byte descriptor */
  1567. rdlen = adapter->rx_ring[0].count *
  1568. sizeof(union e1000_rx_desc_packet_split);
  1569. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1570. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1571. } else {
  1572. rdlen = adapter->rx_ring[0].count *
  1573. sizeof(struct e1000_rx_desc);
  1574. adapter->clean_rx = e1000_clean_rx_irq;
  1575. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1576. }
  1577. /* disable receives while setting up the descriptors */
  1578. rctl = E1000_READ_REG(hw, RCTL);
  1579. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1580. /* set the Receive Delay Timer Register */
  1581. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1582. if (hw->mac_type >= e1000_82540) {
  1583. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1584. if (adapter->itr > 1)
  1585. E1000_WRITE_REG(hw, ITR,
  1586. 1000000000 / (adapter->itr * 256));
  1587. }
  1588. if (hw->mac_type >= e1000_82571) {
  1589. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1590. /* Reset delay timers after every interrupt */
  1591. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1592. #ifdef CONFIG_E1000_NAPI
  1593. /* Auto-Mask interrupts upon ICR read. */
  1594. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1595. #endif
  1596. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1597. E1000_WRITE_REG(hw, IAM, ~0);
  1598. E1000_WRITE_FLUSH(hw);
  1599. }
  1600. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1601. * the Base and Length of the Rx Descriptor Ring */
  1602. switch (adapter->num_rx_queues) {
  1603. case 1:
  1604. default:
  1605. rdba = adapter->rx_ring[0].dma;
  1606. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1607. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1608. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1609. E1000_WRITE_REG(hw, RDT, 0);
  1610. E1000_WRITE_REG(hw, RDH, 0);
  1611. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
  1612. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
  1613. break;
  1614. }
  1615. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1616. if (hw->mac_type >= e1000_82543) {
  1617. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1618. if (adapter->rx_csum == TRUE) {
  1619. rxcsum |= E1000_RXCSUM_TUOFL;
  1620. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1621. * Must be used in conjunction with packet-split. */
  1622. if ((hw->mac_type >= e1000_82571) &&
  1623. (adapter->rx_ps_pages)) {
  1624. rxcsum |= E1000_RXCSUM_IPPCSE;
  1625. }
  1626. } else {
  1627. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1628. /* don't need to clear IPPCSE as it defaults to 0 */
  1629. }
  1630. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1631. }
  1632. /* Enable Receives */
  1633. E1000_WRITE_REG(hw, RCTL, rctl);
  1634. }
  1635. /**
  1636. * e1000_free_tx_resources - Free Tx Resources per Queue
  1637. * @adapter: board private structure
  1638. * @tx_ring: Tx descriptor ring for a specific queue
  1639. *
  1640. * Free all transmit software resources
  1641. **/
  1642. static void
  1643. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1644. struct e1000_tx_ring *tx_ring)
  1645. {
  1646. struct pci_dev *pdev = adapter->pdev;
  1647. e1000_clean_tx_ring(adapter, tx_ring);
  1648. vfree(tx_ring->buffer_info);
  1649. tx_ring->buffer_info = NULL;
  1650. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1651. tx_ring->desc = NULL;
  1652. }
  1653. /**
  1654. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1655. * @adapter: board private structure
  1656. *
  1657. * Free all transmit software resources
  1658. **/
  1659. void
  1660. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1661. {
  1662. int i;
  1663. for (i = 0; i < adapter->num_tx_queues; i++)
  1664. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1665. }
  1666. static void
  1667. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1668. struct e1000_buffer *buffer_info)
  1669. {
  1670. if (buffer_info->dma) {
  1671. pci_unmap_page(adapter->pdev,
  1672. buffer_info->dma,
  1673. buffer_info->length,
  1674. PCI_DMA_TODEVICE);
  1675. }
  1676. if (buffer_info->skb)
  1677. dev_kfree_skb_any(buffer_info->skb);
  1678. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1679. }
  1680. /**
  1681. * e1000_clean_tx_ring - Free Tx Buffers
  1682. * @adapter: board private structure
  1683. * @tx_ring: ring to be cleaned
  1684. **/
  1685. static void
  1686. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1687. struct e1000_tx_ring *tx_ring)
  1688. {
  1689. struct e1000_buffer *buffer_info;
  1690. unsigned long size;
  1691. unsigned int i;
  1692. /* Free all the Tx ring sk_buffs */
  1693. for (i = 0; i < tx_ring->count; i++) {
  1694. buffer_info = &tx_ring->buffer_info[i];
  1695. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1696. }
  1697. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1698. memset(tx_ring->buffer_info, 0, size);
  1699. /* Zero out the descriptor ring */
  1700. memset(tx_ring->desc, 0, tx_ring->size);
  1701. tx_ring->next_to_use = 0;
  1702. tx_ring->next_to_clean = 0;
  1703. tx_ring->last_tx_tso = 0;
  1704. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1705. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1706. }
  1707. /**
  1708. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1709. * @adapter: board private structure
  1710. **/
  1711. static void
  1712. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1713. {
  1714. int i;
  1715. for (i = 0; i < adapter->num_tx_queues; i++)
  1716. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1717. }
  1718. /**
  1719. * e1000_free_rx_resources - Free Rx Resources
  1720. * @adapter: board private structure
  1721. * @rx_ring: ring to clean the resources from
  1722. *
  1723. * Free all receive software resources
  1724. **/
  1725. static void
  1726. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1727. struct e1000_rx_ring *rx_ring)
  1728. {
  1729. struct pci_dev *pdev = adapter->pdev;
  1730. e1000_clean_rx_ring(adapter, rx_ring);
  1731. vfree(rx_ring->buffer_info);
  1732. rx_ring->buffer_info = NULL;
  1733. kfree(rx_ring->ps_page);
  1734. rx_ring->ps_page = NULL;
  1735. kfree(rx_ring->ps_page_dma);
  1736. rx_ring->ps_page_dma = NULL;
  1737. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1738. rx_ring->desc = NULL;
  1739. }
  1740. /**
  1741. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1742. * @adapter: board private structure
  1743. *
  1744. * Free all receive software resources
  1745. **/
  1746. void
  1747. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1748. {
  1749. int i;
  1750. for (i = 0; i < adapter->num_rx_queues; i++)
  1751. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1752. }
  1753. /**
  1754. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1755. * @adapter: board private structure
  1756. * @rx_ring: ring to free buffers from
  1757. **/
  1758. static void
  1759. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1760. struct e1000_rx_ring *rx_ring)
  1761. {
  1762. struct e1000_buffer *buffer_info;
  1763. struct e1000_ps_page *ps_page;
  1764. struct e1000_ps_page_dma *ps_page_dma;
  1765. struct pci_dev *pdev = adapter->pdev;
  1766. unsigned long size;
  1767. unsigned int i, j;
  1768. /* Free all the Rx ring sk_buffs */
  1769. for (i = 0; i < rx_ring->count; i++) {
  1770. buffer_info = &rx_ring->buffer_info[i];
  1771. if (buffer_info->skb) {
  1772. pci_unmap_single(pdev,
  1773. buffer_info->dma,
  1774. buffer_info->length,
  1775. PCI_DMA_FROMDEVICE);
  1776. dev_kfree_skb(buffer_info->skb);
  1777. buffer_info->skb = NULL;
  1778. }
  1779. ps_page = &rx_ring->ps_page[i];
  1780. ps_page_dma = &rx_ring->ps_page_dma[i];
  1781. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1782. if (!ps_page->ps_page[j]) break;
  1783. pci_unmap_page(pdev,
  1784. ps_page_dma->ps_page_dma[j],
  1785. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1786. ps_page_dma->ps_page_dma[j] = 0;
  1787. put_page(ps_page->ps_page[j]);
  1788. ps_page->ps_page[j] = NULL;
  1789. }
  1790. }
  1791. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1792. memset(rx_ring->buffer_info, 0, size);
  1793. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1794. memset(rx_ring->ps_page, 0, size);
  1795. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1796. memset(rx_ring->ps_page_dma, 0, size);
  1797. /* Zero out the descriptor ring */
  1798. memset(rx_ring->desc, 0, rx_ring->size);
  1799. rx_ring->next_to_clean = 0;
  1800. rx_ring->next_to_use = 0;
  1801. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1802. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1803. }
  1804. /**
  1805. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1806. * @adapter: board private structure
  1807. **/
  1808. static void
  1809. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1810. {
  1811. int i;
  1812. for (i = 0; i < adapter->num_rx_queues; i++)
  1813. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1814. }
  1815. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1816. * and memory write and invalidate disabled for certain operations
  1817. */
  1818. static void
  1819. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1820. {
  1821. struct net_device *netdev = adapter->netdev;
  1822. uint32_t rctl;
  1823. e1000_pci_clear_mwi(&adapter->hw);
  1824. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1825. rctl |= E1000_RCTL_RST;
  1826. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1827. E1000_WRITE_FLUSH(&adapter->hw);
  1828. mdelay(5);
  1829. if (netif_running(netdev))
  1830. e1000_clean_all_rx_rings(adapter);
  1831. }
  1832. static void
  1833. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1834. {
  1835. struct net_device *netdev = adapter->netdev;
  1836. uint32_t rctl;
  1837. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1838. rctl &= ~E1000_RCTL_RST;
  1839. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1840. E1000_WRITE_FLUSH(&adapter->hw);
  1841. mdelay(5);
  1842. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1843. e1000_pci_set_mwi(&adapter->hw);
  1844. if (netif_running(netdev)) {
  1845. /* No need to loop, because 82542 supports only 1 queue */
  1846. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1847. e1000_configure_rx(adapter);
  1848. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1849. }
  1850. }
  1851. /**
  1852. * e1000_set_mac - Change the Ethernet Address of the NIC
  1853. * @netdev: network interface device structure
  1854. * @p: pointer to an address structure
  1855. *
  1856. * Returns 0 on success, negative on failure
  1857. **/
  1858. static int
  1859. e1000_set_mac(struct net_device *netdev, void *p)
  1860. {
  1861. struct e1000_adapter *adapter = netdev_priv(netdev);
  1862. struct sockaddr *addr = p;
  1863. if (!is_valid_ether_addr(addr->sa_data))
  1864. return -EADDRNOTAVAIL;
  1865. /* 82542 2.0 needs to be in reset to write receive address registers */
  1866. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1867. e1000_enter_82542_rst(adapter);
  1868. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1869. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1870. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1871. /* With 82571 controllers, LAA may be overwritten (with the default)
  1872. * due to controller reset from the other port. */
  1873. if (adapter->hw.mac_type == e1000_82571) {
  1874. /* activate the work around */
  1875. adapter->hw.laa_is_present = 1;
  1876. /* Hold a copy of the LAA in RAR[14] This is done so that
  1877. * between the time RAR[0] gets clobbered and the time it
  1878. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1879. * of the RARs and no incoming packets directed to this port
  1880. * are dropped. Eventaully the LAA will be in RAR[0] and
  1881. * RAR[14] */
  1882. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1883. E1000_RAR_ENTRIES - 1);
  1884. }
  1885. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1886. e1000_leave_82542_rst(adapter);
  1887. return 0;
  1888. }
  1889. /**
  1890. * e1000_set_multi - Multicast and Promiscuous mode set
  1891. * @netdev: network interface device structure
  1892. *
  1893. * The set_multi entry point is called whenever the multicast address
  1894. * list or the network interface flags are updated. This routine is
  1895. * responsible for configuring the hardware for proper multicast,
  1896. * promiscuous mode, and all-multi behavior.
  1897. **/
  1898. static void
  1899. e1000_set_multi(struct net_device *netdev)
  1900. {
  1901. struct e1000_adapter *adapter = netdev_priv(netdev);
  1902. struct e1000_hw *hw = &adapter->hw;
  1903. struct dev_mc_list *mc_ptr;
  1904. uint32_t rctl;
  1905. uint32_t hash_value;
  1906. int i, rar_entries = E1000_RAR_ENTRIES;
  1907. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1908. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1909. E1000_NUM_MTA_REGISTERS;
  1910. if (adapter->hw.mac_type == e1000_ich8lan)
  1911. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1912. /* reserve RAR[14] for LAA over-write work-around */
  1913. if (adapter->hw.mac_type == e1000_82571)
  1914. rar_entries--;
  1915. /* Check for Promiscuous and All Multicast modes */
  1916. rctl = E1000_READ_REG(hw, RCTL);
  1917. if (netdev->flags & IFF_PROMISC) {
  1918. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1919. } else if (netdev->flags & IFF_ALLMULTI) {
  1920. rctl |= E1000_RCTL_MPE;
  1921. rctl &= ~E1000_RCTL_UPE;
  1922. } else {
  1923. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1924. }
  1925. E1000_WRITE_REG(hw, RCTL, rctl);
  1926. /* 82542 2.0 needs to be in reset to write receive address registers */
  1927. if (hw->mac_type == e1000_82542_rev2_0)
  1928. e1000_enter_82542_rst(adapter);
  1929. /* load the first 14 multicast address into the exact filters 1-14
  1930. * RAR 0 is used for the station MAC adddress
  1931. * if there are not 14 addresses, go ahead and clear the filters
  1932. * -- with 82571 controllers only 0-13 entries are filled here
  1933. */
  1934. mc_ptr = netdev->mc_list;
  1935. for (i = 1; i < rar_entries; i++) {
  1936. if (mc_ptr) {
  1937. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1938. mc_ptr = mc_ptr->next;
  1939. } else {
  1940. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1941. E1000_WRITE_FLUSH(hw);
  1942. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1943. E1000_WRITE_FLUSH(hw);
  1944. }
  1945. }
  1946. /* clear the old settings from the multicast hash table */
  1947. for (i = 0; i < mta_reg_count; i++) {
  1948. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1949. E1000_WRITE_FLUSH(hw);
  1950. }
  1951. /* load any remaining addresses into the hash table */
  1952. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1953. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1954. e1000_mta_set(hw, hash_value);
  1955. }
  1956. if (hw->mac_type == e1000_82542_rev2_0)
  1957. e1000_leave_82542_rst(adapter);
  1958. }
  1959. /* Need to wait a few seconds after link up to get diagnostic information from
  1960. * the phy */
  1961. static void
  1962. e1000_update_phy_info(unsigned long data)
  1963. {
  1964. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1965. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1966. }
  1967. /**
  1968. * e1000_82547_tx_fifo_stall - Timer Call-back
  1969. * @data: pointer to adapter cast into an unsigned long
  1970. **/
  1971. static void
  1972. e1000_82547_tx_fifo_stall(unsigned long data)
  1973. {
  1974. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1975. struct net_device *netdev = adapter->netdev;
  1976. uint32_t tctl;
  1977. if (atomic_read(&adapter->tx_fifo_stall)) {
  1978. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1979. E1000_READ_REG(&adapter->hw, TDH)) &&
  1980. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1981. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1982. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1983. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1984. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1985. E1000_WRITE_REG(&adapter->hw, TCTL,
  1986. tctl & ~E1000_TCTL_EN);
  1987. E1000_WRITE_REG(&adapter->hw, TDFT,
  1988. adapter->tx_head_addr);
  1989. E1000_WRITE_REG(&adapter->hw, TDFH,
  1990. adapter->tx_head_addr);
  1991. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1992. adapter->tx_head_addr);
  1993. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1994. adapter->tx_head_addr);
  1995. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1996. E1000_WRITE_FLUSH(&adapter->hw);
  1997. adapter->tx_fifo_head = 0;
  1998. atomic_set(&adapter->tx_fifo_stall, 0);
  1999. netif_wake_queue(netdev);
  2000. } else {
  2001. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2002. }
  2003. }
  2004. }
  2005. /**
  2006. * e1000_watchdog - Timer Call-back
  2007. * @data: pointer to adapter cast into an unsigned long
  2008. **/
  2009. static void
  2010. e1000_watchdog(unsigned long data)
  2011. {
  2012. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2013. struct net_device *netdev = adapter->netdev;
  2014. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2015. uint32_t link, tctl;
  2016. int32_t ret_val;
  2017. ret_val = e1000_check_for_link(&adapter->hw);
  2018. if ((ret_val == E1000_ERR_PHY) &&
  2019. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  2020. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  2021. /* See e1000_kumeran_lock_loss_workaround() */
  2022. DPRINTK(LINK, INFO,
  2023. "Gigabit has been disabled, downgrading speed\n");
  2024. }
  2025. if (adapter->hw.mac_type == e1000_82573) {
  2026. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2027. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2028. e1000_update_mng_vlan(adapter);
  2029. }
  2030. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2031. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2032. link = !adapter->hw.serdes_link_down;
  2033. else
  2034. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2035. if (link) {
  2036. if (!netif_carrier_ok(netdev)) {
  2037. boolean_t txb2b = 1;
  2038. e1000_get_speed_and_duplex(&adapter->hw,
  2039. &adapter->link_speed,
  2040. &adapter->link_duplex);
  2041. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2042. adapter->link_speed,
  2043. adapter->link_duplex == FULL_DUPLEX ?
  2044. "Full Duplex" : "Half Duplex");
  2045. /* tweak tx_queue_len according to speed/duplex
  2046. * and adjust the timeout factor */
  2047. netdev->tx_queue_len = adapter->tx_queue_len;
  2048. adapter->tx_timeout_factor = 1;
  2049. switch (adapter->link_speed) {
  2050. case SPEED_10:
  2051. txb2b = 0;
  2052. netdev->tx_queue_len = 10;
  2053. adapter->tx_timeout_factor = 8;
  2054. break;
  2055. case SPEED_100:
  2056. txb2b = 0;
  2057. netdev->tx_queue_len = 100;
  2058. /* maybe add some timeout factor ? */
  2059. break;
  2060. }
  2061. if ((adapter->hw.mac_type == e1000_82571 ||
  2062. adapter->hw.mac_type == e1000_82572) &&
  2063. txb2b == 0) {
  2064. #define SPEED_MODE_BIT (1 << 21)
  2065. uint32_t tarc0;
  2066. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2067. tarc0 &= ~SPEED_MODE_BIT;
  2068. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2069. }
  2070. #ifdef NETIF_F_TSO
  2071. /* disable TSO for pcie and 10/100 speeds, to avoid
  2072. * some hardware issues */
  2073. if (!adapter->tso_force &&
  2074. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2075. switch (adapter->link_speed) {
  2076. case SPEED_10:
  2077. case SPEED_100:
  2078. DPRINTK(PROBE,INFO,
  2079. "10/100 speed: disabling TSO\n");
  2080. netdev->features &= ~NETIF_F_TSO;
  2081. break;
  2082. case SPEED_1000:
  2083. netdev->features |= NETIF_F_TSO;
  2084. break;
  2085. default:
  2086. /* oops */
  2087. break;
  2088. }
  2089. }
  2090. #endif
  2091. /* enable transmits in the hardware, need to do this
  2092. * after setting TARC0 */
  2093. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2094. tctl |= E1000_TCTL_EN;
  2095. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2096. netif_carrier_on(netdev);
  2097. netif_wake_queue(netdev);
  2098. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2099. adapter->smartspeed = 0;
  2100. }
  2101. } else {
  2102. if (netif_carrier_ok(netdev)) {
  2103. adapter->link_speed = 0;
  2104. adapter->link_duplex = 0;
  2105. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2106. netif_carrier_off(netdev);
  2107. netif_stop_queue(netdev);
  2108. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2109. /* 80003ES2LAN workaround--
  2110. * For packet buffer work-around on link down event;
  2111. * disable receives in the ISR and
  2112. * reset device here in the watchdog
  2113. */
  2114. if (adapter->hw.mac_type == e1000_80003es2lan)
  2115. /* reset device */
  2116. schedule_work(&adapter->reset_task);
  2117. }
  2118. e1000_smartspeed(adapter);
  2119. }
  2120. e1000_update_stats(adapter);
  2121. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2122. adapter->tpt_old = adapter->stats.tpt;
  2123. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2124. adapter->colc_old = adapter->stats.colc;
  2125. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2126. adapter->gorcl_old = adapter->stats.gorcl;
  2127. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2128. adapter->gotcl_old = adapter->stats.gotcl;
  2129. e1000_update_adaptive(&adapter->hw);
  2130. if (!netif_carrier_ok(netdev)) {
  2131. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2132. /* We've lost link, so the controller stops DMA,
  2133. * but we've got queued Tx work that's never going
  2134. * to get done, so reset controller to flush Tx.
  2135. * (Do the reset outside of interrupt context). */
  2136. adapter->tx_timeout_count++;
  2137. schedule_work(&adapter->reset_task);
  2138. }
  2139. }
  2140. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2141. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2142. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2143. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2144. * else is between 2000-8000. */
  2145. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2146. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2147. adapter->gotcl - adapter->gorcl :
  2148. adapter->gorcl - adapter->gotcl) / 10000;
  2149. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2150. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2151. }
  2152. /* Cause software interrupt to ensure rx ring is cleaned */
  2153. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2154. /* Force detection of hung controller every watchdog period */
  2155. adapter->detect_tx_hung = TRUE;
  2156. /* With 82571 controllers, LAA may be overwritten due to controller
  2157. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2158. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2159. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2160. /* Reset the timer */
  2161. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2162. }
  2163. #define E1000_TX_FLAGS_CSUM 0x00000001
  2164. #define E1000_TX_FLAGS_VLAN 0x00000002
  2165. #define E1000_TX_FLAGS_TSO 0x00000004
  2166. #define E1000_TX_FLAGS_IPV4 0x00000008
  2167. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2168. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2169. static int
  2170. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2171. struct sk_buff *skb)
  2172. {
  2173. #ifdef NETIF_F_TSO
  2174. struct e1000_context_desc *context_desc;
  2175. struct e1000_buffer *buffer_info;
  2176. unsigned int i;
  2177. uint32_t cmd_length = 0;
  2178. uint16_t ipcse = 0, tucse, mss;
  2179. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2180. int err;
  2181. if (skb_is_gso(skb)) {
  2182. if (skb_header_cloned(skb)) {
  2183. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2184. if (err)
  2185. return err;
  2186. }
  2187. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2188. mss = skb_shinfo(skb)->gso_size;
  2189. if (skb->protocol == htons(ETH_P_IP)) {
  2190. skb->nh.iph->tot_len = 0;
  2191. skb->nh.iph->check = 0;
  2192. skb->h.th->check =
  2193. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2194. skb->nh.iph->daddr,
  2195. 0,
  2196. IPPROTO_TCP,
  2197. 0);
  2198. cmd_length = E1000_TXD_CMD_IP;
  2199. ipcse = skb->h.raw - skb->data - 1;
  2200. #ifdef NETIF_F_TSO_IPV6
  2201. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2202. skb->nh.ipv6h->payload_len = 0;
  2203. skb->h.th->check =
  2204. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2205. &skb->nh.ipv6h->daddr,
  2206. 0,
  2207. IPPROTO_TCP,
  2208. 0);
  2209. ipcse = 0;
  2210. #endif
  2211. }
  2212. ipcss = skb->nh.raw - skb->data;
  2213. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2214. tucss = skb->h.raw - skb->data;
  2215. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2216. tucse = 0;
  2217. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2218. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2219. i = tx_ring->next_to_use;
  2220. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2221. buffer_info = &tx_ring->buffer_info[i];
  2222. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2223. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2224. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2225. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2226. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2227. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2228. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2229. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2230. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2231. buffer_info->time_stamp = jiffies;
  2232. if (++i == tx_ring->count) i = 0;
  2233. tx_ring->next_to_use = i;
  2234. return TRUE;
  2235. }
  2236. #endif
  2237. return FALSE;
  2238. }
  2239. static boolean_t
  2240. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2241. struct sk_buff *skb)
  2242. {
  2243. struct e1000_context_desc *context_desc;
  2244. struct e1000_buffer *buffer_info;
  2245. unsigned int i;
  2246. uint8_t css;
  2247. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  2248. css = skb->h.raw - skb->data;
  2249. i = tx_ring->next_to_use;
  2250. buffer_info = &tx_ring->buffer_info[i];
  2251. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2252. context_desc->upper_setup.tcp_fields.tucss = css;
  2253. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2254. context_desc->upper_setup.tcp_fields.tucse = 0;
  2255. context_desc->tcp_seg_setup.data = 0;
  2256. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2257. buffer_info->time_stamp = jiffies;
  2258. if (unlikely(++i == tx_ring->count)) i = 0;
  2259. tx_ring->next_to_use = i;
  2260. return TRUE;
  2261. }
  2262. return FALSE;
  2263. }
  2264. #define E1000_MAX_TXD_PWR 12
  2265. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2266. static int
  2267. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2268. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2269. unsigned int nr_frags, unsigned int mss)
  2270. {
  2271. struct e1000_buffer *buffer_info;
  2272. unsigned int len = skb->len;
  2273. unsigned int offset = 0, size, count = 0, i;
  2274. unsigned int f;
  2275. len -= skb->data_len;
  2276. i = tx_ring->next_to_use;
  2277. while (len) {
  2278. buffer_info = &tx_ring->buffer_info[i];
  2279. size = min(len, max_per_txd);
  2280. #ifdef NETIF_F_TSO
  2281. /* Workaround for Controller erratum --
  2282. * descriptor for non-tso packet in a linear SKB that follows a
  2283. * tso gets written back prematurely before the data is fully
  2284. * DMA'd to the controller */
  2285. if (!skb->data_len && tx_ring->last_tx_tso &&
  2286. !skb_is_gso(skb)) {
  2287. tx_ring->last_tx_tso = 0;
  2288. size -= 4;
  2289. }
  2290. /* Workaround for premature desc write-backs
  2291. * in TSO mode. Append 4-byte sentinel desc */
  2292. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2293. size -= 4;
  2294. #endif
  2295. /* work-around for errata 10 and it applies
  2296. * to all controllers in PCI-X mode
  2297. * The fix is to make sure that the first descriptor of a
  2298. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2299. */
  2300. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2301. (size > 2015) && count == 0))
  2302. size = 2015;
  2303. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2304. * terminating buffers within evenly-aligned dwords. */
  2305. if (unlikely(adapter->pcix_82544 &&
  2306. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2307. size > 4))
  2308. size -= 4;
  2309. buffer_info->length = size;
  2310. buffer_info->dma =
  2311. pci_map_single(adapter->pdev,
  2312. skb->data + offset,
  2313. size,
  2314. PCI_DMA_TODEVICE);
  2315. buffer_info->time_stamp = jiffies;
  2316. len -= size;
  2317. offset += size;
  2318. count++;
  2319. if (unlikely(++i == tx_ring->count)) i = 0;
  2320. }
  2321. for (f = 0; f < nr_frags; f++) {
  2322. struct skb_frag_struct *frag;
  2323. frag = &skb_shinfo(skb)->frags[f];
  2324. len = frag->size;
  2325. offset = frag->page_offset;
  2326. while (len) {
  2327. buffer_info = &tx_ring->buffer_info[i];
  2328. size = min(len, max_per_txd);
  2329. #ifdef NETIF_F_TSO
  2330. /* Workaround for premature desc write-backs
  2331. * in TSO mode. Append 4-byte sentinel desc */
  2332. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2333. size -= 4;
  2334. #endif
  2335. /* Workaround for potential 82544 hang in PCI-X.
  2336. * Avoid terminating buffers within evenly-aligned
  2337. * dwords. */
  2338. if (unlikely(adapter->pcix_82544 &&
  2339. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2340. size > 4))
  2341. size -= 4;
  2342. buffer_info->length = size;
  2343. buffer_info->dma =
  2344. pci_map_page(adapter->pdev,
  2345. frag->page,
  2346. offset,
  2347. size,
  2348. PCI_DMA_TODEVICE);
  2349. buffer_info->time_stamp = jiffies;
  2350. len -= size;
  2351. offset += size;
  2352. count++;
  2353. if (unlikely(++i == tx_ring->count)) i = 0;
  2354. }
  2355. }
  2356. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2357. tx_ring->buffer_info[i].skb = skb;
  2358. tx_ring->buffer_info[first].next_to_watch = i;
  2359. return count;
  2360. }
  2361. static void
  2362. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2363. int tx_flags, int count)
  2364. {
  2365. struct e1000_tx_desc *tx_desc = NULL;
  2366. struct e1000_buffer *buffer_info;
  2367. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2368. unsigned int i;
  2369. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2370. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2371. E1000_TXD_CMD_TSE;
  2372. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2373. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2374. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2375. }
  2376. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2377. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2378. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2379. }
  2380. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2381. txd_lower |= E1000_TXD_CMD_VLE;
  2382. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2383. }
  2384. i = tx_ring->next_to_use;
  2385. while (count--) {
  2386. buffer_info = &tx_ring->buffer_info[i];
  2387. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2388. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2389. tx_desc->lower.data =
  2390. cpu_to_le32(txd_lower | buffer_info->length);
  2391. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2392. if (unlikely(++i == tx_ring->count)) i = 0;
  2393. }
  2394. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2395. /* Force memory writes to complete before letting h/w
  2396. * know there are new descriptors to fetch. (Only
  2397. * applicable for weak-ordered memory model archs,
  2398. * such as IA-64). */
  2399. wmb();
  2400. tx_ring->next_to_use = i;
  2401. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2402. }
  2403. /**
  2404. * 82547 workaround to avoid controller hang in half-duplex environment.
  2405. * The workaround is to avoid queuing a large packet that would span
  2406. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2407. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2408. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2409. * to the beginning of the Tx FIFO.
  2410. **/
  2411. #define E1000_FIFO_HDR 0x10
  2412. #define E1000_82547_PAD_LEN 0x3E0
  2413. static int
  2414. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2415. {
  2416. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2417. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2418. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2419. if (adapter->link_duplex != HALF_DUPLEX)
  2420. goto no_fifo_stall_required;
  2421. if (atomic_read(&adapter->tx_fifo_stall))
  2422. return 1;
  2423. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2424. atomic_set(&adapter->tx_fifo_stall, 1);
  2425. return 1;
  2426. }
  2427. no_fifo_stall_required:
  2428. adapter->tx_fifo_head += skb_fifo_len;
  2429. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2430. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2431. return 0;
  2432. }
  2433. #define MINIMUM_DHCP_PACKET_SIZE 282
  2434. static int
  2435. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2436. {
  2437. struct e1000_hw *hw = &adapter->hw;
  2438. uint16_t length, offset;
  2439. if (vlan_tx_tag_present(skb)) {
  2440. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2441. ( adapter->hw.mng_cookie.status &
  2442. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2443. return 0;
  2444. }
  2445. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2446. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2447. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2448. const struct iphdr *ip =
  2449. (struct iphdr *)((uint8_t *)skb->data+14);
  2450. if (IPPROTO_UDP == ip->protocol) {
  2451. struct udphdr *udp =
  2452. (struct udphdr *)((uint8_t *)ip +
  2453. (ip->ihl << 2));
  2454. if (ntohs(udp->dest) == 67) {
  2455. offset = (uint8_t *)udp + 8 - skb->data;
  2456. length = skb->len - offset;
  2457. return e1000_mng_write_dhcp_info(hw,
  2458. (uint8_t *)udp + 8,
  2459. length);
  2460. }
  2461. }
  2462. }
  2463. }
  2464. return 0;
  2465. }
  2466. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2467. {
  2468. struct e1000_adapter *adapter = netdev_priv(netdev);
  2469. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2470. netif_stop_queue(netdev);
  2471. /* Herbert's original patch had:
  2472. * smp_mb__after_netif_stop_queue();
  2473. * but since that doesn't exist yet, just open code it. */
  2474. smp_mb();
  2475. /* We need to check again in a case another CPU has just
  2476. * made room available. */
  2477. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2478. return -EBUSY;
  2479. /* A reprieve! */
  2480. netif_start_queue(netdev);
  2481. return 0;
  2482. }
  2483. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2484. struct e1000_tx_ring *tx_ring, int size)
  2485. {
  2486. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2487. return 0;
  2488. return __e1000_maybe_stop_tx(netdev, size);
  2489. }
  2490. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2491. static int
  2492. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2493. {
  2494. struct e1000_adapter *adapter = netdev_priv(netdev);
  2495. struct e1000_tx_ring *tx_ring;
  2496. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2497. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2498. unsigned int tx_flags = 0;
  2499. unsigned int len = skb->len;
  2500. unsigned long flags;
  2501. unsigned int nr_frags = 0;
  2502. unsigned int mss = 0;
  2503. int count = 0;
  2504. int tso;
  2505. unsigned int f;
  2506. len -= skb->data_len;
  2507. /* This goes back to the question of how to logically map a tx queue
  2508. * to a flow. Right now, performance is impacted slightly negatively
  2509. * if using multiple tx queues. If the stack breaks away from a
  2510. * single qdisc implementation, we can look at this again. */
  2511. tx_ring = adapter->tx_ring;
  2512. if (unlikely(skb->len <= 0)) {
  2513. dev_kfree_skb_any(skb);
  2514. return NETDEV_TX_OK;
  2515. }
  2516. #ifdef NETIF_F_TSO
  2517. mss = skb_shinfo(skb)->gso_size;
  2518. /* The controller does a simple calculation to
  2519. * make sure there is enough room in the FIFO before
  2520. * initiating the DMA for each buffer. The calc is:
  2521. * 4 = ceil(buffer len/mss). To make sure we don't
  2522. * overrun the FIFO, adjust the max buffer len if mss
  2523. * drops. */
  2524. if (mss) {
  2525. uint8_t hdr_len;
  2526. max_per_txd = min(mss << 2, max_per_txd);
  2527. max_txd_pwr = fls(max_per_txd) - 1;
  2528. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2529. * points to just header, pull a few bytes of payload from
  2530. * frags into skb->data */
  2531. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2532. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2533. switch (adapter->hw.mac_type) {
  2534. unsigned int pull_size;
  2535. case e1000_82571:
  2536. case e1000_82572:
  2537. case e1000_82573:
  2538. case e1000_ich8lan:
  2539. pull_size = min((unsigned int)4, skb->data_len);
  2540. if (!__pskb_pull_tail(skb, pull_size)) {
  2541. DPRINTK(DRV, ERR,
  2542. "__pskb_pull_tail failed.\n");
  2543. dev_kfree_skb_any(skb);
  2544. return NETDEV_TX_OK;
  2545. }
  2546. len = skb->len - skb->data_len;
  2547. break;
  2548. default:
  2549. /* do nothing */
  2550. break;
  2551. }
  2552. }
  2553. }
  2554. /* reserve a descriptor for the offload context */
  2555. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2556. count++;
  2557. count++;
  2558. #else
  2559. if (skb->ip_summed == CHECKSUM_PARTIAL)
  2560. count++;
  2561. #endif
  2562. #ifdef NETIF_F_TSO
  2563. /* Controller Erratum workaround */
  2564. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2565. count++;
  2566. #endif
  2567. count += TXD_USE_COUNT(len, max_txd_pwr);
  2568. if (adapter->pcix_82544)
  2569. count++;
  2570. /* work-around for errata 10 and it applies to all controllers
  2571. * in PCI-X mode, so add one more descriptor to the count
  2572. */
  2573. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2574. (len > 2015)))
  2575. count++;
  2576. nr_frags = skb_shinfo(skb)->nr_frags;
  2577. for (f = 0; f < nr_frags; f++)
  2578. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2579. max_txd_pwr);
  2580. if (adapter->pcix_82544)
  2581. count += nr_frags;
  2582. if (adapter->hw.tx_pkt_filtering &&
  2583. (adapter->hw.mac_type == e1000_82573))
  2584. e1000_transfer_dhcp_info(adapter, skb);
  2585. local_irq_save(flags);
  2586. if (!spin_trylock(&tx_ring->tx_lock)) {
  2587. /* Collision - tell upper layer to requeue */
  2588. local_irq_restore(flags);
  2589. return NETDEV_TX_LOCKED;
  2590. }
  2591. /* need: count + 2 desc gap to keep tail from touching
  2592. * head, otherwise try next time */
  2593. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
  2594. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2595. return NETDEV_TX_BUSY;
  2596. }
  2597. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2598. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2599. netif_stop_queue(netdev);
  2600. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2601. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2602. return NETDEV_TX_BUSY;
  2603. }
  2604. }
  2605. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2606. tx_flags |= E1000_TX_FLAGS_VLAN;
  2607. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2608. }
  2609. first = tx_ring->next_to_use;
  2610. tso = e1000_tso(adapter, tx_ring, skb);
  2611. if (tso < 0) {
  2612. dev_kfree_skb_any(skb);
  2613. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2614. return NETDEV_TX_OK;
  2615. }
  2616. if (likely(tso)) {
  2617. tx_ring->last_tx_tso = 1;
  2618. tx_flags |= E1000_TX_FLAGS_TSO;
  2619. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2620. tx_flags |= E1000_TX_FLAGS_CSUM;
  2621. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2622. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2623. * no longer assume, we must. */
  2624. if (likely(skb->protocol == htons(ETH_P_IP)))
  2625. tx_flags |= E1000_TX_FLAGS_IPV4;
  2626. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2627. e1000_tx_map(adapter, tx_ring, skb, first,
  2628. max_per_txd, nr_frags, mss));
  2629. netdev->trans_start = jiffies;
  2630. /* Make sure there is space in the ring for the next send. */
  2631. e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  2632. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2633. return NETDEV_TX_OK;
  2634. }
  2635. /**
  2636. * e1000_tx_timeout - Respond to a Tx Hang
  2637. * @netdev: network interface device structure
  2638. **/
  2639. static void
  2640. e1000_tx_timeout(struct net_device *netdev)
  2641. {
  2642. struct e1000_adapter *adapter = netdev_priv(netdev);
  2643. /* Do the reset outside of interrupt context */
  2644. adapter->tx_timeout_count++;
  2645. schedule_work(&adapter->reset_task);
  2646. }
  2647. static void
  2648. e1000_reset_task(struct net_device *netdev)
  2649. {
  2650. struct e1000_adapter *adapter = netdev_priv(netdev);
  2651. e1000_reinit_locked(adapter);
  2652. }
  2653. /**
  2654. * e1000_get_stats - Get System Network Statistics
  2655. * @netdev: network interface device structure
  2656. *
  2657. * Returns the address of the device statistics structure.
  2658. * The statistics are actually updated from the timer callback.
  2659. **/
  2660. static struct net_device_stats *
  2661. e1000_get_stats(struct net_device *netdev)
  2662. {
  2663. struct e1000_adapter *adapter = netdev_priv(netdev);
  2664. /* only return the current stats */
  2665. return &adapter->net_stats;
  2666. }
  2667. /**
  2668. * e1000_change_mtu - Change the Maximum Transfer Unit
  2669. * @netdev: network interface device structure
  2670. * @new_mtu: new value for maximum frame size
  2671. *
  2672. * Returns 0 on success, negative on failure
  2673. **/
  2674. static int
  2675. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2676. {
  2677. struct e1000_adapter *adapter = netdev_priv(netdev);
  2678. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2679. uint16_t eeprom_data = 0;
  2680. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2681. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2682. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2683. return -EINVAL;
  2684. }
  2685. /* Adapter-specific max frame size limits. */
  2686. switch (adapter->hw.mac_type) {
  2687. case e1000_undefined ... e1000_82542_rev2_1:
  2688. case e1000_ich8lan:
  2689. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2690. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2691. return -EINVAL;
  2692. }
  2693. break;
  2694. case e1000_82573:
  2695. /* Jumbo Frames not supported if:
  2696. * - this is not an 82573L device
  2697. * - ASPM is enabled in any way (0x1A bits 3:2) */
  2698. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2699. &eeprom_data);
  2700. if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
  2701. (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
  2702. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2703. DPRINTK(PROBE, ERR,
  2704. "Jumbo Frames not supported.\n");
  2705. return -EINVAL;
  2706. }
  2707. break;
  2708. }
  2709. /* ERT will be enabled later to enable wire speed receives */
  2710. /* fall through to get support */
  2711. case e1000_82571:
  2712. case e1000_82572:
  2713. case e1000_80003es2lan:
  2714. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2715. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2716. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2717. return -EINVAL;
  2718. }
  2719. break;
  2720. default:
  2721. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2722. break;
  2723. }
  2724. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2725. * means we reserve 2 more, this pushes us to allocate from the next
  2726. * larger slab size
  2727. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2728. if (max_frame <= E1000_RXBUFFER_256)
  2729. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2730. else if (max_frame <= E1000_RXBUFFER_512)
  2731. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2732. else if (max_frame <= E1000_RXBUFFER_1024)
  2733. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2734. else if (max_frame <= E1000_RXBUFFER_2048)
  2735. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2736. else if (max_frame <= E1000_RXBUFFER_4096)
  2737. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2738. else if (max_frame <= E1000_RXBUFFER_8192)
  2739. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2740. else if (max_frame <= E1000_RXBUFFER_16384)
  2741. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2742. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2743. if (!adapter->hw.tbi_compatibility_on &&
  2744. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2745. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2746. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2747. netdev->mtu = new_mtu;
  2748. if (netif_running(netdev))
  2749. e1000_reinit_locked(adapter);
  2750. adapter->hw.max_frame_size = max_frame;
  2751. return 0;
  2752. }
  2753. /**
  2754. * e1000_update_stats - Update the board statistics counters
  2755. * @adapter: board private structure
  2756. **/
  2757. void
  2758. e1000_update_stats(struct e1000_adapter *adapter)
  2759. {
  2760. struct e1000_hw *hw = &adapter->hw;
  2761. struct pci_dev *pdev = adapter->pdev;
  2762. unsigned long flags;
  2763. uint16_t phy_tmp;
  2764. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2765. /*
  2766. * Prevent stats update while adapter is being reset, or if the pci
  2767. * connection is down.
  2768. */
  2769. if (adapter->link_speed == 0)
  2770. return;
  2771. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2772. return;
  2773. spin_lock_irqsave(&adapter->stats_lock, flags);
  2774. /* these counters are modified from e1000_adjust_tbi_stats,
  2775. * called from the interrupt context, so they must only
  2776. * be written while holding adapter->stats_lock
  2777. */
  2778. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2779. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2780. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2781. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2782. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2783. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2784. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2785. if (adapter->hw.mac_type != e1000_ich8lan) {
  2786. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2787. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2788. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2789. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2790. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2791. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2792. }
  2793. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2794. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2795. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2796. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2797. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2798. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2799. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2800. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2801. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2802. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2803. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2804. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2805. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2806. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2807. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2808. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2809. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2810. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2811. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2812. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2813. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2814. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2815. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2816. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2817. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2818. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2819. if (adapter->hw.mac_type != e1000_ich8lan) {
  2820. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2821. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2822. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2823. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2824. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2825. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2826. }
  2827. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2828. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2829. /* used for adaptive IFS */
  2830. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2831. adapter->stats.tpt += hw->tx_packet_delta;
  2832. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2833. adapter->stats.colc += hw->collision_delta;
  2834. if (hw->mac_type >= e1000_82543) {
  2835. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2836. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2837. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2838. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2839. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2840. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2841. }
  2842. if (hw->mac_type > e1000_82547_rev_2) {
  2843. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2844. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2845. if (adapter->hw.mac_type != e1000_ich8lan) {
  2846. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2847. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2848. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2849. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2850. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2851. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2852. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2853. }
  2854. }
  2855. /* Fill out the OS statistics structure */
  2856. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2857. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2858. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2859. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2860. adapter->net_stats.multicast = adapter->stats.mprc;
  2861. adapter->net_stats.collisions = adapter->stats.colc;
  2862. /* Rx Errors */
  2863. /* RLEC on some newer hardware can be incorrect so build
  2864. * our own version based on RUC and ROC */
  2865. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2866. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2867. adapter->stats.ruc + adapter->stats.roc +
  2868. adapter->stats.cexterr;
  2869. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  2870. adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
  2871. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2872. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2873. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2874. /* Tx Errors */
  2875. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  2876. adapter->net_stats.tx_errors = adapter->stats.txerrc;
  2877. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2878. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2879. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2880. /* Tx Dropped needs to be maintained elsewhere */
  2881. /* Phy Stats */
  2882. if (hw->media_type == e1000_media_type_copper) {
  2883. if ((adapter->link_speed == SPEED_1000) &&
  2884. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2885. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2886. adapter->phy_stats.idle_errors += phy_tmp;
  2887. }
  2888. if ((hw->mac_type <= e1000_82546) &&
  2889. (hw->phy_type == e1000_phy_m88) &&
  2890. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2891. adapter->phy_stats.receive_errors += phy_tmp;
  2892. }
  2893. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2894. }
  2895. /**
  2896. * e1000_intr - Interrupt Handler
  2897. * @irq: interrupt number
  2898. * @data: pointer to a network interface device structure
  2899. * @pt_regs: CPU registers structure
  2900. **/
  2901. static irqreturn_t
  2902. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2903. {
  2904. struct net_device *netdev = data;
  2905. struct e1000_adapter *adapter = netdev_priv(netdev);
  2906. struct e1000_hw *hw = &adapter->hw;
  2907. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2908. #ifndef CONFIG_E1000_NAPI
  2909. int i;
  2910. #else
  2911. /* Interrupt Auto-Mask...upon reading ICR,
  2912. * interrupts are masked. No need for the
  2913. * IMC write, but it does mean we should
  2914. * account for it ASAP. */
  2915. if (likely(hw->mac_type >= e1000_82571))
  2916. atomic_inc(&adapter->irq_sem);
  2917. #endif
  2918. if (unlikely(!icr)) {
  2919. #ifdef CONFIG_E1000_NAPI
  2920. if (hw->mac_type >= e1000_82571)
  2921. e1000_irq_enable(adapter);
  2922. #endif
  2923. return IRQ_NONE; /* Not our interrupt */
  2924. }
  2925. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2926. hw->get_link_status = 1;
  2927. /* 80003ES2LAN workaround--
  2928. * For packet buffer work-around on link down event;
  2929. * disable receives here in the ISR and
  2930. * reset adapter in watchdog
  2931. */
  2932. if (netif_carrier_ok(netdev) &&
  2933. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2934. /* disable receives */
  2935. rctl = E1000_READ_REG(hw, RCTL);
  2936. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2937. }
  2938. mod_timer(&adapter->watchdog_timer, jiffies);
  2939. }
  2940. #ifdef CONFIG_E1000_NAPI
  2941. if (unlikely(hw->mac_type < e1000_82571)) {
  2942. atomic_inc(&adapter->irq_sem);
  2943. E1000_WRITE_REG(hw, IMC, ~0);
  2944. E1000_WRITE_FLUSH(hw);
  2945. }
  2946. if (likely(netif_rx_schedule_prep(netdev)))
  2947. __netif_rx_schedule(netdev);
  2948. else
  2949. e1000_irq_enable(adapter);
  2950. #else
  2951. /* Writing IMC and IMS is needed for 82547.
  2952. * Due to Hub Link bus being occupied, an interrupt
  2953. * de-assertion message is not able to be sent.
  2954. * When an interrupt assertion message is generated later,
  2955. * two messages are re-ordered and sent out.
  2956. * That causes APIC to think 82547 is in de-assertion
  2957. * state, while 82547 is in assertion state, resulting
  2958. * in dead lock. Writing IMC forces 82547 into
  2959. * de-assertion state.
  2960. */
  2961. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2962. atomic_inc(&adapter->irq_sem);
  2963. E1000_WRITE_REG(hw, IMC, ~0);
  2964. }
  2965. for (i = 0; i < E1000_MAX_INTR; i++)
  2966. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2967. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2968. break;
  2969. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2970. e1000_irq_enable(adapter);
  2971. #endif
  2972. return IRQ_HANDLED;
  2973. }
  2974. #ifdef CONFIG_E1000_NAPI
  2975. /**
  2976. * e1000_clean - NAPI Rx polling callback
  2977. * @adapter: board private structure
  2978. **/
  2979. static int
  2980. e1000_clean(struct net_device *poll_dev, int *budget)
  2981. {
  2982. struct e1000_adapter *adapter;
  2983. int work_to_do = min(*budget, poll_dev->quota);
  2984. int tx_cleaned = 0, work_done = 0;
  2985. /* Must NOT use netdev_priv macro here. */
  2986. adapter = poll_dev->priv;
  2987. /* Keep link state information with original netdev */
  2988. if (!netif_carrier_ok(poll_dev))
  2989. goto quit_polling;
  2990. /* e1000_clean is called per-cpu. This lock protects
  2991. * tx_ring[0] from being cleaned by multiple cpus
  2992. * simultaneously. A failure obtaining the lock means
  2993. * tx_ring[0] is currently being cleaned anyway. */
  2994. if (spin_trylock(&adapter->tx_queue_lock)) {
  2995. tx_cleaned = e1000_clean_tx_irq(adapter,
  2996. &adapter->tx_ring[0]);
  2997. spin_unlock(&adapter->tx_queue_lock);
  2998. }
  2999. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  3000. &work_done, work_to_do);
  3001. *budget -= work_done;
  3002. poll_dev->quota -= work_done;
  3003. /* If no Tx and not enough Rx work done, exit the polling mode */
  3004. if ((!tx_cleaned && (work_done == 0)) ||
  3005. !netif_running(poll_dev)) {
  3006. quit_polling:
  3007. netif_rx_complete(poll_dev);
  3008. e1000_irq_enable(adapter);
  3009. return 0;
  3010. }
  3011. return 1;
  3012. }
  3013. #endif
  3014. /**
  3015. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3016. * @adapter: board private structure
  3017. **/
  3018. static boolean_t
  3019. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3020. struct e1000_tx_ring *tx_ring)
  3021. {
  3022. struct net_device *netdev = adapter->netdev;
  3023. struct e1000_tx_desc *tx_desc, *eop_desc;
  3024. struct e1000_buffer *buffer_info;
  3025. unsigned int i, eop;
  3026. #ifdef CONFIG_E1000_NAPI
  3027. unsigned int count = 0;
  3028. #endif
  3029. boolean_t cleaned = FALSE;
  3030. i = tx_ring->next_to_clean;
  3031. eop = tx_ring->buffer_info[i].next_to_watch;
  3032. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3033. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  3034. for (cleaned = FALSE; !cleaned; ) {
  3035. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3036. buffer_info = &tx_ring->buffer_info[i];
  3037. cleaned = (i == eop);
  3038. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3039. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  3040. if (unlikely(++i == tx_ring->count)) i = 0;
  3041. }
  3042. eop = tx_ring->buffer_info[i].next_to_watch;
  3043. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3044. #ifdef CONFIG_E1000_NAPI
  3045. #define E1000_TX_WEIGHT 64
  3046. /* weight of a sort for tx, to avoid endless transmit cleanup */
  3047. if (count++ == E1000_TX_WEIGHT) break;
  3048. #endif
  3049. }
  3050. tx_ring->next_to_clean = i;
  3051. #define TX_WAKE_THRESHOLD 32
  3052. if (unlikely(cleaned && netif_carrier_ok(netdev) &&
  3053. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3054. /* Make sure that anybody stopping the queue after this
  3055. * sees the new next_to_clean.
  3056. */
  3057. smp_mb();
  3058. if (netif_queue_stopped(netdev))
  3059. netif_wake_queue(netdev);
  3060. }
  3061. if (adapter->detect_tx_hung) {
  3062. /* Detect a transmit hang in hardware, this serializes the
  3063. * check with the clearing of time_stamp and movement of i */
  3064. adapter->detect_tx_hung = FALSE;
  3065. if (tx_ring->buffer_info[eop].dma &&
  3066. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3067. (adapter->tx_timeout_factor * HZ))
  3068. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3069. E1000_STATUS_TXOFF)) {
  3070. /* detected Tx unit hang */
  3071. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3072. " Tx Queue <%lu>\n"
  3073. " TDH <%x>\n"
  3074. " TDT <%x>\n"
  3075. " next_to_use <%x>\n"
  3076. " next_to_clean <%x>\n"
  3077. "buffer_info[next_to_clean]\n"
  3078. " time_stamp <%lx>\n"
  3079. " next_to_watch <%x>\n"
  3080. " jiffies <%lx>\n"
  3081. " next_to_watch.status <%x>\n",
  3082. (unsigned long)((tx_ring - adapter->tx_ring) /
  3083. sizeof(struct e1000_tx_ring)),
  3084. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3085. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3086. tx_ring->next_to_use,
  3087. tx_ring->next_to_clean,
  3088. tx_ring->buffer_info[eop].time_stamp,
  3089. eop,
  3090. jiffies,
  3091. eop_desc->upper.fields.status);
  3092. netif_stop_queue(netdev);
  3093. }
  3094. }
  3095. return cleaned;
  3096. }
  3097. /**
  3098. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3099. * @adapter: board private structure
  3100. * @status_err: receive descriptor status and error fields
  3101. * @csum: receive descriptor csum field
  3102. * @sk_buff: socket buffer with received data
  3103. **/
  3104. static void
  3105. e1000_rx_checksum(struct e1000_adapter *adapter,
  3106. uint32_t status_err, uint32_t csum,
  3107. struct sk_buff *skb)
  3108. {
  3109. uint16_t status = (uint16_t)status_err;
  3110. uint8_t errors = (uint8_t)(status_err >> 24);
  3111. skb->ip_summed = CHECKSUM_NONE;
  3112. /* 82543 or newer only */
  3113. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3114. /* Ignore Checksum bit is set */
  3115. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3116. /* TCP/UDP checksum error bit is set */
  3117. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3118. /* let the stack verify checksum errors */
  3119. adapter->hw_csum_err++;
  3120. return;
  3121. }
  3122. /* TCP/UDP Checksum has not been calculated */
  3123. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3124. if (!(status & E1000_RXD_STAT_TCPCS))
  3125. return;
  3126. } else {
  3127. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3128. return;
  3129. }
  3130. /* It must be a TCP or UDP packet with a valid checksum */
  3131. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3132. /* TCP checksum is good */
  3133. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3134. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3135. /* IP fragment with UDP payload */
  3136. /* Hardware complements the payload checksum, so we undo it
  3137. * and then put the value in host order for further stack use.
  3138. */
  3139. csum = ntohl(csum ^ 0xFFFF);
  3140. skb->csum = csum;
  3141. skb->ip_summed = CHECKSUM_COMPLETE;
  3142. }
  3143. adapter->hw_csum_good++;
  3144. }
  3145. /**
  3146. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3147. * @adapter: board private structure
  3148. **/
  3149. static boolean_t
  3150. #ifdef CONFIG_E1000_NAPI
  3151. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3152. struct e1000_rx_ring *rx_ring,
  3153. int *work_done, int work_to_do)
  3154. #else
  3155. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3156. struct e1000_rx_ring *rx_ring)
  3157. #endif
  3158. {
  3159. struct net_device *netdev = adapter->netdev;
  3160. struct pci_dev *pdev = adapter->pdev;
  3161. struct e1000_rx_desc *rx_desc, *next_rxd;
  3162. struct e1000_buffer *buffer_info, *next_buffer;
  3163. unsigned long flags;
  3164. uint32_t length;
  3165. uint8_t last_byte;
  3166. unsigned int i;
  3167. int cleaned_count = 0;
  3168. boolean_t cleaned = FALSE;
  3169. i = rx_ring->next_to_clean;
  3170. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3171. buffer_info = &rx_ring->buffer_info[i];
  3172. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3173. struct sk_buff *skb;
  3174. u8 status;
  3175. #ifdef CONFIG_E1000_NAPI
  3176. if (*work_done >= work_to_do)
  3177. break;
  3178. (*work_done)++;
  3179. #endif
  3180. status = rx_desc->status;
  3181. skb = buffer_info->skb;
  3182. buffer_info->skb = NULL;
  3183. prefetch(skb->data - NET_IP_ALIGN);
  3184. if (++i == rx_ring->count) i = 0;
  3185. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3186. prefetch(next_rxd);
  3187. next_buffer = &rx_ring->buffer_info[i];
  3188. cleaned = TRUE;
  3189. cleaned_count++;
  3190. pci_unmap_single(pdev,
  3191. buffer_info->dma,
  3192. buffer_info->length,
  3193. PCI_DMA_FROMDEVICE);
  3194. length = le16_to_cpu(rx_desc->length);
  3195. /* adjust length to remove Ethernet CRC */
  3196. length -= 4;
  3197. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3198. /* All receives must fit into a single buffer */
  3199. E1000_DBG("%s: Receive packet consumed multiple"
  3200. " buffers\n", netdev->name);
  3201. /* recycle */
  3202. buffer_info->skb = skb;
  3203. goto next_desc;
  3204. }
  3205. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3206. last_byte = *(skb->data + length - 1);
  3207. if (TBI_ACCEPT(&adapter->hw, status,
  3208. rx_desc->errors, length, last_byte)) {
  3209. spin_lock_irqsave(&adapter->stats_lock, flags);
  3210. e1000_tbi_adjust_stats(&adapter->hw,
  3211. &adapter->stats,
  3212. length, skb->data);
  3213. spin_unlock_irqrestore(&adapter->stats_lock,
  3214. flags);
  3215. length--;
  3216. } else {
  3217. /* recycle */
  3218. buffer_info->skb = skb;
  3219. goto next_desc;
  3220. }
  3221. }
  3222. /* code added for copybreak, this should improve
  3223. * performance for small packets with large amounts
  3224. * of reassembly being done in the stack */
  3225. #define E1000_CB_LENGTH 256
  3226. if (length < E1000_CB_LENGTH) {
  3227. struct sk_buff *new_skb =
  3228. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3229. if (new_skb) {
  3230. skb_reserve(new_skb, NET_IP_ALIGN);
  3231. memcpy(new_skb->data - NET_IP_ALIGN,
  3232. skb->data - NET_IP_ALIGN,
  3233. length + NET_IP_ALIGN);
  3234. /* save the skb in buffer_info as good */
  3235. buffer_info->skb = skb;
  3236. skb = new_skb;
  3237. skb_put(skb, length);
  3238. }
  3239. } else
  3240. skb_put(skb, length);
  3241. /* end copybreak code */
  3242. /* Receive Checksum Offload */
  3243. e1000_rx_checksum(adapter,
  3244. (uint32_t)(status) |
  3245. ((uint32_t)(rx_desc->errors) << 24),
  3246. le16_to_cpu(rx_desc->csum), skb);
  3247. skb->protocol = eth_type_trans(skb, netdev);
  3248. #ifdef CONFIG_E1000_NAPI
  3249. if (unlikely(adapter->vlgrp &&
  3250. (status & E1000_RXD_STAT_VP))) {
  3251. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3252. le16_to_cpu(rx_desc->special) &
  3253. E1000_RXD_SPC_VLAN_MASK);
  3254. } else {
  3255. netif_receive_skb(skb);
  3256. }
  3257. #else /* CONFIG_E1000_NAPI */
  3258. if (unlikely(adapter->vlgrp &&
  3259. (status & E1000_RXD_STAT_VP))) {
  3260. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3261. le16_to_cpu(rx_desc->special) &
  3262. E1000_RXD_SPC_VLAN_MASK);
  3263. } else {
  3264. netif_rx(skb);
  3265. }
  3266. #endif /* CONFIG_E1000_NAPI */
  3267. netdev->last_rx = jiffies;
  3268. next_desc:
  3269. rx_desc->status = 0;
  3270. /* return some buffers to hardware, one at a time is too slow */
  3271. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3272. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3273. cleaned_count = 0;
  3274. }
  3275. /* use prefetched values */
  3276. rx_desc = next_rxd;
  3277. buffer_info = next_buffer;
  3278. }
  3279. rx_ring->next_to_clean = i;
  3280. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3281. if (cleaned_count)
  3282. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3283. return cleaned;
  3284. }
  3285. /**
  3286. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3287. * @adapter: board private structure
  3288. **/
  3289. static boolean_t
  3290. #ifdef CONFIG_E1000_NAPI
  3291. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3292. struct e1000_rx_ring *rx_ring,
  3293. int *work_done, int work_to_do)
  3294. #else
  3295. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3296. struct e1000_rx_ring *rx_ring)
  3297. #endif
  3298. {
  3299. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3300. struct net_device *netdev = adapter->netdev;
  3301. struct pci_dev *pdev = adapter->pdev;
  3302. struct e1000_buffer *buffer_info, *next_buffer;
  3303. struct e1000_ps_page *ps_page;
  3304. struct e1000_ps_page_dma *ps_page_dma;
  3305. struct sk_buff *skb;
  3306. unsigned int i, j;
  3307. uint32_t length, staterr;
  3308. int cleaned_count = 0;
  3309. boolean_t cleaned = FALSE;
  3310. i = rx_ring->next_to_clean;
  3311. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3312. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3313. buffer_info = &rx_ring->buffer_info[i];
  3314. while (staterr & E1000_RXD_STAT_DD) {
  3315. ps_page = &rx_ring->ps_page[i];
  3316. ps_page_dma = &rx_ring->ps_page_dma[i];
  3317. #ifdef CONFIG_E1000_NAPI
  3318. if (unlikely(*work_done >= work_to_do))
  3319. break;
  3320. (*work_done)++;
  3321. #endif
  3322. skb = buffer_info->skb;
  3323. /* in the packet split case this is header only */
  3324. prefetch(skb->data - NET_IP_ALIGN);
  3325. if (++i == rx_ring->count) i = 0;
  3326. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3327. prefetch(next_rxd);
  3328. next_buffer = &rx_ring->buffer_info[i];
  3329. cleaned = TRUE;
  3330. cleaned_count++;
  3331. pci_unmap_single(pdev, buffer_info->dma,
  3332. buffer_info->length,
  3333. PCI_DMA_FROMDEVICE);
  3334. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3335. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3336. " the full packet\n", netdev->name);
  3337. dev_kfree_skb_irq(skb);
  3338. goto next_desc;
  3339. }
  3340. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3341. dev_kfree_skb_irq(skb);
  3342. goto next_desc;
  3343. }
  3344. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3345. if (unlikely(!length)) {
  3346. E1000_DBG("%s: Last part of the packet spanning"
  3347. " multiple descriptors\n", netdev->name);
  3348. dev_kfree_skb_irq(skb);
  3349. goto next_desc;
  3350. }
  3351. /* Good Receive */
  3352. skb_put(skb, length);
  3353. {
  3354. /* this looks ugly, but it seems compiler issues make it
  3355. more efficient than reusing j */
  3356. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3357. /* page alloc/put takes too long and effects small packet
  3358. * throughput, so unsplit small packets and save the alloc/put*/
  3359. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3360. u8 *vaddr;
  3361. /* there is no documentation about how to call
  3362. * kmap_atomic, so we can't hold the mapping
  3363. * very long */
  3364. pci_dma_sync_single_for_cpu(pdev,
  3365. ps_page_dma->ps_page_dma[0],
  3366. PAGE_SIZE,
  3367. PCI_DMA_FROMDEVICE);
  3368. vaddr = kmap_atomic(ps_page->ps_page[0],
  3369. KM_SKB_DATA_SOFTIRQ);
  3370. memcpy(skb->tail, vaddr, l1);
  3371. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3372. pci_dma_sync_single_for_device(pdev,
  3373. ps_page_dma->ps_page_dma[0],
  3374. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3375. /* remove the CRC */
  3376. l1 -= 4;
  3377. skb_put(skb, l1);
  3378. goto copydone;
  3379. } /* if */
  3380. }
  3381. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3382. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3383. break;
  3384. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3385. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3386. ps_page_dma->ps_page_dma[j] = 0;
  3387. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3388. length);
  3389. ps_page->ps_page[j] = NULL;
  3390. skb->len += length;
  3391. skb->data_len += length;
  3392. skb->truesize += length;
  3393. }
  3394. /* strip the ethernet crc, problem is we're using pages now so
  3395. * this whole operation can get a little cpu intensive */
  3396. pskb_trim(skb, skb->len - 4);
  3397. copydone:
  3398. e1000_rx_checksum(adapter, staterr,
  3399. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3400. skb->protocol = eth_type_trans(skb, netdev);
  3401. if (likely(rx_desc->wb.upper.header_status &
  3402. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3403. adapter->rx_hdr_split++;
  3404. #ifdef CONFIG_E1000_NAPI
  3405. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3406. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3407. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3408. E1000_RXD_SPC_VLAN_MASK);
  3409. } else {
  3410. netif_receive_skb(skb);
  3411. }
  3412. #else /* CONFIG_E1000_NAPI */
  3413. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3414. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3415. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3416. E1000_RXD_SPC_VLAN_MASK);
  3417. } else {
  3418. netif_rx(skb);
  3419. }
  3420. #endif /* CONFIG_E1000_NAPI */
  3421. netdev->last_rx = jiffies;
  3422. next_desc:
  3423. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3424. buffer_info->skb = NULL;
  3425. /* return some buffers to hardware, one at a time is too slow */
  3426. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3427. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3428. cleaned_count = 0;
  3429. }
  3430. /* use prefetched values */
  3431. rx_desc = next_rxd;
  3432. buffer_info = next_buffer;
  3433. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3434. }
  3435. rx_ring->next_to_clean = i;
  3436. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3437. if (cleaned_count)
  3438. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3439. return cleaned;
  3440. }
  3441. /**
  3442. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3443. * @adapter: address of board private structure
  3444. **/
  3445. static void
  3446. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3447. struct e1000_rx_ring *rx_ring,
  3448. int cleaned_count)
  3449. {
  3450. struct net_device *netdev = adapter->netdev;
  3451. struct pci_dev *pdev = adapter->pdev;
  3452. struct e1000_rx_desc *rx_desc;
  3453. struct e1000_buffer *buffer_info;
  3454. struct sk_buff *skb;
  3455. unsigned int i;
  3456. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3457. i = rx_ring->next_to_use;
  3458. buffer_info = &rx_ring->buffer_info[i];
  3459. while (cleaned_count--) {
  3460. skb = buffer_info->skb;
  3461. if (skb) {
  3462. skb_trim(skb, 0);
  3463. goto map_skb;
  3464. }
  3465. skb = netdev_alloc_skb(netdev, bufsz);
  3466. if (unlikely(!skb)) {
  3467. /* Better luck next round */
  3468. adapter->alloc_rx_buff_failed++;
  3469. break;
  3470. }
  3471. /* Fix for errata 23, can't cross 64kB boundary */
  3472. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3473. struct sk_buff *oldskb = skb;
  3474. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3475. "at %p\n", bufsz, skb->data);
  3476. /* Try again, without freeing the previous */
  3477. skb = netdev_alloc_skb(netdev, bufsz);
  3478. /* Failed allocation, critical failure */
  3479. if (!skb) {
  3480. dev_kfree_skb(oldskb);
  3481. break;
  3482. }
  3483. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3484. /* give up */
  3485. dev_kfree_skb(skb);
  3486. dev_kfree_skb(oldskb);
  3487. break; /* while !buffer_info->skb */
  3488. }
  3489. /* Use new allocation */
  3490. dev_kfree_skb(oldskb);
  3491. }
  3492. /* Make buffer alignment 2 beyond a 16 byte boundary
  3493. * this will result in a 16 byte aligned IP header after
  3494. * the 14 byte MAC header is removed
  3495. */
  3496. skb_reserve(skb, NET_IP_ALIGN);
  3497. buffer_info->skb = skb;
  3498. buffer_info->length = adapter->rx_buffer_len;
  3499. map_skb:
  3500. buffer_info->dma = pci_map_single(pdev,
  3501. skb->data,
  3502. adapter->rx_buffer_len,
  3503. PCI_DMA_FROMDEVICE);
  3504. /* Fix for errata 23, can't cross 64kB boundary */
  3505. if (!e1000_check_64k_bound(adapter,
  3506. (void *)(unsigned long)buffer_info->dma,
  3507. adapter->rx_buffer_len)) {
  3508. DPRINTK(RX_ERR, ERR,
  3509. "dma align check failed: %u bytes at %p\n",
  3510. adapter->rx_buffer_len,
  3511. (void *)(unsigned long)buffer_info->dma);
  3512. dev_kfree_skb(skb);
  3513. buffer_info->skb = NULL;
  3514. pci_unmap_single(pdev, buffer_info->dma,
  3515. adapter->rx_buffer_len,
  3516. PCI_DMA_FROMDEVICE);
  3517. break; /* while !buffer_info->skb */
  3518. }
  3519. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3520. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3521. if (unlikely(++i == rx_ring->count))
  3522. i = 0;
  3523. buffer_info = &rx_ring->buffer_info[i];
  3524. }
  3525. if (likely(rx_ring->next_to_use != i)) {
  3526. rx_ring->next_to_use = i;
  3527. if (unlikely(i-- == 0))
  3528. i = (rx_ring->count - 1);
  3529. /* Force memory writes to complete before letting h/w
  3530. * know there are new descriptors to fetch. (Only
  3531. * applicable for weak-ordered memory model archs,
  3532. * such as IA-64). */
  3533. wmb();
  3534. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3535. }
  3536. }
  3537. /**
  3538. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3539. * @adapter: address of board private structure
  3540. **/
  3541. static void
  3542. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3543. struct e1000_rx_ring *rx_ring,
  3544. int cleaned_count)
  3545. {
  3546. struct net_device *netdev = adapter->netdev;
  3547. struct pci_dev *pdev = adapter->pdev;
  3548. union e1000_rx_desc_packet_split *rx_desc;
  3549. struct e1000_buffer *buffer_info;
  3550. struct e1000_ps_page *ps_page;
  3551. struct e1000_ps_page_dma *ps_page_dma;
  3552. struct sk_buff *skb;
  3553. unsigned int i, j;
  3554. i = rx_ring->next_to_use;
  3555. buffer_info = &rx_ring->buffer_info[i];
  3556. ps_page = &rx_ring->ps_page[i];
  3557. ps_page_dma = &rx_ring->ps_page_dma[i];
  3558. while (cleaned_count--) {
  3559. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3560. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3561. if (j < adapter->rx_ps_pages) {
  3562. if (likely(!ps_page->ps_page[j])) {
  3563. ps_page->ps_page[j] =
  3564. alloc_page(GFP_ATOMIC);
  3565. if (unlikely(!ps_page->ps_page[j])) {
  3566. adapter->alloc_rx_buff_failed++;
  3567. goto no_buffers;
  3568. }
  3569. ps_page_dma->ps_page_dma[j] =
  3570. pci_map_page(pdev,
  3571. ps_page->ps_page[j],
  3572. 0, PAGE_SIZE,
  3573. PCI_DMA_FROMDEVICE);
  3574. }
  3575. /* Refresh the desc even if buffer_addrs didn't
  3576. * change because each write-back erases
  3577. * this info.
  3578. */
  3579. rx_desc->read.buffer_addr[j+1] =
  3580. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3581. } else
  3582. rx_desc->read.buffer_addr[j+1] = ~0;
  3583. }
  3584. skb = netdev_alloc_skb(netdev,
  3585. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3586. if (unlikely(!skb)) {
  3587. adapter->alloc_rx_buff_failed++;
  3588. break;
  3589. }
  3590. /* Make buffer alignment 2 beyond a 16 byte boundary
  3591. * this will result in a 16 byte aligned IP header after
  3592. * the 14 byte MAC header is removed
  3593. */
  3594. skb_reserve(skb, NET_IP_ALIGN);
  3595. buffer_info->skb = skb;
  3596. buffer_info->length = adapter->rx_ps_bsize0;
  3597. buffer_info->dma = pci_map_single(pdev, skb->data,
  3598. adapter->rx_ps_bsize0,
  3599. PCI_DMA_FROMDEVICE);
  3600. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3601. if (unlikely(++i == rx_ring->count)) i = 0;
  3602. buffer_info = &rx_ring->buffer_info[i];
  3603. ps_page = &rx_ring->ps_page[i];
  3604. ps_page_dma = &rx_ring->ps_page_dma[i];
  3605. }
  3606. no_buffers:
  3607. if (likely(rx_ring->next_to_use != i)) {
  3608. rx_ring->next_to_use = i;
  3609. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3610. /* Force memory writes to complete before letting h/w
  3611. * know there are new descriptors to fetch. (Only
  3612. * applicable for weak-ordered memory model archs,
  3613. * such as IA-64). */
  3614. wmb();
  3615. /* Hardware increments by 16 bytes, but packet split
  3616. * descriptors are 32 bytes...so we increment tail
  3617. * twice as much.
  3618. */
  3619. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3620. }
  3621. }
  3622. /**
  3623. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3624. * @adapter:
  3625. **/
  3626. static void
  3627. e1000_smartspeed(struct e1000_adapter *adapter)
  3628. {
  3629. uint16_t phy_status;
  3630. uint16_t phy_ctrl;
  3631. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3632. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3633. return;
  3634. if (adapter->smartspeed == 0) {
  3635. /* If Master/Slave config fault is asserted twice,
  3636. * we assume back-to-back */
  3637. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3638. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3639. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3640. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3641. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3642. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3643. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3644. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3645. phy_ctrl);
  3646. adapter->smartspeed++;
  3647. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3648. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3649. &phy_ctrl)) {
  3650. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3651. MII_CR_RESTART_AUTO_NEG);
  3652. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3653. phy_ctrl);
  3654. }
  3655. }
  3656. return;
  3657. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3658. /* If still no link, perhaps using 2/3 pair cable */
  3659. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3660. phy_ctrl |= CR_1000T_MS_ENABLE;
  3661. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3662. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3663. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3664. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3665. MII_CR_RESTART_AUTO_NEG);
  3666. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3667. }
  3668. }
  3669. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3670. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3671. adapter->smartspeed = 0;
  3672. }
  3673. /**
  3674. * e1000_ioctl -
  3675. * @netdev:
  3676. * @ifreq:
  3677. * @cmd:
  3678. **/
  3679. static int
  3680. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3681. {
  3682. switch (cmd) {
  3683. case SIOCGMIIPHY:
  3684. case SIOCGMIIREG:
  3685. case SIOCSMIIREG:
  3686. return e1000_mii_ioctl(netdev, ifr, cmd);
  3687. default:
  3688. return -EOPNOTSUPP;
  3689. }
  3690. }
  3691. /**
  3692. * e1000_mii_ioctl -
  3693. * @netdev:
  3694. * @ifreq:
  3695. * @cmd:
  3696. **/
  3697. static int
  3698. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3699. {
  3700. struct e1000_adapter *adapter = netdev_priv(netdev);
  3701. struct mii_ioctl_data *data = if_mii(ifr);
  3702. int retval;
  3703. uint16_t mii_reg;
  3704. uint16_t spddplx;
  3705. unsigned long flags;
  3706. if (adapter->hw.media_type != e1000_media_type_copper)
  3707. return -EOPNOTSUPP;
  3708. switch (cmd) {
  3709. case SIOCGMIIPHY:
  3710. data->phy_id = adapter->hw.phy_addr;
  3711. break;
  3712. case SIOCGMIIREG:
  3713. if (!capable(CAP_NET_ADMIN))
  3714. return -EPERM;
  3715. spin_lock_irqsave(&adapter->stats_lock, flags);
  3716. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3717. &data->val_out)) {
  3718. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3719. return -EIO;
  3720. }
  3721. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3722. break;
  3723. case SIOCSMIIREG:
  3724. if (!capable(CAP_NET_ADMIN))
  3725. return -EPERM;
  3726. if (data->reg_num & ~(0x1F))
  3727. return -EFAULT;
  3728. mii_reg = data->val_in;
  3729. spin_lock_irqsave(&adapter->stats_lock, flags);
  3730. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3731. mii_reg)) {
  3732. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3733. return -EIO;
  3734. }
  3735. if (adapter->hw.media_type == e1000_media_type_copper) {
  3736. switch (data->reg_num) {
  3737. case PHY_CTRL:
  3738. if (mii_reg & MII_CR_POWER_DOWN)
  3739. break;
  3740. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3741. adapter->hw.autoneg = 1;
  3742. adapter->hw.autoneg_advertised = 0x2F;
  3743. } else {
  3744. if (mii_reg & 0x40)
  3745. spddplx = SPEED_1000;
  3746. else if (mii_reg & 0x2000)
  3747. spddplx = SPEED_100;
  3748. else
  3749. spddplx = SPEED_10;
  3750. spddplx += (mii_reg & 0x100)
  3751. ? DUPLEX_FULL :
  3752. DUPLEX_HALF;
  3753. retval = e1000_set_spd_dplx(adapter,
  3754. spddplx);
  3755. if (retval) {
  3756. spin_unlock_irqrestore(
  3757. &adapter->stats_lock,
  3758. flags);
  3759. return retval;
  3760. }
  3761. }
  3762. if (netif_running(adapter->netdev))
  3763. e1000_reinit_locked(adapter);
  3764. else
  3765. e1000_reset(adapter);
  3766. break;
  3767. case M88E1000_PHY_SPEC_CTRL:
  3768. case M88E1000_EXT_PHY_SPEC_CTRL:
  3769. if (e1000_phy_reset(&adapter->hw)) {
  3770. spin_unlock_irqrestore(
  3771. &adapter->stats_lock, flags);
  3772. return -EIO;
  3773. }
  3774. break;
  3775. }
  3776. } else {
  3777. switch (data->reg_num) {
  3778. case PHY_CTRL:
  3779. if (mii_reg & MII_CR_POWER_DOWN)
  3780. break;
  3781. if (netif_running(adapter->netdev))
  3782. e1000_reinit_locked(adapter);
  3783. else
  3784. e1000_reset(adapter);
  3785. break;
  3786. }
  3787. }
  3788. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3789. break;
  3790. default:
  3791. return -EOPNOTSUPP;
  3792. }
  3793. return E1000_SUCCESS;
  3794. }
  3795. void
  3796. e1000_pci_set_mwi(struct e1000_hw *hw)
  3797. {
  3798. struct e1000_adapter *adapter = hw->back;
  3799. int ret_val = pci_set_mwi(adapter->pdev);
  3800. if (ret_val)
  3801. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3802. }
  3803. void
  3804. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3805. {
  3806. struct e1000_adapter *adapter = hw->back;
  3807. pci_clear_mwi(adapter->pdev);
  3808. }
  3809. void
  3810. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3811. {
  3812. struct e1000_adapter *adapter = hw->back;
  3813. pci_read_config_word(adapter->pdev, reg, value);
  3814. }
  3815. void
  3816. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3817. {
  3818. struct e1000_adapter *adapter = hw->back;
  3819. pci_write_config_word(adapter->pdev, reg, *value);
  3820. }
  3821. void
  3822. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3823. {
  3824. outl(value, port);
  3825. }
  3826. static void
  3827. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3828. {
  3829. struct e1000_adapter *adapter = netdev_priv(netdev);
  3830. uint32_t ctrl, rctl;
  3831. e1000_irq_disable(adapter);
  3832. adapter->vlgrp = grp;
  3833. if (grp) {
  3834. /* enable VLAN tag insert/strip */
  3835. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3836. ctrl |= E1000_CTRL_VME;
  3837. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3838. if (adapter->hw.mac_type != e1000_ich8lan) {
  3839. /* enable VLAN receive filtering */
  3840. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3841. rctl |= E1000_RCTL_VFE;
  3842. rctl &= ~E1000_RCTL_CFIEN;
  3843. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3844. e1000_update_mng_vlan(adapter);
  3845. }
  3846. } else {
  3847. /* disable VLAN tag insert/strip */
  3848. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3849. ctrl &= ~E1000_CTRL_VME;
  3850. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3851. if (adapter->hw.mac_type != e1000_ich8lan) {
  3852. /* disable VLAN filtering */
  3853. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3854. rctl &= ~E1000_RCTL_VFE;
  3855. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3856. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3857. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3858. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3859. }
  3860. }
  3861. }
  3862. e1000_irq_enable(adapter);
  3863. }
  3864. static void
  3865. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3866. {
  3867. struct e1000_adapter *adapter = netdev_priv(netdev);
  3868. uint32_t vfta, index;
  3869. if ((adapter->hw.mng_cookie.status &
  3870. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3871. (vid == adapter->mng_vlan_id))
  3872. return;
  3873. /* add VID to filter table */
  3874. index = (vid >> 5) & 0x7F;
  3875. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3876. vfta |= (1 << (vid & 0x1F));
  3877. e1000_write_vfta(&adapter->hw, index, vfta);
  3878. }
  3879. static void
  3880. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3881. {
  3882. struct e1000_adapter *adapter = netdev_priv(netdev);
  3883. uint32_t vfta, index;
  3884. e1000_irq_disable(adapter);
  3885. if (adapter->vlgrp)
  3886. adapter->vlgrp->vlan_devices[vid] = NULL;
  3887. e1000_irq_enable(adapter);
  3888. if ((adapter->hw.mng_cookie.status &
  3889. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3890. (vid == adapter->mng_vlan_id)) {
  3891. /* release control to f/w */
  3892. e1000_release_hw_control(adapter);
  3893. return;
  3894. }
  3895. /* remove VID from filter table */
  3896. index = (vid >> 5) & 0x7F;
  3897. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3898. vfta &= ~(1 << (vid & 0x1F));
  3899. e1000_write_vfta(&adapter->hw, index, vfta);
  3900. }
  3901. static void
  3902. e1000_restore_vlan(struct e1000_adapter *adapter)
  3903. {
  3904. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3905. if (adapter->vlgrp) {
  3906. uint16_t vid;
  3907. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3908. if (!adapter->vlgrp->vlan_devices[vid])
  3909. continue;
  3910. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3911. }
  3912. }
  3913. }
  3914. int
  3915. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3916. {
  3917. adapter->hw.autoneg = 0;
  3918. /* Fiber NICs only allow 1000 gbps Full duplex */
  3919. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3920. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3921. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3922. return -EINVAL;
  3923. }
  3924. switch (spddplx) {
  3925. case SPEED_10 + DUPLEX_HALF:
  3926. adapter->hw.forced_speed_duplex = e1000_10_half;
  3927. break;
  3928. case SPEED_10 + DUPLEX_FULL:
  3929. adapter->hw.forced_speed_duplex = e1000_10_full;
  3930. break;
  3931. case SPEED_100 + DUPLEX_HALF:
  3932. adapter->hw.forced_speed_duplex = e1000_100_half;
  3933. break;
  3934. case SPEED_100 + DUPLEX_FULL:
  3935. adapter->hw.forced_speed_duplex = e1000_100_full;
  3936. break;
  3937. case SPEED_1000 + DUPLEX_FULL:
  3938. adapter->hw.autoneg = 1;
  3939. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3940. break;
  3941. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3942. default:
  3943. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3944. return -EINVAL;
  3945. }
  3946. return 0;
  3947. }
  3948. #ifdef CONFIG_PM
  3949. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3950. * bus we're on (PCI(X) vs. PCI-E)
  3951. */
  3952. #define PCIE_CONFIG_SPACE_LEN 256
  3953. #define PCI_CONFIG_SPACE_LEN 64
  3954. static int
  3955. e1000_pci_save_state(struct e1000_adapter *adapter)
  3956. {
  3957. struct pci_dev *dev = adapter->pdev;
  3958. int size;
  3959. int i;
  3960. if (adapter->hw.mac_type >= e1000_82571)
  3961. size = PCIE_CONFIG_SPACE_LEN;
  3962. else
  3963. size = PCI_CONFIG_SPACE_LEN;
  3964. WARN_ON(adapter->config_space != NULL);
  3965. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3966. if (!adapter->config_space) {
  3967. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3968. return -ENOMEM;
  3969. }
  3970. for (i = 0; i < (size / 4); i++)
  3971. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3972. return 0;
  3973. }
  3974. static void
  3975. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3976. {
  3977. struct pci_dev *dev = adapter->pdev;
  3978. int size;
  3979. int i;
  3980. if (adapter->config_space == NULL)
  3981. return;
  3982. if (adapter->hw.mac_type >= e1000_82571)
  3983. size = PCIE_CONFIG_SPACE_LEN;
  3984. else
  3985. size = PCI_CONFIG_SPACE_LEN;
  3986. for (i = 0; i < (size / 4); i++)
  3987. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3988. kfree(adapter->config_space);
  3989. adapter->config_space = NULL;
  3990. return;
  3991. }
  3992. #endif /* CONFIG_PM */
  3993. static int
  3994. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3995. {
  3996. struct net_device *netdev = pci_get_drvdata(pdev);
  3997. struct e1000_adapter *adapter = netdev_priv(netdev);
  3998. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3999. uint32_t wufc = adapter->wol;
  4000. #ifdef CONFIG_PM
  4001. int retval = 0;
  4002. #endif
  4003. netif_device_detach(netdev);
  4004. if (netif_running(netdev)) {
  4005. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4006. e1000_down(adapter);
  4007. }
  4008. #ifdef CONFIG_PM
  4009. /* Implement our own version of pci_save_state(pdev) because pci-
  4010. * express adapters have 256-byte config spaces. */
  4011. retval = e1000_pci_save_state(adapter);
  4012. if (retval)
  4013. return retval;
  4014. #endif
  4015. status = E1000_READ_REG(&adapter->hw, STATUS);
  4016. if (status & E1000_STATUS_LU)
  4017. wufc &= ~E1000_WUFC_LNKC;
  4018. if (wufc) {
  4019. e1000_setup_rctl(adapter);
  4020. e1000_set_multi(netdev);
  4021. /* turn on all-multi mode if wake on multicast is enabled */
  4022. if (wufc & E1000_WUFC_MC) {
  4023. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4024. rctl |= E1000_RCTL_MPE;
  4025. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4026. }
  4027. if (adapter->hw.mac_type >= e1000_82540) {
  4028. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4029. /* advertise wake from D3Cold */
  4030. #define E1000_CTRL_ADVD3WUC 0x00100000
  4031. /* phy power management enable */
  4032. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4033. ctrl |= E1000_CTRL_ADVD3WUC |
  4034. E1000_CTRL_EN_PHY_PWR_MGMT;
  4035. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4036. }
  4037. if (adapter->hw.media_type == e1000_media_type_fiber ||
  4038. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  4039. /* keep the laser running in D3 */
  4040. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  4041. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4042. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  4043. }
  4044. /* Allow time for pending master requests to run */
  4045. e1000_disable_pciex_master(&adapter->hw);
  4046. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4047. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4048. pci_enable_wake(pdev, PCI_D3hot, 1);
  4049. pci_enable_wake(pdev, PCI_D3cold, 1);
  4050. } else {
  4051. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4052. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4053. pci_enable_wake(pdev, PCI_D3hot, 0);
  4054. pci_enable_wake(pdev, PCI_D3cold, 0);
  4055. }
  4056. if (adapter->hw.mac_type < e1000_82571 &&
  4057. adapter->hw.media_type == e1000_media_type_copper) {
  4058. manc = E1000_READ_REG(&adapter->hw, MANC);
  4059. if (manc & E1000_MANC_SMBUS_EN) {
  4060. manc |= E1000_MANC_ARP_EN;
  4061. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4062. pci_enable_wake(pdev, PCI_D3hot, 1);
  4063. pci_enable_wake(pdev, PCI_D3cold, 1);
  4064. }
  4065. }
  4066. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4067. e1000_phy_powerdown_workaround(&adapter->hw);
  4068. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4069. * would have already happened in close and is redundant. */
  4070. e1000_release_hw_control(adapter);
  4071. pci_disable_device(pdev);
  4072. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4073. return 0;
  4074. }
  4075. #ifdef CONFIG_PM
  4076. static int
  4077. e1000_resume(struct pci_dev *pdev)
  4078. {
  4079. struct net_device *netdev = pci_get_drvdata(pdev);
  4080. struct e1000_adapter *adapter = netdev_priv(netdev);
  4081. uint32_t manc, err;
  4082. pci_set_power_state(pdev, PCI_D0);
  4083. e1000_pci_restore_state(adapter);
  4084. if ((err = pci_enable_device(pdev))) {
  4085. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4086. return err;
  4087. }
  4088. pci_set_master(pdev);
  4089. pci_enable_wake(pdev, PCI_D3hot, 0);
  4090. pci_enable_wake(pdev, PCI_D3cold, 0);
  4091. e1000_reset(adapter);
  4092. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4093. if (netif_running(netdev))
  4094. e1000_up(adapter);
  4095. netif_device_attach(netdev);
  4096. if (adapter->hw.mac_type < e1000_82571 &&
  4097. adapter->hw.media_type == e1000_media_type_copper) {
  4098. manc = E1000_READ_REG(&adapter->hw, MANC);
  4099. manc &= ~(E1000_MANC_ARP_EN);
  4100. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4101. }
  4102. /* If the controller is 82573 and f/w is AMT, do not set
  4103. * DRV_LOAD until the interface is up. For all other cases,
  4104. * let the f/w know that the h/w is now under the control
  4105. * of the driver. */
  4106. if (adapter->hw.mac_type != e1000_82573 ||
  4107. !e1000_check_mng_mode(&adapter->hw))
  4108. e1000_get_hw_control(adapter);
  4109. return 0;
  4110. }
  4111. #endif
  4112. static void e1000_shutdown(struct pci_dev *pdev)
  4113. {
  4114. e1000_suspend(pdev, PMSG_SUSPEND);
  4115. }
  4116. #ifdef CONFIG_NET_POLL_CONTROLLER
  4117. /*
  4118. * Polling 'interrupt' - used by things like netconsole to send skbs
  4119. * without having to re-enable interrupts. It's not called while
  4120. * the interrupt routine is executing.
  4121. */
  4122. static void
  4123. e1000_netpoll(struct net_device *netdev)
  4124. {
  4125. struct e1000_adapter *adapter = netdev_priv(netdev);
  4126. disable_irq(adapter->pdev->irq);
  4127. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4128. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4129. #ifndef CONFIG_E1000_NAPI
  4130. adapter->clean_rx(adapter, adapter->rx_ring);
  4131. #endif
  4132. enable_irq(adapter->pdev->irq);
  4133. }
  4134. #endif
  4135. /**
  4136. * e1000_io_error_detected - called when PCI error is detected
  4137. * @pdev: Pointer to PCI device
  4138. * @state: The current pci conneection state
  4139. *
  4140. * This function is called after a PCI bus error affecting
  4141. * this device has been detected.
  4142. */
  4143. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4144. {
  4145. struct net_device *netdev = pci_get_drvdata(pdev);
  4146. struct e1000_adapter *adapter = netdev->priv;
  4147. netif_device_detach(netdev);
  4148. if (netif_running(netdev))
  4149. e1000_down(adapter);
  4150. pci_disable_device(pdev);
  4151. /* Request a slot slot reset. */
  4152. return PCI_ERS_RESULT_NEED_RESET;
  4153. }
  4154. /**
  4155. * e1000_io_slot_reset - called after the pci bus has been reset.
  4156. * @pdev: Pointer to PCI device
  4157. *
  4158. * Restart the card from scratch, as if from a cold-boot. Implementation
  4159. * resembles the first-half of the e1000_resume routine.
  4160. */
  4161. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4162. {
  4163. struct net_device *netdev = pci_get_drvdata(pdev);
  4164. struct e1000_adapter *adapter = netdev->priv;
  4165. if (pci_enable_device(pdev)) {
  4166. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4167. return PCI_ERS_RESULT_DISCONNECT;
  4168. }
  4169. pci_set_master(pdev);
  4170. pci_enable_wake(pdev, 3, 0);
  4171. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4172. /* Perform card reset only on one instance of the card */
  4173. if (PCI_FUNC (pdev->devfn) != 0)
  4174. return PCI_ERS_RESULT_RECOVERED;
  4175. e1000_reset(adapter);
  4176. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4177. return PCI_ERS_RESULT_RECOVERED;
  4178. }
  4179. /**
  4180. * e1000_io_resume - called when traffic can start flowing again.
  4181. * @pdev: Pointer to PCI device
  4182. *
  4183. * This callback is called when the error recovery driver tells us that
  4184. * its OK to resume normal operation. Implementation resembles the
  4185. * second-half of the e1000_resume routine.
  4186. */
  4187. static void e1000_io_resume(struct pci_dev *pdev)
  4188. {
  4189. struct net_device *netdev = pci_get_drvdata(pdev);
  4190. struct e1000_adapter *adapter = netdev->priv;
  4191. uint32_t manc, swsm;
  4192. if (netif_running(netdev)) {
  4193. if (e1000_up(adapter)) {
  4194. printk("e1000: can't bring device back up after reset\n");
  4195. return;
  4196. }
  4197. }
  4198. netif_device_attach(netdev);
  4199. if (adapter->hw.mac_type >= e1000_82540 &&
  4200. adapter->hw.media_type == e1000_media_type_copper) {
  4201. manc = E1000_READ_REG(&adapter->hw, MANC);
  4202. manc &= ~(E1000_MANC_ARP_EN);
  4203. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4204. }
  4205. switch (adapter->hw.mac_type) {
  4206. case e1000_82573:
  4207. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4208. E1000_WRITE_REG(&adapter->hw, SWSM,
  4209. swsm | E1000_SWSM_DRV_LOAD);
  4210. break;
  4211. default:
  4212. break;
  4213. }
  4214. if (netif_running(netdev))
  4215. mod_timer(&adapter->watchdog_timer, jiffies);
  4216. }
  4217. /* e1000_main.c */