main.c 58 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403
  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, mode);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. del_timer_sync(&sc->rx_poll_timer);
  204. ath9k_debug_samp_bb_mac(sc);
  205. ath9k_hw_disable_interrupts(ah);
  206. ret = ath_drain_all_txq(sc, retry_tx);
  207. if (!ath_stoprecv(sc))
  208. ret = false;
  209. if (!flush) {
  210. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  211. ath_rx_tasklet(sc, 1, true);
  212. ath_rx_tasklet(sc, 1, false);
  213. } else {
  214. ath_flushrecv(sc);
  215. }
  216. return ret;
  217. }
  218. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  219. {
  220. struct ath_hw *ah = sc->sc_ah;
  221. struct ath_common *common = ath9k_hw_common(ah);
  222. if (ath_startrecv(sc) != 0) {
  223. ath_err(common, "Unable to restart recv logic\n");
  224. return false;
  225. }
  226. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  227. sc->config.txpowlimit, &sc->curtxpow);
  228. ath9k_hw_set_interrupts(ah);
  229. ath9k_hw_enable_interrupts(ah);
  230. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  231. if (sc->sc_flags & SC_OP_BEACONS)
  232. ath_set_beacon(sc);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  234. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  235. ath_start_rx_poll(sc, 3);
  236. if (!common->disable_ani)
  237. ath_start_ani(common);
  238. }
  239. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  240. struct ath_hw_antcomb_conf div_ant_conf;
  241. u8 lna_conf;
  242. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  243. if (sc->ant_rx == 1)
  244. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  245. else
  246. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  247. div_ant_conf.main_lna_conf = lna_conf;
  248. div_ant_conf.alt_lna_conf = lna_conf;
  249. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  250. }
  251. ieee80211_wake_queues(sc->hw);
  252. return true;
  253. }
  254. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  255. bool retry_tx)
  256. {
  257. struct ath_hw *ah = sc->sc_ah;
  258. struct ath_common *common = ath9k_hw_common(ah);
  259. struct ath9k_hw_cal_data *caldata = NULL;
  260. bool fastcc = true;
  261. bool flush = false;
  262. int r;
  263. __ath_cancel_work(sc);
  264. spin_lock_bh(&sc->sc_pcu_lock);
  265. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  266. fastcc = false;
  267. caldata = &sc->caldata;
  268. }
  269. if (!hchan) {
  270. fastcc = false;
  271. flush = true;
  272. hchan = ah->curchan;
  273. }
  274. if (!ath_prepare_reset(sc, retry_tx, flush))
  275. fastcc = false;
  276. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  277. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  278. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  279. if (r) {
  280. ath_err(common,
  281. "Unable to reset channel, reset status %d\n", r);
  282. goto out;
  283. }
  284. if (!ath_complete_reset(sc, true))
  285. r = -EIO;
  286. out:
  287. spin_unlock_bh(&sc->sc_pcu_lock);
  288. return r;
  289. }
  290. /*
  291. * Set/change channels. If the channel is really being changed, it's done
  292. * by reseting the chip. To accomplish this we must first cleanup any pending
  293. * DMA, then restart stuff.
  294. */
  295. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  296. struct ath9k_channel *hchan)
  297. {
  298. int r;
  299. if (sc->sc_flags & SC_OP_INVALID)
  300. return -EIO;
  301. r = ath_reset_internal(sc, hchan, false);
  302. return r;
  303. }
  304. static void ath_paprd_activate(struct ath_softc *sc)
  305. {
  306. struct ath_hw *ah = sc->sc_ah;
  307. struct ath9k_hw_cal_data *caldata = ah->caldata;
  308. int chain;
  309. if (!caldata || !caldata->paprd_done)
  310. return;
  311. ath9k_ps_wakeup(sc);
  312. ar9003_paprd_enable(ah, false);
  313. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  314. if (!(ah->txchainmask & BIT(chain)))
  315. continue;
  316. ar9003_paprd_populate_single_table(ah, caldata, chain);
  317. }
  318. ar9003_paprd_enable(ah, true);
  319. ath9k_ps_restore(sc);
  320. }
  321. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  322. {
  323. struct ieee80211_hw *hw = sc->hw;
  324. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  325. struct ath_hw *ah = sc->sc_ah;
  326. struct ath_common *common = ath9k_hw_common(ah);
  327. struct ath_tx_control txctl;
  328. int time_left;
  329. memset(&txctl, 0, sizeof(txctl));
  330. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  331. memset(tx_info, 0, sizeof(*tx_info));
  332. tx_info->band = hw->conf.channel->band;
  333. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  334. tx_info->control.rates[0].idx = 0;
  335. tx_info->control.rates[0].count = 1;
  336. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  337. tx_info->control.rates[1].idx = -1;
  338. init_completion(&sc->paprd_complete);
  339. txctl.paprd = BIT(chain);
  340. if (ath_tx_start(hw, skb, &txctl) != 0) {
  341. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  342. dev_kfree_skb_any(skb);
  343. return false;
  344. }
  345. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  346. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  347. if (!time_left)
  348. ath_dbg(common, CALIBRATE,
  349. "Timeout waiting for paprd training on TX chain %d\n",
  350. chain);
  351. return !!time_left;
  352. }
  353. void ath_paprd_calibrate(struct work_struct *work)
  354. {
  355. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  356. struct ieee80211_hw *hw = sc->hw;
  357. struct ath_hw *ah = sc->sc_ah;
  358. struct ieee80211_hdr *hdr;
  359. struct sk_buff *skb = NULL;
  360. struct ath9k_hw_cal_data *caldata = ah->caldata;
  361. struct ath_common *common = ath9k_hw_common(ah);
  362. int ftype;
  363. int chain_ok = 0;
  364. int chain;
  365. int len = 1800;
  366. if (!caldata)
  367. return;
  368. ath9k_ps_wakeup(sc);
  369. if (ar9003_paprd_init_table(ah) < 0)
  370. goto fail_paprd;
  371. skb = alloc_skb(len, GFP_KERNEL);
  372. if (!skb)
  373. goto fail_paprd;
  374. skb_put(skb, len);
  375. memset(skb->data, 0, len);
  376. hdr = (struct ieee80211_hdr *)skb->data;
  377. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  378. hdr->frame_control = cpu_to_le16(ftype);
  379. hdr->duration_id = cpu_to_le16(10);
  380. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  381. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  382. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  383. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  384. if (!(ah->txchainmask & BIT(chain)))
  385. continue;
  386. chain_ok = 0;
  387. ath_dbg(common, CALIBRATE,
  388. "Sending PAPRD frame for thermal measurement on chain %d\n",
  389. chain);
  390. if (!ath_paprd_send_frame(sc, skb, chain))
  391. goto fail_paprd;
  392. ar9003_paprd_setup_gain_table(ah, chain);
  393. ath_dbg(common, CALIBRATE,
  394. "Sending PAPRD training frame on chain %d\n", chain);
  395. if (!ath_paprd_send_frame(sc, skb, chain))
  396. goto fail_paprd;
  397. if (!ar9003_paprd_is_done(ah)) {
  398. ath_dbg(common, CALIBRATE,
  399. "PAPRD not yet done on chain %d\n", chain);
  400. break;
  401. }
  402. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  403. ath_dbg(common, CALIBRATE,
  404. "PAPRD create curve failed on chain %d\n",
  405. chain);
  406. break;
  407. }
  408. chain_ok = 1;
  409. }
  410. kfree_skb(skb);
  411. if (chain_ok) {
  412. caldata->paprd_done = true;
  413. ath_paprd_activate(sc);
  414. }
  415. fail_paprd:
  416. ath9k_ps_restore(sc);
  417. }
  418. /*
  419. * This routine performs the periodic noise floor calibration function
  420. * that is used to adjust and optimize the chip performance. This
  421. * takes environmental changes (location, temperature) into account.
  422. * When the task is complete, it reschedules itself depending on the
  423. * appropriate interval that was calculated.
  424. */
  425. void ath_ani_calibrate(unsigned long data)
  426. {
  427. struct ath_softc *sc = (struct ath_softc *)data;
  428. struct ath_hw *ah = sc->sc_ah;
  429. struct ath_common *common = ath9k_hw_common(ah);
  430. bool longcal = false;
  431. bool shortcal = false;
  432. bool aniflag = false;
  433. unsigned int timestamp = jiffies_to_msecs(jiffies);
  434. u32 cal_interval, short_cal_interval, long_cal_interval;
  435. unsigned long flags;
  436. if (ah->caldata && ah->caldata->nfcal_interference)
  437. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  438. else
  439. long_cal_interval = ATH_LONG_CALINTERVAL;
  440. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  441. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  442. /* Only calibrate if awake */
  443. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  444. goto set_timer;
  445. ath9k_ps_wakeup(sc);
  446. /* Long calibration runs independently of short calibration. */
  447. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  448. longcal = true;
  449. common->ani.longcal_timer = timestamp;
  450. }
  451. /* Short calibration applies only while caldone is false */
  452. if (!common->ani.caldone) {
  453. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  454. shortcal = true;
  455. common->ani.shortcal_timer = timestamp;
  456. common->ani.resetcal_timer = timestamp;
  457. }
  458. } else {
  459. if ((timestamp - common->ani.resetcal_timer) >=
  460. ATH_RESTART_CALINTERVAL) {
  461. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  462. if (common->ani.caldone)
  463. common->ani.resetcal_timer = timestamp;
  464. }
  465. }
  466. /* Verify whether we must check ANI */
  467. if (sc->sc_ah->config.enable_ani
  468. && (timestamp - common->ani.checkani_timer) >=
  469. ah->config.ani_poll_interval) {
  470. aniflag = true;
  471. common->ani.checkani_timer = timestamp;
  472. }
  473. /* Call ANI routine if necessary */
  474. if (aniflag) {
  475. spin_lock_irqsave(&common->cc_lock, flags);
  476. ath9k_hw_ani_monitor(ah, ah->curchan);
  477. ath_update_survey_stats(sc);
  478. spin_unlock_irqrestore(&common->cc_lock, flags);
  479. }
  480. /* Perform calibration if necessary */
  481. if (longcal || shortcal) {
  482. common->ani.caldone =
  483. ath9k_hw_calibrate(ah, ah->curchan,
  484. ah->rxchainmask, longcal);
  485. }
  486. ath_dbg(common, ANI,
  487. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  488. jiffies,
  489. longcal ? "long" : "", shortcal ? "short" : "",
  490. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  491. ath9k_ps_restore(sc);
  492. set_timer:
  493. /*
  494. * Set timer interval based on previous results.
  495. * The interval must be the shortest necessary to satisfy ANI,
  496. * short calibration and long calibration.
  497. */
  498. ath9k_debug_samp_bb_mac(sc);
  499. cal_interval = ATH_LONG_CALINTERVAL;
  500. if (sc->sc_ah->config.enable_ani)
  501. cal_interval = min(cal_interval,
  502. (u32)ah->config.ani_poll_interval);
  503. if (!common->ani.caldone)
  504. cal_interval = min(cal_interval, (u32)short_cal_interval);
  505. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  506. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  507. if (!ah->caldata->paprd_done)
  508. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  509. else if (!ah->paprd_table_write_done)
  510. ath_paprd_activate(sc);
  511. }
  512. }
  513. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  514. struct ieee80211_vif *vif)
  515. {
  516. struct ath_node *an;
  517. an = (struct ath_node *)sta->drv_priv;
  518. #ifdef CONFIG_ATH9K_DEBUGFS
  519. spin_lock(&sc->nodes_lock);
  520. list_add(&an->list, &sc->nodes);
  521. spin_unlock(&sc->nodes_lock);
  522. #endif
  523. an->sta = sta;
  524. an->vif = vif;
  525. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  526. ath_tx_node_init(sc, an);
  527. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  528. sta->ht_cap.ampdu_factor);
  529. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  530. }
  531. }
  532. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  533. {
  534. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  535. #ifdef CONFIG_ATH9K_DEBUGFS
  536. spin_lock(&sc->nodes_lock);
  537. list_del(&an->list);
  538. spin_unlock(&sc->nodes_lock);
  539. an->sta = NULL;
  540. #endif
  541. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  542. ath_tx_node_cleanup(sc, an);
  543. }
  544. void ath9k_tasklet(unsigned long data)
  545. {
  546. struct ath_softc *sc = (struct ath_softc *)data;
  547. struct ath_hw *ah = sc->sc_ah;
  548. struct ath_common *common = ath9k_hw_common(ah);
  549. u32 status = sc->intrstatus;
  550. u32 rxmask;
  551. ath9k_ps_wakeup(sc);
  552. spin_lock(&sc->sc_pcu_lock);
  553. if ((status & ATH9K_INT_FATAL) ||
  554. (status & ATH9K_INT_BB_WATCHDOG)) {
  555. #ifdef CONFIG_ATH9K_DEBUGFS
  556. enum ath_reset_type type;
  557. if (status & ATH9K_INT_FATAL)
  558. type = RESET_TYPE_FATAL_INT;
  559. else
  560. type = RESET_TYPE_BB_WATCHDOG;
  561. RESET_STAT_INC(sc, type);
  562. #endif
  563. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  564. goto out;
  565. }
  566. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  567. /*
  568. * TSF sync does not look correct; remain awake to sync with
  569. * the next Beacon.
  570. */
  571. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  572. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  573. }
  574. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  575. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  576. ATH9K_INT_RXORN);
  577. else
  578. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  579. if (status & rxmask) {
  580. /* Check for high priority Rx first */
  581. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  582. (status & ATH9K_INT_RXHP))
  583. ath_rx_tasklet(sc, 0, true);
  584. ath_rx_tasklet(sc, 0, false);
  585. }
  586. if (status & ATH9K_INT_TX) {
  587. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  588. ath_tx_edma_tasklet(sc);
  589. else
  590. ath_tx_tasklet(sc);
  591. }
  592. ath9k_btcoex_handle_interrupt(sc, status);
  593. out:
  594. /* re-enable hardware interrupt */
  595. ath9k_hw_enable_interrupts(ah);
  596. spin_unlock(&sc->sc_pcu_lock);
  597. ath9k_ps_restore(sc);
  598. }
  599. irqreturn_t ath_isr(int irq, void *dev)
  600. {
  601. #define SCHED_INTR ( \
  602. ATH9K_INT_FATAL | \
  603. ATH9K_INT_BB_WATCHDOG | \
  604. ATH9K_INT_RXORN | \
  605. ATH9K_INT_RXEOL | \
  606. ATH9K_INT_RX | \
  607. ATH9K_INT_RXLP | \
  608. ATH9K_INT_RXHP | \
  609. ATH9K_INT_TX | \
  610. ATH9K_INT_BMISS | \
  611. ATH9K_INT_CST | \
  612. ATH9K_INT_TSFOOR | \
  613. ATH9K_INT_GENTIMER | \
  614. ATH9K_INT_MCI)
  615. struct ath_softc *sc = dev;
  616. struct ath_hw *ah = sc->sc_ah;
  617. struct ath_common *common = ath9k_hw_common(ah);
  618. enum ath9k_int status;
  619. bool sched = false;
  620. /*
  621. * The hardware is not ready/present, don't
  622. * touch anything. Note this can happen early
  623. * on if the IRQ is shared.
  624. */
  625. if (sc->sc_flags & SC_OP_INVALID)
  626. return IRQ_NONE;
  627. /* shared irq, not for us */
  628. if (!ath9k_hw_intrpend(ah))
  629. return IRQ_NONE;
  630. /*
  631. * Figure out the reason(s) for the interrupt. Note
  632. * that the hal returns a pseudo-ISR that may include
  633. * bits we haven't explicitly enabled so we mask the
  634. * value to insure we only process bits we requested.
  635. */
  636. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  637. status &= ah->imask; /* discard unasked-for bits */
  638. /*
  639. * If there are no status bits set, then this interrupt was not
  640. * for me (should have been caught above).
  641. */
  642. if (!status)
  643. return IRQ_NONE;
  644. /* Cache the status */
  645. sc->intrstatus = status;
  646. if (status & SCHED_INTR)
  647. sched = true;
  648. /*
  649. * If a FATAL or RXORN interrupt is received, we have to reset the
  650. * chip immediately.
  651. */
  652. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  653. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  654. goto chip_reset;
  655. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  656. (status & ATH9K_INT_BB_WATCHDOG)) {
  657. spin_lock(&common->cc_lock);
  658. ath_hw_cycle_counters_update(common);
  659. ar9003_hw_bb_watchdog_dbg_info(ah);
  660. spin_unlock(&common->cc_lock);
  661. goto chip_reset;
  662. }
  663. if (status & ATH9K_INT_SWBA)
  664. tasklet_schedule(&sc->bcon_tasklet);
  665. if (status & ATH9K_INT_TXURN)
  666. ath9k_hw_updatetxtriglevel(ah, true);
  667. if (status & ATH9K_INT_RXEOL) {
  668. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  669. ath9k_hw_set_interrupts(ah);
  670. }
  671. if (status & ATH9K_INT_MIB) {
  672. /*
  673. * Disable interrupts until we service the MIB
  674. * interrupt; otherwise it will continue to
  675. * fire.
  676. */
  677. ath9k_hw_disable_interrupts(ah);
  678. /*
  679. * Let the hal handle the event. We assume
  680. * it will clear whatever condition caused
  681. * the interrupt.
  682. */
  683. spin_lock(&common->cc_lock);
  684. ath9k_hw_proc_mib_event(ah);
  685. spin_unlock(&common->cc_lock);
  686. ath9k_hw_enable_interrupts(ah);
  687. }
  688. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  689. if (status & ATH9K_INT_TIM_TIMER) {
  690. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  691. goto chip_reset;
  692. /* Clear RxAbort bit so that we can
  693. * receive frames */
  694. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  695. ath9k_hw_setrxabort(sc->sc_ah, 0);
  696. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  697. }
  698. chip_reset:
  699. ath_debug_stat_interrupt(sc, status);
  700. if (sched) {
  701. /* turn off every interrupt */
  702. ath9k_hw_disable_interrupts(ah);
  703. tasklet_schedule(&sc->intr_tq);
  704. }
  705. return IRQ_HANDLED;
  706. #undef SCHED_INTR
  707. }
  708. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  709. {
  710. int r;
  711. ath9k_ps_wakeup(sc);
  712. r = ath_reset_internal(sc, NULL, retry_tx);
  713. if (retry_tx) {
  714. int i;
  715. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  716. if (ATH_TXQ_SETUP(sc, i)) {
  717. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  718. ath_txq_schedule(sc, &sc->tx.txq[i]);
  719. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  720. }
  721. }
  722. }
  723. ath9k_ps_restore(sc);
  724. return r;
  725. }
  726. void ath_reset_work(struct work_struct *work)
  727. {
  728. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  729. ath_reset(sc, true);
  730. }
  731. void ath_hw_check(struct work_struct *work)
  732. {
  733. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  734. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  735. unsigned long flags;
  736. int busy;
  737. u8 is_alive, nbeacon = 1;
  738. ath9k_ps_wakeup(sc);
  739. is_alive = ath9k_hw_check_alive(sc->sc_ah);
  740. if (is_alive && !AR_SREV_9300(sc->sc_ah))
  741. goto out;
  742. else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
  743. ath_dbg(common, RESET,
  744. "DCU stuck is detected. Schedule chip reset\n");
  745. RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
  746. goto sched_reset;
  747. }
  748. spin_lock_irqsave(&common->cc_lock, flags);
  749. busy = ath_update_survey_stats(sc);
  750. spin_unlock_irqrestore(&common->cc_lock, flags);
  751. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  752. busy, sc->hw_busy_count + 1);
  753. if (busy >= 99) {
  754. if (++sc->hw_busy_count >= 3) {
  755. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  756. goto sched_reset;
  757. }
  758. } else if (busy >= 0) {
  759. sc->hw_busy_count = 0;
  760. nbeacon = 3;
  761. }
  762. ath_start_rx_poll(sc, nbeacon);
  763. goto out;
  764. sched_reset:
  765. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  766. out:
  767. ath9k_ps_restore(sc);
  768. }
  769. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  770. {
  771. static int count;
  772. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  773. if (pll_sqsum >= 0x40000) {
  774. count++;
  775. if (count == 3) {
  776. /* Rx is hung for more than 500ms. Reset it */
  777. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  778. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  779. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  780. count = 0;
  781. }
  782. } else
  783. count = 0;
  784. }
  785. void ath_hw_pll_work(struct work_struct *work)
  786. {
  787. struct ath_softc *sc = container_of(work, struct ath_softc,
  788. hw_pll_work.work);
  789. u32 pll_sqsum;
  790. if (AR_SREV_9485(sc->sc_ah)) {
  791. ath9k_ps_wakeup(sc);
  792. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  793. ath9k_ps_restore(sc);
  794. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  795. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  796. }
  797. }
  798. /**********************/
  799. /* mac80211 callbacks */
  800. /**********************/
  801. static int ath9k_start(struct ieee80211_hw *hw)
  802. {
  803. struct ath_softc *sc = hw->priv;
  804. struct ath_hw *ah = sc->sc_ah;
  805. struct ath_common *common = ath9k_hw_common(ah);
  806. struct ieee80211_channel *curchan = hw->conf.channel;
  807. struct ath9k_channel *init_channel;
  808. int r;
  809. ath_dbg(common, CONFIG,
  810. "Starting driver with initial channel: %d MHz\n",
  811. curchan->center_freq);
  812. ath9k_ps_wakeup(sc);
  813. mutex_lock(&sc->mutex);
  814. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  815. /* Reset SERDES registers */
  816. ath9k_hw_configpcipowersave(ah, false);
  817. /*
  818. * The basic interface to setting the hardware in a good
  819. * state is ``reset''. On return the hardware is known to
  820. * be powered up and with interrupts disabled. This must
  821. * be followed by initialization of the appropriate bits
  822. * and then setup of the interrupt mask.
  823. */
  824. spin_lock_bh(&sc->sc_pcu_lock);
  825. atomic_set(&ah->intr_ref_cnt, -1);
  826. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  827. if (r) {
  828. ath_err(common,
  829. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  830. r, curchan->center_freq);
  831. spin_unlock_bh(&sc->sc_pcu_lock);
  832. goto mutex_unlock;
  833. }
  834. /* Setup our intr mask. */
  835. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  836. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  837. ATH9K_INT_GLOBAL;
  838. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  839. ah->imask |= ATH9K_INT_RXHP |
  840. ATH9K_INT_RXLP |
  841. ATH9K_INT_BB_WATCHDOG;
  842. else
  843. ah->imask |= ATH9K_INT_RX;
  844. ah->imask |= ATH9K_INT_GTT;
  845. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  846. ah->imask |= ATH9K_INT_CST;
  847. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  848. ah->imask |= ATH9K_INT_MCI;
  849. sc->sc_flags &= ~SC_OP_INVALID;
  850. sc->sc_ah->is_monitoring = false;
  851. if (!ath_complete_reset(sc, false)) {
  852. r = -EIO;
  853. spin_unlock_bh(&sc->sc_pcu_lock);
  854. goto mutex_unlock;
  855. }
  856. if (ah->led_pin >= 0) {
  857. ath9k_hw_cfg_output(ah, ah->led_pin,
  858. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  859. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  860. }
  861. /*
  862. * Reset key cache to sane defaults (all entries cleared) instead of
  863. * semi-random values after suspend/resume.
  864. */
  865. ath9k_cmn_init_crypto(sc->sc_ah);
  866. spin_unlock_bh(&sc->sc_pcu_lock);
  867. ath9k_start_btcoex(sc);
  868. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  869. common->bus_ops->extn_synch_en(common);
  870. mutex_unlock:
  871. mutex_unlock(&sc->mutex);
  872. ath9k_ps_restore(sc);
  873. return r;
  874. }
  875. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  876. {
  877. struct ath_softc *sc = hw->priv;
  878. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  879. struct ath_tx_control txctl;
  880. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  881. if (sc->ps_enabled) {
  882. /*
  883. * mac80211 does not set PM field for normal data frames, so we
  884. * need to update that based on the current PS mode.
  885. */
  886. if (ieee80211_is_data(hdr->frame_control) &&
  887. !ieee80211_is_nullfunc(hdr->frame_control) &&
  888. !ieee80211_has_pm(hdr->frame_control)) {
  889. ath_dbg(common, PS,
  890. "Add PM=1 for a TX frame while in PS mode\n");
  891. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  892. }
  893. }
  894. /*
  895. * Cannot tx while the hardware is in full sleep, it first needs a full
  896. * chip reset to recover from that
  897. */
  898. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  899. goto exit;
  900. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  901. /*
  902. * We are using PS-Poll and mac80211 can request TX while in
  903. * power save mode. Need to wake up hardware for the TX to be
  904. * completed and if needed, also for RX of buffered frames.
  905. */
  906. ath9k_ps_wakeup(sc);
  907. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  908. ath9k_hw_setrxabort(sc->sc_ah, 0);
  909. if (ieee80211_is_pspoll(hdr->frame_control)) {
  910. ath_dbg(common, PS,
  911. "Sending PS-Poll to pick a buffered frame\n");
  912. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  913. } else {
  914. ath_dbg(common, PS, "Wake up to complete TX\n");
  915. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  916. }
  917. /*
  918. * The actual restore operation will happen only after
  919. * the sc_flags bit is cleared. We are just dropping
  920. * the ps_usecount here.
  921. */
  922. ath9k_ps_restore(sc);
  923. }
  924. memset(&txctl, 0, sizeof(struct ath_tx_control));
  925. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  926. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  927. if (ath_tx_start(hw, skb, &txctl) != 0) {
  928. ath_dbg(common, XMIT, "TX failed\n");
  929. TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
  930. goto exit;
  931. }
  932. return;
  933. exit:
  934. dev_kfree_skb_any(skb);
  935. }
  936. static void ath9k_stop(struct ieee80211_hw *hw)
  937. {
  938. struct ath_softc *sc = hw->priv;
  939. struct ath_hw *ah = sc->sc_ah;
  940. struct ath_common *common = ath9k_hw_common(ah);
  941. bool prev_idle;
  942. mutex_lock(&sc->mutex);
  943. ath_cancel_work(sc);
  944. del_timer_sync(&sc->rx_poll_timer);
  945. if (sc->sc_flags & SC_OP_INVALID) {
  946. ath_dbg(common, ANY, "Device not present\n");
  947. mutex_unlock(&sc->mutex);
  948. return;
  949. }
  950. /* Ensure HW is awake when we try to shut it down. */
  951. ath9k_ps_wakeup(sc);
  952. ath9k_stop_btcoex(sc);
  953. spin_lock_bh(&sc->sc_pcu_lock);
  954. /* prevent tasklets to enable interrupts once we disable them */
  955. ah->imask &= ~ATH9K_INT_GLOBAL;
  956. /* make sure h/w will not generate any interrupt
  957. * before setting the invalid flag. */
  958. ath9k_hw_disable_interrupts(ah);
  959. spin_unlock_bh(&sc->sc_pcu_lock);
  960. /* we can now sync irq and kill any running tasklets, since we already
  961. * disabled interrupts and not holding a spin lock */
  962. synchronize_irq(sc->irq);
  963. tasklet_kill(&sc->intr_tq);
  964. tasklet_kill(&sc->bcon_tasklet);
  965. prev_idle = sc->ps_idle;
  966. sc->ps_idle = true;
  967. spin_lock_bh(&sc->sc_pcu_lock);
  968. if (ah->led_pin >= 0) {
  969. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  970. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  971. }
  972. ath_prepare_reset(sc, false, true);
  973. if (sc->rx.frag) {
  974. dev_kfree_skb_any(sc->rx.frag);
  975. sc->rx.frag = NULL;
  976. }
  977. if (!ah->curchan)
  978. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  979. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  980. ath9k_hw_phy_disable(ah);
  981. ath9k_hw_configpcipowersave(ah, true);
  982. spin_unlock_bh(&sc->sc_pcu_lock);
  983. ath9k_ps_restore(sc);
  984. sc->sc_flags |= SC_OP_INVALID;
  985. sc->ps_idle = prev_idle;
  986. mutex_unlock(&sc->mutex);
  987. ath_dbg(common, CONFIG, "Driver halt\n");
  988. }
  989. bool ath9k_uses_beacons(int type)
  990. {
  991. switch (type) {
  992. case NL80211_IFTYPE_AP:
  993. case NL80211_IFTYPE_ADHOC:
  994. case NL80211_IFTYPE_MESH_POINT:
  995. return true;
  996. default:
  997. return false;
  998. }
  999. }
  1000. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1001. struct ieee80211_vif *vif)
  1002. {
  1003. struct ath_vif *avp = (void *)vif->drv_priv;
  1004. ath9k_set_beaconing_status(sc, false);
  1005. ath_beacon_return(sc, avp);
  1006. ath9k_set_beaconing_status(sc, true);
  1007. }
  1008. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1009. {
  1010. struct ath9k_vif_iter_data *iter_data = data;
  1011. int i;
  1012. if (iter_data->hw_macaddr)
  1013. for (i = 0; i < ETH_ALEN; i++)
  1014. iter_data->mask[i] &=
  1015. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1016. switch (vif->type) {
  1017. case NL80211_IFTYPE_AP:
  1018. iter_data->naps++;
  1019. break;
  1020. case NL80211_IFTYPE_STATION:
  1021. iter_data->nstations++;
  1022. break;
  1023. case NL80211_IFTYPE_ADHOC:
  1024. iter_data->nadhocs++;
  1025. break;
  1026. case NL80211_IFTYPE_MESH_POINT:
  1027. iter_data->nmeshes++;
  1028. break;
  1029. case NL80211_IFTYPE_WDS:
  1030. iter_data->nwds++;
  1031. break;
  1032. default:
  1033. break;
  1034. }
  1035. }
  1036. /* Called with sc->mutex held. */
  1037. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1038. struct ieee80211_vif *vif,
  1039. struct ath9k_vif_iter_data *iter_data)
  1040. {
  1041. struct ath_softc *sc = hw->priv;
  1042. struct ath_hw *ah = sc->sc_ah;
  1043. struct ath_common *common = ath9k_hw_common(ah);
  1044. /*
  1045. * Use the hardware MAC address as reference, the hardware uses it
  1046. * together with the BSSID mask when matching addresses.
  1047. */
  1048. memset(iter_data, 0, sizeof(*iter_data));
  1049. iter_data->hw_macaddr = common->macaddr;
  1050. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1051. if (vif)
  1052. ath9k_vif_iter(iter_data, vif->addr, vif);
  1053. /* Get list of all active MAC addresses */
  1054. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1055. iter_data);
  1056. }
  1057. /* Called with sc->mutex held. */
  1058. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1059. struct ieee80211_vif *vif)
  1060. {
  1061. struct ath_softc *sc = hw->priv;
  1062. struct ath_hw *ah = sc->sc_ah;
  1063. struct ath_common *common = ath9k_hw_common(ah);
  1064. struct ath9k_vif_iter_data iter_data;
  1065. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1066. /* Set BSSID mask. */
  1067. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1068. ath_hw_setbssidmask(common);
  1069. /* Set op-mode & TSF */
  1070. if (iter_data.naps > 0) {
  1071. ath9k_hw_set_tsfadjust(ah, 1);
  1072. sc->sc_flags |= SC_OP_TSF_RESET;
  1073. ah->opmode = NL80211_IFTYPE_AP;
  1074. } else {
  1075. ath9k_hw_set_tsfadjust(ah, 0);
  1076. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1077. if (iter_data.nmeshes)
  1078. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1079. else if (iter_data.nwds)
  1080. ah->opmode = NL80211_IFTYPE_AP;
  1081. else if (iter_data.nadhocs)
  1082. ah->opmode = NL80211_IFTYPE_ADHOC;
  1083. else
  1084. ah->opmode = NL80211_IFTYPE_STATION;
  1085. }
  1086. /*
  1087. * Enable MIB interrupts when there are hardware phy counters.
  1088. */
  1089. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1090. if (ah->config.enable_ani)
  1091. ah->imask |= ATH9K_INT_MIB;
  1092. ah->imask |= ATH9K_INT_TSFOOR;
  1093. } else {
  1094. ah->imask &= ~ATH9K_INT_MIB;
  1095. ah->imask &= ~ATH9K_INT_TSFOOR;
  1096. }
  1097. ath9k_hw_set_interrupts(ah);
  1098. /* Set up ANI */
  1099. if (iter_data.naps > 0) {
  1100. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1101. if (!common->disable_ani) {
  1102. sc->sc_flags |= SC_OP_ANI_RUN;
  1103. ath_start_ani(common);
  1104. }
  1105. } else {
  1106. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1107. del_timer_sync(&common->ani.timer);
  1108. }
  1109. }
  1110. /* Called with sc->mutex held, vif counts set up properly. */
  1111. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1112. struct ieee80211_vif *vif)
  1113. {
  1114. struct ath_softc *sc = hw->priv;
  1115. ath9k_calculate_summary_state(hw, vif);
  1116. if (ath9k_uses_beacons(vif->type)) {
  1117. /* Reserve a beacon slot for the vif */
  1118. ath9k_set_beaconing_status(sc, false);
  1119. ath_beacon_alloc(sc, vif);
  1120. ath9k_set_beaconing_status(sc, true);
  1121. }
  1122. }
  1123. void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
  1124. {
  1125. if (!AR_SREV_9300(sc->sc_ah))
  1126. return;
  1127. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF))
  1128. return;
  1129. mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
  1130. (nbeacon * sc->cur_beacon_conf.beacon_interval));
  1131. }
  1132. void ath_rx_poll(unsigned long data)
  1133. {
  1134. struct ath_softc *sc = (struct ath_softc *)data;
  1135. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  1136. }
  1137. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1138. struct ieee80211_vif *vif)
  1139. {
  1140. struct ath_softc *sc = hw->priv;
  1141. struct ath_hw *ah = sc->sc_ah;
  1142. struct ath_common *common = ath9k_hw_common(ah);
  1143. int ret = 0;
  1144. ath9k_ps_wakeup(sc);
  1145. mutex_lock(&sc->mutex);
  1146. switch (vif->type) {
  1147. case NL80211_IFTYPE_STATION:
  1148. case NL80211_IFTYPE_WDS:
  1149. case NL80211_IFTYPE_ADHOC:
  1150. case NL80211_IFTYPE_AP:
  1151. case NL80211_IFTYPE_MESH_POINT:
  1152. break;
  1153. default:
  1154. ath_err(common, "Interface type %d not yet supported\n",
  1155. vif->type);
  1156. ret = -EOPNOTSUPP;
  1157. goto out;
  1158. }
  1159. if (ath9k_uses_beacons(vif->type)) {
  1160. if (sc->nbcnvifs >= ATH_BCBUF) {
  1161. ath_err(common, "Not enough beacon buffers when adding"
  1162. " new interface of type: %i\n",
  1163. vif->type);
  1164. ret = -ENOBUFS;
  1165. goto out;
  1166. }
  1167. }
  1168. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1169. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1170. sc->nvifs > 0)) {
  1171. ath_err(common, "Cannot create ADHOC interface when other"
  1172. " interfaces already exist.\n");
  1173. ret = -EINVAL;
  1174. goto out;
  1175. }
  1176. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1177. sc->nvifs++;
  1178. ath9k_do_vif_add_setup(hw, vif);
  1179. out:
  1180. mutex_unlock(&sc->mutex);
  1181. ath9k_ps_restore(sc);
  1182. return ret;
  1183. }
  1184. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1185. struct ieee80211_vif *vif,
  1186. enum nl80211_iftype new_type,
  1187. bool p2p)
  1188. {
  1189. struct ath_softc *sc = hw->priv;
  1190. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1191. int ret = 0;
  1192. ath_dbg(common, CONFIG, "Change Interface\n");
  1193. mutex_lock(&sc->mutex);
  1194. ath9k_ps_wakeup(sc);
  1195. /* See if new interface type is valid. */
  1196. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1197. (sc->nvifs > 1)) {
  1198. ath_err(common, "When using ADHOC, it must be the only"
  1199. " interface.\n");
  1200. ret = -EINVAL;
  1201. goto out;
  1202. }
  1203. if (ath9k_uses_beacons(new_type) &&
  1204. !ath9k_uses_beacons(vif->type)) {
  1205. if (sc->nbcnvifs >= ATH_BCBUF) {
  1206. ath_err(common, "No beacon slot available\n");
  1207. ret = -ENOBUFS;
  1208. goto out;
  1209. }
  1210. }
  1211. /* Clean up old vif stuff */
  1212. if (ath9k_uses_beacons(vif->type))
  1213. ath9k_reclaim_beacon(sc, vif);
  1214. /* Add new settings */
  1215. vif->type = new_type;
  1216. vif->p2p = p2p;
  1217. ath9k_do_vif_add_setup(hw, vif);
  1218. out:
  1219. ath9k_ps_restore(sc);
  1220. mutex_unlock(&sc->mutex);
  1221. return ret;
  1222. }
  1223. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1224. struct ieee80211_vif *vif)
  1225. {
  1226. struct ath_softc *sc = hw->priv;
  1227. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1228. ath_dbg(common, CONFIG, "Detach Interface\n");
  1229. ath9k_ps_wakeup(sc);
  1230. mutex_lock(&sc->mutex);
  1231. sc->nvifs--;
  1232. /* Reclaim beacon resources */
  1233. if (ath9k_uses_beacons(vif->type))
  1234. ath9k_reclaim_beacon(sc, vif);
  1235. ath9k_calculate_summary_state(hw, NULL);
  1236. mutex_unlock(&sc->mutex);
  1237. ath9k_ps_restore(sc);
  1238. }
  1239. static void ath9k_enable_ps(struct ath_softc *sc)
  1240. {
  1241. struct ath_hw *ah = sc->sc_ah;
  1242. sc->ps_enabled = true;
  1243. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1244. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1245. ah->imask |= ATH9K_INT_TIM_TIMER;
  1246. ath9k_hw_set_interrupts(ah);
  1247. }
  1248. ath9k_hw_setrxabort(ah, 1);
  1249. }
  1250. }
  1251. static void ath9k_disable_ps(struct ath_softc *sc)
  1252. {
  1253. struct ath_hw *ah = sc->sc_ah;
  1254. sc->ps_enabled = false;
  1255. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1256. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1257. ath9k_hw_setrxabort(ah, 0);
  1258. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1259. PS_WAIT_FOR_CAB |
  1260. PS_WAIT_FOR_PSPOLL_DATA |
  1261. PS_WAIT_FOR_TX_ACK);
  1262. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1263. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1264. ath9k_hw_set_interrupts(ah);
  1265. }
  1266. }
  1267. }
  1268. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1269. {
  1270. struct ath_softc *sc = hw->priv;
  1271. struct ath_hw *ah = sc->sc_ah;
  1272. struct ath_common *common = ath9k_hw_common(ah);
  1273. struct ieee80211_conf *conf = &hw->conf;
  1274. ath9k_ps_wakeup(sc);
  1275. mutex_lock(&sc->mutex);
  1276. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1277. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1278. if (sc->ps_idle)
  1279. ath_cancel_work(sc);
  1280. }
  1281. /*
  1282. * We just prepare to enable PS. We have to wait until our AP has
  1283. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1284. * those ACKs and end up retransmitting the same null data frames.
  1285. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1286. */
  1287. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1288. unsigned long flags;
  1289. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1290. if (conf->flags & IEEE80211_CONF_PS)
  1291. ath9k_enable_ps(sc);
  1292. else
  1293. ath9k_disable_ps(sc);
  1294. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1295. }
  1296. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1297. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1298. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1299. sc->sc_ah->is_monitoring = true;
  1300. } else {
  1301. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1302. sc->sc_ah->is_monitoring = false;
  1303. }
  1304. }
  1305. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1306. struct ieee80211_channel *curchan = hw->conf.channel;
  1307. int pos = curchan->hw_value;
  1308. int old_pos = -1;
  1309. unsigned long flags;
  1310. if (ah->curchan)
  1311. old_pos = ah->curchan - &ah->channels[0];
  1312. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1313. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1314. else
  1315. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1316. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1317. curchan->center_freq, conf->channel_type);
  1318. /* update survey stats for the old channel before switching */
  1319. spin_lock_irqsave(&common->cc_lock, flags);
  1320. ath_update_survey_stats(sc);
  1321. spin_unlock_irqrestore(&common->cc_lock, flags);
  1322. /*
  1323. * Preserve the current channel values, before updating
  1324. * the same channel
  1325. */
  1326. if (ah->curchan && (old_pos == pos))
  1327. ath9k_hw_getnf(ah, ah->curchan);
  1328. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1329. curchan, conf->channel_type);
  1330. /*
  1331. * If the operating channel changes, change the survey in-use flags
  1332. * along with it.
  1333. * Reset the survey data for the new channel, unless we're switching
  1334. * back to the operating channel from an off-channel operation.
  1335. */
  1336. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1337. sc->cur_survey != &sc->survey[pos]) {
  1338. if (sc->cur_survey)
  1339. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1340. sc->cur_survey = &sc->survey[pos];
  1341. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1342. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1343. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1344. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1345. }
  1346. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1347. ath_err(common, "Unable to set channel\n");
  1348. mutex_unlock(&sc->mutex);
  1349. return -EINVAL;
  1350. }
  1351. /*
  1352. * The most recent snapshot of channel->noisefloor for the old
  1353. * channel is only available after the hardware reset. Copy it to
  1354. * the survey stats now.
  1355. */
  1356. if (old_pos >= 0)
  1357. ath_update_survey_nf(sc, old_pos);
  1358. }
  1359. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1360. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1361. sc->config.txpowlimit = 2 * conf->power_level;
  1362. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1363. sc->config.txpowlimit, &sc->curtxpow);
  1364. }
  1365. mutex_unlock(&sc->mutex);
  1366. ath9k_ps_restore(sc);
  1367. return 0;
  1368. }
  1369. #define SUPPORTED_FILTERS \
  1370. (FIF_PROMISC_IN_BSS | \
  1371. FIF_ALLMULTI | \
  1372. FIF_CONTROL | \
  1373. FIF_PSPOLL | \
  1374. FIF_OTHER_BSS | \
  1375. FIF_BCN_PRBRESP_PROMISC | \
  1376. FIF_PROBE_REQ | \
  1377. FIF_FCSFAIL)
  1378. /* FIXME: sc->sc_full_reset ? */
  1379. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1380. unsigned int changed_flags,
  1381. unsigned int *total_flags,
  1382. u64 multicast)
  1383. {
  1384. struct ath_softc *sc = hw->priv;
  1385. u32 rfilt;
  1386. changed_flags &= SUPPORTED_FILTERS;
  1387. *total_flags &= SUPPORTED_FILTERS;
  1388. sc->rx.rxfilter = *total_flags;
  1389. ath9k_ps_wakeup(sc);
  1390. rfilt = ath_calcrxfilter(sc);
  1391. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1392. ath9k_ps_restore(sc);
  1393. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1394. rfilt);
  1395. }
  1396. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1397. struct ieee80211_vif *vif,
  1398. struct ieee80211_sta *sta)
  1399. {
  1400. struct ath_softc *sc = hw->priv;
  1401. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1402. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1403. struct ieee80211_key_conf ps_key = { };
  1404. ath_node_attach(sc, sta, vif);
  1405. if (vif->type != NL80211_IFTYPE_AP &&
  1406. vif->type != NL80211_IFTYPE_AP_VLAN)
  1407. return 0;
  1408. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1409. return 0;
  1410. }
  1411. static void ath9k_del_ps_key(struct ath_softc *sc,
  1412. struct ieee80211_vif *vif,
  1413. struct ieee80211_sta *sta)
  1414. {
  1415. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1416. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1417. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1418. if (!an->ps_key)
  1419. return;
  1420. ath_key_delete(common, &ps_key);
  1421. }
  1422. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1423. struct ieee80211_vif *vif,
  1424. struct ieee80211_sta *sta)
  1425. {
  1426. struct ath_softc *sc = hw->priv;
  1427. ath9k_del_ps_key(sc, vif, sta);
  1428. ath_node_detach(sc, sta);
  1429. return 0;
  1430. }
  1431. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1432. struct ieee80211_vif *vif,
  1433. enum sta_notify_cmd cmd,
  1434. struct ieee80211_sta *sta)
  1435. {
  1436. struct ath_softc *sc = hw->priv;
  1437. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1438. if (!sta->ht_cap.ht_supported)
  1439. return;
  1440. switch (cmd) {
  1441. case STA_NOTIFY_SLEEP:
  1442. an->sleeping = true;
  1443. ath_tx_aggr_sleep(sta, sc, an);
  1444. break;
  1445. case STA_NOTIFY_AWAKE:
  1446. an->sleeping = false;
  1447. ath_tx_aggr_wakeup(sc, an);
  1448. break;
  1449. }
  1450. }
  1451. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1452. struct ieee80211_vif *vif, u16 queue,
  1453. const struct ieee80211_tx_queue_params *params)
  1454. {
  1455. struct ath_softc *sc = hw->priv;
  1456. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1457. struct ath_txq *txq;
  1458. struct ath9k_tx_queue_info qi;
  1459. int ret = 0;
  1460. if (queue >= WME_NUM_AC)
  1461. return 0;
  1462. txq = sc->tx.txq_map[queue];
  1463. ath9k_ps_wakeup(sc);
  1464. mutex_lock(&sc->mutex);
  1465. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1466. qi.tqi_aifs = params->aifs;
  1467. qi.tqi_cwmin = params->cw_min;
  1468. qi.tqi_cwmax = params->cw_max;
  1469. qi.tqi_burstTime = params->txop;
  1470. ath_dbg(common, CONFIG,
  1471. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1472. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1473. params->cw_max, params->txop);
  1474. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1475. if (ret)
  1476. ath_err(common, "TXQ Update failed\n");
  1477. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1478. if (queue == WME_AC_BE && !ret)
  1479. ath_beaconq_config(sc);
  1480. mutex_unlock(&sc->mutex);
  1481. ath9k_ps_restore(sc);
  1482. return ret;
  1483. }
  1484. static int ath9k_set_key(struct ieee80211_hw *hw,
  1485. enum set_key_cmd cmd,
  1486. struct ieee80211_vif *vif,
  1487. struct ieee80211_sta *sta,
  1488. struct ieee80211_key_conf *key)
  1489. {
  1490. struct ath_softc *sc = hw->priv;
  1491. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1492. int ret = 0;
  1493. if (ath9k_modparam_nohwcrypt)
  1494. return -ENOSPC;
  1495. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1496. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1497. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1498. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1499. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1500. /*
  1501. * For now, disable hw crypto for the RSN IBSS group keys. This
  1502. * could be optimized in the future to use a modified key cache
  1503. * design to support per-STA RX GTK, but until that gets
  1504. * implemented, use of software crypto for group addressed
  1505. * frames is a acceptable to allow RSN IBSS to be used.
  1506. */
  1507. return -EOPNOTSUPP;
  1508. }
  1509. mutex_lock(&sc->mutex);
  1510. ath9k_ps_wakeup(sc);
  1511. ath_dbg(common, CONFIG, "Set HW Key\n");
  1512. switch (cmd) {
  1513. case SET_KEY:
  1514. if (sta)
  1515. ath9k_del_ps_key(sc, vif, sta);
  1516. ret = ath_key_config(common, vif, sta, key);
  1517. if (ret >= 0) {
  1518. key->hw_key_idx = ret;
  1519. /* push IV and Michael MIC generation to stack */
  1520. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1521. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1522. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1523. if (sc->sc_ah->sw_mgmt_crypto &&
  1524. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1525. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1526. ret = 0;
  1527. }
  1528. break;
  1529. case DISABLE_KEY:
  1530. ath_key_delete(common, key);
  1531. break;
  1532. default:
  1533. ret = -EINVAL;
  1534. }
  1535. ath9k_ps_restore(sc);
  1536. mutex_unlock(&sc->mutex);
  1537. return ret;
  1538. }
  1539. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1540. {
  1541. struct ath_softc *sc = data;
  1542. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1543. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1544. struct ath_vif *avp = (void *)vif->drv_priv;
  1545. /*
  1546. * Skip iteration if primary station vif's bss info
  1547. * was not changed
  1548. */
  1549. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1550. return;
  1551. if (bss_conf->assoc) {
  1552. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1553. avp->primary_sta_vif = true;
  1554. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1555. common->curaid = bss_conf->aid;
  1556. ath9k_hw_write_associd(sc->sc_ah);
  1557. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1558. bss_conf->aid, common->curbssid);
  1559. ath_beacon_config(sc, vif);
  1560. /*
  1561. * Request a re-configuration of Beacon related timers
  1562. * on the receipt of the first Beacon frame (i.e.,
  1563. * after time sync with the AP).
  1564. */
  1565. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1566. /* Reset rssi stats */
  1567. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1568. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1569. ath_start_rx_poll(sc, 3);
  1570. if (!common->disable_ani) {
  1571. sc->sc_flags |= SC_OP_ANI_RUN;
  1572. ath_start_ani(common);
  1573. }
  1574. }
  1575. }
  1576. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1577. {
  1578. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1579. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1580. struct ath_vif *avp = (void *)vif->drv_priv;
  1581. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1582. return;
  1583. /* Reconfigure bss info */
  1584. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1585. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1586. common->curaid, common->curbssid);
  1587. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1588. avp->primary_sta_vif = false;
  1589. memset(common->curbssid, 0, ETH_ALEN);
  1590. common->curaid = 0;
  1591. }
  1592. ieee80211_iterate_active_interfaces_atomic(
  1593. sc->hw, ath9k_bss_iter, sc);
  1594. /*
  1595. * None of station vifs are associated.
  1596. * Clear bssid & aid
  1597. */
  1598. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1599. ath9k_hw_write_associd(sc->sc_ah);
  1600. /* Stop ANI */
  1601. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1602. del_timer_sync(&common->ani.timer);
  1603. del_timer_sync(&sc->rx_poll_timer);
  1604. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1605. }
  1606. }
  1607. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1608. struct ieee80211_vif *vif,
  1609. struct ieee80211_bss_conf *bss_conf,
  1610. u32 changed)
  1611. {
  1612. struct ath_softc *sc = hw->priv;
  1613. struct ath_hw *ah = sc->sc_ah;
  1614. struct ath_common *common = ath9k_hw_common(ah);
  1615. struct ath_vif *avp = (void *)vif->drv_priv;
  1616. int slottime;
  1617. ath9k_ps_wakeup(sc);
  1618. mutex_lock(&sc->mutex);
  1619. if (changed & BSS_CHANGED_ASSOC) {
  1620. ath9k_config_bss(sc, vif);
  1621. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1622. common->curbssid, common->curaid);
  1623. }
  1624. if (changed & BSS_CHANGED_IBSS) {
  1625. /* There can be only one vif available */
  1626. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1627. common->curaid = bss_conf->aid;
  1628. ath9k_hw_write_associd(sc->sc_ah);
  1629. if (bss_conf->ibss_joined) {
  1630. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1631. if (!common->disable_ani) {
  1632. sc->sc_flags |= SC_OP_ANI_RUN;
  1633. ath_start_ani(common);
  1634. }
  1635. } else {
  1636. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1637. del_timer_sync(&common->ani.timer);
  1638. del_timer_sync(&sc->rx_poll_timer);
  1639. }
  1640. }
  1641. /*
  1642. * In case of AP mode, the HW TSF has to be reset
  1643. * when the beacon interval changes.
  1644. */
  1645. if ((changed & BSS_CHANGED_BEACON_INT) &&
  1646. (vif->type == NL80211_IFTYPE_AP))
  1647. sc->sc_flags |= SC_OP_TSF_RESET;
  1648. /* Configure beaconing (AP, IBSS, MESH) */
  1649. if (ath9k_uses_beacons(vif->type) &&
  1650. ((changed & BSS_CHANGED_BEACON) ||
  1651. (changed & BSS_CHANGED_BEACON_ENABLED) ||
  1652. (changed & BSS_CHANGED_BEACON_INT))) {
  1653. ath9k_set_beaconing_status(sc, false);
  1654. if (bss_conf->enable_beacon)
  1655. ath_beacon_alloc(sc, vif);
  1656. else
  1657. avp->is_bslot_active = false;
  1658. ath_beacon_config(sc, vif);
  1659. ath9k_set_beaconing_status(sc, true);
  1660. }
  1661. if (changed & BSS_CHANGED_ERP_SLOT) {
  1662. if (bss_conf->use_short_slot)
  1663. slottime = 9;
  1664. else
  1665. slottime = 20;
  1666. if (vif->type == NL80211_IFTYPE_AP) {
  1667. /*
  1668. * Defer update, so that connected stations can adjust
  1669. * their settings at the same time.
  1670. * See beacon.c for more details
  1671. */
  1672. sc->beacon.slottime = slottime;
  1673. sc->beacon.updateslot = UPDATE;
  1674. } else {
  1675. ah->slottime = slottime;
  1676. ath9k_hw_init_global_settings(ah);
  1677. }
  1678. }
  1679. mutex_unlock(&sc->mutex);
  1680. ath9k_ps_restore(sc);
  1681. }
  1682. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1683. {
  1684. struct ath_softc *sc = hw->priv;
  1685. u64 tsf;
  1686. mutex_lock(&sc->mutex);
  1687. ath9k_ps_wakeup(sc);
  1688. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1689. ath9k_ps_restore(sc);
  1690. mutex_unlock(&sc->mutex);
  1691. return tsf;
  1692. }
  1693. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1694. struct ieee80211_vif *vif,
  1695. u64 tsf)
  1696. {
  1697. struct ath_softc *sc = hw->priv;
  1698. mutex_lock(&sc->mutex);
  1699. ath9k_ps_wakeup(sc);
  1700. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1701. ath9k_ps_restore(sc);
  1702. mutex_unlock(&sc->mutex);
  1703. }
  1704. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1705. {
  1706. struct ath_softc *sc = hw->priv;
  1707. mutex_lock(&sc->mutex);
  1708. ath9k_ps_wakeup(sc);
  1709. ath9k_hw_reset_tsf(sc->sc_ah);
  1710. ath9k_ps_restore(sc);
  1711. mutex_unlock(&sc->mutex);
  1712. }
  1713. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1714. struct ieee80211_vif *vif,
  1715. enum ieee80211_ampdu_mlme_action action,
  1716. struct ieee80211_sta *sta,
  1717. u16 tid, u16 *ssn, u8 buf_size)
  1718. {
  1719. struct ath_softc *sc = hw->priv;
  1720. int ret = 0;
  1721. local_bh_disable();
  1722. switch (action) {
  1723. case IEEE80211_AMPDU_RX_START:
  1724. break;
  1725. case IEEE80211_AMPDU_RX_STOP:
  1726. break;
  1727. case IEEE80211_AMPDU_TX_START:
  1728. ath9k_ps_wakeup(sc);
  1729. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1730. if (!ret)
  1731. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1732. ath9k_ps_restore(sc);
  1733. break;
  1734. case IEEE80211_AMPDU_TX_STOP:
  1735. ath9k_ps_wakeup(sc);
  1736. ath_tx_aggr_stop(sc, sta, tid);
  1737. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1738. ath9k_ps_restore(sc);
  1739. break;
  1740. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1741. ath9k_ps_wakeup(sc);
  1742. ath_tx_aggr_resume(sc, sta, tid);
  1743. ath9k_ps_restore(sc);
  1744. break;
  1745. default:
  1746. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1747. }
  1748. local_bh_enable();
  1749. return ret;
  1750. }
  1751. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1752. struct survey_info *survey)
  1753. {
  1754. struct ath_softc *sc = hw->priv;
  1755. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1756. struct ieee80211_supported_band *sband;
  1757. struct ieee80211_channel *chan;
  1758. unsigned long flags;
  1759. int pos;
  1760. spin_lock_irqsave(&common->cc_lock, flags);
  1761. if (idx == 0)
  1762. ath_update_survey_stats(sc);
  1763. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1764. if (sband && idx >= sband->n_channels) {
  1765. idx -= sband->n_channels;
  1766. sband = NULL;
  1767. }
  1768. if (!sband)
  1769. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1770. if (!sband || idx >= sband->n_channels) {
  1771. spin_unlock_irqrestore(&common->cc_lock, flags);
  1772. return -ENOENT;
  1773. }
  1774. chan = &sband->channels[idx];
  1775. pos = chan->hw_value;
  1776. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1777. survey->channel = chan;
  1778. spin_unlock_irqrestore(&common->cc_lock, flags);
  1779. return 0;
  1780. }
  1781. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1782. {
  1783. struct ath_softc *sc = hw->priv;
  1784. struct ath_hw *ah = sc->sc_ah;
  1785. mutex_lock(&sc->mutex);
  1786. ah->coverage_class = coverage_class;
  1787. ath9k_ps_wakeup(sc);
  1788. ath9k_hw_init_global_settings(ah);
  1789. ath9k_ps_restore(sc);
  1790. mutex_unlock(&sc->mutex);
  1791. }
  1792. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1793. {
  1794. struct ath_softc *sc = hw->priv;
  1795. struct ath_hw *ah = sc->sc_ah;
  1796. struct ath_common *common = ath9k_hw_common(ah);
  1797. int timeout = 200; /* ms */
  1798. int i, j;
  1799. bool drain_txq;
  1800. mutex_lock(&sc->mutex);
  1801. cancel_delayed_work_sync(&sc->tx_complete_work);
  1802. if (ah->ah_flags & AH_UNPLUGGED) {
  1803. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1804. mutex_unlock(&sc->mutex);
  1805. return;
  1806. }
  1807. if (sc->sc_flags & SC_OP_INVALID) {
  1808. ath_dbg(common, ANY, "Device not present\n");
  1809. mutex_unlock(&sc->mutex);
  1810. return;
  1811. }
  1812. for (j = 0; j < timeout; j++) {
  1813. bool npend = false;
  1814. if (j)
  1815. usleep_range(1000, 2000);
  1816. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1817. if (!ATH_TXQ_SETUP(sc, i))
  1818. continue;
  1819. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1820. if (npend)
  1821. break;
  1822. }
  1823. if (!npend)
  1824. break;
  1825. }
  1826. if (drop) {
  1827. ath9k_ps_wakeup(sc);
  1828. spin_lock_bh(&sc->sc_pcu_lock);
  1829. drain_txq = ath_drain_all_txq(sc, false);
  1830. spin_unlock_bh(&sc->sc_pcu_lock);
  1831. if (!drain_txq)
  1832. ath_reset(sc, false);
  1833. ath9k_ps_restore(sc);
  1834. ieee80211_wake_queues(hw);
  1835. }
  1836. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1837. mutex_unlock(&sc->mutex);
  1838. }
  1839. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1840. {
  1841. struct ath_softc *sc = hw->priv;
  1842. int i;
  1843. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1844. if (!ATH_TXQ_SETUP(sc, i))
  1845. continue;
  1846. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1847. return true;
  1848. }
  1849. return false;
  1850. }
  1851. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1852. {
  1853. struct ath_softc *sc = hw->priv;
  1854. struct ath_hw *ah = sc->sc_ah;
  1855. struct ieee80211_vif *vif;
  1856. struct ath_vif *avp;
  1857. struct ath_buf *bf;
  1858. struct ath_tx_status ts;
  1859. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1860. int status;
  1861. vif = sc->beacon.bslot[0];
  1862. if (!vif)
  1863. return 0;
  1864. avp = (void *)vif->drv_priv;
  1865. if (!avp->is_bslot_active)
  1866. return 0;
  1867. if (!sc->beacon.tx_processed && !edma) {
  1868. tasklet_disable(&sc->bcon_tasklet);
  1869. bf = avp->av_bcbuf;
  1870. if (!bf || !bf->bf_mpdu)
  1871. goto skip;
  1872. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1873. if (status == -EINPROGRESS)
  1874. goto skip;
  1875. sc->beacon.tx_processed = true;
  1876. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1877. skip:
  1878. tasklet_enable(&sc->bcon_tasklet);
  1879. }
  1880. return sc->beacon.tx_last;
  1881. }
  1882. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1883. struct ieee80211_low_level_stats *stats)
  1884. {
  1885. struct ath_softc *sc = hw->priv;
  1886. struct ath_hw *ah = sc->sc_ah;
  1887. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1888. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1889. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1890. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1891. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1892. return 0;
  1893. }
  1894. static u32 fill_chainmask(u32 cap, u32 new)
  1895. {
  1896. u32 filled = 0;
  1897. int i;
  1898. for (i = 0; cap && new; i++, cap >>= 1) {
  1899. if (!(cap & BIT(0)))
  1900. continue;
  1901. if (new & BIT(0))
  1902. filled |= BIT(i);
  1903. new >>= 1;
  1904. }
  1905. return filled;
  1906. }
  1907. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1908. {
  1909. struct ath_softc *sc = hw->priv;
  1910. struct ath_hw *ah = sc->sc_ah;
  1911. if (!rx_ant || !tx_ant)
  1912. return -EINVAL;
  1913. sc->ant_rx = rx_ant;
  1914. sc->ant_tx = tx_ant;
  1915. if (ah->caps.rx_chainmask == 1)
  1916. return 0;
  1917. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1918. if (AR_SREV_9100(ah))
  1919. ah->rxchainmask = 0x7;
  1920. else
  1921. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1922. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1923. ath9k_reload_chainmask_settings(sc);
  1924. return 0;
  1925. }
  1926. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1927. {
  1928. struct ath_softc *sc = hw->priv;
  1929. *tx_ant = sc->ant_tx;
  1930. *rx_ant = sc->ant_rx;
  1931. return 0;
  1932. }
  1933. struct ieee80211_ops ath9k_ops = {
  1934. .tx = ath9k_tx,
  1935. .start = ath9k_start,
  1936. .stop = ath9k_stop,
  1937. .add_interface = ath9k_add_interface,
  1938. .change_interface = ath9k_change_interface,
  1939. .remove_interface = ath9k_remove_interface,
  1940. .config = ath9k_config,
  1941. .configure_filter = ath9k_configure_filter,
  1942. .sta_add = ath9k_sta_add,
  1943. .sta_remove = ath9k_sta_remove,
  1944. .sta_notify = ath9k_sta_notify,
  1945. .conf_tx = ath9k_conf_tx,
  1946. .bss_info_changed = ath9k_bss_info_changed,
  1947. .set_key = ath9k_set_key,
  1948. .get_tsf = ath9k_get_tsf,
  1949. .set_tsf = ath9k_set_tsf,
  1950. .reset_tsf = ath9k_reset_tsf,
  1951. .ampdu_action = ath9k_ampdu_action,
  1952. .get_survey = ath9k_get_survey,
  1953. .rfkill_poll = ath9k_rfkill_poll_state,
  1954. .set_coverage_class = ath9k_set_coverage_class,
  1955. .flush = ath9k_flush,
  1956. .tx_frames_pending = ath9k_tx_frames_pending,
  1957. .tx_last_beacon = ath9k_tx_last_beacon,
  1958. .get_stats = ath9k_get_stats,
  1959. .set_antenna = ath9k_set_antenna,
  1960. .get_antenna = ath9k_get_antenna,
  1961. };