soc-cache.c 37 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. #if defined(CONFIG_SPI_MASTER)
  21. static int do_spi_write(void *control_data, const void *msg,
  22. int len)
  23. {
  24. struct spi_device *spi = control_data;
  25. struct spi_transfer t;
  26. struct spi_message m;
  27. if (len <= 0)
  28. return 0;
  29. spi_message_init(&m);
  30. memset(&t, 0, sizeof t);
  31. t.tx_buf = msg;
  32. t.len = len;
  33. spi_message_add_tail(&t, &m);
  34. spi_sync(spi, &m);
  35. return len;
  36. }
  37. #endif
  38. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  39. unsigned int value, const void *data, int len)
  40. {
  41. int ret;
  42. if (!snd_soc_codec_volatile_register(codec, reg) &&
  43. reg < codec->driver->reg_cache_size &&
  44. !codec->cache_bypass) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, len);
  54. if (ret == len)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  62. {
  63. int ret;
  64. unsigned int val;
  65. if (reg >= codec->driver->reg_cache_size ||
  66. snd_soc_codec_volatile_register(codec, reg) ||
  67. codec->cache_bypass) {
  68. if (codec->cache_only)
  69. return -1;
  70. BUG_ON(!codec->hw_read);
  71. return codec->hw_read(codec, reg);
  72. }
  73. ret = snd_soc_cache_read(codec, reg, &val);
  74. if (ret < 0)
  75. return -1;
  76. return val;
  77. }
  78. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  79. unsigned int reg)
  80. {
  81. return do_hw_read(codec, reg);
  82. }
  83. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  84. unsigned int value)
  85. {
  86. u8 data[2];
  87. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  88. data[1] = value & 0x00ff;
  89. return do_hw_write(codec, reg, value, data, 2);
  90. }
  91. #if defined(CONFIG_SPI_MASTER)
  92. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  93. int len)
  94. {
  95. u8 msg[2];
  96. msg[0] = data[1];
  97. msg[1] = data[0];
  98. return do_spi_write(control_data, msg, len);
  99. }
  100. #else
  101. #define snd_soc_4_12_spi_write NULL
  102. #endif
  103. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  104. unsigned int reg)
  105. {
  106. return do_hw_read(codec, reg);
  107. }
  108. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  109. unsigned int value)
  110. {
  111. u8 data[2];
  112. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  113. data[1] = value & 0x00ff;
  114. return do_hw_write(codec, reg, value, data, 2);
  115. }
  116. #if defined(CONFIG_SPI_MASTER)
  117. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  118. int len)
  119. {
  120. u8 msg[2];
  121. msg[0] = data[0];
  122. msg[1] = data[1];
  123. return do_spi_write(control_data, msg, len);
  124. }
  125. #else
  126. #define snd_soc_7_9_spi_write NULL
  127. #endif
  128. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  129. unsigned int value)
  130. {
  131. u8 data[2];
  132. reg &= 0xff;
  133. data[0] = reg;
  134. data[1] = value & 0xff;
  135. return do_hw_write(codec, reg, value, data, 2);
  136. }
  137. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  138. unsigned int reg)
  139. {
  140. return do_hw_read(codec, reg);
  141. }
  142. #if defined(CONFIG_SPI_MASTER)
  143. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  144. int len)
  145. {
  146. u8 msg[2];
  147. msg[0] = data[0];
  148. msg[1] = data[1];
  149. return do_spi_write(control_data, msg, len);
  150. }
  151. #else
  152. #define snd_soc_8_8_spi_write NULL
  153. #endif
  154. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  155. unsigned int value)
  156. {
  157. u8 data[3];
  158. data[0] = reg;
  159. data[1] = (value >> 8) & 0xff;
  160. data[2] = value & 0xff;
  161. return do_hw_write(codec, reg, value, data, 3);
  162. }
  163. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  164. unsigned int reg)
  165. {
  166. return do_hw_read(codec, reg);
  167. }
  168. #if defined(CONFIG_SPI_MASTER)
  169. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  170. int len)
  171. {
  172. u8 msg[3];
  173. msg[0] = data[0];
  174. msg[1] = data[1];
  175. msg[2] = data[2];
  176. return do_spi_write(control_data, msg, len);
  177. }
  178. #else
  179. #define snd_soc_8_16_spi_write NULL
  180. #endif
  181. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  182. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  183. void *reg, int reglen,
  184. void *data, int datalen)
  185. {
  186. struct i2c_msg xfer[2];
  187. int ret;
  188. struct i2c_client *client = codec->control_data;
  189. /* Write register */
  190. xfer[0].addr = client->addr;
  191. xfer[0].flags = 0;
  192. xfer[0].len = reglen;
  193. xfer[0].buf = reg;
  194. /* Read data */
  195. xfer[1].addr = client->addr;
  196. xfer[1].flags = I2C_M_RD;
  197. xfer[1].len = datalen;
  198. xfer[1].buf = data;
  199. ret = i2c_transfer(client->adapter, xfer, 2);
  200. if (ret == 2)
  201. return 0;
  202. else if (ret < 0)
  203. return ret;
  204. else
  205. return -EIO;
  206. }
  207. #endif
  208. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  209. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  210. unsigned int r)
  211. {
  212. u8 reg = r;
  213. u8 data;
  214. int ret;
  215. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  216. if (ret < 0)
  217. return 0;
  218. return data;
  219. }
  220. #else
  221. #define snd_soc_8_8_read_i2c NULL
  222. #endif
  223. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  224. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  225. unsigned int r)
  226. {
  227. u8 reg = r;
  228. u16 data;
  229. int ret;
  230. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  231. if (ret < 0)
  232. return 0;
  233. return (data >> 8) | ((data & 0xff) << 8);
  234. }
  235. #else
  236. #define snd_soc_8_16_read_i2c NULL
  237. #endif
  238. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  239. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  240. unsigned int r)
  241. {
  242. u16 reg = r;
  243. u8 data;
  244. int ret;
  245. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  246. if (ret < 0)
  247. return 0;
  248. return data;
  249. }
  250. #else
  251. #define snd_soc_16_8_read_i2c NULL
  252. #endif
  253. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  254. unsigned int reg)
  255. {
  256. return do_hw_read(codec, reg);
  257. }
  258. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  259. unsigned int value)
  260. {
  261. u8 data[3];
  262. data[0] = (reg >> 8) & 0xff;
  263. data[1] = reg & 0xff;
  264. data[2] = value;
  265. reg &= 0xff;
  266. return do_hw_write(codec, reg, value, data, 3);
  267. }
  268. #if defined(CONFIG_SPI_MASTER)
  269. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  270. int len)
  271. {
  272. u8 msg[3];
  273. msg[0] = data[0];
  274. msg[1] = data[1];
  275. msg[2] = data[2];
  276. return do_spi_write(control_data, msg, len);
  277. }
  278. #else
  279. #define snd_soc_16_8_spi_write NULL
  280. #endif
  281. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  282. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  283. unsigned int r)
  284. {
  285. u16 reg = cpu_to_be16(r);
  286. u16 data;
  287. int ret;
  288. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  289. if (ret < 0)
  290. return 0;
  291. return be16_to_cpu(data);
  292. }
  293. #else
  294. #define snd_soc_16_16_read_i2c NULL
  295. #endif
  296. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  297. unsigned int reg)
  298. {
  299. return do_hw_read(codec, reg);
  300. }
  301. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  302. unsigned int value)
  303. {
  304. u8 data[4];
  305. data[0] = (reg >> 8) & 0xff;
  306. data[1] = reg & 0xff;
  307. data[2] = (value >> 8) & 0xff;
  308. data[3] = value & 0xff;
  309. return do_hw_write(codec, reg, value, data, 4);
  310. }
  311. #if defined(CONFIG_SPI_MASTER)
  312. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  313. int len)
  314. {
  315. u8 msg[4];
  316. msg[0] = data[0];
  317. msg[1] = data[1];
  318. msg[2] = data[2];
  319. msg[3] = data[3];
  320. return do_spi_write(control_data, msg, len);
  321. }
  322. #else
  323. #define snd_soc_16_16_spi_write NULL
  324. #endif
  325. /* Primitive bulk write support for soc-cache. The data pointed to by
  326. * `data' needs to already be in the form the hardware expects
  327. * including any leading register specific data. Any data written
  328. * through this function will not go through the cache as it only
  329. * handles writing to volatile or out of bounds registers.
  330. */
  331. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  332. const void *data, size_t len)
  333. {
  334. int ret;
  335. /* To ensure that we don't get out of sync with the cache, check
  336. * whether the base register is volatile or if we've directly asked
  337. * to bypass the cache. Out of bounds registers are considered
  338. * volatile.
  339. */
  340. if (!codec->cache_bypass
  341. && !snd_soc_codec_volatile_register(codec, reg)
  342. && reg < codec->driver->reg_cache_size)
  343. return -EINVAL;
  344. switch (codec->control_type) {
  345. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  346. case SND_SOC_I2C:
  347. ret = i2c_master_send(codec->control_data, data, len);
  348. break;
  349. #endif
  350. #if defined(CONFIG_SPI_MASTER)
  351. case SND_SOC_SPI:
  352. ret = do_spi_write(codec->control_data, data, len);
  353. break;
  354. #endif
  355. default:
  356. BUG();
  357. }
  358. if (ret == len)
  359. return 0;
  360. if (ret < 0)
  361. return ret;
  362. else
  363. return -EIO;
  364. }
  365. static struct {
  366. int addr_bits;
  367. int data_bits;
  368. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  369. int (*spi_write)(void *, const char *, int);
  370. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  371. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  372. } io_types[] = {
  373. {
  374. .addr_bits = 4, .data_bits = 12,
  375. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  376. .spi_write = snd_soc_4_12_spi_write,
  377. },
  378. {
  379. .addr_bits = 7, .data_bits = 9,
  380. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  381. .spi_write = snd_soc_7_9_spi_write,
  382. },
  383. {
  384. .addr_bits = 8, .data_bits = 8,
  385. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  386. .i2c_read = snd_soc_8_8_read_i2c,
  387. .spi_write = snd_soc_8_8_spi_write,
  388. },
  389. {
  390. .addr_bits = 8, .data_bits = 16,
  391. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  392. .i2c_read = snd_soc_8_16_read_i2c,
  393. .spi_write = snd_soc_8_16_spi_write,
  394. },
  395. {
  396. .addr_bits = 16, .data_bits = 8,
  397. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  398. .i2c_read = snd_soc_16_8_read_i2c,
  399. .spi_write = snd_soc_16_8_spi_write,
  400. },
  401. {
  402. .addr_bits = 16, .data_bits = 16,
  403. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  404. .i2c_read = snd_soc_16_16_read_i2c,
  405. .spi_write = snd_soc_16_16_spi_write,
  406. },
  407. };
  408. /**
  409. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  410. *
  411. * @codec: CODEC to configure.
  412. * @addr_bits: Number of bits of register address data.
  413. * @data_bits: Number of bits of data per register.
  414. * @control: Control bus used.
  415. *
  416. * Register formats are frequently shared between many I2C and SPI
  417. * devices. In order to promote code reuse the ASoC core provides
  418. * some standard implementations of CODEC read and write operations
  419. * which can be set up using this function.
  420. *
  421. * The caller is responsible for allocating and initialising the
  422. * actual cache.
  423. *
  424. * Note that at present this code cannot be used by CODECs with
  425. * volatile registers.
  426. */
  427. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  428. int addr_bits, int data_bits,
  429. enum snd_soc_control_type control)
  430. {
  431. int i;
  432. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  433. if (io_types[i].addr_bits == addr_bits &&
  434. io_types[i].data_bits == data_bits)
  435. break;
  436. if (i == ARRAY_SIZE(io_types)) {
  437. printk(KERN_ERR
  438. "No I/O functions for %d bit address %d bit data\n",
  439. addr_bits, data_bits);
  440. return -EINVAL;
  441. }
  442. codec->write = io_types[i].write;
  443. codec->read = io_types[i].read;
  444. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  445. switch (control) {
  446. case SND_SOC_CUSTOM:
  447. break;
  448. case SND_SOC_I2C:
  449. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  450. codec->hw_write = (hw_write_t)i2c_master_send;
  451. #endif
  452. if (io_types[i].i2c_read)
  453. codec->hw_read = io_types[i].i2c_read;
  454. codec->control_data = container_of(codec->dev,
  455. struct i2c_client,
  456. dev);
  457. break;
  458. case SND_SOC_SPI:
  459. if (io_types[i].spi_write)
  460. codec->hw_write = io_types[i].spi_write;
  461. codec->control_data = container_of(codec->dev,
  462. struct spi_device,
  463. dev);
  464. break;
  465. }
  466. return 0;
  467. }
  468. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  469. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  470. unsigned int val, unsigned int word_size)
  471. {
  472. switch (word_size) {
  473. case 1: {
  474. u8 *cache = base;
  475. if (cache[idx] == val)
  476. return true;
  477. cache[idx] = val;
  478. break;
  479. }
  480. case 2: {
  481. u16 *cache = base;
  482. if (cache[idx] == val)
  483. return true;
  484. cache[idx] = val;
  485. break;
  486. }
  487. default:
  488. BUG();
  489. }
  490. return false;
  491. }
  492. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  493. unsigned int word_size)
  494. {
  495. switch (word_size) {
  496. case 1: {
  497. const u8 *cache = base;
  498. return cache[idx];
  499. }
  500. case 2: {
  501. const u16 *cache = base;
  502. return cache[idx];
  503. }
  504. default:
  505. BUG();
  506. }
  507. /* unreachable */
  508. return -1;
  509. }
  510. struct snd_soc_rbtree_node {
  511. struct rb_node node; /* the actual rbtree node holding this block */
  512. unsigned int base_reg; /* base register handled by this block */
  513. unsigned int word_size; /* number of bytes needed to represent the register index */
  514. void *block; /* block of adjacent registers */
  515. unsigned int blklen; /* number of registers available in the block */
  516. } __attribute__ ((packed));
  517. struct snd_soc_rbtree_ctx {
  518. struct rb_root root;
  519. };
  520. static inline void snd_soc_rbtree_get_base_top_reg(
  521. struct snd_soc_rbtree_node *rbnode,
  522. unsigned int *base, unsigned int *top)
  523. {
  524. *base = rbnode->base_reg;
  525. *top = rbnode->base_reg + rbnode->blklen - 1;
  526. }
  527. static unsigned int snd_soc_rbtree_get_register(
  528. struct snd_soc_rbtree_node *rbnode, unsigned int idx)
  529. {
  530. unsigned int val;
  531. switch (rbnode->word_size) {
  532. case 1: {
  533. u8 *p = rbnode->block;
  534. val = p[idx];
  535. return val;
  536. }
  537. case 2: {
  538. u16 *p = rbnode->block;
  539. val = p[idx];
  540. return val;
  541. }
  542. default:
  543. BUG();
  544. break;
  545. }
  546. return -1;
  547. }
  548. static void snd_soc_rbtree_set_register(struct snd_soc_rbtree_node *rbnode,
  549. unsigned int idx, unsigned int val)
  550. {
  551. switch (rbnode->word_size) {
  552. case 1: {
  553. u8 *p = rbnode->block;
  554. p[idx] = val;
  555. break;
  556. }
  557. case 2: {
  558. u16 *p = rbnode->block;
  559. p[idx] = val;
  560. break;
  561. }
  562. default:
  563. BUG();
  564. break;
  565. }
  566. }
  567. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  568. struct rb_root *root, unsigned int reg)
  569. {
  570. struct rb_node *node;
  571. struct snd_soc_rbtree_node *rbnode;
  572. unsigned int base_reg, top_reg;
  573. node = root->rb_node;
  574. while (node) {
  575. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  576. snd_soc_rbtree_get_base_top_reg(rbnode, &base_reg, &top_reg);
  577. if (reg >= base_reg && reg <= top_reg)
  578. return rbnode;
  579. else if (reg > top_reg)
  580. node = node->rb_right;
  581. else if (reg < base_reg)
  582. node = node->rb_left;
  583. }
  584. return NULL;
  585. }
  586. static int snd_soc_rbtree_insert(struct rb_root *root,
  587. struct snd_soc_rbtree_node *rbnode)
  588. {
  589. struct rb_node **new, *parent;
  590. struct snd_soc_rbtree_node *rbnode_tmp;
  591. unsigned int base_reg_tmp, top_reg_tmp;
  592. unsigned int base_reg;
  593. parent = NULL;
  594. new = &root->rb_node;
  595. while (*new) {
  596. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  597. node);
  598. /* base and top registers of the current rbnode */
  599. snd_soc_rbtree_get_base_top_reg(rbnode_tmp, &base_reg_tmp,
  600. &top_reg_tmp);
  601. /* base register of the rbnode to be added */
  602. base_reg = rbnode->base_reg;
  603. parent = *new;
  604. /* if this register has already been inserted, just return */
  605. if (base_reg >= base_reg_tmp &&
  606. base_reg <= top_reg_tmp)
  607. return 0;
  608. else if (base_reg > top_reg_tmp)
  609. new = &((*new)->rb_right);
  610. else if (base_reg < base_reg_tmp)
  611. new = &((*new)->rb_left);
  612. }
  613. /* insert the node into the rbtree */
  614. rb_link_node(&rbnode->node, parent, new);
  615. rb_insert_color(&rbnode->node, root);
  616. return 1;
  617. }
  618. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  619. {
  620. struct snd_soc_rbtree_ctx *rbtree_ctx;
  621. struct rb_node *node;
  622. struct snd_soc_rbtree_node *rbnode;
  623. unsigned int regtmp;
  624. unsigned int val;
  625. int ret;
  626. int i;
  627. rbtree_ctx = codec->reg_cache;
  628. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  629. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  630. for (i = 0; i < rbnode->blklen; ++i) {
  631. regtmp = rbnode->base_reg + i;
  632. WARN_ON(codec->writable_register &&
  633. codec->writable_register(codec, regtmp));
  634. val = snd_soc_rbtree_get_register(rbnode, i);
  635. codec->cache_bypass = 1;
  636. ret = snd_soc_write(codec, regtmp, val);
  637. codec->cache_bypass = 0;
  638. if (ret)
  639. return ret;
  640. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  641. regtmp, val);
  642. }
  643. }
  644. return 0;
  645. }
  646. static int snd_soc_rbtree_insert_to_block(struct snd_soc_rbtree_node *rbnode,
  647. unsigned int pos, unsigned int reg,
  648. unsigned int value)
  649. {
  650. u8 *blk;
  651. blk = krealloc(rbnode->block,
  652. (rbnode->blklen + 1) * rbnode->word_size, GFP_KERNEL);
  653. if (!blk)
  654. return -ENOMEM;
  655. /* insert the register value in the correct place in the rbnode block */
  656. memmove(blk + (pos + 1) * rbnode->word_size,
  657. blk + pos * rbnode->word_size,
  658. (rbnode->blklen - pos) * rbnode->word_size);
  659. /* update the rbnode block, its size and the base register */
  660. rbnode->block = blk;
  661. rbnode->blklen++;
  662. if (!pos)
  663. rbnode->base_reg = reg;
  664. snd_soc_rbtree_set_register(rbnode, pos, value);
  665. return 0;
  666. }
  667. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  668. unsigned int reg, unsigned int value)
  669. {
  670. struct snd_soc_rbtree_ctx *rbtree_ctx;
  671. struct snd_soc_rbtree_node *rbnode, *rbnode_tmp;
  672. struct rb_node *node;
  673. unsigned int val;
  674. unsigned int reg_tmp;
  675. unsigned int pos;
  676. int i;
  677. int ret;
  678. rbtree_ctx = codec->reg_cache;
  679. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  680. if (rbnode) {
  681. reg_tmp = reg - rbnode->base_reg;
  682. val = snd_soc_rbtree_get_register(rbnode, reg_tmp);
  683. if (val == value)
  684. return 0;
  685. snd_soc_rbtree_set_register(rbnode, reg_tmp, value);
  686. } else {
  687. /* bail out early, no need to create the rbnode yet */
  688. if (!value)
  689. return 0;
  690. /* look for an adjacent register to the one we are about to add */
  691. for (node = rb_first(&rbtree_ctx->root); node;
  692. node = rb_next(node)) {
  693. rbnode_tmp = rb_entry(node, struct snd_soc_rbtree_node, node);
  694. for (i = 0; i < rbnode_tmp->blklen; ++i) {
  695. reg_tmp = rbnode_tmp->base_reg + i;
  696. if (abs(reg_tmp - reg) != 1)
  697. continue;
  698. /* decide where in the block to place our register */
  699. if (reg_tmp + 1 == reg)
  700. pos = i + 1;
  701. else
  702. pos = i;
  703. ret = snd_soc_rbtree_insert_to_block(rbnode_tmp, pos,
  704. reg, value);
  705. if (ret)
  706. return ret;
  707. return 0;
  708. }
  709. }
  710. /* we did not manage to find a place to insert it in an existing
  711. * block so create a new rbnode with a single register in its block.
  712. * This block will get populated further if any other adjacent
  713. * registers get modified in the future.
  714. */
  715. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  716. if (!rbnode)
  717. return -ENOMEM;
  718. rbnode->blklen = 1;
  719. rbnode->base_reg = reg;
  720. rbnode->word_size = codec->driver->reg_word_size;
  721. rbnode->block = kmalloc(rbnode->blklen * rbnode->word_size,
  722. GFP_KERNEL);
  723. if (!rbnode->block) {
  724. kfree(rbnode);
  725. return -ENOMEM;
  726. }
  727. snd_soc_rbtree_set_register(rbnode, 0, value);
  728. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  729. }
  730. return 0;
  731. }
  732. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  733. unsigned int reg, unsigned int *value)
  734. {
  735. struct snd_soc_rbtree_ctx *rbtree_ctx;
  736. struct snd_soc_rbtree_node *rbnode;
  737. unsigned int reg_tmp;
  738. rbtree_ctx = codec->reg_cache;
  739. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  740. if (rbnode) {
  741. reg_tmp = reg - rbnode->base_reg;
  742. *value = snd_soc_rbtree_get_register(rbnode, reg_tmp);
  743. } else {
  744. /* uninitialized registers default to 0 */
  745. *value = 0;
  746. }
  747. return 0;
  748. }
  749. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  750. {
  751. struct rb_node *next;
  752. struct snd_soc_rbtree_ctx *rbtree_ctx;
  753. struct snd_soc_rbtree_node *rbtree_node;
  754. /* if we've already been called then just return */
  755. rbtree_ctx = codec->reg_cache;
  756. if (!rbtree_ctx)
  757. return 0;
  758. /* free up the rbtree */
  759. next = rb_first(&rbtree_ctx->root);
  760. while (next) {
  761. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  762. next = rb_next(&rbtree_node->node);
  763. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  764. kfree(rbtree_node->block);
  765. kfree(rbtree_node);
  766. }
  767. /* release the resources */
  768. kfree(codec->reg_cache);
  769. codec->reg_cache = NULL;
  770. return 0;
  771. }
  772. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  773. {
  774. struct snd_soc_rbtree_ctx *rbtree_ctx;
  775. unsigned int word_size;
  776. unsigned int val;
  777. int i;
  778. int ret;
  779. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  780. if (!codec->reg_cache)
  781. return -ENOMEM;
  782. rbtree_ctx = codec->reg_cache;
  783. rbtree_ctx->root = RB_ROOT;
  784. if (!codec->reg_def_copy)
  785. return 0;
  786. word_size = codec->driver->reg_word_size;
  787. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  788. val = snd_soc_get_cache_val(codec->reg_def_copy, i,
  789. word_size);
  790. if (!val)
  791. continue;
  792. ret = snd_soc_rbtree_cache_write(codec, i, val);
  793. if (ret)
  794. goto err;
  795. }
  796. return 0;
  797. err:
  798. snd_soc_cache_exit(codec);
  799. return ret;
  800. }
  801. #ifdef CONFIG_SND_SOC_CACHE_LZO
  802. struct snd_soc_lzo_ctx {
  803. void *wmem;
  804. void *dst;
  805. const void *src;
  806. size_t src_len;
  807. size_t dst_len;
  808. size_t decompressed_size;
  809. unsigned long *sync_bmp;
  810. int sync_bmp_nbits;
  811. };
  812. #define LZO_BLOCK_NUM 8
  813. static int snd_soc_lzo_block_count(void)
  814. {
  815. return LZO_BLOCK_NUM;
  816. }
  817. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  818. {
  819. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  820. if (!lzo_ctx->wmem)
  821. return -ENOMEM;
  822. return 0;
  823. }
  824. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  825. {
  826. size_t compress_size;
  827. int ret;
  828. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  829. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  830. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  831. return -EINVAL;
  832. lzo_ctx->dst_len = compress_size;
  833. return 0;
  834. }
  835. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  836. {
  837. size_t dst_len;
  838. int ret;
  839. dst_len = lzo_ctx->dst_len;
  840. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  841. lzo_ctx->dst, &dst_len);
  842. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  843. return -EINVAL;
  844. return 0;
  845. }
  846. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  847. struct snd_soc_lzo_ctx *lzo_ctx)
  848. {
  849. int ret;
  850. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  851. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  852. if (!lzo_ctx->dst) {
  853. lzo_ctx->dst_len = 0;
  854. return -ENOMEM;
  855. }
  856. ret = snd_soc_lzo_compress(lzo_ctx);
  857. if (ret < 0)
  858. return ret;
  859. return 0;
  860. }
  861. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  862. struct snd_soc_lzo_ctx *lzo_ctx)
  863. {
  864. int ret;
  865. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  866. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  867. if (!lzo_ctx->dst) {
  868. lzo_ctx->dst_len = 0;
  869. return -ENOMEM;
  870. }
  871. ret = snd_soc_lzo_decompress(lzo_ctx);
  872. if (ret < 0)
  873. return ret;
  874. return 0;
  875. }
  876. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  877. unsigned int reg)
  878. {
  879. const struct snd_soc_codec_driver *codec_drv;
  880. codec_drv = codec->driver;
  881. return (reg * codec_drv->reg_word_size) /
  882. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  883. }
  884. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  885. unsigned int reg)
  886. {
  887. const struct snd_soc_codec_driver *codec_drv;
  888. codec_drv = codec->driver;
  889. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  890. codec_drv->reg_word_size);
  891. }
  892. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  893. {
  894. const struct snd_soc_codec_driver *codec_drv;
  895. codec_drv = codec->driver;
  896. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  897. }
  898. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  899. {
  900. struct snd_soc_lzo_ctx **lzo_blocks;
  901. unsigned int val;
  902. int i;
  903. int ret;
  904. lzo_blocks = codec->reg_cache;
  905. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  906. WARN_ON(codec->writable_register &&
  907. codec->writable_register(codec, i));
  908. ret = snd_soc_cache_read(codec, i, &val);
  909. if (ret)
  910. return ret;
  911. codec->cache_bypass = 1;
  912. ret = snd_soc_write(codec, i, val);
  913. codec->cache_bypass = 0;
  914. if (ret)
  915. return ret;
  916. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  917. i, val);
  918. }
  919. return 0;
  920. }
  921. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  922. unsigned int reg, unsigned int value)
  923. {
  924. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  925. int ret, blkindex, blkpos;
  926. size_t blksize, tmp_dst_len;
  927. void *tmp_dst;
  928. /* index of the compressed lzo block */
  929. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  930. /* register index within the decompressed block */
  931. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  932. /* size of the compressed block */
  933. blksize = snd_soc_lzo_get_blksize(codec);
  934. lzo_blocks = codec->reg_cache;
  935. lzo_block = lzo_blocks[blkindex];
  936. /* save the pointer and length of the compressed block */
  937. tmp_dst = lzo_block->dst;
  938. tmp_dst_len = lzo_block->dst_len;
  939. /* prepare the source to be the compressed block */
  940. lzo_block->src = lzo_block->dst;
  941. lzo_block->src_len = lzo_block->dst_len;
  942. /* decompress the block */
  943. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  944. if (ret < 0) {
  945. kfree(lzo_block->dst);
  946. goto out;
  947. }
  948. /* write the new value to the cache */
  949. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  950. codec->driver->reg_word_size)) {
  951. kfree(lzo_block->dst);
  952. goto out;
  953. }
  954. /* prepare the source to be the decompressed block */
  955. lzo_block->src = lzo_block->dst;
  956. lzo_block->src_len = lzo_block->dst_len;
  957. /* compress the block */
  958. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  959. if (ret < 0) {
  960. kfree(lzo_block->dst);
  961. kfree(lzo_block->src);
  962. goto out;
  963. }
  964. /* set the bit so we know we have to sync this register */
  965. set_bit(reg, lzo_block->sync_bmp);
  966. kfree(tmp_dst);
  967. kfree(lzo_block->src);
  968. return 0;
  969. out:
  970. lzo_block->dst = tmp_dst;
  971. lzo_block->dst_len = tmp_dst_len;
  972. return ret;
  973. }
  974. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  975. unsigned int reg, unsigned int *value)
  976. {
  977. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  978. int ret, blkindex, blkpos;
  979. size_t blksize, tmp_dst_len;
  980. void *tmp_dst;
  981. *value = 0;
  982. /* index of the compressed lzo block */
  983. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  984. /* register index within the decompressed block */
  985. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  986. /* size of the compressed block */
  987. blksize = snd_soc_lzo_get_blksize(codec);
  988. lzo_blocks = codec->reg_cache;
  989. lzo_block = lzo_blocks[blkindex];
  990. /* save the pointer and length of the compressed block */
  991. tmp_dst = lzo_block->dst;
  992. tmp_dst_len = lzo_block->dst_len;
  993. /* prepare the source to be the compressed block */
  994. lzo_block->src = lzo_block->dst;
  995. lzo_block->src_len = lzo_block->dst_len;
  996. /* decompress the block */
  997. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  998. if (ret >= 0)
  999. /* fetch the value from the cache */
  1000. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  1001. codec->driver->reg_word_size);
  1002. kfree(lzo_block->dst);
  1003. /* restore the pointer and length of the compressed block */
  1004. lzo_block->dst = tmp_dst;
  1005. lzo_block->dst_len = tmp_dst_len;
  1006. return 0;
  1007. }
  1008. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  1009. {
  1010. struct snd_soc_lzo_ctx **lzo_blocks;
  1011. int i, blkcount;
  1012. lzo_blocks = codec->reg_cache;
  1013. if (!lzo_blocks)
  1014. return 0;
  1015. blkcount = snd_soc_lzo_block_count();
  1016. /*
  1017. * the pointer to the bitmap used for syncing the cache
  1018. * is shared amongst all lzo_blocks. Ensure it is freed
  1019. * only once.
  1020. */
  1021. if (lzo_blocks[0])
  1022. kfree(lzo_blocks[0]->sync_bmp);
  1023. for (i = 0; i < blkcount; ++i) {
  1024. if (lzo_blocks[i]) {
  1025. kfree(lzo_blocks[i]->wmem);
  1026. kfree(lzo_blocks[i]->dst);
  1027. }
  1028. /* each lzo_block is a pointer returned by kmalloc or NULL */
  1029. kfree(lzo_blocks[i]);
  1030. }
  1031. kfree(lzo_blocks);
  1032. codec->reg_cache = NULL;
  1033. return 0;
  1034. }
  1035. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  1036. {
  1037. struct snd_soc_lzo_ctx **lzo_blocks;
  1038. size_t bmp_size;
  1039. const struct snd_soc_codec_driver *codec_drv;
  1040. int ret, tofree, i, blksize, blkcount;
  1041. const char *p, *end;
  1042. unsigned long *sync_bmp;
  1043. ret = 0;
  1044. codec_drv = codec->driver;
  1045. /*
  1046. * If we have not been given a default register cache
  1047. * then allocate a dummy zero-ed out region, compress it
  1048. * and remember to free it afterwards.
  1049. */
  1050. tofree = 0;
  1051. if (!codec->reg_def_copy)
  1052. tofree = 1;
  1053. if (!codec->reg_def_copy) {
  1054. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  1055. if (!codec->reg_def_copy)
  1056. return -ENOMEM;
  1057. }
  1058. blkcount = snd_soc_lzo_block_count();
  1059. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  1060. GFP_KERNEL);
  1061. if (!codec->reg_cache) {
  1062. ret = -ENOMEM;
  1063. goto err_tofree;
  1064. }
  1065. lzo_blocks = codec->reg_cache;
  1066. /*
  1067. * allocate a bitmap to be used when syncing the cache with
  1068. * the hardware. Each time a register is modified, the corresponding
  1069. * bit is set in the bitmap, so we know that we have to sync
  1070. * that register.
  1071. */
  1072. bmp_size = codec_drv->reg_cache_size;
  1073. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  1074. GFP_KERNEL);
  1075. if (!sync_bmp) {
  1076. ret = -ENOMEM;
  1077. goto err;
  1078. }
  1079. bitmap_zero(sync_bmp, bmp_size);
  1080. /* allocate the lzo blocks and initialize them */
  1081. for (i = 0; i < blkcount; ++i) {
  1082. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  1083. GFP_KERNEL);
  1084. if (!lzo_blocks[i]) {
  1085. kfree(sync_bmp);
  1086. ret = -ENOMEM;
  1087. goto err;
  1088. }
  1089. lzo_blocks[i]->sync_bmp = sync_bmp;
  1090. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  1091. /* alloc the working space for the compressed block */
  1092. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  1093. if (ret < 0)
  1094. goto err;
  1095. }
  1096. blksize = snd_soc_lzo_get_blksize(codec);
  1097. p = codec->reg_def_copy;
  1098. end = codec->reg_def_copy + codec->reg_size;
  1099. /* compress the register map and fill the lzo blocks */
  1100. for (i = 0; i < blkcount; ++i, p += blksize) {
  1101. lzo_blocks[i]->src = p;
  1102. if (p + blksize > end)
  1103. lzo_blocks[i]->src_len = end - p;
  1104. else
  1105. lzo_blocks[i]->src_len = blksize;
  1106. ret = snd_soc_lzo_compress_cache_block(codec,
  1107. lzo_blocks[i]);
  1108. if (ret < 0)
  1109. goto err;
  1110. lzo_blocks[i]->decompressed_size =
  1111. lzo_blocks[i]->src_len;
  1112. }
  1113. if (tofree) {
  1114. kfree(codec->reg_def_copy);
  1115. codec->reg_def_copy = NULL;
  1116. }
  1117. return 0;
  1118. err:
  1119. snd_soc_cache_exit(codec);
  1120. err_tofree:
  1121. if (tofree) {
  1122. kfree(codec->reg_def_copy);
  1123. codec->reg_def_copy = NULL;
  1124. }
  1125. return ret;
  1126. }
  1127. #endif
  1128. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1129. {
  1130. int i;
  1131. int ret;
  1132. const struct snd_soc_codec_driver *codec_drv;
  1133. unsigned int val;
  1134. codec_drv = codec->driver;
  1135. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1136. WARN_ON(codec->writable_register &&
  1137. codec->writable_register(codec, i));
  1138. ret = snd_soc_cache_read(codec, i, &val);
  1139. if (ret)
  1140. return ret;
  1141. if (codec->reg_def_copy)
  1142. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1143. i, codec_drv->reg_word_size) == val)
  1144. continue;
  1145. ret = snd_soc_write(codec, i, val);
  1146. if (ret)
  1147. return ret;
  1148. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1149. i, val);
  1150. }
  1151. return 0;
  1152. }
  1153. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1154. unsigned int reg, unsigned int value)
  1155. {
  1156. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1157. codec->driver->reg_word_size);
  1158. return 0;
  1159. }
  1160. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1161. unsigned int reg, unsigned int *value)
  1162. {
  1163. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1164. codec->driver->reg_word_size);
  1165. return 0;
  1166. }
  1167. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1168. {
  1169. if (!codec->reg_cache)
  1170. return 0;
  1171. kfree(codec->reg_cache);
  1172. codec->reg_cache = NULL;
  1173. return 0;
  1174. }
  1175. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1176. {
  1177. const struct snd_soc_codec_driver *codec_drv;
  1178. codec_drv = codec->driver;
  1179. if (codec->reg_def_copy)
  1180. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1181. codec->reg_size, GFP_KERNEL);
  1182. else
  1183. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1184. if (!codec->reg_cache)
  1185. return -ENOMEM;
  1186. return 0;
  1187. }
  1188. /* an array of all supported compression types */
  1189. static const struct snd_soc_cache_ops cache_types[] = {
  1190. /* Flat *must* be the first entry for fallback */
  1191. {
  1192. .id = SND_SOC_FLAT_COMPRESSION,
  1193. .name = "flat",
  1194. .init = snd_soc_flat_cache_init,
  1195. .exit = snd_soc_flat_cache_exit,
  1196. .read = snd_soc_flat_cache_read,
  1197. .write = snd_soc_flat_cache_write,
  1198. .sync = snd_soc_flat_cache_sync
  1199. },
  1200. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1201. {
  1202. .id = SND_SOC_LZO_COMPRESSION,
  1203. .name = "LZO",
  1204. .init = snd_soc_lzo_cache_init,
  1205. .exit = snd_soc_lzo_cache_exit,
  1206. .read = snd_soc_lzo_cache_read,
  1207. .write = snd_soc_lzo_cache_write,
  1208. .sync = snd_soc_lzo_cache_sync
  1209. },
  1210. #endif
  1211. {
  1212. .id = SND_SOC_RBTREE_COMPRESSION,
  1213. .name = "rbtree",
  1214. .init = snd_soc_rbtree_cache_init,
  1215. .exit = snd_soc_rbtree_cache_exit,
  1216. .read = snd_soc_rbtree_cache_read,
  1217. .write = snd_soc_rbtree_cache_write,
  1218. .sync = snd_soc_rbtree_cache_sync
  1219. }
  1220. };
  1221. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1222. {
  1223. int i;
  1224. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1225. if (cache_types[i].id == codec->compress_type)
  1226. break;
  1227. /* Fall back to flat compression */
  1228. if (i == ARRAY_SIZE(cache_types)) {
  1229. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1230. codec->compress_type);
  1231. i = 0;
  1232. }
  1233. mutex_init(&codec->cache_rw_mutex);
  1234. codec->cache_ops = &cache_types[i];
  1235. if (codec->cache_ops->init) {
  1236. if (codec->cache_ops->name)
  1237. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1238. codec->cache_ops->name, codec->name);
  1239. return codec->cache_ops->init(codec);
  1240. }
  1241. return -ENOSYS;
  1242. }
  1243. /*
  1244. * NOTE: keep in mind that this function might be called
  1245. * multiple times.
  1246. */
  1247. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1248. {
  1249. if (codec->cache_ops && codec->cache_ops->exit) {
  1250. if (codec->cache_ops->name)
  1251. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1252. codec->cache_ops->name, codec->name);
  1253. return codec->cache_ops->exit(codec);
  1254. }
  1255. return -ENOSYS;
  1256. }
  1257. /**
  1258. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1259. *
  1260. * @codec: CODEC to configure.
  1261. * @reg: The register index.
  1262. * @value: The value to be returned.
  1263. */
  1264. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1265. unsigned int reg, unsigned int *value)
  1266. {
  1267. int ret;
  1268. mutex_lock(&codec->cache_rw_mutex);
  1269. if (value && codec->cache_ops && codec->cache_ops->read) {
  1270. ret = codec->cache_ops->read(codec, reg, value);
  1271. mutex_unlock(&codec->cache_rw_mutex);
  1272. return ret;
  1273. }
  1274. mutex_unlock(&codec->cache_rw_mutex);
  1275. return -ENOSYS;
  1276. }
  1277. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1278. /**
  1279. * snd_soc_cache_write: Set the value of a given register in the cache.
  1280. *
  1281. * @codec: CODEC to configure.
  1282. * @reg: The register index.
  1283. * @value: The new register value.
  1284. */
  1285. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1286. unsigned int reg, unsigned int value)
  1287. {
  1288. int ret;
  1289. mutex_lock(&codec->cache_rw_mutex);
  1290. if (codec->cache_ops && codec->cache_ops->write) {
  1291. ret = codec->cache_ops->write(codec, reg, value);
  1292. mutex_unlock(&codec->cache_rw_mutex);
  1293. return ret;
  1294. }
  1295. mutex_unlock(&codec->cache_rw_mutex);
  1296. return -ENOSYS;
  1297. }
  1298. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1299. /**
  1300. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1301. *
  1302. * @codec: CODEC to configure.
  1303. *
  1304. * Any registers that should not be synced should be marked as
  1305. * volatile. In general drivers can choose not to use the provided
  1306. * syncing functionality if they so require.
  1307. */
  1308. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1309. {
  1310. int ret;
  1311. const char *name;
  1312. if (!codec->cache_sync) {
  1313. return 0;
  1314. }
  1315. if (!codec->cache_ops || !codec->cache_ops->sync)
  1316. return -ENOSYS;
  1317. if (codec->cache_ops->name)
  1318. name = codec->cache_ops->name;
  1319. else
  1320. name = "unknown";
  1321. if (codec->cache_ops->name)
  1322. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1323. codec->cache_ops->name, codec->name);
  1324. trace_snd_soc_cache_sync(codec, name, "start");
  1325. ret = codec->cache_ops->sync(codec);
  1326. if (!ret)
  1327. codec->cache_sync = 0;
  1328. trace_snd_soc_cache_sync(codec, name, "end");
  1329. return ret;
  1330. }
  1331. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1332. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1333. unsigned int reg)
  1334. {
  1335. const struct snd_soc_codec_driver *codec_drv;
  1336. unsigned int min, max, index;
  1337. codec_drv = codec->driver;
  1338. min = 0;
  1339. max = codec_drv->reg_access_size - 1;
  1340. do {
  1341. index = (min + max) / 2;
  1342. if (codec_drv->reg_access_default[index].reg == reg)
  1343. return index;
  1344. if (codec_drv->reg_access_default[index].reg < reg)
  1345. min = index + 1;
  1346. else
  1347. max = index;
  1348. } while (min <= max);
  1349. return -1;
  1350. }
  1351. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1352. unsigned int reg)
  1353. {
  1354. int index;
  1355. if (reg >= codec->driver->reg_cache_size)
  1356. return 1;
  1357. index = snd_soc_get_reg_access_index(codec, reg);
  1358. if (index < 0)
  1359. return 0;
  1360. return codec->driver->reg_access_default[index].vol;
  1361. }
  1362. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1363. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1364. unsigned int reg)
  1365. {
  1366. int index;
  1367. if (reg >= codec->driver->reg_cache_size)
  1368. return 1;
  1369. index = snd_soc_get_reg_access_index(codec, reg);
  1370. if (index < 0)
  1371. return 0;
  1372. return codec->driver->reg_access_default[index].read;
  1373. }
  1374. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
  1375. int snd_soc_default_writable_register(struct snd_soc_codec *codec,
  1376. unsigned int reg)
  1377. {
  1378. int index;
  1379. if (reg >= codec->driver->reg_cache_size)
  1380. return 1;
  1381. index = snd_soc_get_reg_access_index(codec, reg);
  1382. if (index < 0)
  1383. return 0;
  1384. return codec->driver->reg_access_default[index].write;
  1385. }
  1386. EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);