omap_hwmod.c 118 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include <asm/system_misc.h>
  141. #include "clock.h"
  142. #include "omap_hwmod.h"
  143. #include "soc.h"
  144. #include "common.h"
  145. #include "clockdomain.h"
  146. #include "powerdomain.h"
  147. #include "cm2xxx.h"
  148. #include "cm3xxx.h"
  149. #include "cminst44xx.h"
  150. #include "cm33xx.h"
  151. #include "prm.h"
  152. #include "prm3xxx.h"
  153. #include "prm44xx.h"
  154. #include "prm33xx.h"
  155. #include "prminst44xx.h"
  156. #include "mux.h"
  157. #include "pm.h"
  158. /* Name of the OMAP hwmod for the MPU */
  159. #define MPU_INITIATOR_NAME "mpu"
  160. /*
  161. * Number of struct omap_hwmod_link records per struct
  162. * omap_hwmod_ocp_if record (master->slave and slave->master)
  163. */
  164. #define LINKS_PER_OCP_IF 2
  165. /**
  166. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  167. * @enable_module: function to enable a module (via MODULEMODE)
  168. * @disable_module: function to disable a module (via MODULEMODE)
  169. *
  170. * XXX Eventually this functionality will be hidden inside the PRM/CM
  171. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  172. * conditionals in this code.
  173. */
  174. struct omap_hwmod_soc_ops {
  175. void (*enable_module)(struct omap_hwmod *oh);
  176. int (*disable_module)(struct omap_hwmod *oh);
  177. int (*wait_target_ready)(struct omap_hwmod *oh);
  178. int (*assert_hardreset)(struct omap_hwmod *oh,
  179. struct omap_hwmod_rst_info *ohri);
  180. int (*deassert_hardreset)(struct omap_hwmod *oh,
  181. struct omap_hwmod_rst_info *ohri);
  182. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  183. struct omap_hwmod_rst_info *ohri);
  184. int (*init_clkdm)(struct omap_hwmod *oh);
  185. void (*update_context_lost)(struct omap_hwmod *oh);
  186. int (*get_context_lost)(struct omap_hwmod *oh);
  187. };
  188. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  189. static struct omap_hwmod_soc_ops soc_ops;
  190. /* omap_hwmod_list contains all registered struct omap_hwmods */
  191. static LIST_HEAD(omap_hwmod_list);
  192. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  193. static struct omap_hwmod *mpu_oh;
  194. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  195. static DEFINE_SPINLOCK(io_chain_lock);
  196. /*
  197. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  198. * allocated from - used to reduce the number of small memory
  199. * allocations, which has a significant impact on performance
  200. */
  201. static struct omap_hwmod_link *linkspace;
  202. /*
  203. * free_ls, max_ls: array indexes into linkspace; representing the
  204. * next free struct omap_hwmod_link index, and the maximum number of
  205. * struct omap_hwmod_link records allocated (respectively)
  206. */
  207. static unsigned short free_ls, max_ls, ls_supp;
  208. /* inited: set to true once the hwmod code is initialized */
  209. static bool inited;
  210. /* Private functions */
  211. /**
  212. * _fetch_next_ocp_if - return the next OCP interface in a list
  213. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  214. * @i: pointer to the index of the element pointed to by @p in the list
  215. *
  216. * Return a pointer to the struct omap_hwmod_ocp_if record
  217. * containing the struct list_head pointed to by @p, and increment
  218. * @p such that a future call to this routine will return the next
  219. * record.
  220. */
  221. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  222. int *i)
  223. {
  224. struct omap_hwmod_ocp_if *oi;
  225. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  226. *p = (*p)->next;
  227. *i = *i + 1;
  228. return oi;
  229. }
  230. /**
  231. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  232. * @oh: struct omap_hwmod *
  233. *
  234. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  235. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  236. * OCP_SYSCONFIG register or 0 upon success.
  237. */
  238. static int _update_sysc_cache(struct omap_hwmod *oh)
  239. {
  240. if (!oh->class->sysc) {
  241. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  242. return -EINVAL;
  243. }
  244. /* XXX ensure module interface clock is up */
  245. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  246. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  247. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  248. return 0;
  249. }
  250. /**
  251. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  252. * @v: OCP_SYSCONFIG value to write
  253. * @oh: struct omap_hwmod *
  254. *
  255. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  256. * one. No return value.
  257. */
  258. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  259. {
  260. if (!oh->class->sysc) {
  261. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  262. return;
  263. }
  264. /* XXX ensure module interface clock is up */
  265. /* Module might have lost context, always update cache and register */
  266. oh->_sysc_cache = v;
  267. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  268. }
  269. /**
  270. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  271. * @oh: struct omap_hwmod *
  272. * @standbymode: MIDLEMODE field bits
  273. * @v: pointer to register contents to modify
  274. *
  275. * Update the master standby mode bits in @v to be @standbymode for
  276. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  277. * upon error or 0 upon success.
  278. */
  279. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  280. u32 *v)
  281. {
  282. u32 mstandby_mask;
  283. u8 mstandby_shift;
  284. if (!oh->class->sysc ||
  285. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  286. return -EINVAL;
  287. if (!oh->class->sysc->sysc_fields) {
  288. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  289. return -EINVAL;
  290. }
  291. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  292. mstandby_mask = (0x3 << mstandby_shift);
  293. *v &= ~mstandby_mask;
  294. *v |= __ffs(standbymode) << mstandby_shift;
  295. return 0;
  296. }
  297. /**
  298. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  299. * @oh: struct omap_hwmod *
  300. * @idlemode: SIDLEMODE field bits
  301. * @v: pointer to register contents to modify
  302. *
  303. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  304. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  305. * or 0 upon success.
  306. */
  307. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  308. {
  309. u32 sidle_mask;
  310. u8 sidle_shift;
  311. if (!oh->class->sysc ||
  312. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  313. return -EINVAL;
  314. if (!oh->class->sysc->sysc_fields) {
  315. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  316. return -EINVAL;
  317. }
  318. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  319. sidle_mask = (0x3 << sidle_shift);
  320. *v &= ~sidle_mask;
  321. *v |= __ffs(idlemode) << sidle_shift;
  322. return 0;
  323. }
  324. /**
  325. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  326. * @oh: struct omap_hwmod *
  327. * @clockact: CLOCKACTIVITY field bits
  328. * @v: pointer to register contents to modify
  329. *
  330. * Update the clockactivity mode bits in @v to be @clockact for the
  331. * @oh hwmod. Used for additional powersaving on some modules. Does
  332. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  333. * success.
  334. */
  335. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  336. {
  337. u32 clkact_mask;
  338. u8 clkact_shift;
  339. if (!oh->class->sysc ||
  340. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  341. return -EINVAL;
  342. if (!oh->class->sysc->sysc_fields) {
  343. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  344. return -EINVAL;
  345. }
  346. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  347. clkact_mask = (0x3 << clkact_shift);
  348. *v &= ~clkact_mask;
  349. *v |= clockact << clkact_shift;
  350. return 0;
  351. }
  352. /**
  353. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  354. * @oh: struct omap_hwmod *
  355. * @v: pointer to register contents to modify
  356. *
  357. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  358. * error or 0 upon success.
  359. */
  360. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  361. {
  362. u32 softrst_mask;
  363. if (!oh->class->sysc ||
  364. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  365. return -EINVAL;
  366. if (!oh->class->sysc->sysc_fields) {
  367. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  368. return -EINVAL;
  369. }
  370. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  371. *v |= softrst_mask;
  372. return 0;
  373. }
  374. /**
  375. * _wait_softreset_complete - wait for an OCP softreset to complete
  376. * @oh: struct omap_hwmod * to wait on
  377. *
  378. * Wait until the IP block represented by @oh reports that its OCP
  379. * softreset is complete. This can be triggered by software (see
  380. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  381. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  382. * microseconds. Returns the number of microseconds waited.
  383. */
  384. static int _wait_softreset_complete(struct omap_hwmod *oh)
  385. {
  386. struct omap_hwmod_class_sysconfig *sysc;
  387. u32 softrst_mask;
  388. int c = 0;
  389. sysc = oh->class->sysc;
  390. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  391. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  392. & SYSS_RESETDONE_MASK),
  393. MAX_MODULE_SOFTRESET_WAIT, c);
  394. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  395. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  396. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  397. & softrst_mask),
  398. MAX_MODULE_SOFTRESET_WAIT, c);
  399. }
  400. return c;
  401. }
  402. /**
  403. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  404. * @oh: struct omap_hwmod *
  405. *
  406. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  407. * of some modules. When the DMA must perform read/write accesses, the
  408. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  409. * for power management, software must set the DMADISABLE bit back to 1.
  410. *
  411. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  412. * error or 0 upon success.
  413. */
  414. static int _set_dmadisable(struct omap_hwmod *oh)
  415. {
  416. u32 v;
  417. u32 dmadisable_mask;
  418. if (!oh->class->sysc ||
  419. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  420. return -EINVAL;
  421. if (!oh->class->sysc->sysc_fields) {
  422. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  423. return -EINVAL;
  424. }
  425. /* clocks must be on for this operation */
  426. if (oh->_state != _HWMOD_STATE_ENABLED) {
  427. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  428. return -EINVAL;
  429. }
  430. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  431. v = oh->_sysc_cache;
  432. dmadisable_mask =
  433. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  434. v |= dmadisable_mask;
  435. _write_sysconfig(v, oh);
  436. return 0;
  437. }
  438. /**
  439. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  440. * @oh: struct omap_hwmod *
  441. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  442. * @v: pointer to register contents to modify
  443. *
  444. * Update the module autoidle bit in @v to be @autoidle for the @oh
  445. * hwmod. The autoidle bit controls whether the module can gate
  446. * internal clocks automatically when it isn't doing anything; the
  447. * exact function of this bit varies on a per-module basis. This
  448. * function does not write to the hardware. Returns -EINVAL upon
  449. * error or 0 upon success.
  450. */
  451. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  452. u32 *v)
  453. {
  454. u32 autoidle_mask;
  455. u8 autoidle_shift;
  456. if (!oh->class->sysc ||
  457. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  458. return -EINVAL;
  459. if (!oh->class->sysc->sysc_fields) {
  460. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  461. return -EINVAL;
  462. }
  463. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  464. autoidle_mask = (0x1 << autoidle_shift);
  465. *v &= ~autoidle_mask;
  466. *v |= autoidle << autoidle_shift;
  467. return 0;
  468. }
  469. /**
  470. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  471. * @oh: struct omap_hwmod *
  472. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  473. *
  474. * Set or clear the I/O pad wakeup flag in the mux entries for the
  475. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  476. * in memory. If the hwmod is currently idled, and the new idle
  477. * values don't match the previous ones, this function will also
  478. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  479. * currently idled, this function won't touch the hardware: the new
  480. * mux settings are written to the SCM PADCTRL registers when the
  481. * hwmod is idled. No return value.
  482. */
  483. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  484. {
  485. struct omap_device_pad *pad;
  486. bool change = false;
  487. u16 prev_idle;
  488. int j;
  489. if (!oh->mux || !oh->mux->enabled)
  490. return;
  491. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  492. pad = oh->mux->pads_dynamic[j];
  493. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  494. continue;
  495. prev_idle = pad->idle;
  496. if (set_wake)
  497. pad->idle |= OMAP_WAKEUP_EN;
  498. else
  499. pad->idle &= ~OMAP_WAKEUP_EN;
  500. if (prev_idle != pad->idle)
  501. change = true;
  502. }
  503. if (change && oh->_state == _HWMOD_STATE_IDLE)
  504. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  505. }
  506. /**
  507. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  508. * @oh: struct omap_hwmod *
  509. *
  510. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  511. * upon error or 0 upon success.
  512. */
  513. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  514. {
  515. if (!oh->class->sysc ||
  516. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  517. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  518. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  519. return -EINVAL;
  520. if (!oh->class->sysc->sysc_fields) {
  521. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  522. return -EINVAL;
  523. }
  524. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  525. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  526. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  527. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  528. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  529. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  530. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  531. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  532. return 0;
  533. }
  534. /**
  535. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  536. * @oh: struct omap_hwmod *
  537. *
  538. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  539. * upon error or 0 upon success.
  540. */
  541. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  542. {
  543. if (!oh->class->sysc ||
  544. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  545. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  546. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  547. return -EINVAL;
  548. if (!oh->class->sysc->sysc_fields) {
  549. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  550. return -EINVAL;
  551. }
  552. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  553. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  554. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  555. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  556. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  557. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  558. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  559. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  560. return 0;
  561. }
  562. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  563. {
  564. struct clk_hw_omap *clk;
  565. if (oh->clkdm) {
  566. return oh->clkdm;
  567. } else if (oh->_clk) {
  568. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  569. return clk->clkdm;
  570. }
  571. return NULL;
  572. }
  573. /**
  574. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  575. * @oh: struct omap_hwmod *
  576. *
  577. * Prevent the hardware module @oh from entering idle while the
  578. * hardare module initiator @init_oh is active. Useful when a module
  579. * will be accessed by a particular initiator (e.g., if a module will
  580. * be accessed by the IVA, there should be a sleepdep between the IVA
  581. * initiator and the module). Only applies to modules in smart-idle
  582. * mode. If the clockdomain is marked as not needing autodeps, return
  583. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  584. * passes along clkdm_add_sleepdep() value upon success.
  585. */
  586. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  587. {
  588. struct clockdomain *clkdm, *init_clkdm;
  589. clkdm = _get_clkdm(oh);
  590. init_clkdm = _get_clkdm(init_oh);
  591. if (!clkdm || !init_clkdm)
  592. return -EINVAL;
  593. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  594. return 0;
  595. return clkdm_add_sleepdep(clkdm, init_clkdm);
  596. }
  597. /**
  598. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  599. * @oh: struct omap_hwmod *
  600. *
  601. * Allow the hardware module @oh to enter idle while the hardare
  602. * module initiator @init_oh is active. Useful when a module will not
  603. * be accessed by a particular initiator (e.g., if a module will not
  604. * be accessed by the IVA, there should be no sleepdep between the IVA
  605. * initiator and the module). Only applies to modules in smart-idle
  606. * mode. If the clockdomain is marked as not needing autodeps, return
  607. * 0 without doing anything. Returns -EINVAL upon error or passes
  608. * along clkdm_del_sleepdep() value upon success.
  609. */
  610. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  611. {
  612. struct clockdomain *clkdm, *init_clkdm;
  613. clkdm = _get_clkdm(oh);
  614. init_clkdm = _get_clkdm(init_oh);
  615. if (!clkdm || !init_clkdm)
  616. return -EINVAL;
  617. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  618. return 0;
  619. return clkdm_del_sleepdep(clkdm, init_clkdm);
  620. }
  621. /**
  622. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  623. * @oh: struct omap_hwmod *
  624. *
  625. * Called from _init_clocks(). Populates the @oh _clk (main
  626. * functional clock pointer) if a main_clk is present. Returns 0 on
  627. * success or -EINVAL on error.
  628. */
  629. static int _init_main_clk(struct omap_hwmod *oh)
  630. {
  631. int ret = 0;
  632. if (!oh->main_clk)
  633. return 0;
  634. oh->_clk = clk_get(NULL, oh->main_clk);
  635. if (IS_ERR(oh->_clk)) {
  636. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  637. oh->name, oh->main_clk);
  638. return -EINVAL;
  639. }
  640. /*
  641. * HACK: This needs a re-visit once clk_prepare() is implemented
  642. * to do something meaningful. Today its just a no-op.
  643. * If clk_prepare() is used at some point to do things like
  644. * voltage scaling etc, then this would have to be moved to
  645. * some point where subsystems like i2c and pmic become
  646. * available.
  647. */
  648. clk_prepare(oh->_clk);
  649. if (!_get_clkdm(oh))
  650. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  651. oh->name, oh->main_clk);
  652. return ret;
  653. }
  654. /**
  655. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  656. * @oh: struct omap_hwmod *
  657. *
  658. * Called from _init_clocks(). Populates the @oh OCP slave interface
  659. * clock pointers. Returns 0 on success or -EINVAL on error.
  660. */
  661. static int _init_interface_clks(struct omap_hwmod *oh)
  662. {
  663. struct omap_hwmod_ocp_if *os;
  664. struct list_head *p;
  665. struct clk *c;
  666. int i = 0;
  667. int ret = 0;
  668. p = oh->slave_ports.next;
  669. while (i < oh->slaves_cnt) {
  670. os = _fetch_next_ocp_if(&p, &i);
  671. if (!os->clk)
  672. continue;
  673. c = clk_get(NULL, os->clk);
  674. if (IS_ERR(c)) {
  675. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  676. oh->name, os->clk);
  677. ret = -EINVAL;
  678. }
  679. os->_clk = c;
  680. /*
  681. * HACK: This needs a re-visit once clk_prepare() is implemented
  682. * to do something meaningful. Today its just a no-op.
  683. * If clk_prepare() is used at some point to do things like
  684. * voltage scaling etc, then this would have to be moved to
  685. * some point where subsystems like i2c and pmic become
  686. * available.
  687. */
  688. clk_prepare(os->_clk);
  689. }
  690. return ret;
  691. }
  692. /**
  693. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  694. * @oh: struct omap_hwmod *
  695. *
  696. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  697. * clock pointers. Returns 0 on success or -EINVAL on error.
  698. */
  699. static int _init_opt_clks(struct omap_hwmod *oh)
  700. {
  701. struct omap_hwmod_opt_clk *oc;
  702. struct clk *c;
  703. int i;
  704. int ret = 0;
  705. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  706. c = clk_get(NULL, oc->clk);
  707. if (IS_ERR(c)) {
  708. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  709. oh->name, oc->clk);
  710. ret = -EINVAL;
  711. }
  712. oc->_clk = c;
  713. /*
  714. * HACK: This needs a re-visit once clk_prepare() is implemented
  715. * to do something meaningful. Today its just a no-op.
  716. * If clk_prepare() is used at some point to do things like
  717. * voltage scaling etc, then this would have to be moved to
  718. * some point where subsystems like i2c and pmic become
  719. * available.
  720. */
  721. clk_prepare(oc->_clk);
  722. }
  723. return ret;
  724. }
  725. /**
  726. * _enable_clocks - enable hwmod main clock and interface clocks
  727. * @oh: struct omap_hwmod *
  728. *
  729. * Enables all clocks necessary for register reads and writes to succeed
  730. * on the hwmod @oh. Returns 0.
  731. */
  732. static int _enable_clocks(struct omap_hwmod *oh)
  733. {
  734. struct omap_hwmod_ocp_if *os;
  735. struct list_head *p;
  736. int i = 0;
  737. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  738. if (oh->_clk)
  739. clk_enable(oh->_clk);
  740. p = oh->slave_ports.next;
  741. while (i < oh->slaves_cnt) {
  742. os = _fetch_next_ocp_if(&p, &i);
  743. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  744. clk_enable(os->_clk);
  745. }
  746. /* The opt clocks are controlled by the device driver. */
  747. return 0;
  748. }
  749. /**
  750. * _disable_clocks - disable hwmod main clock and interface clocks
  751. * @oh: struct omap_hwmod *
  752. *
  753. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  754. */
  755. static int _disable_clocks(struct omap_hwmod *oh)
  756. {
  757. struct omap_hwmod_ocp_if *os;
  758. struct list_head *p;
  759. int i = 0;
  760. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  761. if (oh->_clk)
  762. clk_disable(oh->_clk);
  763. p = oh->slave_ports.next;
  764. while (i < oh->slaves_cnt) {
  765. os = _fetch_next_ocp_if(&p, &i);
  766. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  767. clk_disable(os->_clk);
  768. }
  769. /* The opt clocks are controlled by the device driver. */
  770. return 0;
  771. }
  772. static void _enable_optional_clocks(struct omap_hwmod *oh)
  773. {
  774. struct omap_hwmod_opt_clk *oc;
  775. int i;
  776. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  777. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  778. if (oc->_clk) {
  779. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  780. __clk_get_name(oc->_clk));
  781. clk_enable(oc->_clk);
  782. }
  783. }
  784. static void _disable_optional_clocks(struct omap_hwmod *oh)
  785. {
  786. struct omap_hwmod_opt_clk *oc;
  787. int i;
  788. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  789. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  790. if (oc->_clk) {
  791. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  792. __clk_get_name(oc->_clk));
  793. clk_disable(oc->_clk);
  794. }
  795. }
  796. /**
  797. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  798. * @oh: struct omap_hwmod *
  799. *
  800. * Enables the PRCM module mode related to the hwmod @oh.
  801. * No return value.
  802. */
  803. static void _omap4_enable_module(struct omap_hwmod *oh)
  804. {
  805. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  806. return;
  807. pr_debug("omap_hwmod: %s: %s: %d\n",
  808. oh->name, __func__, oh->prcm.omap4.modulemode);
  809. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  810. oh->clkdm->prcm_partition,
  811. oh->clkdm->cm_inst,
  812. oh->clkdm->clkdm_offs,
  813. oh->prcm.omap4.clkctrl_offs);
  814. }
  815. /**
  816. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  817. * @oh: struct omap_hwmod *
  818. *
  819. * Enables the PRCM module mode related to the hwmod @oh.
  820. * No return value.
  821. */
  822. static void _am33xx_enable_module(struct omap_hwmod *oh)
  823. {
  824. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  825. return;
  826. pr_debug("omap_hwmod: %s: %s: %d\n",
  827. oh->name, __func__, oh->prcm.omap4.modulemode);
  828. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  829. oh->clkdm->clkdm_offs,
  830. oh->prcm.omap4.clkctrl_offs);
  831. }
  832. /**
  833. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  834. * @oh: struct omap_hwmod *
  835. *
  836. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  837. * does not have an IDLEST bit or if the module successfully enters
  838. * slave idle; otherwise, pass along the return value of the
  839. * appropriate *_cm*_wait_module_idle() function.
  840. */
  841. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  842. {
  843. if (!oh)
  844. return -EINVAL;
  845. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  846. return 0;
  847. if (oh->flags & HWMOD_NO_IDLEST)
  848. return 0;
  849. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  850. oh->clkdm->cm_inst,
  851. oh->clkdm->clkdm_offs,
  852. oh->prcm.omap4.clkctrl_offs);
  853. }
  854. /**
  855. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  856. * @oh: struct omap_hwmod *
  857. *
  858. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  859. * does not have an IDLEST bit or if the module successfully enters
  860. * slave idle; otherwise, pass along the return value of the
  861. * appropriate *_cm*_wait_module_idle() function.
  862. */
  863. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  864. {
  865. if (!oh)
  866. return -EINVAL;
  867. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  868. return 0;
  869. if (oh->flags & HWMOD_NO_IDLEST)
  870. return 0;
  871. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  872. oh->clkdm->clkdm_offs,
  873. oh->prcm.omap4.clkctrl_offs);
  874. }
  875. /**
  876. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  877. * @oh: struct omap_hwmod *oh
  878. *
  879. * Count and return the number of MPU IRQs associated with the hwmod
  880. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  881. * NULL.
  882. */
  883. static int _count_mpu_irqs(struct omap_hwmod *oh)
  884. {
  885. struct omap_hwmod_irq_info *ohii;
  886. int i = 0;
  887. if (!oh || !oh->mpu_irqs)
  888. return 0;
  889. do {
  890. ohii = &oh->mpu_irqs[i++];
  891. } while (ohii->irq != -1);
  892. return i-1;
  893. }
  894. /**
  895. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  896. * @oh: struct omap_hwmod *oh
  897. *
  898. * Count and return the number of SDMA request lines associated with
  899. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  900. * if @oh is NULL.
  901. */
  902. static int _count_sdma_reqs(struct omap_hwmod *oh)
  903. {
  904. struct omap_hwmod_dma_info *ohdi;
  905. int i = 0;
  906. if (!oh || !oh->sdma_reqs)
  907. return 0;
  908. do {
  909. ohdi = &oh->sdma_reqs[i++];
  910. } while (ohdi->dma_req != -1);
  911. return i-1;
  912. }
  913. /**
  914. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  915. * @oh: struct omap_hwmod *oh
  916. *
  917. * Count and return the number of address space ranges associated with
  918. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  919. * if @oh is NULL.
  920. */
  921. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  922. {
  923. struct omap_hwmod_addr_space *mem;
  924. int i = 0;
  925. if (!os || !os->addr)
  926. return 0;
  927. do {
  928. mem = &os->addr[i++];
  929. } while (mem->pa_start != mem->pa_end);
  930. return i-1;
  931. }
  932. /**
  933. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  934. * @oh: struct omap_hwmod * to operate on
  935. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  936. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  937. *
  938. * Retrieve a MPU hardware IRQ line number named by @name associated
  939. * with the IP block pointed to by @oh. The IRQ number will be filled
  940. * into the address pointed to by @dma. When @name is non-null, the
  941. * IRQ line number associated with the named entry will be returned.
  942. * If @name is null, the first matching entry will be returned. Data
  943. * order is not meaningful in hwmod data, so callers are strongly
  944. * encouraged to use a non-null @name whenever possible to avoid
  945. * unpredictable effects if hwmod data is later added that causes data
  946. * ordering to change. Returns 0 upon success or a negative error
  947. * code upon error.
  948. */
  949. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  950. unsigned int *irq)
  951. {
  952. int i;
  953. bool found = false;
  954. if (!oh->mpu_irqs)
  955. return -ENOENT;
  956. i = 0;
  957. while (oh->mpu_irqs[i].irq != -1) {
  958. if (name == oh->mpu_irqs[i].name ||
  959. !strcmp(name, oh->mpu_irqs[i].name)) {
  960. found = true;
  961. break;
  962. }
  963. i++;
  964. }
  965. if (!found)
  966. return -ENOENT;
  967. *irq = oh->mpu_irqs[i].irq;
  968. return 0;
  969. }
  970. /**
  971. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  972. * @oh: struct omap_hwmod * to operate on
  973. * @name: pointer to the name of the SDMA request line to fetch (optional)
  974. * @dma: pointer to an unsigned int to store the request line ID to
  975. *
  976. * Retrieve an SDMA request line ID named by @name on the IP block
  977. * pointed to by @oh. The ID will be filled into the address pointed
  978. * to by @dma. When @name is non-null, the request line ID associated
  979. * with the named entry will be returned. If @name is null, the first
  980. * matching entry will be returned. Data order is not meaningful in
  981. * hwmod data, so callers are strongly encouraged to use a non-null
  982. * @name whenever possible to avoid unpredictable effects if hwmod
  983. * data is later added that causes data ordering to change. Returns 0
  984. * upon success or a negative error code upon error.
  985. */
  986. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  987. unsigned int *dma)
  988. {
  989. int i;
  990. bool found = false;
  991. if (!oh->sdma_reqs)
  992. return -ENOENT;
  993. i = 0;
  994. while (oh->sdma_reqs[i].dma_req != -1) {
  995. if (name == oh->sdma_reqs[i].name ||
  996. !strcmp(name, oh->sdma_reqs[i].name)) {
  997. found = true;
  998. break;
  999. }
  1000. i++;
  1001. }
  1002. if (!found)
  1003. return -ENOENT;
  1004. *dma = oh->sdma_reqs[i].dma_req;
  1005. return 0;
  1006. }
  1007. /**
  1008. * _get_addr_space_by_name - fetch address space start & end by name
  1009. * @oh: struct omap_hwmod * to operate on
  1010. * @name: pointer to the name of the address space to fetch (optional)
  1011. * @pa_start: pointer to a u32 to store the starting address to
  1012. * @pa_end: pointer to a u32 to store the ending address to
  1013. *
  1014. * Retrieve address space start and end addresses for the IP block
  1015. * pointed to by @oh. The data will be filled into the addresses
  1016. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1017. * address space data associated with the named entry will be
  1018. * returned. If @name is null, the first matching entry will be
  1019. * returned. Data order is not meaningful in hwmod data, so callers
  1020. * are strongly encouraged to use a non-null @name whenever possible
  1021. * to avoid unpredictable effects if hwmod data is later added that
  1022. * causes data ordering to change. Returns 0 upon success or a
  1023. * negative error code upon error.
  1024. */
  1025. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1026. u32 *pa_start, u32 *pa_end)
  1027. {
  1028. int i, j;
  1029. struct omap_hwmod_ocp_if *os;
  1030. struct list_head *p = NULL;
  1031. bool found = false;
  1032. p = oh->slave_ports.next;
  1033. i = 0;
  1034. while (i < oh->slaves_cnt) {
  1035. os = _fetch_next_ocp_if(&p, &i);
  1036. if (!os->addr)
  1037. return -ENOENT;
  1038. j = 0;
  1039. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1040. if (name == os->addr[j].name ||
  1041. !strcmp(name, os->addr[j].name)) {
  1042. found = true;
  1043. break;
  1044. }
  1045. j++;
  1046. }
  1047. if (found)
  1048. break;
  1049. }
  1050. if (!found)
  1051. return -ENOENT;
  1052. *pa_start = os->addr[j].pa_start;
  1053. *pa_end = os->addr[j].pa_end;
  1054. return 0;
  1055. }
  1056. /**
  1057. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1058. * @oh: struct omap_hwmod *
  1059. *
  1060. * Determines the array index of the OCP slave port that the MPU uses
  1061. * to address the device, and saves it into the struct omap_hwmod.
  1062. * Intended to be called during hwmod registration only. No return
  1063. * value.
  1064. */
  1065. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1066. {
  1067. struct omap_hwmod_ocp_if *os = NULL;
  1068. struct list_head *p;
  1069. int i = 0;
  1070. if (!oh)
  1071. return;
  1072. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1073. p = oh->slave_ports.next;
  1074. while (i < oh->slaves_cnt) {
  1075. os = _fetch_next_ocp_if(&p, &i);
  1076. if (os->user & OCP_USER_MPU) {
  1077. oh->_mpu_port = os;
  1078. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1079. break;
  1080. }
  1081. }
  1082. return;
  1083. }
  1084. /**
  1085. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1086. * @oh: struct omap_hwmod *
  1087. *
  1088. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1089. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1090. * communicate with the IP block. This interface need not be directly
  1091. * connected to the MPU (and almost certainly is not), but is directly
  1092. * connected to the IP block represented by @oh. Returns a pointer
  1093. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1094. * error or if there does not appear to be a path from the MPU to this
  1095. * IP block.
  1096. */
  1097. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1098. {
  1099. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1100. return NULL;
  1101. return oh->_mpu_port;
  1102. };
  1103. /**
  1104. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1105. * @oh: struct omap_hwmod *
  1106. *
  1107. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1108. * the register target MPU address space; or returns NULL upon error.
  1109. */
  1110. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1111. {
  1112. struct omap_hwmod_ocp_if *os;
  1113. struct omap_hwmod_addr_space *mem;
  1114. int found = 0, i = 0;
  1115. os = _find_mpu_rt_port(oh);
  1116. if (!os || !os->addr)
  1117. return NULL;
  1118. do {
  1119. mem = &os->addr[i++];
  1120. if (mem->flags & ADDR_TYPE_RT)
  1121. found = 1;
  1122. } while (!found && mem->pa_start != mem->pa_end);
  1123. return (found) ? mem : NULL;
  1124. }
  1125. /**
  1126. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1127. * @oh: struct omap_hwmod *
  1128. *
  1129. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1130. * by @oh is set to indicate to the PRCM that the IP block is active.
  1131. * Usually this means placing the module into smart-idle mode and
  1132. * smart-standby, but if there is a bug in the automatic idle handling
  1133. * for the IP block, it may need to be placed into the force-idle or
  1134. * no-idle variants of these modes. No return value.
  1135. */
  1136. static void _enable_sysc(struct omap_hwmod *oh)
  1137. {
  1138. u8 idlemode, sf;
  1139. u32 v;
  1140. bool clkdm_act;
  1141. struct clockdomain *clkdm;
  1142. if (!oh->class->sysc)
  1143. return;
  1144. /*
  1145. * Wait until reset has completed, this is needed as the IP
  1146. * block is reset automatically by hardware in some cases
  1147. * (off-mode for example), and the drivers require the
  1148. * IP to be ready when they access it
  1149. */
  1150. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1151. _enable_optional_clocks(oh);
  1152. _wait_softreset_complete(oh);
  1153. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1154. _disable_optional_clocks(oh);
  1155. v = oh->_sysc_cache;
  1156. sf = oh->class->sysc->sysc_flags;
  1157. clkdm = _get_clkdm(oh);
  1158. if (sf & SYSC_HAS_SIDLEMODE) {
  1159. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1160. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1161. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1162. idlemode = HWMOD_IDLEMODE_FORCE;
  1163. else
  1164. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1165. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1166. _set_slave_idlemode(oh, idlemode, &v);
  1167. }
  1168. if (sf & SYSC_HAS_MIDLEMODE) {
  1169. if (oh->flags & HWMOD_FORCE_MSTANDBY) {
  1170. idlemode = HWMOD_IDLEMODE_FORCE;
  1171. } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1172. idlemode = HWMOD_IDLEMODE_NO;
  1173. } else {
  1174. if (sf & SYSC_HAS_ENAWAKEUP)
  1175. _enable_wakeup(oh, &v);
  1176. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1177. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1178. else
  1179. idlemode = HWMOD_IDLEMODE_SMART;
  1180. }
  1181. _set_master_standbymode(oh, idlemode, &v);
  1182. }
  1183. /*
  1184. * XXX The clock framework should handle this, by
  1185. * calling into this code. But this must wait until the
  1186. * clock structures are tagged with omap_hwmod entries
  1187. */
  1188. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1189. (sf & SYSC_HAS_CLOCKACTIVITY))
  1190. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1191. /* If slave is in SMARTIDLE, also enable wakeup */
  1192. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1193. _enable_wakeup(oh, &v);
  1194. _write_sysconfig(v, oh);
  1195. /*
  1196. * Set the autoidle bit only after setting the smartidle bit
  1197. * Setting this will not have any impact on the other modules.
  1198. */
  1199. if (sf & SYSC_HAS_AUTOIDLE) {
  1200. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1201. 0 : 1;
  1202. _set_module_autoidle(oh, idlemode, &v);
  1203. _write_sysconfig(v, oh);
  1204. }
  1205. }
  1206. /**
  1207. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1208. * @oh: struct omap_hwmod *
  1209. *
  1210. * If module is marked as SWSUP_SIDLE, force the module into slave
  1211. * idle; otherwise, configure it for smart-idle. If module is marked
  1212. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1213. * configure it for smart-standby. No return value.
  1214. */
  1215. static void _idle_sysc(struct omap_hwmod *oh)
  1216. {
  1217. u8 idlemode, sf;
  1218. u32 v;
  1219. if (!oh->class->sysc)
  1220. return;
  1221. v = oh->_sysc_cache;
  1222. sf = oh->class->sysc->sysc_flags;
  1223. if (sf & SYSC_HAS_SIDLEMODE) {
  1224. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1225. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1226. !(oh->class->sysc->idlemodes &
  1227. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1228. idlemode = HWMOD_IDLEMODE_FORCE;
  1229. else
  1230. idlemode = HWMOD_IDLEMODE_SMART;
  1231. _set_slave_idlemode(oh, idlemode, &v);
  1232. }
  1233. if (sf & SYSC_HAS_MIDLEMODE) {
  1234. if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
  1235. (oh->flags & HWMOD_FORCE_MSTANDBY)) {
  1236. idlemode = HWMOD_IDLEMODE_FORCE;
  1237. } else {
  1238. if (sf & SYSC_HAS_ENAWAKEUP)
  1239. _enable_wakeup(oh, &v);
  1240. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1241. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1242. else
  1243. idlemode = HWMOD_IDLEMODE_SMART;
  1244. }
  1245. _set_master_standbymode(oh, idlemode, &v);
  1246. }
  1247. /* If slave is in SMARTIDLE, also enable wakeup */
  1248. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1249. _enable_wakeup(oh, &v);
  1250. _write_sysconfig(v, oh);
  1251. }
  1252. /**
  1253. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1254. * @oh: struct omap_hwmod *
  1255. *
  1256. * Force the module into slave idle and master suspend. No return
  1257. * value.
  1258. */
  1259. static void _shutdown_sysc(struct omap_hwmod *oh)
  1260. {
  1261. u32 v;
  1262. u8 sf;
  1263. if (!oh->class->sysc)
  1264. return;
  1265. v = oh->_sysc_cache;
  1266. sf = oh->class->sysc->sysc_flags;
  1267. if (sf & SYSC_HAS_SIDLEMODE)
  1268. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1269. if (sf & SYSC_HAS_MIDLEMODE)
  1270. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1271. if (sf & SYSC_HAS_AUTOIDLE)
  1272. _set_module_autoidle(oh, 1, &v);
  1273. _write_sysconfig(v, oh);
  1274. }
  1275. /**
  1276. * _lookup - find an omap_hwmod by name
  1277. * @name: find an omap_hwmod by name
  1278. *
  1279. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1280. */
  1281. static struct omap_hwmod *_lookup(const char *name)
  1282. {
  1283. struct omap_hwmod *oh, *temp_oh;
  1284. oh = NULL;
  1285. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1286. if (!strcmp(name, temp_oh->name)) {
  1287. oh = temp_oh;
  1288. break;
  1289. }
  1290. }
  1291. return oh;
  1292. }
  1293. /**
  1294. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1295. * @oh: struct omap_hwmod *
  1296. *
  1297. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1298. * clockdomain pointer, and save it into the struct omap_hwmod.
  1299. * Return -EINVAL if the clkdm_name lookup failed.
  1300. */
  1301. static int _init_clkdm(struct omap_hwmod *oh)
  1302. {
  1303. if (!oh->clkdm_name) {
  1304. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1305. return 0;
  1306. }
  1307. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1308. if (!oh->clkdm) {
  1309. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1310. oh->name, oh->clkdm_name);
  1311. return -EINVAL;
  1312. }
  1313. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1314. oh->name, oh->clkdm_name);
  1315. return 0;
  1316. }
  1317. /**
  1318. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1319. * well the clockdomain.
  1320. * @oh: struct omap_hwmod *
  1321. * @data: not used; pass NULL
  1322. *
  1323. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1324. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1325. * success, or a negative error code on failure.
  1326. */
  1327. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1328. {
  1329. int ret = 0;
  1330. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1331. return 0;
  1332. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1333. if (soc_ops.init_clkdm)
  1334. ret |= soc_ops.init_clkdm(oh);
  1335. ret |= _init_main_clk(oh);
  1336. ret |= _init_interface_clks(oh);
  1337. ret |= _init_opt_clks(oh);
  1338. if (!ret)
  1339. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1340. else
  1341. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1342. return ret;
  1343. }
  1344. /**
  1345. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1346. * @oh: struct omap_hwmod *
  1347. * @name: name of the reset line in the context of this hwmod
  1348. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1349. *
  1350. * Return the bit position of the reset line that match the
  1351. * input name. Return -ENOENT if not found.
  1352. */
  1353. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1354. struct omap_hwmod_rst_info *ohri)
  1355. {
  1356. int i;
  1357. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1358. const char *rst_line = oh->rst_lines[i].name;
  1359. if (!strcmp(rst_line, name)) {
  1360. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1361. ohri->st_shift = oh->rst_lines[i].st_shift;
  1362. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1363. oh->name, __func__, rst_line, ohri->rst_shift,
  1364. ohri->st_shift);
  1365. return 0;
  1366. }
  1367. }
  1368. return -ENOENT;
  1369. }
  1370. /**
  1371. * _assert_hardreset - assert the HW reset line of submodules
  1372. * contained in the hwmod module.
  1373. * @oh: struct omap_hwmod *
  1374. * @name: name of the reset line to lookup and assert
  1375. *
  1376. * Some IP like dsp, ipu or iva contain processor that require an HW
  1377. * reset line to be assert / deassert in order to enable fully the IP.
  1378. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1379. * asserting the hardreset line on the currently-booted SoC, or passes
  1380. * along the return value from _lookup_hardreset() or the SoC's
  1381. * assert_hardreset code.
  1382. */
  1383. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1384. {
  1385. struct omap_hwmod_rst_info ohri;
  1386. int ret = -EINVAL;
  1387. if (!oh)
  1388. return -EINVAL;
  1389. if (!soc_ops.assert_hardreset)
  1390. return -ENOSYS;
  1391. ret = _lookup_hardreset(oh, name, &ohri);
  1392. if (ret < 0)
  1393. return ret;
  1394. ret = soc_ops.assert_hardreset(oh, &ohri);
  1395. return ret;
  1396. }
  1397. /**
  1398. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1399. * in the hwmod module.
  1400. * @oh: struct omap_hwmod *
  1401. * @name: name of the reset line to look up and deassert
  1402. *
  1403. * Some IP like dsp, ipu or iva contain processor that require an HW
  1404. * reset line to be assert / deassert in order to enable fully the IP.
  1405. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1406. * deasserting the hardreset line on the currently-booted SoC, or passes
  1407. * along the return value from _lookup_hardreset() or the SoC's
  1408. * deassert_hardreset code.
  1409. */
  1410. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1411. {
  1412. struct omap_hwmod_rst_info ohri;
  1413. int ret = -EINVAL;
  1414. int hwsup = 0;
  1415. if (!oh)
  1416. return -EINVAL;
  1417. if (!soc_ops.deassert_hardreset)
  1418. return -ENOSYS;
  1419. ret = _lookup_hardreset(oh, name, &ohri);
  1420. if (IS_ERR_VALUE(ret))
  1421. return ret;
  1422. if (oh->clkdm) {
  1423. /*
  1424. * A clockdomain must be in SW_SUP otherwise reset
  1425. * might not be completed. The clockdomain can be set
  1426. * in HW_AUTO only when the module become ready.
  1427. */
  1428. hwsup = clkdm_in_hwsup(oh->clkdm);
  1429. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1430. if (ret) {
  1431. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1432. oh->name, oh->clkdm->name, ret);
  1433. return ret;
  1434. }
  1435. }
  1436. _enable_clocks(oh);
  1437. if (soc_ops.enable_module)
  1438. soc_ops.enable_module(oh);
  1439. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1440. if (soc_ops.disable_module)
  1441. soc_ops.disable_module(oh);
  1442. _disable_clocks(oh);
  1443. if (ret == -EBUSY)
  1444. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1445. if (!ret) {
  1446. /*
  1447. * Set the clockdomain to HW_AUTO, assuming that the
  1448. * previous state was HW_AUTO.
  1449. */
  1450. if (oh->clkdm && hwsup)
  1451. clkdm_allow_idle(oh->clkdm);
  1452. } else {
  1453. if (oh->clkdm)
  1454. clkdm_hwmod_disable(oh->clkdm, oh);
  1455. }
  1456. return ret;
  1457. }
  1458. /**
  1459. * _read_hardreset - read the HW reset line state of submodules
  1460. * contained in the hwmod module
  1461. * @oh: struct omap_hwmod *
  1462. * @name: name of the reset line to look up and read
  1463. *
  1464. * Return the state of the reset line. Returns -EINVAL if @oh is
  1465. * null, -ENOSYS if we have no way of reading the hardreset line
  1466. * status on the currently-booted SoC, or passes along the return
  1467. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1468. * code.
  1469. */
  1470. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1471. {
  1472. struct omap_hwmod_rst_info ohri;
  1473. int ret = -EINVAL;
  1474. if (!oh)
  1475. return -EINVAL;
  1476. if (!soc_ops.is_hardreset_asserted)
  1477. return -ENOSYS;
  1478. ret = _lookup_hardreset(oh, name, &ohri);
  1479. if (ret < 0)
  1480. return ret;
  1481. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1482. }
  1483. /**
  1484. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1485. * @oh: struct omap_hwmod *
  1486. *
  1487. * If all hardreset lines associated with @oh are asserted, then return true.
  1488. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1489. * associated with @oh are asserted, then return false.
  1490. * This function is used to avoid executing some parts of the IP block
  1491. * enable/disable sequence if its hardreset line is set.
  1492. */
  1493. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1494. {
  1495. int i, rst_cnt = 0;
  1496. if (oh->rst_lines_cnt == 0)
  1497. return false;
  1498. for (i = 0; i < oh->rst_lines_cnt; i++)
  1499. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1500. rst_cnt++;
  1501. if (oh->rst_lines_cnt == rst_cnt)
  1502. return true;
  1503. return false;
  1504. }
  1505. /**
  1506. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1507. * hard-reset
  1508. * @oh: struct omap_hwmod *
  1509. *
  1510. * If any hardreset lines associated with @oh are asserted, then
  1511. * return true. Otherwise, if no hardreset lines associated with @oh
  1512. * are asserted, or if @oh has no hardreset lines, then return false.
  1513. * This function is used to avoid executing some parts of the IP block
  1514. * enable/disable sequence if any hardreset line is set.
  1515. */
  1516. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1517. {
  1518. int rst_cnt = 0;
  1519. int i;
  1520. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1521. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1522. rst_cnt++;
  1523. return (rst_cnt) ? true : false;
  1524. }
  1525. /**
  1526. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1527. * @oh: struct omap_hwmod *
  1528. *
  1529. * Disable the PRCM module mode related to the hwmod @oh.
  1530. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1531. */
  1532. static int _omap4_disable_module(struct omap_hwmod *oh)
  1533. {
  1534. int v;
  1535. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1536. return -EINVAL;
  1537. /*
  1538. * Since integration code might still be doing something, only
  1539. * disable if all lines are under hardreset.
  1540. */
  1541. if (_are_any_hardreset_lines_asserted(oh))
  1542. return 0;
  1543. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1544. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1545. oh->clkdm->cm_inst,
  1546. oh->clkdm->clkdm_offs,
  1547. oh->prcm.omap4.clkctrl_offs);
  1548. v = _omap4_wait_target_disable(oh);
  1549. if (v)
  1550. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1551. oh->name);
  1552. return 0;
  1553. }
  1554. /**
  1555. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1556. * @oh: struct omap_hwmod *
  1557. *
  1558. * Disable the PRCM module mode related to the hwmod @oh.
  1559. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1560. */
  1561. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1562. {
  1563. int v;
  1564. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1565. return -EINVAL;
  1566. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1567. if (_are_any_hardreset_lines_asserted(oh))
  1568. return 0;
  1569. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1570. oh->prcm.omap4.clkctrl_offs);
  1571. v = _am33xx_wait_target_disable(oh);
  1572. if (v)
  1573. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1574. oh->name);
  1575. return 0;
  1576. }
  1577. /**
  1578. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1579. * @oh: struct omap_hwmod *
  1580. *
  1581. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1582. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1583. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1584. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1585. *
  1586. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1587. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1588. * use the SYSCONFIG softreset bit to provide the status.
  1589. *
  1590. * Note that some IP like McBSP do have reset control but don't have
  1591. * reset status.
  1592. */
  1593. static int _ocp_softreset(struct omap_hwmod *oh)
  1594. {
  1595. u32 v;
  1596. int c = 0;
  1597. int ret = 0;
  1598. if (!oh->class->sysc ||
  1599. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1600. return -ENOENT;
  1601. /* clocks must be on for this operation */
  1602. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1603. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1604. oh->name);
  1605. return -EINVAL;
  1606. }
  1607. /* For some modules, all optionnal clocks need to be enabled as well */
  1608. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1609. _enable_optional_clocks(oh);
  1610. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1611. v = oh->_sysc_cache;
  1612. ret = _set_softreset(oh, &v);
  1613. if (ret)
  1614. goto dis_opt_clks;
  1615. _write_sysconfig(v, oh);
  1616. if (oh->class->sysc->srst_udelay)
  1617. udelay(oh->class->sysc->srst_udelay);
  1618. c = _wait_softreset_complete(oh);
  1619. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1620. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1621. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1622. else
  1623. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1624. /*
  1625. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1626. * _wait_target_ready() or _reset()
  1627. */
  1628. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1629. dis_opt_clks:
  1630. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1631. _disable_optional_clocks(oh);
  1632. return ret;
  1633. }
  1634. /**
  1635. * _reset - reset an omap_hwmod
  1636. * @oh: struct omap_hwmod *
  1637. *
  1638. * Resets an omap_hwmod @oh. If the module has a custom reset
  1639. * function pointer defined, then call it to reset the IP block, and
  1640. * pass along its return value to the caller. Otherwise, if the IP
  1641. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1642. * associated with it, call a function to reset the IP block via that
  1643. * method, and pass along the return value to the caller. Finally, if
  1644. * the IP block has some hardreset lines associated with it, assert
  1645. * all of those, but do _not_ deassert them. (This is because driver
  1646. * authors have expressed an apparent requirement to control the
  1647. * deassertion of the hardreset lines themselves.)
  1648. *
  1649. * The default software reset mechanism for most OMAP IP blocks is
  1650. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1651. * hwmods cannot be reset via this method. Some are not targets and
  1652. * therefore have no OCP header registers to access. Others (like the
  1653. * IVA) have idiosyncratic reset sequences. So for these relatively
  1654. * rare cases, custom reset code can be supplied in the struct
  1655. * omap_hwmod_class .reset function pointer.
  1656. *
  1657. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1658. * does not prevent idling of the system. This is necessary for cases
  1659. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1660. * kernel without disabling dma.
  1661. *
  1662. * Passes along the return value from either _ocp_softreset() or the
  1663. * custom reset function - these must return -EINVAL if the hwmod
  1664. * cannot be reset this way or if the hwmod is in the wrong state,
  1665. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1666. */
  1667. static int _reset(struct omap_hwmod *oh)
  1668. {
  1669. int i, r;
  1670. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1671. if (oh->class->reset) {
  1672. r = oh->class->reset(oh);
  1673. } else {
  1674. if (oh->rst_lines_cnt > 0) {
  1675. for (i = 0; i < oh->rst_lines_cnt; i++)
  1676. _assert_hardreset(oh, oh->rst_lines[i].name);
  1677. return 0;
  1678. } else {
  1679. r = _ocp_softreset(oh);
  1680. if (r == -ENOENT)
  1681. r = 0;
  1682. }
  1683. }
  1684. _set_dmadisable(oh);
  1685. /*
  1686. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1687. * softreset. The _enable() function should be split to avoid
  1688. * the rewrite of the OCP_SYSCONFIG register.
  1689. */
  1690. if (oh->class->sysc) {
  1691. _update_sysc_cache(oh);
  1692. _enable_sysc(oh);
  1693. }
  1694. return r;
  1695. }
  1696. /**
  1697. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1698. *
  1699. * Call the appropriate PRM function to clear any logged I/O chain
  1700. * wakeups and to reconfigure the chain. This apparently needs to be
  1701. * done upon every mux change. Since hwmods can be concurrently
  1702. * enabled and idled, hold a spinlock around the I/O chain
  1703. * reconfiguration sequence. No return value.
  1704. *
  1705. * XXX When the PRM code is moved to drivers, this function can be removed,
  1706. * as the PRM infrastructure should abstract this.
  1707. */
  1708. static void _reconfigure_io_chain(void)
  1709. {
  1710. unsigned long flags;
  1711. spin_lock_irqsave(&io_chain_lock, flags);
  1712. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1713. omap3xxx_prm_reconfigure_io_chain();
  1714. else if (cpu_is_omap44xx())
  1715. omap44xx_prm_reconfigure_io_chain();
  1716. spin_unlock_irqrestore(&io_chain_lock, flags);
  1717. }
  1718. /**
  1719. * _omap4_update_context_lost - increment hwmod context loss counter if
  1720. * hwmod context was lost, and clear hardware context loss reg
  1721. * @oh: hwmod to check for context loss
  1722. *
  1723. * If the PRCM indicates that the hwmod @oh lost context, increment
  1724. * our in-memory context loss counter, and clear the RM_*_CONTEXT
  1725. * bits. No return value.
  1726. */
  1727. static void _omap4_update_context_lost(struct omap_hwmod *oh)
  1728. {
  1729. if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
  1730. return;
  1731. if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1732. oh->clkdm->pwrdm.ptr->prcm_offs,
  1733. oh->prcm.omap4.context_offs))
  1734. return;
  1735. oh->prcm.omap4.context_lost_counter++;
  1736. prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1737. oh->clkdm->pwrdm.ptr->prcm_offs,
  1738. oh->prcm.omap4.context_offs);
  1739. }
  1740. /**
  1741. * _omap4_get_context_lost - get context loss counter for a hwmod
  1742. * @oh: hwmod to get context loss counter for
  1743. *
  1744. * Returns the in-memory context loss counter for a hwmod.
  1745. */
  1746. static int _omap4_get_context_lost(struct omap_hwmod *oh)
  1747. {
  1748. return oh->prcm.omap4.context_lost_counter;
  1749. }
  1750. /**
  1751. * _enable_preprogram - Pre-program an IP block during the _enable() process
  1752. * @oh: struct omap_hwmod *
  1753. *
  1754. * Some IP blocks (such as AESS) require some additional programming
  1755. * after enable before they can enter idle. If a function pointer to
  1756. * do so is present in the hwmod data, then call it and pass along the
  1757. * return value; otherwise, return 0.
  1758. */
  1759. static int __init _enable_preprogram(struct omap_hwmod *oh)
  1760. {
  1761. if (!oh->class->enable_preprogram)
  1762. return 0;
  1763. return oh->class->enable_preprogram(oh);
  1764. }
  1765. /**
  1766. * _enable - enable an omap_hwmod
  1767. * @oh: struct omap_hwmod *
  1768. *
  1769. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1770. * register target. Returns -EINVAL if the hwmod is in the wrong
  1771. * state or passes along the return value of _wait_target_ready().
  1772. */
  1773. static int _enable(struct omap_hwmod *oh)
  1774. {
  1775. int r;
  1776. int hwsup = 0;
  1777. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1778. /*
  1779. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1780. * state at init. Now that someone is really trying to enable
  1781. * them, just ensure that the hwmod mux is set.
  1782. */
  1783. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1784. /*
  1785. * If the caller has mux data populated, do the mux'ing
  1786. * which wouldn't have been done as part of the _enable()
  1787. * done during setup.
  1788. */
  1789. if (oh->mux)
  1790. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1791. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1792. return 0;
  1793. }
  1794. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1795. oh->_state != _HWMOD_STATE_IDLE &&
  1796. oh->_state != _HWMOD_STATE_DISABLED) {
  1797. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1798. oh->name);
  1799. return -EINVAL;
  1800. }
  1801. /*
  1802. * If an IP block contains HW reset lines and all of them are
  1803. * asserted, we let integration code associated with that
  1804. * block handle the enable. We've received very little
  1805. * information on what those driver authors need, and until
  1806. * detailed information is provided and the driver code is
  1807. * posted to the public lists, this is probably the best we
  1808. * can do.
  1809. */
  1810. if (_are_all_hardreset_lines_asserted(oh))
  1811. return 0;
  1812. /* Mux pins for device runtime if populated */
  1813. if (oh->mux && (!oh->mux->enabled ||
  1814. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1815. oh->mux->pads_dynamic))) {
  1816. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1817. _reconfigure_io_chain();
  1818. }
  1819. _add_initiator_dep(oh, mpu_oh);
  1820. if (oh->clkdm) {
  1821. /*
  1822. * A clockdomain must be in SW_SUP before enabling
  1823. * completely the module. The clockdomain can be set
  1824. * in HW_AUTO only when the module become ready.
  1825. */
  1826. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1827. !clkdm_missing_idle_reporting(oh->clkdm);
  1828. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1829. if (r) {
  1830. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1831. oh->name, oh->clkdm->name, r);
  1832. return r;
  1833. }
  1834. }
  1835. _enable_clocks(oh);
  1836. if (soc_ops.enable_module)
  1837. soc_ops.enable_module(oh);
  1838. if (oh->flags & HWMOD_BLOCK_WFI)
  1839. disable_hlt();
  1840. if (soc_ops.update_context_lost)
  1841. soc_ops.update_context_lost(oh);
  1842. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1843. -EINVAL;
  1844. if (!r) {
  1845. /*
  1846. * Set the clockdomain to HW_AUTO only if the target is ready,
  1847. * assuming that the previous state was HW_AUTO
  1848. */
  1849. if (oh->clkdm && hwsup)
  1850. clkdm_allow_idle(oh->clkdm);
  1851. oh->_state = _HWMOD_STATE_ENABLED;
  1852. /* Access the sysconfig only if the target is ready */
  1853. if (oh->class->sysc) {
  1854. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1855. _update_sysc_cache(oh);
  1856. _enable_sysc(oh);
  1857. }
  1858. r = _enable_preprogram(oh);
  1859. } else {
  1860. if (soc_ops.disable_module)
  1861. soc_ops.disable_module(oh);
  1862. _disable_clocks(oh);
  1863. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1864. oh->name, r);
  1865. if (oh->clkdm)
  1866. clkdm_hwmod_disable(oh->clkdm, oh);
  1867. }
  1868. return r;
  1869. }
  1870. /**
  1871. * _idle - idle an omap_hwmod
  1872. * @oh: struct omap_hwmod *
  1873. *
  1874. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1875. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1876. * state or returns 0.
  1877. */
  1878. static int _idle(struct omap_hwmod *oh)
  1879. {
  1880. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1881. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1882. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1883. oh->name);
  1884. return -EINVAL;
  1885. }
  1886. if (_are_all_hardreset_lines_asserted(oh))
  1887. return 0;
  1888. if (oh->class->sysc)
  1889. _idle_sysc(oh);
  1890. _del_initiator_dep(oh, mpu_oh);
  1891. if (oh->flags & HWMOD_BLOCK_WFI)
  1892. enable_hlt();
  1893. if (soc_ops.disable_module)
  1894. soc_ops.disable_module(oh);
  1895. /*
  1896. * The module must be in idle mode before disabling any parents
  1897. * clocks. Otherwise, the parent clock might be disabled before
  1898. * the module transition is done, and thus will prevent the
  1899. * transition to complete properly.
  1900. */
  1901. _disable_clocks(oh);
  1902. if (oh->clkdm)
  1903. clkdm_hwmod_disable(oh->clkdm, oh);
  1904. /* Mux pins for device idle if populated */
  1905. if (oh->mux && oh->mux->pads_dynamic) {
  1906. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1907. _reconfigure_io_chain();
  1908. }
  1909. oh->_state = _HWMOD_STATE_IDLE;
  1910. return 0;
  1911. }
  1912. /**
  1913. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1914. * @oh: struct omap_hwmod *
  1915. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1916. *
  1917. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1918. * local copy. Intended to be used by drivers that require
  1919. * direct manipulation of the AUTOIDLE bits.
  1920. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1921. * along the return value from _set_module_autoidle().
  1922. *
  1923. * Any users of this function should be scrutinized carefully.
  1924. */
  1925. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1926. {
  1927. u32 v;
  1928. int retval = 0;
  1929. unsigned long flags;
  1930. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1931. return -EINVAL;
  1932. spin_lock_irqsave(&oh->_lock, flags);
  1933. v = oh->_sysc_cache;
  1934. retval = _set_module_autoidle(oh, autoidle, &v);
  1935. if (!retval)
  1936. _write_sysconfig(v, oh);
  1937. spin_unlock_irqrestore(&oh->_lock, flags);
  1938. return retval;
  1939. }
  1940. /**
  1941. * _shutdown - shutdown an omap_hwmod
  1942. * @oh: struct omap_hwmod *
  1943. *
  1944. * Shut down an omap_hwmod @oh. This should be called when the driver
  1945. * used for the hwmod is removed or unloaded or if the driver is not
  1946. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1947. * state or returns 0.
  1948. */
  1949. static int _shutdown(struct omap_hwmod *oh)
  1950. {
  1951. int ret, i;
  1952. u8 prev_state;
  1953. if (oh->_state != _HWMOD_STATE_IDLE &&
  1954. oh->_state != _HWMOD_STATE_ENABLED) {
  1955. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1956. oh->name);
  1957. return -EINVAL;
  1958. }
  1959. if (_are_all_hardreset_lines_asserted(oh))
  1960. return 0;
  1961. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1962. if (oh->class->pre_shutdown) {
  1963. prev_state = oh->_state;
  1964. if (oh->_state == _HWMOD_STATE_IDLE)
  1965. _enable(oh);
  1966. ret = oh->class->pre_shutdown(oh);
  1967. if (ret) {
  1968. if (prev_state == _HWMOD_STATE_IDLE)
  1969. _idle(oh);
  1970. return ret;
  1971. }
  1972. }
  1973. if (oh->class->sysc) {
  1974. if (oh->_state == _HWMOD_STATE_IDLE)
  1975. _enable(oh);
  1976. _shutdown_sysc(oh);
  1977. }
  1978. /* clocks and deps are already disabled in idle */
  1979. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1980. _del_initiator_dep(oh, mpu_oh);
  1981. /* XXX what about the other system initiators here? dma, dsp */
  1982. if (oh->flags & HWMOD_BLOCK_WFI)
  1983. enable_hlt();
  1984. if (soc_ops.disable_module)
  1985. soc_ops.disable_module(oh);
  1986. _disable_clocks(oh);
  1987. if (oh->clkdm)
  1988. clkdm_hwmod_disable(oh->clkdm, oh);
  1989. }
  1990. /* XXX Should this code also force-disable the optional clocks? */
  1991. for (i = 0; i < oh->rst_lines_cnt; i++)
  1992. _assert_hardreset(oh, oh->rst_lines[i].name);
  1993. /* Mux pins to safe mode or use populated off mode values */
  1994. if (oh->mux)
  1995. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1996. oh->_state = _HWMOD_STATE_DISABLED;
  1997. return 0;
  1998. }
  1999. /**
  2000. * _init_mpu_rt_base - populate the virtual address for a hwmod
  2001. * @oh: struct omap_hwmod * to locate the virtual address
  2002. *
  2003. * Cache the virtual address used by the MPU to access this IP block's
  2004. * registers. This address is needed early so the OCP registers that
  2005. * are part of the device's address space can be ioremapped properly.
  2006. * No return value.
  2007. */
  2008. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  2009. {
  2010. struct omap_hwmod_addr_space *mem;
  2011. void __iomem *va_start;
  2012. if (!oh)
  2013. return;
  2014. _save_mpu_port_index(oh);
  2015. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2016. return;
  2017. mem = _find_mpu_rt_addr_space(oh);
  2018. if (!mem) {
  2019. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  2020. oh->name);
  2021. return;
  2022. }
  2023. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  2024. if (!va_start) {
  2025. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  2026. return;
  2027. }
  2028. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  2029. oh->name, va_start);
  2030. oh->_mpu_rt_va = va_start;
  2031. }
  2032. /**
  2033. * _init - initialize internal data for the hwmod @oh
  2034. * @oh: struct omap_hwmod *
  2035. * @n: (unused)
  2036. *
  2037. * Look up the clocks and the address space used by the MPU to access
  2038. * registers belonging to the hwmod @oh. @oh must already be
  2039. * registered at this point. This is the first of two phases for
  2040. * hwmod initialization. Code called here does not touch any hardware
  2041. * registers, it simply prepares internal data structures. Returns 0
  2042. * upon success or if the hwmod isn't registered, or -EINVAL upon
  2043. * failure.
  2044. */
  2045. static int __init _init(struct omap_hwmod *oh, void *data)
  2046. {
  2047. int r;
  2048. if (oh->_state != _HWMOD_STATE_REGISTERED)
  2049. return 0;
  2050. _init_mpu_rt_base(oh, NULL);
  2051. r = _init_clocks(oh, NULL);
  2052. if (IS_ERR_VALUE(r)) {
  2053. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  2054. return -EINVAL;
  2055. }
  2056. oh->_state = _HWMOD_STATE_INITIALIZED;
  2057. return 0;
  2058. }
  2059. /**
  2060. * _setup_iclk_autoidle - configure an IP block's interface clocks
  2061. * @oh: struct omap_hwmod *
  2062. *
  2063. * Set up the module's interface clocks. XXX This function is still mostly
  2064. * a stub; implementing this properly requires iclk autoidle usecounting in
  2065. * the clock code. No return value.
  2066. */
  2067. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2068. {
  2069. struct omap_hwmod_ocp_if *os;
  2070. struct list_head *p;
  2071. int i = 0;
  2072. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2073. return;
  2074. p = oh->slave_ports.next;
  2075. while (i < oh->slaves_cnt) {
  2076. os = _fetch_next_ocp_if(&p, &i);
  2077. if (!os->_clk)
  2078. continue;
  2079. if (os->flags & OCPIF_SWSUP_IDLE) {
  2080. /* XXX omap_iclk_deny_idle(c); */
  2081. } else {
  2082. /* XXX omap_iclk_allow_idle(c); */
  2083. clk_enable(os->_clk);
  2084. }
  2085. }
  2086. return;
  2087. }
  2088. /**
  2089. * _setup_reset - reset an IP block during the setup process
  2090. * @oh: struct omap_hwmod *
  2091. *
  2092. * Reset the IP block corresponding to the hwmod @oh during the setup
  2093. * process. The IP block is first enabled so it can be successfully
  2094. * reset. Returns 0 upon success or a negative error code upon
  2095. * failure.
  2096. */
  2097. static int __init _setup_reset(struct omap_hwmod *oh)
  2098. {
  2099. int r;
  2100. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2101. return -EINVAL;
  2102. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2103. return -EPERM;
  2104. if (oh->rst_lines_cnt == 0) {
  2105. r = _enable(oh);
  2106. if (r) {
  2107. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2108. oh->name, oh->_state);
  2109. return -EINVAL;
  2110. }
  2111. }
  2112. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2113. r = _reset(oh);
  2114. return r;
  2115. }
  2116. /**
  2117. * _setup_postsetup - transition to the appropriate state after _setup
  2118. * @oh: struct omap_hwmod *
  2119. *
  2120. * Place an IP block represented by @oh into a "post-setup" state --
  2121. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2122. * this function is called at the end of _setup().) The postsetup
  2123. * state for an IP block can be changed by calling
  2124. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2125. * before one of the omap_hwmod_setup*() functions are called for the
  2126. * IP block.
  2127. *
  2128. * The IP block stays in this state until a PM runtime-based driver is
  2129. * loaded for that IP block. A post-setup state of IDLE is
  2130. * appropriate for almost all IP blocks with runtime PM-enabled
  2131. * drivers, since those drivers are able to enable the IP block. A
  2132. * post-setup state of ENABLED is appropriate for kernels with PM
  2133. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2134. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2135. * included, since the WDTIMER starts running on reset and will reset
  2136. * the MPU if left active.
  2137. *
  2138. * This post-setup mechanism is deprecated. Once all of the OMAP
  2139. * drivers have been converted to use PM runtime, and all of the IP
  2140. * block data and interconnect data is available to the hwmod code, it
  2141. * should be possible to replace this mechanism with a "lazy reset"
  2142. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2143. * when the driver first probes, then all remaining IP blocks without
  2144. * drivers are either shut down or enabled after the drivers have
  2145. * loaded. However, this cannot take place until the above
  2146. * preconditions have been met, since otherwise the late reset code
  2147. * has no way of knowing which IP blocks are in use by drivers, and
  2148. * which ones are unused.
  2149. *
  2150. * No return value.
  2151. */
  2152. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2153. {
  2154. u8 postsetup_state;
  2155. if (oh->rst_lines_cnt > 0)
  2156. return;
  2157. postsetup_state = oh->_postsetup_state;
  2158. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2159. postsetup_state = _HWMOD_STATE_ENABLED;
  2160. /*
  2161. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2162. * it should be set by the core code as a runtime flag during startup
  2163. */
  2164. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2165. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2166. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2167. postsetup_state = _HWMOD_STATE_ENABLED;
  2168. }
  2169. if (postsetup_state == _HWMOD_STATE_IDLE)
  2170. _idle(oh);
  2171. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2172. _shutdown(oh);
  2173. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2174. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2175. oh->name, postsetup_state);
  2176. return;
  2177. }
  2178. /**
  2179. * _setup - prepare IP block hardware for use
  2180. * @oh: struct omap_hwmod *
  2181. * @n: (unused, pass NULL)
  2182. *
  2183. * Configure the IP block represented by @oh. This may include
  2184. * enabling the IP block, resetting it, and placing it into a
  2185. * post-setup state, depending on the type of IP block and applicable
  2186. * flags. IP blocks are reset to prevent any previous configuration
  2187. * by the bootloader or previous operating system from interfering
  2188. * with power management or other parts of the system. The reset can
  2189. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2190. * two phases for hwmod initialization. Code called here generally
  2191. * affects the IP block hardware, or system integration hardware
  2192. * associated with the IP block. Returns 0.
  2193. */
  2194. static int __init _setup(struct omap_hwmod *oh, void *data)
  2195. {
  2196. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2197. return 0;
  2198. _setup_iclk_autoidle(oh);
  2199. if (!_setup_reset(oh))
  2200. _setup_postsetup(oh);
  2201. return 0;
  2202. }
  2203. /**
  2204. * _register - register a struct omap_hwmod
  2205. * @oh: struct omap_hwmod *
  2206. *
  2207. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2208. * already has been registered by the same name; -EINVAL if the
  2209. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2210. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2211. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2212. * success.
  2213. *
  2214. * XXX The data should be copied into bootmem, so the original data
  2215. * should be marked __initdata and freed after init. This would allow
  2216. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2217. * that the copy process would be relatively complex due to the large number
  2218. * of substructures.
  2219. */
  2220. static int __init _register(struct omap_hwmod *oh)
  2221. {
  2222. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2223. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2224. return -EINVAL;
  2225. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2226. if (_lookup(oh->name))
  2227. return -EEXIST;
  2228. list_add_tail(&oh->node, &omap_hwmod_list);
  2229. INIT_LIST_HEAD(&oh->master_ports);
  2230. INIT_LIST_HEAD(&oh->slave_ports);
  2231. spin_lock_init(&oh->_lock);
  2232. oh->_state = _HWMOD_STATE_REGISTERED;
  2233. /*
  2234. * XXX Rather than doing a strcmp(), this should test a flag
  2235. * set in the hwmod data, inserted by the autogenerator code.
  2236. */
  2237. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2238. mpu_oh = oh;
  2239. return 0;
  2240. }
  2241. /**
  2242. * _alloc_links - return allocated memory for hwmod links
  2243. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2244. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2245. *
  2246. * Return pointers to two struct omap_hwmod_link records, via the
  2247. * addresses pointed to by @ml and @sl. Will first attempt to return
  2248. * memory allocated as part of a large initial block, but if that has
  2249. * been exhausted, will allocate memory itself. Since ideally this
  2250. * second allocation path will never occur, the number of these
  2251. * 'supplemental' allocations will be logged when debugging is
  2252. * enabled. Returns 0.
  2253. */
  2254. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2255. struct omap_hwmod_link **sl)
  2256. {
  2257. unsigned int sz;
  2258. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2259. *ml = &linkspace[free_ls++];
  2260. *sl = &linkspace[free_ls++];
  2261. return 0;
  2262. }
  2263. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2264. *sl = NULL;
  2265. *ml = alloc_bootmem(sz);
  2266. memset(*ml, 0, sz);
  2267. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2268. ls_supp++;
  2269. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2270. ls_supp * LINKS_PER_OCP_IF);
  2271. return 0;
  2272. };
  2273. /**
  2274. * _add_link - add an interconnect between two IP blocks
  2275. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2276. *
  2277. * Add struct omap_hwmod_link records connecting the master IP block
  2278. * specified in @oi->master to @oi, and connecting the slave IP block
  2279. * specified in @oi->slave to @oi. This code is assumed to run before
  2280. * preemption or SMP has been enabled, thus avoiding the need for
  2281. * locking in this code. Changes to this assumption will require
  2282. * additional locking. Returns 0.
  2283. */
  2284. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2285. {
  2286. struct omap_hwmod_link *ml, *sl;
  2287. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2288. oi->slave->name);
  2289. _alloc_links(&ml, &sl);
  2290. ml->ocp_if = oi;
  2291. INIT_LIST_HEAD(&ml->node);
  2292. list_add(&ml->node, &oi->master->master_ports);
  2293. oi->master->masters_cnt++;
  2294. sl->ocp_if = oi;
  2295. INIT_LIST_HEAD(&sl->node);
  2296. list_add(&sl->node, &oi->slave->slave_ports);
  2297. oi->slave->slaves_cnt++;
  2298. return 0;
  2299. }
  2300. /**
  2301. * _register_link - register a struct omap_hwmod_ocp_if
  2302. * @oi: struct omap_hwmod_ocp_if *
  2303. *
  2304. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2305. * has already been registered; -EINVAL if @oi is NULL or if the
  2306. * record pointed to by @oi is missing required fields; or 0 upon
  2307. * success.
  2308. *
  2309. * XXX The data should be copied into bootmem, so the original data
  2310. * should be marked __initdata and freed after init. This would allow
  2311. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2312. */
  2313. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2314. {
  2315. if (!oi || !oi->master || !oi->slave || !oi->user)
  2316. return -EINVAL;
  2317. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2318. return -EEXIST;
  2319. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2320. oi->master->name, oi->slave->name);
  2321. /*
  2322. * Register the connected hwmods, if they haven't been
  2323. * registered already
  2324. */
  2325. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2326. _register(oi->master);
  2327. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2328. _register(oi->slave);
  2329. _add_link(oi);
  2330. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2331. return 0;
  2332. }
  2333. /**
  2334. * _alloc_linkspace - allocate large block of hwmod links
  2335. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2336. *
  2337. * Allocate a large block of struct omap_hwmod_link records. This
  2338. * improves boot time significantly by avoiding the need to allocate
  2339. * individual records one by one. If the number of records to
  2340. * allocate in the block hasn't been manually specified, this function
  2341. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2342. * and use that to determine the allocation size. For SoC families
  2343. * that require multiple list registrations, such as OMAP3xxx, this
  2344. * estimation process isn't optimal, so manual estimation is advised
  2345. * in those cases. Returns -EEXIST if the allocation has already occurred
  2346. * or 0 upon success.
  2347. */
  2348. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2349. {
  2350. unsigned int i = 0;
  2351. unsigned int sz;
  2352. if (linkspace) {
  2353. WARN(1, "linkspace already allocated\n");
  2354. return -EEXIST;
  2355. }
  2356. if (max_ls == 0)
  2357. while (ois[i++])
  2358. max_ls += LINKS_PER_OCP_IF;
  2359. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2360. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2361. __func__, sz, max_ls);
  2362. linkspace = alloc_bootmem(sz);
  2363. memset(linkspace, 0, sz);
  2364. return 0;
  2365. }
  2366. /* Static functions intended only for use in soc_ops field function pointers */
  2367. /**
  2368. * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
  2369. * @oh: struct omap_hwmod *
  2370. *
  2371. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2372. * does not have an IDLEST bit or if the module successfully leaves
  2373. * slave idle; otherwise, pass along the return value of the
  2374. * appropriate *_cm*_wait_module_ready() function.
  2375. */
  2376. static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
  2377. {
  2378. if (!oh)
  2379. return -EINVAL;
  2380. if (oh->flags & HWMOD_NO_IDLEST)
  2381. return 0;
  2382. if (!_find_mpu_rt_port(oh))
  2383. return 0;
  2384. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2385. return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2386. oh->prcm.omap2.idlest_reg_id,
  2387. oh->prcm.omap2.idlest_idle_bit);
  2388. }
  2389. /**
  2390. * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  2391. * @oh: struct omap_hwmod *
  2392. *
  2393. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2394. * does not have an IDLEST bit or if the module successfully leaves
  2395. * slave idle; otherwise, pass along the return value of the
  2396. * appropriate *_cm*_wait_module_ready() function.
  2397. */
  2398. static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
  2399. {
  2400. if (!oh)
  2401. return -EINVAL;
  2402. if (oh->flags & HWMOD_NO_IDLEST)
  2403. return 0;
  2404. if (!_find_mpu_rt_port(oh))
  2405. return 0;
  2406. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2407. return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2408. oh->prcm.omap2.idlest_reg_id,
  2409. oh->prcm.omap2.idlest_idle_bit);
  2410. }
  2411. /**
  2412. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2413. * @oh: struct omap_hwmod *
  2414. *
  2415. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2416. * does not have an IDLEST bit or if the module successfully leaves
  2417. * slave idle; otherwise, pass along the return value of the
  2418. * appropriate *_cm*_wait_module_ready() function.
  2419. */
  2420. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2421. {
  2422. if (!oh)
  2423. return -EINVAL;
  2424. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2425. return 0;
  2426. if (!_find_mpu_rt_port(oh))
  2427. return 0;
  2428. /* XXX check module SIDLEMODE, hardreset status */
  2429. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2430. oh->clkdm->cm_inst,
  2431. oh->clkdm->clkdm_offs,
  2432. oh->prcm.omap4.clkctrl_offs);
  2433. }
  2434. /**
  2435. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2436. * @oh: struct omap_hwmod *
  2437. *
  2438. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2439. * does not have an IDLEST bit or if the module successfully leaves
  2440. * slave idle; otherwise, pass along the return value of the
  2441. * appropriate *_cm*_wait_module_ready() function.
  2442. */
  2443. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2444. {
  2445. if (!oh || !oh->clkdm)
  2446. return -EINVAL;
  2447. if (oh->flags & HWMOD_NO_IDLEST)
  2448. return 0;
  2449. if (!_find_mpu_rt_port(oh))
  2450. return 0;
  2451. /* XXX check module SIDLEMODE, hardreset status */
  2452. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2453. oh->clkdm->clkdm_offs,
  2454. oh->prcm.omap4.clkctrl_offs);
  2455. }
  2456. /**
  2457. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2458. * @oh: struct omap_hwmod * to assert hardreset
  2459. * @ohri: hardreset line data
  2460. *
  2461. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2462. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2463. * use as an soc_ops function pointer. Passes along the return value
  2464. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2465. * for removal when the PRM code is moved into drivers/.
  2466. */
  2467. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2468. struct omap_hwmod_rst_info *ohri)
  2469. {
  2470. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2471. ohri->rst_shift);
  2472. }
  2473. /**
  2474. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2475. * @oh: struct omap_hwmod * to deassert hardreset
  2476. * @ohri: hardreset line data
  2477. *
  2478. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2479. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2480. * use as an soc_ops function pointer. Passes along the return value
  2481. * from omap2_prm_deassert_hardreset(). XXX This function is
  2482. * scheduled for removal when the PRM code is moved into drivers/.
  2483. */
  2484. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2485. struct omap_hwmod_rst_info *ohri)
  2486. {
  2487. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2488. ohri->rst_shift,
  2489. ohri->st_shift);
  2490. }
  2491. /**
  2492. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2493. * @oh: struct omap_hwmod * to test hardreset
  2494. * @ohri: hardreset line data
  2495. *
  2496. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2497. * from the hwmod @oh and the hardreset line data @ohri. Only
  2498. * intended for use as an soc_ops function pointer. Passes along the
  2499. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2500. * function is scheduled for removal when the PRM code is moved into
  2501. * drivers/.
  2502. */
  2503. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2504. struct omap_hwmod_rst_info *ohri)
  2505. {
  2506. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2507. ohri->st_shift);
  2508. }
  2509. /**
  2510. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2511. * @oh: struct omap_hwmod * to assert hardreset
  2512. * @ohri: hardreset line data
  2513. *
  2514. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2515. * from the hwmod @oh and the hardreset line data @ohri. Only
  2516. * intended for use as an soc_ops function pointer. Passes along the
  2517. * return value from omap4_prminst_assert_hardreset(). XXX This
  2518. * function is scheduled for removal when the PRM code is moved into
  2519. * drivers/.
  2520. */
  2521. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2522. struct omap_hwmod_rst_info *ohri)
  2523. {
  2524. if (!oh->clkdm)
  2525. return -EINVAL;
  2526. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2527. oh->clkdm->pwrdm.ptr->prcm_partition,
  2528. oh->clkdm->pwrdm.ptr->prcm_offs,
  2529. oh->prcm.omap4.rstctrl_offs);
  2530. }
  2531. /**
  2532. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2533. * @oh: struct omap_hwmod * to deassert hardreset
  2534. * @ohri: hardreset line data
  2535. *
  2536. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2537. * from the hwmod @oh and the hardreset line data @ohri. Only
  2538. * intended for use as an soc_ops function pointer. Passes along the
  2539. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2540. * function is scheduled for removal when the PRM code is moved into
  2541. * drivers/.
  2542. */
  2543. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2544. struct omap_hwmod_rst_info *ohri)
  2545. {
  2546. if (!oh->clkdm)
  2547. return -EINVAL;
  2548. if (ohri->st_shift)
  2549. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2550. oh->name, ohri->name);
  2551. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2552. oh->clkdm->pwrdm.ptr->prcm_partition,
  2553. oh->clkdm->pwrdm.ptr->prcm_offs,
  2554. oh->prcm.omap4.rstctrl_offs);
  2555. }
  2556. /**
  2557. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2558. * @oh: struct omap_hwmod * to test hardreset
  2559. * @ohri: hardreset line data
  2560. *
  2561. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2562. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2563. * Only intended for use as an soc_ops function pointer. Passes along
  2564. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2565. * This function is scheduled for removal when the PRM code is moved
  2566. * into drivers/.
  2567. */
  2568. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2569. struct omap_hwmod_rst_info *ohri)
  2570. {
  2571. if (!oh->clkdm)
  2572. return -EINVAL;
  2573. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2574. oh->clkdm->pwrdm.ptr->prcm_partition,
  2575. oh->clkdm->pwrdm.ptr->prcm_offs,
  2576. oh->prcm.omap4.rstctrl_offs);
  2577. }
  2578. /**
  2579. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2580. * @oh: struct omap_hwmod * to assert hardreset
  2581. * @ohri: hardreset line data
  2582. *
  2583. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2584. * from the hwmod @oh and the hardreset line data @ohri. Only
  2585. * intended for use as an soc_ops function pointer. Passes along the
  2586. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2587. * function is scheduled for removal when the PRM code is moved into
  2588. * drivers/.
  2589. */
  2590. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2591. struct omap_hwmod_rst_info *ohri)
  2592. {
  2593. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2594. oh->clkdm->pwrdm.ptr->prcm_offs,
  2595. oh->prcm.omap4.rstctrl_offs);
  2596. }
  2597. /**
  2598. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2599. * @oh: struct omap_hwmod * to deassert hardreset
  2600. * @ohri: hardreset line data
  2601. *
  2602. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2603. * from the hwmod @oh and the hardreset line data @ohri. Only
  2604. * intended for use as an soc_ops function pointer. Passes along the
  2605. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2606. * function is scheduled for removal when the PRM code is moved into
  2607. * drivers/.
  2608. */
  2609. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2610. struct omap_hwmod_rst_info *ohri)
  2611. {
  2612. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2613. ohri->st_shift,
  2614. oh->clkdm->pwrdm.ptr->prcm_offs,
  2615. oh->prcm.omap4.rstctrl_offs,
  2616. oh->prcm.omap4.rstst_offs);
  2617. }
  2618. /**
  2619. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2620. * @oh: struct omap_hwmod * to test hardreset
  2621. * @ohri: hardreset line data
  2622. *
  2623. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2624. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2625. * Only intended for use as an soc_ops function pointer. Passes along
  2626. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2627. * This function is scheduled for removal when the PRM code is moved
  2628. * into drivers/.
  2629. */
  2630. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2631. struct omap_hwmod_rst_info *ohri)
  2632. {
  2633. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2634. oh->clkdm->pwrdm.ptr->prcm_offs,
  2635. oh->prcm.omap4.rstctrl_offs);
  2636. }
  2637. /* Public functions */
  2638. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2639. {
  2640. if (oh->flags & HWMOD_16BIT_REG)
  2641. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2642. else
  2643. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2644. }
  2645. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2646. {
  2647. if (oh->flags & HWMOD_16BIT_REG)
  2648. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2649. else
  2650. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2651. }
  2652. /**
  2653. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2654. * @oh: struct omap_hwmod *
  2655. *
  2656. * This is a public function exposed to drivers. Some drivers may need to do
  2657. * some settings before and after resetting the device. Those drivers after
  2658. * doing the necessary settings could use this function to start a reset by
  2659. * setting the SYSCONFIG.SOFTRESET bit.
  2660. */
  2661. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2662. {
  2663. u32 v;
  2664. int ret;
  2665. if (!oh || !(oh->_sysc_cache))
  2666. return -EINVAL;
  2667. v = oh->_sysc_cache;
  2668. ret = _set_softreset(oh, &v);
  2669. if (ret)
  2670. goto error;
  2671. _write_sysconfig(v, oh);
  2672. error:
  2673. return ret;
  2674. }
  2675. /**
  2676. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2677. * @oh: struct omap_hwmod *
  2678. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2679. *
  2680. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2681. * local copy. Intended to be used by drivers that have some erratum
  2682. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2683. * -EINVAL if @oh is null, or passes along the return value from
  2684. * _set_slave_idlemode().
  2685. *
  2686. * XXX Does this function have any current users? If not, we should
  2687. * remove it; it is better to let the rest of the hwmod code handle this.
  2688. * Any users of this function should be scrutinized carefully.
  2689. */
  2690. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2691. {
  2692. u32 v;
  2693. int retval = 0;
  2694. if (!oh)
  2695. return -EINVAL;
  2696. v = oh->_sysc_cache;
  2697. retval = _set_slave_idlemode(oh, idlemode, &v);
  2698. if (!retval)
  2699. _write_sysconfig(v, oh);
  2700. return retval;
  2701. }
  2702. /**
  2703. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2704. * @name: name of the omap_hwmod to look up
  2705. *
  2706. * Given a @name of an omap_hwmod, return a pointer to the registered
  2707. * struct omap_hwmod *, or NULL upon error.
  2708. */
  2709. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2710. {
  2711. struct omap_hwmod *oh;
  2712. if (!name)
  2713. return NULL;
  2714. oh = _lookup(name);
  2715. return oh;
  2716. }
  2717. /**
  2718. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2719. * @fn: pointer to a callback function
  2720. * @data: void * data to pass to callback function
  2721. *
  2722. * Call @fn for each registered omap_hwmod, passing @data to each
  2723. * function. @fn must return 0 for success or any other value for
  2724. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2725. * will stop and the non-zero return value will be passed to the
  2726. * caller of omap_hwmod_for_each(). @fn is called with
  2727. * omap_hwmod_for_each() held.
  2728. */
  2729. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2730. void *data)
  2731. {
  2732. struct omap_hwmod *temp_oh;
  2733. int ret = 0;
  2734. if (!fn)
  2735. return -EINVAL;
  2736. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2737. ret = (*fn)(temp_oh, data);
  2738. if (ret)
  2739. break;
  2740. }
  2741. return ret;
  2742. }
  2743. /**
  2744. * omap_hwmod_register_links - register an array of hwmod links
  2745. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2746. *
  2747. * Intended to be called early in boot before the clock framework is
  2748. * initialized. If @ois is not null, will register all omap_hwmods
  2749. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2750. * omap_hwmod_init() hasn't been called before calling this function,
  2751. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2752. * success.
  2753. */
  2754. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2755. {
  2756. int r, i;
  2757. if (!inited)
  2758. return -EINVAL;
  2759. if (!ois)
  2760. return 0;
  2761. if (!linkspace) {
  2762. if (_alloc_linkspace(ois)) {
  2763. pr_err("omap_hwmod: could not allocate link space\n");
  2764. return -ENOMEM;
  2765. }
  2766. }
  2767. i = 0;
  2768. do {
  2769. r = _register_link(ois[i]);
  2770. WARN(r && r != -EEXIST,
  2771. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2772. ois[i]->master->name, ois[i]->slave->name, r);
  2773. } while (ois[++i]);
  2774. return 0;
  2775. }
  2776. /**
  2777. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2778. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2779. *
  2780. * If the hwmod data corresponding to the MPU subsystem IP block
  2781. * hasn't been initialized and set up yet, do so now. This must be
  2782. * done first since sleep dependencies may be added from other hwmods
  2783. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2784. * return value.
  2785. */
  2786. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2787. {
  2788. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2789. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2790. __func__, MPU_INITIATOR_NAME);
  2791. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2792. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2793. }
  2794. /**
  2795. * omap_hwmod_setup_one - set up a single hwmod
  2796. * @oh_name: const char * name of the already-registered hwmod to set up
  2797. *
  2798. * Initialize and set up a single hwmod. Intended to be used for a
  2799. * small number of early devices, such as the timer IP blocks used for
  2800. * the scheduler clock. Must be called after omap2_clk_init().
  2801. * Resolves the struct clk names to struct clk pointers for each
  2802. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2803. * -EINVAL upon error or 0 upon success.
  2804. */
  2805. int __init omap_hwmod_setup_one(const char *oh_name)
  2806. {
  2807. struct omap_hwmod *oh;
  2808. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2809. oh = _lookup(oh_name);
  2810. if (!oh) {
  2811. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2812. return -EINVAL;
  2813. }
  2814. _ensure_mpu_hwmod_is_setup(oh);
  2815. _init(oh, NULL);
  2816. _setup(oh, NULL);
  2817. return 0;
  2818. }
  2819. /**
  2820. * omap_hwmod_setup_all - set up all registered IP blocks
  2821. *
  2822. * Initialize and set up all IP blocks registered with the hwmod code.
  2823. * Must be called after omap2_clk_init(). Resolves the struct clk
  2824. * names to struct clk pointers for each registered omap_hwmod. Also
  2825. * calls _setup() on each hwmod. Returns 0 upon success.
  2826. */
  2827. static int __init omap_hwmod_setup_all(void)
  2828. {
  2829. _ensure_mpu_hwmod_is_setup(NULL);
  2830. omap_hwmod_for_each(_init, NULL);
  2831. omap_hwmod_for_each(_setup, NULL);
  2832. return 0;
  2833. }
  2834. omap_core_initcall(omap_hwmod_setup_all);
  2835. /**
  2836. * omap_hwmod_enable - enable an omap_hwmod
  2837. * @oh: struct omap_hwmod *
  2838. *
  2839. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2840. * Returns -EINVAL on error or passes along the return value from _enable().
  2841. */
  2842. int omap_hwmod_enable(struct omap_hwmod *oh)
  2843. {
  2844. int r;
  2845. unsigned long flags;
  2846. if (!oh)
  2847. return -EINVAL;
  2848. spin_lock_irqsave(&oh->_lock, flags);
  2849. r = _enable(oh);
  2850. spin_unlock_irqrestore(&oh->_lock, flags);
  2851. return r;
  2852. }
  2853. /**
  2854. * omap_hwmod_idle - idle an omap_hwmod
  2855. * @oh: struct omap_hwmod *
  2856. *
  2857. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2858. * Returns -EINVAL on error or passes along the return value from _idle().
  2859. */
  2860. int omap_hwmod_idle(struct omap_hwmod *oh)
  2861. {
  2862. unsigned long flags;
  2863. if (!oh)
  2864. return -EINVAL;
  2865. spin_lock_irqsave(&oh->_lock, flags);
  2866. _idle(oh);
  2867. spin_unlock_irqrestore(&oh->_lock, flags);
  2868. return 0;
  2869. }
  2870. /**
  2871. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2872. * @oh: struct omap_hwmod *
  2873. *
  2874. * Shutdown an omap_hwmod @oh. Intended to be called by
  2875. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2876. * the return value from _shutdown().
  2877. */
  2878. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2879. {
  2880. unsigned long flags;
  2881. if (!oh)
  2882. return -EINVAL;
  2883. spin_lock_irqsave(&oh->_lock, flags);
  2884. _shutdown(oh);
  2885. spin_unlock_irqrestore(&oh->_lock, flags);
  2886. return 0;
  2887. }
  2888. /**
  2889. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2890. * @oh: struct omap_hwmod *oh
  2891. *
  2892. * Intended to be called by the omap_device code.
  2893. */
  2894. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2895. {
  2896. unsigned long flags;
  2897. spin_lock_irqsave(&oh->_lock, flags);
  2898. _enable_clocks(oh);
  2899. spin_unlock_irqrestore(&oh->_lock, flags);
  2900. return 0;
  2901. }
  2902. /**
  2903. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2904. * @oh: struct omap_hwmod *oh
  2905. *
  2906. * Intended to be called by the omap_device code.
  2907. */
  2908. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2909. {
  2910. unsigned long flags;
  2911. spin_lock_irqsave(&oh->_lock, flags);
  2912. _disable_clocks(oh);
  2913. spin_unlock_irqrestore(&oh->_lock, flags);
  2914. return 0;
  2915. }
  2916. /**
  2917. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2918. * @oh: struct omap_hwmod *oh
  2919. *
  2920. * Intended to be called by drivers and core code when all posted
  2921. * writes to a device must complete before continuing further
  2922. * execution (for example, after clearing some device IRQSTATUS
  2923. * register bits)
  2924. *
  2925. * XXX what about targets with multiple OCP threads?
  2926. */
  2927. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2928. {
  2929. BUG_ON(!oh);
  2930. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2931. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2932. oh->name);
  2933. return;
  2934. }
  2935. /*
  2936. * Forces posted writes to complete on the OCP thread handling
  2937. * register writes
  2938. */
  2939. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2940. }
  2941. /**
  2942. * omap_hwmod_reset - reset the hwmod
  2943. * @oh: struct omap_hwmod *
  2944. *
  2945. * Under some conditions, a driver may wish to reset the entire device.
  2946. * Called from omap_device code. Returns -EINVAL on error or passes along
  2947. * the return value from _reset().
  2948. */
  2949. int omap_hwmod_reset(struct omap_hwmod *oh)
  2950. {
  2951. int r;
  2952. unsigned long flags;
  2953. if (!oh)
  2954. return -EINVAL;
  2955. spin_lock_irqsave(&oh->_lock, flags);
  2956. r = _reset(oh);
  2957. spin_unlock_irqrestore(&oh->_lock, flags);
  2958. return r;
  2959. }
  2960. /*
  2961. * IP block data retrieval functions
  2962. */
  2963. /**
  2964. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2965. * @oh: struct omap_hwmod *
  2966. * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  2967. *
  2968. * Count the number of struct resource array elements necessary to
  2969. * contain omap_hwmod @oh resources. Intended to be called by code
  2970. * that registers omap_devices. Intended to be used to determine the
  2971. * size of a dynamically-allocated struct resource array, before
  2972. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2973. * resource array elements needed.
  2974. *
  2975. * XXX This code is not optimized. It could attempt to merge adjacent
  2976. * resource IDs.
  2977. *
  2978. */
  2979. int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
  2980. {
  2981. int ret = 0;
  2982. if (flags & IORESOURCE_IRQ)
  2983. ret += _count_mpu_irqs(oh);
  2984. if (flags & IORESOURCE_DMA)
  2985. ret += _count_sdma_reqs(oh);
  2986. if (flags & IORESOURCE_MEM) {
  2987. int i = 0;
  2988. struct omap_hwmod_ocp_if *os;
  2989. struct list_head *p = oh->slave_ports.next;
  2990. while (i < oh->slaves_cnt) {
  2991. os = _fetch_next_ocp_if(&p, &i);
  2992. ret += _count_ocp_if_addr_spaces(os);
  2993. }
  2994. }
  2995. return ret;
  2996. }
  2997. /**
  2998. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2999. * @oh: struct omap_hwmod *
  3000. * @res: pointer to the first element of an array of struct resource to fill
  3001. *
  3002. * Fill the struct resource array @res with resource data from the
  3003. * omap_hwmod @oh. Intended to be called by code that registers
  3004. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3005. * number of array elements filled.
  3006. */
  3007. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  3008. {
  3009. struct omap_hwmod_ocp_if *os;
  3010. struct list_head *p;
  3011. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  3012. int r = 0;
  3013. /* For each IRQ, DMA, memory area, fill in array.*/
  3014. mpu_irqs_cnt = _count_mpu_irqs(oh);
  3015. for (i = 0; i < mpu_irqs_cnt; i++) {
  3016. (res + r)->name = (oh->mpu_irqs + i)->name;
  3017. (res + r)->start = (oh->mpu_irqs + i)->irq;
  3018. (res + r)->end = (oh->mpu_irqs + i)->irq;
  3019. (res + r)->flags = IORESOURCE_IRQ;
  3020. r++;
  3021. }
  3022. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3023. for (i = 0; i < sdma_reqs_cnt; i++) {
  3024. (res + r)->name = (oh->sdma_reqs + i)->name;
  3025. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3026. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3027. (res + r)->flags = IORESOURCE_DMA;
  3028. r++;
  3029. }
  3030. p = oh->slave_ports.next;
  3031. i = 0;
  3032. while (i < oh->slaves_cnt) {
  3033. os = _fetch_next_ocp_if(&p, &i);
  3034. addr_cnt = _count_ocp_if_addr_spaces(os);
  3035. for (j = 0; j < addr_cnt; j++) {
  3036. (res + r)->name = (os->addr + j)->name;
  3037. (res + r)->start = (os->addr + j)->pa_start;
  3038. (res + r)->end = (os->addr + j)->pa_end;
  3039. (res + r)->flags = IORESOURCE_MEM;
  3040. r++;
  3041. }
  3042. }
  3043. return r;
  3044. }
  3045. /**
  3046. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  3047. * @oh: struct omap_hwmod *
  3048. * @res: pointer to the array of struct resource to fill
  3049. *
  3050. * Fill the struct resource array @res with dma resource data from the
  3051. * omap_hwmod @oh. Intended to be called by code that registers
  3052. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3053. * number of array elements filled.
  3054. */
  3055. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  3056. {
  3057. int i, sdma_reqs_cnt;
  3058. int r = 0;
  3059. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3060. for (i = 0; i < sdma_reqs_cnt; i++) {
  3061. (res + r)->name = (oh->sdma_reqs + i)->name;
  3062. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3063. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3064. (res + r)->flags = IORESOURCE_DMA;
  3065. r++;
  3066. }
  3067. return r;
  3068. }
  3069. /**
  3070. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  3071. * @oh: struct omap_hwmod * to operate on
  3072. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  3073. * @name: pointer to the name of the data to fetch (optional)
  3074. * @rsrc: pointer to a struct resource, allocated by the caller
  3075. *
  3076. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  3077. * data for the IP block pointed to by @oh. The data will be filled
  3078. * into a struct resource record pointed to by @rsrc. The struct
  3079. * resource must be allocated by the caller. When @name is non-null,
  3080. * the data associated with the matching entry in the IRQ/SDMA/address
  3081. * space hwmod data arrays will be returned. If @name is null, the
  3082. * first array entry will be returned. Data order is not meaningful
  3083. * in hwmod data, so callers are strongly encouraged to use a non-null
  3084. * @name whenever possible to avoid unpredictable effects if hwmod
  3085. * data is later added that causes data ordering to change. This
  3086. * function is only intended for use by OMAP core code. Device
  3087. * drivers should not call this function - the appropriate bus-related
  3088. * data accessor functions should be used instead. Returns 0 upon
  3089. * success or a negative error code upon error.
  3090. */
  3091. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  3092. const char *name, struct resource *rsrc)
  3093. {
  3094. int r;
  3095. unsigned int irq, dma;
  3096. u32 pa_start, pa_end;
  3097. if (!oh || !rsrc)
  3098. return -EINVAL;
  3099. if (type == IORESOURCE_IRQ) {
  3100. r = _get_mpu_irq_by_name(oh, name, &irq);
  3101. if (r)
  3102. return r;
  3103. rsrc->start = irq;
  3104. rsrc->end = irq;
  3105. } else if (type == IORESOURCE_DMA) {
  3106. r = _get_sdma_req_by_name(oh, name, &dma);
  3107. if (r)
  3108. return r;
  3109. rsrc->start = dma;
  3110. rsrc->end = dma;
  3111. } else if (type == IORESOURCE_MEM) {
  3112. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  3113. if (r)
  3114. return r;
  3115. rsrc->start = pa_start;
  3116. rsrc->end = pa_end;
  3117. } else {
  3118. return -EINVAL;
  3119. }
  3120. rsrc->flags = type;
  3121. rsrc->name = name;
  3122. return 0;
  3123. }
  3124. /**
  3125. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  3126. * @oh: struct omap_hwmod *
  3127. *
  3128. * Return the powerdomain pointer associated with the OMAP module
  3129. * @oh's main clock. If @oh does not have a main clk, return the
  3130. * powerdomain associated with the interface clock associated with the
  3131. * module's MPU port. (XXX Perhaps this should use the SDMA port
  3132. * instead?) Returns NULL on error, or a struct powerdomain * on
  3133. * success.
  3134. */
  3135. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  3136. {
  3137. struct clk *c;
  3138. struct omap_hwmod_ocp_if *oi;
  3139. struct clockdomain *clkdm;
  3140. struct clk_hw_omap *clk;
  3141. if (!oh)
  3142. return NULL;
  3143. if (oh->clkdm)
  3144. return oh->clkdm->pwrdm.ptr;
  3145. if (oh->_clk) {
  3146. c = oh->_clk;
  3147. } else {
  3148. oi = _find_mpu_rt_port(oh);
  3149. if (!oi)
  3150. return NULL;
  3151. c = oi->_clk;
  3152. }
  3153. clk = to_clk_hw_omap(__clk_get_hw(c));
  3154. clkdm = clk->clkdm;
  3155. if (!clkdm)
  3156. return NULL;
  3157. return clkdm->pwrdm.ptr;
  3158. }
  3159. /**
  3160. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3161. * @oh: struct omap_hwmod *
  3162. *
  3163. * Returns the virtual address corresponding to the beginning of the
  3164. * module's register target, in the address range that is intended to
  3165. * be used by the MPU. Returns the virtual address upon success or NULL
  3166. * upon error.
  3167. */
  3168. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3169. {
  3170. if (!oh)
  3171. return NULL;
  3172. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3173. return NULL;
  3174. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3175. return NULL;
  3176. return oh->_mpu_rt_va;
  3177. }
  3178. /**
  3179. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3180. * @oh: struct omap_hwmod *
  3181. * @init_oh: struct omap_hwmod * (initiator)
  3182. *
  3183. * Add a sleep dependency between the initiator @init_oh and @oh.
  3184. * Intended to be called by DSP/Bridge code via platform_data for the
  3185. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3186. * code needs to add/del initiator dependencies dynamically
  3187. * before/after accessing a device. Returns the return value from
  3188. * _add_initiator_dep().
  3189. *
  3190. * XXX Keep a usecount in the clockdomain code
  3191. */
  3192. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3193. struct omap_hwmod *init_oh)
  3194. {
  3195. return _add_initiator_dep(oh, init_oh);
  3196. }
  3197. /*
  3198. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3199. * for context save/restore operations?
  3200. */
  3201. /**
  3202. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3203. * @oh: struct omap_hwmod *
  3204. * @init_oh: struct omap_hwmod * (initiator)
  3205. *
  3206. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3207. * Intended to be called by DSP/Bridge code via platform_data for the
  3208. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3209. * code needs to add/del initiator dependencies dynamically
  3210. * before/after accessing a device. Returns the return value from
  3211. * _del_initiator_dep().
  3212. *
  3213. * XXX Keep a usecount in the clockdomain code
  3214. */
  3215. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3216. struct omap_hwmod *init_oh)
  3217. {
  3218. return _del_initiator_dep(oh, init_oh);
  3219. }
  3220. /**
  3221. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3222. * @oh: struct omap_hwmod *
  3223. *
  3224. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3225. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3226. * this IP block if it has dynamic mux entries. Eventually this
  3227. * should set PRCM wakeup registers to cause the PRCM to receive
  3228. * wakeup events from the module. Does not set any wakeup routing
  3229. * registers beyond this point - if the module is to wake up any other
  3230. * module or subsystem, that must be set separately. Called by
  3231. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3232. */
  3233. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3234. {
  3235. unsigned long flags;
  3236. u32 v;
  3237. spin_lock_irqsave(&oh->_lock, flags);
  3238. if (oh->class->sysc &&
  3239. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3240. v = oh->_sysc_cache;
  3241. _enable_wakeup(oh, &v);
  3242. _write_sysconfig(v, oh);
  3243. }
  3244. _set_idle_ioring_wakeup(oh, true);
  3245. spin_unlock_irqrestore(&oh->_lock, flags);
  3246. return 0;
  3247. }
  3248. /**
  3249. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3250. * @oh: struct omap_hwmod *
  3251. *
  3252. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3253. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3254. * events for this IP block if it has dynamic mux entries. Eventually
  3255. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3256. * wakeup events from the module. Does not set any wakeup routing
  3257. * registers beyond this point - if the module is to wake up any other
  3258. * module or subsystem, that must be set separately. Called by
  3259. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3260. */
  3261. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3262. {
  3263. unsigned long flags;
  3264. u32 v;
  3265. spin_lock_irqsave(&oh->_lock, flags);
  3266. if (oh->class->sysc &&
  3267. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3268. v = oh->_sysc_cache;
  3269. _disable_wakeup(oh, &v);
  3270. _write_sysconfig(v, oh);
  3271. }
  3272. _set_idle_ioring_wakeup(oh, false);
  3273. spin_unlock_irqrestore(&oh->_lock, flags);
  3274. return 0;
  3275. }
  3276. /**
  3277. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3278. * contained in the hwmod module.
  3279. * @oh: struct omap_hwmod *
  3280. * @name: name of the reset line to lookup and assert
  3281. *
  3282. * Some IP like dsp, ipu or iva contain processor that require
  3283. * an HW reset line to be assert / deassert in order to enable fully
  3284. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3285. * yet supported on this OMAP; otherwise, passes along the return value
  3286. * from _assert_hardreset().
  3287. */
  3288. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3289. {
  3290. int ret;
  3291. unsigned long flags;
  3292. if (!oh)
  3293. return -EINVAL;
  3294. spin_lock_irqsave(&oh->_lock, flags);
  3295. ret = _assert_hardreset(oh, name);
  3296. spin_unlock_irqrestore(&oh->_lock, flags);
  3297. return ret;
  3298. }
  3299. /**
  3300. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3301. * contained in the hwmod module.
  3302. * @oh: struct omap_hwmod *
  3303. * @name: name of the reset line to look up and deassert
  3304. *
  3305. * Some IP like dsp, ipu or iva contain processor that require
  3306. * an HW reset line to be assert / deassert in order to enable fully
  3307. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3308. * yet supported on this OMAP; otherwise, passes along the return value
  3309. * from _deassert_hardreset().
  3310. */
  3311. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3312. {
  3313. int ret;
  3314. unsigned long flags;
  3315. if (!oh)
  3316. return -EINVAL;
  3317. spin_lock_irqsave(&oh->_lock, flags);
  3318. ret = _deassert_hardreset(oh, name);
  3319. spin_unlock_irqrestore(&oh->_lock, flags);
  3320. return ret;
  3321. }
  3322. /**
  3323. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3324. * contained in the hwmod module
  3325. * @oh: struct omap_hwmod *
  3326. * @name: name of the reset line to look up and read
  3327. *
  3328. * Return the current state of the hwmod @oh's reset line named @name:
  3329. * returns -EINVAL upon parameter error or if this operation
  3330. * is unsupported on the current OMAP; otherwise, passes along the return
  3331. * value from _read_hardreset().
  3332. */
  3333. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3334. {
  3335. int ret;
  3336. unsigned long flags;
  3337. if (!oh)
  3338. return -EINVAL;
  3339. spin_lock_irqsave(&oh->_lock, flags);
  3340. ret = _read_hardreset(oh, name);
  3341. spin_unlock_irqrestore(&oh->_lock, flags);
  3342. return ret;
  3343. }
  3344. /**
  3345. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3346. * @classname: struct omap_hwmod_class name to search for
  3347. * @fn: callback function pointer to call for each hwmod in class @classname
  3348. * @user: arbitrary context data to pass to the callback function
  3349. *
  3350. * For each omap_hwmod of class @classname, call @fn.
  3351. * If the callback function returns something other than
  3352. * zero, the iterator is terminated, and the callback function's return
  3353. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3354. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3355. */
  3356. int omap_hwmod_for_each_by_class(const char *classname,
  3357. int (*fn)(struct omap_hwmod *oh,
  3358. void *user),
  3359. void *user)
  3360. {
  3361. struct omap_hwmod *temp_oh;
  3362. int ret = 0;
  3363. if (!classname || !fn)
  3364. return -EINVAL;
  3365. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3366. __func__, classname);
  3367. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3368. if (!strcmp(temp_oh->class->name, classname)) {
  3369. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3370. __func__, temp_oh->name);
  3371. ret = (*fn)(temp_oh, user);
  3372. if (ret)
  3373. break;
  3374. }
  3375. }
  3376. if (ret)
  3377. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3378. __func__, ret);
  3379. return ret;
  3380. }
  3381. /**
  3382. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3383. * @oh: struct omap_hwmod *
  3384. * @state: state that _setup() should leave the hwmod in
  3385. *
  3386. * Sets the hwmod state that @oh will enter at the end of _setup()
  3387. * (called by omap_hwmod_setup_*()). See also the documentation
  3388. * for _setup_postsetup(), above. Returns 0 upon success or
  3389. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3390. * in the wrong state.
  3391. */
  3392. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3393. {
  3394. int ret;
  3395. unsigned long flags;
  3396. if (!oh)
  3397. return -EINVAL;
  3398. if (state != _HWMOD_STATE_DISABLED &&
  3399. state != _HWMOD_STATE_ENABLED &&
  3400. state != _HWMOD_STATE_IDLE)
  3401. return -EINVAL;
  3402. spin_lock_irqsave(&oh->_lock, flags);
  3403. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3404. ret = -EINVAL;
  3405. goto ohsps_unlock;
  3406. }
  3407. oh->_postsetup_state = state;
  3408. ret = 0;
  3409. ohsps_unlock:
  3410. spin_unlock_irqrestore(&oh->_lock, flags);
  3411. return ret;
  3412. }
  3413. /**
  3414. * omap_hwmod_get_context_loss_count - get lost context count
  3415. * @oh: struct omap_hwmod *
  3416. *
  3417. * Returns the context loss count of associated @oh
  3418. * upon success, or zero if no context loss data is available.
  3419. *
  3420. * On OMAP4, this queries the per-hwmod context loss register,
  3421. * assuming one exists. If not, or on OMAP2/3, this queries the
  3422. * enclosing powerdomain context loss count.
  3423. */
  3424. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3425. {
  3426. struct powerdomain *pwrdm;
  3427. int ret = 0;
  3428. if (soc_ops.get_context_lost)
  3429. return soc_ops.get_context_lost(oh);
  3430. pwrdm = omap_hwmod_get_pwrdm(oh);
  3431. if (pwrdm)
  3432. ret = pwrdm_get_context_loss_count(pwrdm);
  3433. return ret;
  3434. }
  3435. /**
  3436. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3437. * @oh: struct omap_hwmod *
  3438. *
  3439. * Prevent the hwmod @oh from being reset during the setup process.
  3440. * Intended for use by board-*.c files on boards with devices that
  3441. * cannot tolerate being reset. Must be called before the hwmod has
  3442. * been set up. Returns 0 upon success or negative error code upon
  3443. * failure.
  3444. */
  3445. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3446. {
  3447. if (!oh)
  3448. return -EINVAL;
  3449. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3450. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3451. oh->name);
  3452. return -EINVAL;
  3453. }
  3454. oh->flags |= HWMOD_INIT_NO_RESET;
  3455. return 0;
  3456. }
  3457. /**
  3458. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3459. * @oh: struct omap_hwmod * containing hwmod mux entries
  3460. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3461. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3462. *
  3463. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3464. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3465. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3466. * this function is not called for a given pad_idx, then the ISR
  3467. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3468. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3469. * the _dynamic or wakeup_ entry: if there are other entries not
  3470. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3471. * entries are NOT COUNTED in the dynamic pad index. This function
  3472. * must be called separately for each pad that requires its interrupt
  3473. * to be re-routed this way. Returns -EINVAL if there is an argument
  3474. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3475. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3476. *
  3477. * XXX This function interface is fragile. Rather than using array
  3478. * indexes, which are subject to unpredictable change, it should be
  3479. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3480. * pad records.
  3481. */
  3482. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3483. {
  3484. int nr_irqs;
  3485. might_sleep();
  3486. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3487. pad_idx >= oh->mux->nr_pads_dynamic)
  3488. return -EINVAL;
  3489. /* Check the number of available mpu_irqs */
  3490. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3491. ;
  3492. if (irq_idx >= nr_irqs)
  3493. return -EINVAL;
  3494. if (!oh->mux->irqs) {
  3495. /* XXX What frees this? */
  3496. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3497. GFP_KERNEL);
  3498. if (!oh->mux->irqs)
  3499. return -ENOMEM;
  3500. }
  3501. oh->mux->irqs[pad_idx] = irq_idx;
  3502. return 0;
  3503. }
  3504. /**
  3505. * omap_hwmod_init - initialize the hwmod code
  3506. *
  3507. * Sets up some function pointers needed by the hwmod code to operate on the
  3508. * currently-booted SoC. Intended to be called once during kernel init
  3509. * before any hwmods are registered. No return value.
  3510. */
  3511. void __init omap_hwmod_init(void)
  3512. {
  3513. if (cpu_is_omap24xx()) {
  3514. soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
  3515. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3516. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3517. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3518. } else if (cpu_is_omap34xx()) {
  3519. soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
  3520. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3521. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3522. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3523. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3524. soc_ops.enable_module = _omap4_enable_module;
  3525. soc_ops.disable_module = _omap4_disable_module;
  3526. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3527. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3528. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3529. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3530. soc_ops.init_clkdm = _init_clkdm;
  3531. soc_ops.update_context_lost = _omap4_update_context_lost;
  3532. soc_ops.get_context_lost = _omap4_get_context_lost;
  3533. } else if (soc_is_am33xx()) {
  3534. soc_ops.enable_module = _am33xx_enable_module;
  3535. soc_ops.disable_module = _am33xx_disable_module;
  3536. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3537. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3538. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3539. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3540. soc_ops.init_clkdm = _init_clkdm;
  3541. } else {
  3542. WARN(1, "omap_hwmod: unknown SoC type\n");
  3543. }
  3544. inited = true;
  3545. }
  3546. /**
  3547. * omap_hwmod_get_main_clk - get pointer to main clock name
  3548. * @oh: struct omap_hwmod *
  3549. *
  3550. * Returns the main clock name assocated with @oh upon success,
  3551. * or NULL if @oh is NULL.
  3552. */
  3553. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3554. {
  3555. if (!oh)
  3556. return NULL;
  3557. return oh->main_clk;
  3558. }