chip.c 17 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. struct irq_desc *desc = irq_to_desc(irq);
  26. unsigned long flags;
  27. if (!desc) {
  28. WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
  29. return -EINVAL;
  30. }
  31. if (!chip)
  32. chip = &no_irq_chip;
  33. raw_spin_lock_irqsave(&desc->lock, flags);
  34. irq_chip_set_defaults(chip);
  35. desc->irq_data.chip = chip;
  36. raw_spin_unlock_irqrestore(&desc->lock, flags);
  37. return 0;
  38. }
  39. EXPORT_SYMBOL(irq_set_chip);
  40. /**
  41. * irq_set_type - set the irq trigger type for an irq
  42. * @irq: irq number
  43. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  44. */
  45. int irq_set_irq_type(unsigned int irq, unsigned int type)
  46. {
  47. struct irq_desc *desc = irq_to_desc(irq);
  48. unsigned long flags;
  49. int ret = -ENXIO;
  50. if (!desc) {
  51. printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
  52. return -ENODEV;
  53. }
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type == IRQ_TYPE_NONE)
  56. return 0;
  57. chip_bus_lock(desc);
  58. raw_spin_lock_irqsave(&desc->lock, flags);
  59. ret = __irq_set_trigger(desc, irq, type);
  60. raw_spin_unlock_irqrestore(&desc->lock, flags);
  61. chip_bus_sync_unlock(desc);
  62. return ret;
  63. }
  64. EXPORT_SYMBOL(irq_set_irq_type);
  65. /**
  66. * irq_set_handler_data - set irq handler data for an irq
  67. * @irq: Interrupt number
  68. * @data: Pointer to interrupt specific data
  69. *
  70. * Set the hardware irq controller data for an irq
  71. */
  72. int irq_set_handler_data(unsigned int irq, void *data)
  73. {
  74. struct irq_desc *desc = irq_to_desc(irq);
  75. unsigned long flags;
  76. if (!desc) {
  77. printk(KERN_ERR
  78. "Trying to install controller data for IRQ%d\n", irq);
  79. return -EINVAL;
  80. }
  81. raw_spin_lock_irqsave(&desc->lock, flags);
  82. desc->irq_data.handler_data = data;
  83. raw_spin_unlock_irqrestore(&desc->lock, flags);
  84. return 0;
  85. }
  86. EXPORT_SYMBOL(irq_set_handler_data);
  87. /**
  88. * irq_set_msi_desc - set MSI descriptor data for an irq
  89. * @irq: Interrupt number
  90. * @entry: Pointer to MSI descriptor data
  91. *
  92. * Set the MSI descriptor entry for an irq
  93. */
  94. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  95. {
  96. struct irq_desc *desc = irq_to_desc(irq);
  97. unsigned long flags;
  98. if (!desc) {
  99. printk(KERN_ERR
  100. "Trying to install msi data for IRQ%d\n", irq);
  101. return -EINVAL;
  102. }
  103. raw_spin_lock_irqsave(&desc->lock, flags);
  104. desc->irq_data.msi_desc = entry;
  105. if (entry)
  106. entry->irq = irq;
  107. raw_spin_unlock_irqrestore(&desc->lock, flags);
  108. return 0;
  109. }
  110. /**
  111. * irq_set_chip_data - set irq chip data for an irq
  112. * @irq: Interrupt number
  113. * @data: Pointer to chip specific data
  114. *
  115. * Set the hardware irq chip data for an irq
  116. */
  117. int irq_set_chip_data(unsigned int irq, void *data)
  118. {
  119. struct irq_desc *desc = irq_to_desc(irq);
  120. unsigned long flags;
  121. if (!desc) {
  122. printk(KERN_ERR
  123. "Trying to install chip data for IRQ%d\n", irq);
  124. return -EINVAL;
  125. }
  126. if (!desc->irq_data.chip) {
  127. printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
  128. return -EINVAL;
  129. }
  130. raw_spin_lock_irqsave(&desc->lock, flags);
  131. desc->irq_data.chip_data = data;
  132. raw_spin_unlock_irqrestore(&desc->lock, flags);
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(irq_set_chip_data);
  136. struct irq_data *irq_get_irq_data(unsigned int irq)
  137. {
  138. struct irq_desc *desc = irq_to_desc(irq);
  139. return desc ? &desc->irq_data : NULL;
  140. }
  141. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  142. static void irq_state_clr_disabled(struct irq_desc *desc)
  143. {
  144. desc->istate &= ~IRQS_DISABLED;
  145. irq_compat_clr_disabled(desc);
  146. }
  147. static void irq_state_set_disabled(struct irq_desc *desc)
  148. {
  149. desc->istate |= IRQS_DISABLED;
  150. irq_compat_set_disabled(desc);
  151. }
  152. static void irq_state_clr_masked(struct irq_desc *desc)
  153. {
  154. desc->istate &= ~IRQS_MASKED;
  155. irq_compat_clr_masked(desc);
  156. }
  157. static void irq_state_set_masked(struct irq_desc *desc)
  158. {
  159. desc->istate |= IRQS_MASKED;
  160. irq_compat_set_masked(desc);
  161. }
  162. int irq_startup(struct irq_desc *desc)
  163. {
  164. irq_state_clr_disabled(desc);
  165. desc->depth = 0;
  166. if (desc->irq_data.chip->irq_startup) {
  167. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  168. irq_state_clr_masked(desc);
  169. return ret;
  170. }
  171. irq_enable(desc);
  172. return 0;
  173. }
  174. void irq_shutdown(struct irq_desc *desc)
  175. {
  176. irq_state_set_disabled(desc);
  177. desc->depth = 1;
  178. if (desc->irq_data.chip->irq_shutdown)
  179. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  180. if (desc->irq_data.chip->irq_disable)
  181. desc->irq_data.chip->irq_disable(&desc->irq_data);
  182. else
  183. desc->irq_data.chip->irq_mask(&desc->irq_data);
  184. irq_state_set_masked(desc);
  185. }
  186. void irq_enable(struct irq_desc *desc)
  187. {
  188. irq_state_clr_disabled(desc);
  189. if (desc->irq_data.chip->irq_enable)
  190. desc->irq_data.chip->irq_enable(&desc->irq_data);
  191. else
  192. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  193. irq_state_clr_masked(desc);
  194. }
  195. void irq_disable(struct irq_desc *desc)
  196. {
  197. irq_state_set_disabled(desc);
  198. if (desc->irq_data.chip->irq_disable) {
  199. desc->irq_data.chip->irq_disable(&desc->irq_data);
  200. }
  201. irq_state_set_masked(desc);
  202. }
  203. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  204. /* Temporary migration helpers */
  205. static void compat_irq_mask(struct irq_data *data)
  206. {
  207. data->chip->mask(data->irq);
  208. }
  209. static void compat_irq_unmask(struct irq_data *data)
  210. {
  211. data->chip->unmask(data->irq);
  212. }
  213. static void compat_irq_ack(struct irq_data *data)
  214. {
  215. data->chip->ack(data->irq);
  216. }
  217. static void compat_irq_mask_ack(struct irq_data *data)
  218. {
  219. data->chip->mask_ack(data->irq);
  220. }
  221. static void compat_irq_eoi(struct irq_data *data)
  222. {
  223. data->chip->eoi(data->irq);
  224. }
  225. static void compat_irq_enable(struct irq_data *data)
  226. {
  227. data->chip->enable(data->irq);
  228. }
  229. static void compat_irq_disable(struct irq_data *data)
  230. {
  231. data->chip->disable(data->irq);
  232. }
  233. static void compat_irq_shutdown(struct irq_data *data)
  234. {
  235. data->chip->shutdown(data->irq);
  236. }
  237. static unsigned int compat_irq_startup(struct irq_data *data)
  238. {
  239. return data->chip->startup(data->irq);
  240. }
  241. static int compat_irq_set_affinity(struct irq_data *data,
  242. const struct cpumask *dest, bool force)
  243. {
  244. return data->chip->set_affinity(data->irq, dest);
  245. }
  246. static int compat_irq_set_type(struct irq_data *data, unsigned int type)
  247. {
  248. return data->chip->set_type(data->irq, type);
  249. }
  250. static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
  251. {
  252. return data->chip->set_wake(data->irq, on);
  253. }
  254. static int compat_irq_retrigger(struct irq_data *data)
  255. {
  256. return data->chip->retrigger(data->irq);
  257. }
  258. static void compat_bus_lock(struct irq_data *data)
  259. {
  260. data->chip->bus_lock(data->irq);
  261. }
  262. static void compat_bus_sync_unlock(struct irq_data *data)
  263. {
  264. data->chip->bus_sync_unlock(data->irq);
  265. }
  266. #endif
  267. /*
  268. * Fixup enable/disable function pointers
  269. */
  270. void irq_chip_set_defaults(struct irq_chip *chip)
  271. {
  272. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  273. if (chip->enable)
  274. chip->irq_enable = compat_irq_enable;
  275. if (chip->disable)
  276. chip->irq_disable = compat_irq_disable;
  277. if (chip->shutdown)
  278. chip->irq_shutdown = compat_irq_shutdown;
  279. if (chip->startup)
  280. chip->irq_startup = compat_irq_startup;
  281. if (!chip->end)
  282. chip->end = dummy_irq_chip.end;
  283. if (chip->bus_lock)
  284. chip->irq_bus_lock = compat_bus_lock;
  285. if (chip->bus_sync_unlock)
  286. chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
  287. if (chip->mask)
  288. chip->irq_mask = compat_irq_mask;
  289. if (chip->unmask)
  290. chip->irq_unmask = compat_irq_unmask;
  291. if (chip->ack)
  292. chip->irq_ack = compat_irq_ack;
  293. if (chip->mask_ack)
  294. chip->irq_mask_ack = compat_irq_mask_ack;
  295. if (chip->eoi)
  296. chip->irq_eoi = compat_irq_eoi;
  297. if (chip->set_affinity)
  298. chip->irq_set_affinity = compat_irq_set_affinity;
  299. if (chip->set_type)
  300. chip->irq_set_type = compat_irq_set_type;
  301. if (chip->set_wake)
  302. chip->irq_set_wake = compat_irq_set_wake;
  303. if (chip->retrigger)
  304. chip->irq_retrigger = compat_irq_retrigger;
  305. #endif
  306. }
  307. static inline void mask_ack_irq(struct irq_desc *desc)
  308. {
  309. if (desc->irq_data.chip->irq_mask_ack)
  310. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  311. else {
  312. desc->irq_data.chip->irq_mask(&desc->irq_data);
  313. if (desc->irq_data.chip->irq_ack)
  314. desc->irq_data.chip->irq_ack(&desc->irq_data);
  315. }
  316. irq_state_set_masked(desc);
  317. }
  318. void mask_irq(struct irq_desc *desc)
  319. {
  320. if (desc->irq_data.chip->irq_mask) {
  321. desc->irq_data.chip->irq_mask(&desc->irq_data);
  322. irq_state_set_masked(desc);
  323. }
  324. }
  325. void unmask_irq(struct irq_desc *desc)
  326. {
  327. if (desc->irq_data.chip->irq_unmask) {
  328. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  329. irq_state_clr_masked(desc);
  330. }
  331. }
  332. /*
  333. * handle_nested_irq - Handle a nested irq from a irq thread
  334. * @irq: the interrupt number
  335. *
  336. * Handle interrupts which are nested into a threaded interrupt
  337. * handler. The handler function is called inside the calling
  338. * threads context.
  339. */
  340. void handle_nested_irq(unsigned int irq)
  341. {
  342. struct irq_desc *desc = irq_to_desc(irq);
  343. struct irqaction *action;
  344. irqreturn_t action_ret;
  345. might_sleep();
  346. raw_spin_lock_irq(&desc->lock);
  347. kstat_incr_irqs_this_cpu(irq, desc);
  348. action = desc->action;
  349. if (unlikely(!action || (desc->istate & IRQS_DISABLED)))
  350. goto out_unlock;
  351. irq_compat_set_progress(desc);
  352. desc->istate |= IRQS_INPROGRESS;
  353. raw_spin_unlock_irq(&desc->lock);
  354. action_ret = action->thread_fn(action->irq, action->dev_id);
  355. if (!noirqdebug)
  356. note_interrupt(irq, desc, action_ret);
  357. raw_spin_lock_irq(&desc->lock);
  358. desc->istate &= ~IRQS_INPROGRESS;
  359. irq_compat_clr_progress(desc);
  360. out_unlock:
  361. raw_spin_unlock_irq(&desc->lock);
  362. }
  363. EXPORT_SYMBOL_GPL(handle_nested_irq);
  364. static bool irq_check_poll(struct irq_desc *desc)
  365. {
  366. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  367. return false;
  368. return irq_wait_for_poll(desc);
  369. }
  370. /**
  371. * handle_simple_irq - Simple and software-decoded IRQs.
  372. * @irq: the interrupt number
  373. * @desc: the interrupt description structure for this irq
  374. *
  375. * Simple interrupts are either sent from a demultiplexing interrupt
  376. * handler or come from hardware, where no interrupt hardware control
  377. * is necessary.
  378. *
  379. * Note: The caller is expected to handle the ack, clear, mask and
  380. * unmask issues if necessary.
  381. */
  382. void
  383. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  384. {
  385. raw_spin_lock(&desc->lock);
  386. if (unlikely(desc->istate & IRQS_INPROGRESS))
  387. if (!irq_check_poll(desc))
  388. goto out_unlock;
  389. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  390. kstat_incr_irqs_this_cpu(irq, desc);
  391. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
  392. goto out_unlock;
  393. handle_irq_event(desc);
  394. out_unlock:
  395. raw_spin_unlock(&desc->lock);
  396. }
  397. /**
  398. * handle_level_irq - Level type irq handler
  399. * @irq: the interrupt number
  400. * @desc: the interrupt description structure for this irq
  401. *
  402. * Level type interrupts are active as long as the hardware line has
  403. * the active level. This may require to mask the interrupt and unmask
  404. * it after the associated handler has acknowledged the device, so the
  405. * interrupt line is back to inactive.
  406. */
  407. void
  408. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  409. {
  410. raw_spin_lock(&desc->lock);
  411. mask_ack_irq(desc);
  412. if (unlikely(desc->istate & IRQS_INPROGRESS))
  413. if (!irq_check_poll(desc))
  414. goto out_unlock;
  415. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  416. kstat_incr_irqs_this_cpu(irq, desc);
  417. /*
  418. * If its disabled or no action available
  419. * keep it masked and get out of here
  420. */
  421. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
  422. goto out_unlock;
  423. handle_irq_event(desc);
  424. if (!(desc->istate & (IRQS_DISABLED | IRQS_ONESHOT)))
  425. unmask_irq(desc);
  426. out_unlock:
  427. raw_spin_unlock(&desc->lock);
  428. }
  429. EXPORT_SYMBOL_GPL(handle_level_irq);
  430. /**
  431. * handle_fasteoi_irq - irq handler for transparent controllers
  432. * @irq: the interrupt number
  433. * @desc: the interrupt description structure for this irq
  434. *
  435. * Only a single callback will be issued to the chip: an ->eoi()
  436. * call when the interrupt has been serviced. This enables support
  437. * for modern forms of interrupt handlers, which handle the flow
  438. * details in hardware, transparently.
  439. */
  440. void
  441. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  442. {
  443. raw_spin_lock(&desc->lock);
  444. if (unlikely(desc->istate & IRQS_INPROGRESS))
  445. if (!irq_check_poll(desc))
  446. goto out;
  447. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  448. kstat_incr_irqs_this_cpu(irq, desc);
  449. /*
  450. * If its disabled or no action available
  451. * then mask it and get out of here:
  452. */
  453. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED))) {
  454. irq_compat_set_pending(desc);
  455. desc->istate |= IRQS_PENDING;
  456. mask_irq(desc);
  457. goto out;
  458. }
  459. handle_irq_event(desc);
  460. out:
  461. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  462. raw_spin_unlock(&desc->lock);
  463. }
  464. /**
  465. * handle_edge_irq - edge type IRQ handler
  466. * @irq: the interrupt number
  467. * @desc: the interrupt description structure for this irq
  468. *
  469. * Interrupt occures on the falling and/or rising edge of a hardware
  470. * signal. The occurence is latched into the irq controller hardware
  471. * and must be acked in order to be reenabled. After the ack another
  472. * interrupt can happen on the same source even before the first one
  473. * is handled by the associated event handler. If this happens it
  474. * might be necessary to disable (mask) the interrupt depending on the
  475. * controller hardware. This requires to reenable the interrupt inside
  476. * of the loop which handles the interrupts which have arrived while
  477. * the handler was running. If all pending interrupts are handled, the
  478. * loop is left.
  479. */
  480. void
  481. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  482. {
  483. raw_spin_lock(&desc->lock);
  484. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  485. /*
  486. * If we're currently running this IRQ, or its disabled,
  487. * we shouldn't process the IRQ. Mark it pending, handle
  488. * the necessary masking and go out
  489. */
  490. if (unlikely((desc->istate & (IRQS_DISABLED | IRQS_INPROGRESS) ||
  491. !desc->action))) {
  492. if (!irq_check_poll(desc)) {
  493. irq_compat_set_pending(desc);
  494. desc->istate |= IRQS_PENDING;
  495. mask_ack_irq(desc);
  496. goto out_unlock;
  497. }
  498. }
  499. kstat_incr_irqs_this_cpu(irq, desc);
  500. /* Start handling the irq */
  501. desc->irq_data.chip->irq_ack(&desc->irq_data);
  502. do {
  503. if (unlikely(!desc->action)) {
  504. mask_irq(desc);
  505. goto out_unlock;
  506. }
  507. /*
  508. * When another irq arrived while we were handling
  509. * one, we could have masked the irq.
  510. * Renable it, if it was not disabled in meantime.
  511. */
  512. if (unlikely(desc->istate & IRQS_PENDING)) {
  513. if (!(desc->istate & IRQS_DISABLED) &&
  514. (desc->istate & IRQS_MASKED))
  515. unmask_irq(desc);
  516. }
  517. handle_irq_event(desc);
  518. } while ((desc->istate & IRQS_PENDING) &&
  519. !(desc->istate & IRQS_DISABLED));
  520. out_unlock:
  521. raw_spin_unlock(&desc->lock);
  522. }
  523. /**
  524. * handle_percpu_irq - Per CPU local irq handler
  525. * @irq: the interrupt number
  526. * @desc: the interrupt description structure for this irq
  527. *
  528. * Per CPU interrupts on SMP machines without locking requirements
  529. */
  530. void
  531. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  532. {
  533. struct irq_chip *chip = irq_desc_get_chip(desc);
  534. kstat_incr_irqs_this_cpu(irq, desc);
  535. if (chip->irq_ack)
  536. chip->irq_ack(&desc->irq_data);
  537. handle_irq_event_percpu(desc, desc->action);
  538. if (chip->irq_eoi)
  539. chip->irq_eoi(&desc->irq_data);
  540. }
  541. void
  542. __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  543. const char *name)
  544. {
  545. struct irq_desc *desc = irq_to_desc(irq);
  546. unsigned long flags;
  547. if (!desc) {
  548. printk(KERN_ERR
  549. "Trying to install type control for IRQ%d\n", irq);
  550. return;
  551. }
  552. if (!handle) {
  553. handle = handle_bad_irq;
  554. } else {
  555. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  556. return;
  557. }
  558. chip_bus_lock(desc);
  559. raw_spin_lock_irqsave(&desc->lock, flags);
  560. /* Uninstall? */
  561. if (handle == handle_bad_irq) {
  562. if (desc->irq_data.chip != &no_irq_chip)
  563. mask_ack_irq(desc);
  564. irq_compat_set_disabled(desc);
  565. desc->istate |= IRQS_DISABLED;
  566. desc->depth = 1;
  567. }
  568. desc->handle_irq = handle;
  569. desc->name = name;
  570. if (handle != handle_bad_irq && is_chained) {
  571. irq_settings_set_noprobe(desc);
  572. irq_settings_set_norequest(desc);
  573. irq_startup(desc);
  574. }
  575. raw_spin_unlock_irqrestore(&desc->lock, flags);
  576. chip_bus_sync_unlock(desc);
  577. }
  578. EXPORT_SYMBOL_GPL(__set_irq_handler);
  579. void
  580. set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
  581. irq_flow_handler_t handle)
  582. {
  583. irq_set_chip(irq, chip);
  584. __set_irq_handler(irq, handle, 0, NULL);
  585. }
  586. void
  587. set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  588. irq_flow_handler_t handle, const char *name)
  589. {
  590. irq_set_chip(irq, chip);
  591. __set_irq_handler(irq, handle, 0, name);
  592. }
  593. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  594. {
  595. struct irq_desc *desc = irq_to_desc(irq);
  596. unsigned long flags;
  597. if (!desc)
  598. return;
  599. raw_spin_lock_irqsave(&desc->lock, flags);
  600. irq_settings_clr_and_set(desc, clr, set);
  601. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  602. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  603. if (irq_settings_has_no_balance_set(desc))
  604. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  605. if (irq_settings_is_per_cpu(desc))
  606. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  607. if (irq_settings_can_move_pcntxt(desc))
  608. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  609. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  610. raw_spin_unlock_irqrestore(&desc->lock, flags);
  611. }