ehci-fsl.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724
  1. /*
  2. * Copyright 2005-2009 MontaVista Software, Inc.
  3. * Copyright 2008,2012 Freescale Semiconductor, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  13. * for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software Foundation,
  17. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
  20. * by Hunter Wu.
  21. * Power Management support by Dave Liu <daveliu@freescale.com>,
  22. * Jerry Huang <Chang-Ming.Huang@freescale.com> and
  23. * Anton Vorontsov <avorontsov@ru.mvista.com>.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/types.h>
  27. #include <linux/delay.h>
  28. #include <linux/pm.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/fsl_devices.h>
  31. #include "ehci-fsl.h"
  32. /* configure so an HC device and id are always provided */
  33. /* always called with process context; sleeping is OK */
  34. /**
  35. * usb_hcd_fsl_probe - initialize FSL-based HCDs
  36. * @drvier: Driver to be used for this HCD
  37. * @pdev: USB Host Controller being probed
  38. * Context: !in_interrupt()
  39. *
  40. * Allocates basic resources for this USB host controller.
  41. *
  42. */
  43. static int usb_hcd_fsl_probe(const struct hc_driver *driver,
  44. struct platform_device *pdev)
  45. {
  46. struct fsl_usb2_platform_data *pdata;
  47. struct usb_hcd *hcd;
  48. struct resource *res;
  49. int irq;
  50. int retval;
  51. pr_debug("initializing FSL-SOC USB Controller\n");
  52. /* Need platform data for setup */
  53. pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
  54. if (!pdata) {
  55. dev_err(&pdev->dev,
  56. "No platform data for %s.\n", dev_name(&pdev->dev));
  57. return -ENODEV;
  58. }
  59. /*
  60. * This is a host mode driver, verify that we're supposed to be
  61. * in host mode.
  62. */
  63. if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  64. (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
  65. (pdata->operating_mode == FSL_USB2_DR_OTG))) {
  66. dev_err(&pdev->dev,
  67. "Non Host Mode configured for %s. Wrong driver linked.\n",
  68. dev_name(&pdev->dev));
  69. return -ENODEV;
  70. }
  71. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  72. if (!res) {
  73. dev_err(&pdev->dev,
  74. "Found HC with no IRQ. Check %s setup!\n",
  75. dev_name(&pdev->dev));
  76. return -ENODEV;
  77. }
  78. irq = res->start;
  79. hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
  80. if (!hcd) {
  81. retval = -ENOMEM;
  82. goto err1;
  83. }
  84. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  85. if (!res) {
  86. dev_err(&pdev->dev,
  87. "Found HC with no register addr. Check %s setup!\n",
  88. dev_name(&pdev->dev));
  89. retval = -ENODEV;
  90. goto err2;
  91. }
  92. hcd->rsrc_start = res->start;
  93. hcd->rsrc_len = resource_size(res);
  94. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  95. driver->description)) {
  96. dev_dbg(&pdev->dev, "controller already in use\n");
  97. retval = -EBUSY;
  98. goto err2;
  99. }
  100. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  101. if (hcd->regs == NULL) {
  102. dev_dbg(&pdev->dev, "error mapping memory\n");
  103. retval = -EFAULT;
  104. goto err3;
  105. }
  106. pdata->regs = hcd->regs;
  107. if (pdata->power_budget)
  108. hcd->power_budget = pdata->power_budget;
  109. /*
  110. * do platform specific init: check the clock, grab/config pins, etc.
  111. */
  112. if (pdata->init && pdata->init(pdev)) {
  113. retval = -ENODEV;
  114. goto err4;
  115. }
  116. /* Enable USB controller, 83xx or 8536 */
  117. if (pdata->have_sysif_regs)
  118. setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
  119. /* Don't need to set host mode here. It will be done by tdi_reset() */
  120. retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
  121. if (retval != 0)
  122. goto err4;
  123. #ifdef CONFIG_USB_OTG
  124. if (pdata->operating_mode == FSL_USB2_DR_OTG) {
  125. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  126. ehci->transceiver = usb_get_transceiver();
  127. dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n",
  128. hcd, ehci, ehci->transceiver);
  129. if (ehci->transceiver) {
  130. retval = otg_set_host(ehci->transceiver->otg,
  131. &ehci_to_hcd(ehci)->self);
  132. if (retval) {
  133. if (ehci->transceiver)
  134. put_device(ehci->transceiver->dev);
  135. goto err4;
  136. }
  137. } else {
  138. dev_err(&pdev->dev, "can't find transceiver\n");
  139. retval = -ENODEV;
  140. goto err4;
  141. }
  142. }
  143. #endif
  144. return retval;
  145. err4:
  146. iounmap(hcd->regs);
  147. err3:
  148. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  149. err2:
  150. usb_put_hcd(hcd);
  151. err1:
  152. dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
  153. if (pdata->exit)
  154. pdata->exit(pdev);
  155. return retval;
  156. }
  157. /* may be called without controller electrically present */
  158. /* may be called with controller, bus, and devices active */
  159. /**
  160. * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
  161. * @dev: USB Host Controller being removed
  162. * Context: !in_interrupt()
  163. *
  164. * Reverses the effect of usb_hcd_fsl_probe().
  165. *
  166. */
  167. static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
  168. struct platform_device *pdev)
  169. {
  170. struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
  171. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  172. if (ehci->transceiver) {
  173. otg_set_host(ehci->transceiver->otg, NULL);
  174. put_device(ehci->transceiver->dev);
  175. }
  176. usb_remove_hcd(hcd);
  177. /*
  178. * do platform specific un-initialization:
  179. * release iomux pins, disable clock, etc.
  180. */
  181. if (pdata->exit)
  182. pdata->exit(pdev);
  183. iounmap(hcd->regs);
  184. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  185. usb_put_hcd(hcd);
  186. }
  187. static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
  188. enum fsl_usb2_phy_modes phy_mode,
  189. unsigned int port_offset)
  190. {
  191. u32 portsc, temp;
  192. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  193. void __iomem *non_ehci = hcd->regs;
  194. struct device *dev = hcd->self.controller;
  195. struct fsl_usb2_platform_data *pdata = dev->platform_data;
  196. if (pdata->controller_ver < 0) {
  197. dev_warn(hcd->self.controller, "Could not get controller version\n");
  198. return;
  199. }
  200. portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
  201. portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
  202. switch (phy_mode) {
  203. case FSL_USB2_PHY_ULPI:
  204. if (pdata->controller_ver) {
  205. /* controller version 1.6 or above */
  206. temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  207. out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
  208. USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
  209. }
  210. portsc |= PORT_PTS_ULPI;
  211. break;
  212. case FSL_USB2_PHY_SERIAL:
  213. portsc |= PORT_PTS_SERIAL;
  214. break;
  215. case FSL_USB2_PHY_UTMI_WIDE:
  216. portsc |= PORT_PTS_PTW;
  217. /* fall through */
  218. case FSL_USB2_PHY_UTMI:
  219. if (pdata->controller_ver) {
  220. /* controller version 1.6 or above */
  221. temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  222. out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
  223. UTMI_PHY_EN | USB_CTRL_USB_EN);
  224. mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
  225. become stable - 10ms*/
  226. }
  227. /* enable UTMI PHY */
  228. if (pdata->have_sysif_regs)
  229. setbits32(non_ehci + FSL_SOC_USB_CTRL,
  230. CTRL_UTMI_PHY_EN);
  231. portsc |= PORT_PTS_UTMI;
  232. break;
  233. case FSL_USB2_PHY_NONE:
  234. break;
  235. }
  236. ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
  237. }
  238. static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
  239. {
  240. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  241. struct fsl_usb2_platform_data *pdata;
  242. void __iomem *non_ehci = hcd->regs;
  243. u32 temp;
  244. pdata = hcd->self.controller->platform_data;
  245. /* Enable PHY interface in the control reg. */
  246. if (pdata->have_sysif_regs) {
  247. temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  248. out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
  249. /*
  250. * Turn on cache snooping hardware, since some PowerPC platforms
  251. * wholly rely on hardware to deal with cache coherent
  252. */
  253. /* Setup Snooping for all the 4GB space */
  254. /* SNOOP1 starts from 0x0, size 2G */
  255. out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
  256. /* SNOOP2 starts from 0x80000000, size 2G */
  257. out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
  258. }
  259. if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  260. (pdata->operating_mode == FSL_USB2_DR_OTG))
  261. ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
  262. if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
  263. unsigned int chip, rev, svr;
  264. svr = mfspr(SPRN_SVR);
  265. chip = svr >> 16;
  266. rev = (svr >> 4) & 0xf;
  267. /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
  268. if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
  269. ehci->has_fsl_port_bug = 1;
  270. if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
  271. ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
  272. if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
  273. ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1);
  274. }
  275. if (pdata->have_sysif_regs) {
  276. #ifdef CONFIG_PPC_85xx
  277. out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
  278. out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
  279. #else
  280. out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
  281. out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
  282. #endif
  283. out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
  284. }
  285. }
  286. /* called after powerup, by probe or system-pm "wakeup" */
  287. static int ehci_fsl_reinit(struct ehci_hcd *ehci)
  288. {
  289. ehci_fsl_usb_setup(ehci);
  290. ehci_port_power(ehci, 0);
  291. return 0;
  292. }
  293. /* called during probe() after chip reset completes */
  294. static int ehci_fsl_setup(struct usb_hcd *hcd)
  295. {
  296. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  297. int retval;
  298. struct fsl_usb2_platform_data *pdata;
  299. struct device *dev;
  300. dev = hcd->self.controller;
  301. pdata = hcd->self.controller->platform_data;
  302. ehci->big_endian_desc = pdata->big_endian_desc;
  303. ehci->big_endian_mmio = pdata->big_endian_mmio;
  304. /* EHCI registers start at offset 0x100 */
  305. ehci->caps = hcd->regs + 0x100;
  306. ehci->regs = hcd->regs + 0x100 +
  307. HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  308. dbg_hcs_params(ehci, "reset");
  309. dbg_hcc_params(ehci, "reset");
  310. /* cache this readonly data; minimize chip reads */
  311. ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
  312. hcd->has_tt = 1;
  313. retval = ehci_halt(ehci);
  314. if (retval)
  315. return retval;
  316. /* data structure init */
  317. retval = ehci_init(hcd);
  318. if (retval)
  319. return retval;
  320. ehci->sbrn = 0x20;
  321. ehci_reset(ehci);
  322. if (of_device_is_compatible(dev->parent->of_node,
  323. "fsl,mpc5121-usb2-dr")) {
  324. /*
  325. * set SBUSCFG:AHBBRST so that control msgs don't
  326. * fail when doing heavy PATA writes.
  327. */
  328. ehci_writel(ehci, SBUSCFG_INCR8,
  329. hcd->regs + FSL_SOC_USB_SBUSCFG);
  330. }
  331. retval = ehci_fsl_reinit(ehci);
  332. return retval;
  333. }
  334. struct ehci_fsl {
  335. struct ehci_hcd ehci;
  336. #ifdef CONFIG_PM
  337. /* Saved USB PHY settings, need to restore after deep sleep. */
  338. u32 usb_ctrl;
  339. #endif
  340. };
  341. #ifdef CONFIG_PM
  342. #ifdef CONFIG_PPC_MPC512x
  343. static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
  344. {
  345. struct usb_hcd *hcd = dev_get_drvdata(dev);
  346. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  347. struct fsl_usb2_platform_data *pdata = dev->platform_data;
  348. u32 tmp;
  349. #ifdef DEBUG
  350. u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
  351. mode &= USBMODE_CM_MASK;
  352. tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
  353. dev_dbg(dev, "suspend=%d already_suspended=%d "
  354. "mode=%d usbcmd %08x\n", pdata->suspended,
  355. pdata->already_suspended, mode, tmp);
  356. #endif
  357. /*
  358. * If the controller is already suspended, then this must be a
  359. * PM suspend. Remember this fact, so that we will leave the
  360. * controller suspended at PM resume time.
  361. */
  362. if (pdata->suspended) {
  363. dev_dbg(dev, "already suspended, leaving early\n");
  364. pdata->already_suspended = 1;
  365. return 0;
  366. }
  367. dev_dbg(dev, "suspending...\n");
  368. ehci->rh_state = EHCI_RH_SUSPENDED;
  369. dev->power.power_state = PMSG_SUSPEND;
  370. /* ignore non-host interrupts */
  371. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  372. /* stop the controller */
  373. tmp = ehci_readl(ehci, &ehci->regs->command);
  374. tmp &= ~CMD_RUN;
  375. ehci_writel(ehci, tmp, &ehci->regs->command);
  376. /* save EHCI registers */
  377. pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
  378. pdata->pm_command &= ~CMD_RUN;
  379. pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
  380. pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
  381. pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
  382. pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
  383. pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
  384. pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
  385. pdata->pm_configured_flag =
  386. ehci_readl(ehci, &ehci->regs->configured_flag);
  387. pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
  388. pdata->pm_usbgenctrl = ehci_readl(ehci,
  389. hcd->regs + FSL_SOC_USB_USBGENCTRL);
  390. /* clear the W1C bits */
  391. pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
  392. pdata->suspended = 1;
  393. /* clear PP to cut power to the port */
  394. tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
  395. tmp &= ~PORT_POWER;
  396. ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
  397. return 0;
  398. }
  399. static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
  400. {
  401. struct usb_hcd *hcd = dev_get_drvdata(dev);
  402. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  403. struct fsl_usb2_platform_data *pdata = dev->platform_data;
  404. u32 tmp;
  405. dev_dbg(dev, "suspend=%d already_suspended=%d\n",
  406. pdata->suspended, pdata->already_suspended);
  407. /*
  408. * If the controller was already suspended at suspend time,
  409. * then don't resume it now.
  410. */
  411. if (pdata->already_suspended) {
  412. dev_dbg(dev, "already suspended, leaving early\n");
  413. pdata->already_suspended = 0;
  414. return 0;
  415. }
  416. if (!pdata->suspended) {
  417. dev_dbg(dev, "not suspended, leaving early\n");
  418. return 0;
  419. }
  420. pdata->suspended = 0;
  421. dev_dbg(dev, "resuming...\n");
  422. /* set host mode */
  423. tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
  424. ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
  425. ehci_writel(ehci, pdata->pm_usbgenctrl,
  426. hcd->regs + FSL_SOC_USB_USBGENCTRL);
  427. ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
  428. hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
  429. ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
  430. /* restore EHCI registers */
  431. ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
  432. ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
  433. ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
  434. ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
  435. ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
  436. ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
  437. ehci_writel(ehci, pdata->pm_configured_flag,
  438. &ehci->regs->configured_flag);
  439. ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
  440. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  441. ehci->rh_state = EHCI_RH_RUNNING;
  442. dev->power.power_state = PMSG_ON;
  443. tmp = ehci_readl(ehci, &ehci->regs->command);
  444. tmp |= CMD_RUN;
  445. ehci_writel(ehci, tmp, &ehci->regs->command);
  446. usb_hcd_resume_root_hub(hcd);
  447. return 0;
  448. }
  449. #else
  450. static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
  451. {
  452. return 0;
  453. }
  454. static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
  455. {
  456. return 0;
  457. }
  458. #endif /* CONFIG_PPC_MPC512x */
  459. static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
  460. {
  461. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  462. return container_of(ehci, struct ehci_fsl, ehci);
  463. }
  464. static int ehci_fsl_drv_suspend(struct device *dev)
  465. {
  466. struct usb_hcd *hcd = dev_get_drvdata(dev);
  467. struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
  468. void __iomem *non_ehci = hcd->regs;
  469. if (of_device_is_compatible(dev->parent->of_node,
  470. "fsl,mpc5121-usb2-dr")) {
  471. return ehci_fsl_mpc512x_drv_suspend(dev);
  472. }
  473. ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
  474. device_may_wakeup(dev));
  475. if (!fsl_deep_sleep())
  476. return 0;
  477. ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
  478. return 0;
  479. }
  480. static int ehci_fsl_drv_resume(struct device *dev)
  481. {
  482. struct usb_hcd *hcd = dev_get_drvdata(dev);
  483. struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
  484. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  485. void __iomem *non_ehci = hcd->regs;
  486. if (of_device_is_compatible(dev->parent->of_node,
  487. "fsl,mpc5121-usb2-dr")) {
  488. return ehci_fsl_mpc512x_drv_resume(dev);
  489. }
  490. ehci_prepare_ports_for_controller_resume(ehci);
  491. if (!fsl_deep_sleep())
  492. return 0;
  493. usb_root_hub_lost_power(hcd->self.root_hub);
  494. /* Restore USB PHY settings and enable the controller. */
  495. out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
  496. ehci_reset(ehci);
  497. ehci_fsl_reinit(ehci);
  498. return 0;
  499. }
  500. static int ehci_fsl_drv_restore(struct device *dev)
  501. {
  502. struct usb_hcd *hcd = dev_get_drvdata(dev);
  503. usb_root_hub_lost_power(hcd->self.root_hub);
  504. return 0;
  505. }
  506. static struct dev_pm_ops ehci_fsl_pm_ops = {
  507. .suspend = ehci_fsl_drv_suspend,
  508. .resume = ehci_fsl_drv_resume,
  509. .restore = ehci_fsl_drv_restore,
  510. };
  511. #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
  512. #else
  513. #define EHCI_FSL_PM_OPS NULL
  514. #endif /* CONFIG_PM */
  515. #ifdef CONFIG_USB_OTG
  516. static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
  517. {
  518. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  519. u32 status;
  520. if (!port)
  521. return -EINVAL;
  522. port--;
  523. /* start port reset before HNP protocol time out */
  524. status = readl(&ehci->regs->port_status[port]);
  525. if (!(status & PORT_CONNECT))
  526. return -ENODEV;
  527. /* khubd will finish the reset later */
  528. if (ehci_is_TDI(ehci)) {
  529. writel(PORT_RESET |
  530. (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
  531. &ehci->regs->port_status[port]);
  532. } else {
  533. writel(PORT_RESET, &ehci->regs->port_status[port]);
  534. }
  535. return 0;
  536. }
  537. #else
  538. #define ehci_start_port_reset NULL
  539. #endif /* CONFIG_USB_OTG */
  540. static const struct hc_driver ehci_fsl_hc_driver = {
  541. .description = hcd_name,
  542. .product_desc = "Freescale On-Chip EHCI Host Controller",
  543. .hcd_priv_size = sizeof(struct ehci_fsl),
  544. /*
  545. * generic hardware linkage
  546. */
  547. .irq = ehci_irq,
  548. .flags = HCD_USB2 | HCD_MEMORY,
  549. /*
  550. * basic lifecycle operations
  551. */
  552. .reset = ehci_fsl_setup,
  553. .start = ehci_run,
  554. .stop = ehci_stop,
  555. .shutdown = ehci_shutdown,
  556. /*
  557. * managing i/o requests and associated device resources
  558. */
  559. .urb_enqueue = ehci_urb_enqueue,
  560. .urb_dequeue = ehci_urb_dequeue,
  561. .endpoint_disable = ehci_endpoint_disable,
  562. .endpoint_reset = ehci_endpoint_reset,
  563. /*
  564. * scheduling support
  565. */
  566. .get_frame_number = ehci_get_frame,
  567. /*
  568. * root hub support
  569. */
  570. .hub_status_data = ehci_hub_status_data,
  571. .hub_control = ehci_hub_control,
  572. .bus_suspend = ehci_bus_suspend,
  573. .bus_resume = ehci_bus_resume,
  574. .start_port_reset = ehci_start_port_reset,
  575. .relinquish_port = ehci_relinquish_port,
  576. .port_handed_over = ehci_port_handed_over,
  577. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  578. };
  579. static int ehci_fsl_drv_probe(struct platform_device *pdev)
  580. {
  581. if (usb_disabled())
  582. return -ENODEV;
  583. /* FIXME we only want one one probe() not two */
  584. return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
  585. }
  586. static int ehci_fsl_drv_remove(struct platform_device *pdev)
  587. {
  588. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  589. /* FIXME we only want one one remove() not two */
  590. usb_hcd_fsl_remove(hcd, pdev);
  591. return 0;
  592. }
  593. MODULE_ALIAS("platform:fsl-ehci");
  594. static struct platform_driver ehci_fsl_driver = {
  595. .probe = ehci_fsl_drv_probe,
  596. .remove = ehci_fsl_drv_remove,
  597. .shutdown = usb_hcd_platform_shutdown,
  598. .driver = {
  599. .name = "fsl-ehci",
  600. .pm = EHCI_FSL_PM_OPS,
  601. },
  602. };