udc.c 43 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/err.h>
  17. #include <linux/init.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/io.h>
  22. #include <linux/irq.h>
  23. #include <linux/kernel.h>
  24. #include <linux/slab.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/usb/ch9.h>
  27. #include <linux/usb/gadget.h>
  28. #include <linux/usb/otg.h>
  29. #include <linux/usb/chipidea.h>
  30. #include "ci.h"
  31. #include "udc.h"
  32. #include "bits.h"
  33. #include "debug.h"
  34. /* control endpoint description */
  35. static const struct usb_endpoint_descriptor
  36. ctrl_endpt_out_desc = {
  37. .bLength = USB_DT_ENDPOINT_SIZE,
  38. .bDescriptorType = USB_DT_ENDPOINT,
  39. .bEndpointAddress = USB_DIR_OUT,
  40. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  41. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  42. };
  43. static const struct usb_endpoint_descriptor
  44. ctrl_endpt_in_desc = {
  45. .bLength = USB_DT_ENDPOINT_SIZE,
  46. .bDescriptorType = USB_DT_ENDPOINT,
  47. .bEndpointAddress = USB_DIR_IN,
  48. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  49. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  50. };
  51. /**
  52. * hw_ep_bit: calculates the bit number
  53. * @num: endpoint number
  54. * @dir: endpoint direction
  55. *
  56. * This function returns bit number
  57. */
  58. static inline int hw_ep_bit(int num, int dir)
  59. {
  60. return num + (dir ? 16 : 0);
  61. }
  62. static inline int ep_to_bit(struct ci13xxx *ci, int n)
  63. {
  64. int fill = 16 - ci->hw_ep_max / 2;
  65. if (n >= ci->hw_ep_max / 2)
  66. n += fill;
  67. return n;
  68. }
  69. /**
  70. * hw_device_state: enables/disables interrupts (execute without interruption)
  71. * @dma: 0 => disable, !0 => enable and set dma engine
  72. *
  73. * This function returns an error code
  74. */
  75. static int hw_device_state(struct ci13xxx *ci, u32 dma)
  76. {
  77. if (dma) {
  78. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  79. /* interrupt, error, port change, reset, sleep/suspend */
  80. hw_write(ci, OP_USBINTR, ~0,
  81. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  82. } else {
  83. hw_write(ci, OP_USBINTR, ~0, 0);
  84. }
  85. return 0;
  86. }
  87. /**
  88. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  89. * @num: endpoint number
  90. * @dir: endpoint direction
  91. *
  92. * This function returns an error code
  93. */
  94. static int hw_ep_flush(struct ci13xxx *ci, int num, int dir)
  95. {
  96. int n = hw_ep_bit(num, dir);
  97. do {
  98. /* flush any pending transfer */
  99. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  100. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  101. cpu_relax();
  102. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  103. return 0;
  104. }
  105. /**
  106. * hw_ep_disable: disables endpoint (execute without interruption)
  107. * @num: endpoint number
  108. * @dir: endpoint direction
  109. *
  110. * This function returns an error code
  111. */
  112. static int hw_ep_disable(struct ci13xxx *ci, int num, int dir)
  113. {
  114. hw_ep_flush(ci, num, dir);
  115. hw_write(ci, OP_ENDPTCTRL + num,
  116. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  117. return 0;
  118. }
  119. /**
  120. * hw_ep_enable: enables endpoint (execute without interruption)
  121. * @num: endpoint number
  122. * @dir: endpoint direction
  123. * @type: endpoint type
  124. *
  125. * This function returns an error code
  126. */
  127. static int hw_ep_enable(struct ci13xxx *ci, int num, int dir, int type)
  128. {
  129. u32 mask, data;
  130. if (dir) {
  131. mask = ENDPTCTRL_TXT; /* type */
  132. data = type << ffs_nr(mask);
  133. mask |= ENDPTCTRL_TXS; /* unstall */
  134. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  135. data |= ENDPTCTRL_TXR;
  136. mask |= ENDPTCTRL_TXE; /* enable */
  137. data |= ENDPTCTRL_TXE;
  138. } else {
  139. mask = ENDPTCTRL_RXT; /* type */
  140. data = type << ffs_nr(mask);
  141. mask |= ENDPTCTRL_RXS; /* unstall */
  142. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  143. data |= ENDPTCTRL_RXR;
  144. mask |= ENDPTCTRL_RXE; /* enable */
  145. data |= ENDPTCTRL_RXE;
  146. }
  147. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  148. return 0;
  149. }
  150. /**
  151. * hw_ep_get_halt: return endpoint halt status
  152. * @num: endpoint number
  153. * @dir: endpoint direction
  154. *
  155. * This function returns 1 if endpoint halted
  156. */
  157. static int hw_ep_get_halt(struct ci13xxx *ci, int num, int dir)
  158. {
  159. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  160. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  161. }
  162. /**
  163. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  164. * interruption)
  165. * @n: endpoint number
  166. *
  167. * This function returns setup status
  168. */
  169. static int hw_test_and_clear_setup_status(struct ci13xxx *ci, int n)
  170. {
  171. n = ep_to_bit(ci, n);
  172. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  173. }
  174. /**
  175. * hw_ep_prime: primes endpoint (execute without interruption)
  176. * @num: endpoint number
  177. * @dir: endpoint direction
  178. * @is_ctrl: true if control endpoint
  179. *
  180. * This function returns an error code
  181. */
  182. static int hw_ep_prime(struct ci13xxx *ci, int num, int dir, int is_ctrl)
  183. {
  184. int n = hw_ep_bit(num, dir);
  185. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  186. return -EAGAIN;
  187. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  188. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  189. cpu_relax();
  190. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  191. return -EAGAIN;
  192. /* status shoult be tested according with manual but it doesn't work */
  193. return 0;
  194. }
  195. /**
  196. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  197. * without interruption)
  198. * @num: endpoint number
  199. * @dir: endpoint direction
  200. * @value: true => stall, false => unstall
  201. *
  202. * This function returns an error code
  203. */
  204. static int hw_ep_set_halt(struct ci13xxx *ci, int num, int dir, int value)
  205. {
  206. if (value != 0 && value != 1)
  207. return -EINVAL;
  208. do {
  209. enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
  210. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  211. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  212. /* data toggle - reserved for EP0 but it's in ESS */
  213. hw_write(ci, reg, mask_xs|mask_xr,
  214. value ? mask_xs : mask_xr);
  215. } while (value != hw_ep_get_halt(ci, num, dir));
  216. return 0;
  217. }
  218. /**
  219. * hw_is_port_high_speed: test if port is high speed
  220. *
  221. * This function returns true if high speed port
  222. */
  223. static int hw_port_is_high_speed(struct ci13xxx *ci)
  224. {
  225. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  226. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  227. }
  228. /**
  229. * hw_read_intr_enable: returns interrupt enable register
  230. *
  231. * This function returns register data
  232. */
  233. static u32 hw_read_intr_enable(struct ci13xxx *ci)
  234. {
  235. return hw_read(ci, OP_USBINTR, ~0);
  236. }
  237. /**
  238. * hw_read_intr_status: returns interrupt status register
  239. *
  240. * This function returns register data
  241. */
  242. static u32 hw_read_intr_status(struct ci13xxx *ci)
  243. {
  244. return hw_read(ci, OP_USBSTS, ~0);
  245. }
  246. /**
  247. * hw_test_and_clear_complete: test & clear complete status (execute without
  248. * interruption)
  249. * @n: endpoint number
  250. *
  251. * This function returns complete status
  252. */
  253. static int hw_test_and_clear_complete(struct ci13xxx *ci, int n)
  254. {
  255. n = ep_to_bit(ci, n);
  256. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  257. }
  258. /**
  259. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  260. * without interruption)
  261. *
  262. * This function returns active interrutps
  263. */
  264. static u32 hw_test_and_clear_intr_active(struct ci13xxx *ci)
  265. {
  266. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  267. hw_write(ci, OP_USBSTS, ~0, reg);
  268. return reg;
  269. }
  270. /**
  271. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  272. * interruption)
  273. *
  274. * This function returns guard value
  275. */
  276. static int hw_test_and_clear_setup_guard(struct ci13xxx *ci)
  277. {
  278. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  279. }
  280. /**
  281. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  282. * interruption)
  283. *
  284. * This function returns guard value
  285. */
  286. static int hw_test_and_set_setup_guard(struct ci13xxx *ci)
  287. {
  288. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  289. }
  290. /**
  291. * hw_usb_set_address: configures USB address (execute without interruption)
  292. * @value: new USB address
  293. *
  294. * This function explicitly sets the address, without the "USBADRA" (advance)
  295. * feature, which is not supported by older versions of the controller.
  296. */
  297. static void hw_usb_set_address(struct ci13xxx *ci, u8 value)
  298. {
  299. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  300. value << ffs_nr(DEVICEADDR_USBADR));
  301. }
  302. /**
  303. * hw_usb_reset: restart device after a bus reset (execute without
  304. * interruption)
  305. *
  306. * This function returns an error code
  307. */
  308. static int hw_usb_reset(struct ci13xxx *ci)
  309. {
  310. hw_usb_set_address(ci, 0);
  311. /* ESS flushes only at end?!? */
  312. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  313. /* clear setup token semaphores */
  314. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  315. /* clear complete status */
  316. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  317. /* wait until all bits cleared */
  318. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  319. udelay(10); /* not RTOS friendly */
  320. /* reset all endpoints ? */
  321. /* reset internal status and wait for further instructions
  322. no need to verify the port reset status (ESS does it) */
  323. return 0;
  324. }
  325. /******************************************************************************
  326. * UTIL block
  327. *****************************************************************************/
  328. /**
  329. * _usb_addr: calculates endpoint address from direction & number
  330. * @ep: endpoint
  331. */
  332. static inline u8 _usb_addr(struct ci13xxx_ep *ep)
  333. {
  334. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  335. }
  336. /**
  337. * _hardware_queue: configures a request at hardware level
  338. * @gadget: gadget
  339. * @mEp: endpoint
  340. *
  341. * This function returns an error code
  342. */
  343. static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  344. {
  345. struct ci13xxx *ci = mEp->ci;
  346. unsigned i;
  347. int ret = 0;
  348. unsigned length = mReq->req.length;
  349. /* don't queue twice */
  350. if (mReq->req.status == -EALREADY)
  351. return -EALREADY;
  352. mReq->req.status = -EALREADY;
  353. if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
  354. mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
  355. &mReq->zdma);
  356. if (mReq->zptr == NULL)
  357. return -ENOMEM;
  358. memset(mReq->zptr, 0, sizeof(*mReq->zptr));
  359. mReq->zptr->next = TD_TERMINATE;
  360. mReq->zptr->token = TD_STATUS_ACTIVE;
  361. if (!mReq->req.no_interrupt)
  362. mReq->zptr->token |= TD_IOC;
  363. }
  364. ret = usb_gadget_map_request(&ci->gadget, &mReq->req, mEp->dir);
  365. if (ret)
  366. return ret;
  367. /*
  368. * TD configuration
  369. * TODO - handle requests which spawns into several TDs
  370. */
  371. memset(mReq->ptr, 0, sizeof(*mReq->ptr));
  372. mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
  373. mReq->ptr->token &= TD_TOTAL_BYTES;
  374. mReq->ptr->token |= TD_STATUS_ACTIVE;
  375. if (mReq->zptr) {
  376. mReq->ptr->next = mReq->zdma;
  377. } else {
  378. mReq->ptr->next = TD_TERMINATE;
  379. if (!mReq->req.no_interrupt)
  380. mReq->ptr->token |= TD_IOC;
  381. }
  382. mReq->ptr->page[0] = mReq->req.dma;
  383. for (i = 1; i < 5; i++)
  384. mReq->ptr->page[i] =
  385. (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
  386. if (!list_empty(&mEp->qh.queue)) {
  387. struct ci13xxx_req *mReqPrev;
  388. int n = hw_ep_bit(mEp->num, mEp->dir);
  389. int tmp_stat;
  390. mReqPrev = list_entry(mEp->qh.queue.prev,
  391. struct ci13xxx_req, queue);
  392. if (mReqPrev->zptr)
  393. mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
  394. else
  395. mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
  396. wmb();
  397. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  398. goto done;
  399. do {
  400. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  401. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  402. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  403. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  404. if (tmp_stat)
  405. goto done;
  406. }
  407. /* QH configuration */
  408. mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
  409. mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
  410. mEp->qh.ptr->cap |= QH_ZLT;
  411. wmb(); /* synchronize before ep prime */
  412. ret = hw_ep_prime(ci, mEp->num, mEp->dir,
  413. mEp->type == USB_ENDPOINT_XFER_CONTROL);
  414. done:
  415. return ret;
  416. }
  417. /**
  418. * _hardware_dequeue: handles a request at hardware level
  419. * @gadget: gadget
  420. * @mEp: endpoint
  421. *
  422. * This function returns an error code
  423. */
  424. static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  425. {
  426. if (mReq->req.status != -EALREADY)
  427. return -EINVAL;
  428. if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
  429. return -EBUSY;
  430. if (mReq->zptr) {
  431. if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
  432. return -EBUSY;
  433. dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
  434. mReq->zptr = NULL;
  435. }
  436. mReq->req.status = 0;
  437. usb_gadget_unmap_request(&mEp->ci->gadget, &mReq->req, mEp->dir);
  438. mReq->req.status = mReq->ptr->token & TD_STATUS;
  439. if ((TD_STATUS_HALTED & mReq->req.status) != 0)
  440. mReq->req.status = -1;
  441. else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
  442. mReq->req.status = -1;
  443. else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
  444. mReq->req.status = -1;
  445. mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
  446. mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
  447. mReq->req.actual = mReq->req.length - mReq->req.actual;
  448. mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
  449. return mReq->req.actual;
  450. }
  451. /**
  452. * _ep_nuke: dequeues all endpoint requests
  453. * @mEp: endpoint
  454. *
  455. * This function returns an error code
  456. * Caller must hold lock
  457. */
  458. static int _ep_nuke(struct ci13xxx_ep *mEp)
  459. __releases(mEp->lock)
  460. __acquires(mEp->lock)
  461. {
  462. if (mEp == NULL)
  463. return -EINVAL;
  464. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  465. while (!list_empty(&mEp->qh.queue)) {
  466. /* pop oldest request */
  467. struct ci13xxx_req *mReq = \
  468. list_entry(mEp->qh.queue.next,
  469. struct ci13xxx_req, queue);
  470. list_del_init(&mReq->queue);
  471. mReq->req.status = -ESHUTDOWN;
  472. if (mReq->req.complete != NULL) {
  473. spin_unlock(mEp->lock);
  474. mReq->req.complete(&mEp->ep, &mReq->req);
  475. spin_lock(mEp->lock);
  476. }
  477. }
  478. return 0;
  479. }
  480. /**
  481. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  482. * @gadget: gadget
  483. *
  484. * This function returns an error code
  485. */
  486. static int _gadget_stop_activity(struct usb_gadget *gadget)
  487. {
  488. struct usb_ep *ep;
  489. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  490. unsigned long flags;
  491. spin_lock_irqsave(&ci->lock, flags);
  492. ci->gadget.speed = USB_SPEED_UNKNOWN;
  493. ci->remote_wakeup = 0;
  494. ci->suspended = 0;
  495. spin_unlock_irqrestore(&ci->lock, flags);
  496. /* flush all endpoints */
  497. gadget_for_each_ep(ep, gadget) {
  498. usb_ep_fifo_flush(ep);
  499. }
  500. usb_ep_fifo_flush(&ci->ep0out->ep);
  501. usb_ep_fifo_flush(&ci->ep0in->ep);
  502. if (ci->driver)
  503. ci->driver->disconnect(gadget);
  504. /* make sure to disable all endpoints */
  505. gadget_for_each_ep(ep, gadget) {
  506. usb_ep_disable(ep);
  507. }
  508. if (ci->status != NULL) {
  509. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  510. ci->status = NULL;
  511. }
  512. return 0;
  513. }
  514. /******************************************************************************
  515. * ISR block
  516. *****************************************************************************/
  517. /**
  518. * isr_reset_handler: USB reset interrupt handler
  519. * @ci: UDC device
  520. *
  521. * This function resets USB engine after a bus reset occurred
  522. */
  523. static void isr_reset_handler(struct ci13xxx *ci)
  524. __releases(ci->lock)
  525. __acquires(ci->lock)
  526. {
  527. int retval;
  528. dbg_event(0xFF, "BUS RST", 0);
  529. spin_unlock(&ci->lock);
  530. retval = _gadget_stop_activity(&ci->gadget);
  531. if (retval)
  532. goto done;
  533. retval = hw_usb_reset(ci);
  534. if (retval)
  535. goto done;
  536. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  537. if (ci->status == NULL)
  538. retval = -ENOMEM;
  539. done:
  540. spin_lock(&ci->lock);
  541. if (retval)
  542. dev_err(ci->dev, "error: %i\n", retval);
  543. }
  544. /**
  545. * isr_get_status_complete: get_status request complete function
  546. * @ep: endpoint
  547. * @req: request handled
  548. *
  549. * Caller must release lock
  550. */
  551. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  552. {
  553. if (ep == NULL || req == NULL)
  554. return;
  555. kfree(req->buf);
  556. usb_ep_free_request(ep, req);
  557. }
  558. /**
  559. * isr_get_status_response: get_status request response
  560. * @ci: ci struct
  561. * @setup: setup request packet
  562. *
  563. * This function returns an error code
  564. */
  565. static int isr_get_status_response(struct ci13xxx *ci,
  566. struct usb_ctrlrequest *setup)
  567. __releases(mEp->lock)
  568. __acquires(mEp->lock)
  569. {
  570. struct ci13xxx_ep *mEp = ci->ep0in;
  571. struct usb_request *req = NULL;
  572. gfp_t gfp_flags = GFP_ATOMIC;
  573. int dir, num, retval;
  574. if (mEp == NULL || setup == NULL)
  575. return -EINVAL;
  576. spin_unlock(mEp->lock);
  577. req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
  578. spin_lock(mEp->lock);
  579. if (req == NULL)
  580. return -ENOMEM;
  581. req->complete = isr_get_status_complete;
  582. req->length = 2;
  583. req->buf = kzalloc(req->length, gfp_flags);
  584. if (req->buf == NULL) {
  585. retval = -ENOMEM;
  586. goto err_free_req;
  587. }
  588. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  589. /* Assume that device is bus powered for now. */
  590. *(u16 *)req->buf = ci->remote_wakeup << 1;
  591. retval = 0;
  592. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  593. == USB_RECIP_ENDPOINT) {
  594. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  595. TX : RX;
  596. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  597. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  598. }
  599. /* else do nothing; reserved for future use */
  600. spin_unlock(mEp->lock);
  601. retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
  602. spin_lock(mEp->lock);
  603. if (retval)
  604. goto err_free_buf;
  605. return 0;
  606. err_free_buf:
  607. kfree(req->buf);
  608. err_free_req:
  609. spin_unlock(mEp->lock);
  610. usb_ep_free_request(&mEp->ep, req);
  611. spin_lock(mEp->lock);
  612. return retval;
  613. }
  614. /**
  615. * isr_setup_status_complete: setup_status request complete function
  616. * @ep: endpoint
  617. * @req: request handled
  618. *
  619. * Caller must release lock. Put the port in test mode if test mode
  620. * feature is selected.
  621. */
  622. static void
  623. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  624. {
  625. struct ci13xxx *ci = req->context;
  626. unsigned long flags;
  627. if (ci->setaddr) {
  628. hw_usb_set_address(ci, ci->address);
  629. ci->setaddr = false;
  630. }
  631. spin_lock_irqsave(&ci->lock, flags);
  632. if (ci->test_mode)
  633. hw_port_test_set(ci, ci->test_mode);
  634. spin_unlock_irqrestore(&ci->lock, flags);
  635. }
  636. /**
  637. * isr_setup_status_phase: queues the status phase of a setup transation
  638. * @ci: ci struct
  639. *
  640. * This function returns an error code
  641. */
  642. static int isr_setup_status_phase(struct ci13xxx *ci)
  643. __releases(mEp->lock)
  644. __acquires(mEp->lock)
  645. {
  646. int retval;
  647. struct ci13xxx_ep *mEp;
  648. mEp = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  649. ci->status->context = ci;
  650. ci->status->complete = isr_setup_status_complete;
  651. spin_unlock(mEp->lock);
  652. retval = usb_ep_queue(&mEp->ep, ci->status, GFP_ATOMIC);
  653. spin_lock(mEp->lock);
  654. return retval;
  655. }
  656. /**
  657. * isr_tr_complete_low: transaction complete low level handler
  658. * @mEp: endpoint
  659. *
  660. * This function returns an error code
  661. * Caller must hold lock
  662. */
  663. static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
  664. __releases(mEp->lock)
  665. __acquires(mEp->lock)
  666. {
  667. struct ci13xxx_req *mReq, *mReqTemp;
  668. struct ci13xxx_ep *mEpTemp = mEp;
  669. int retval = 0;
  670. list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
  671. queue) {
  672. retval = _hardware_dequeue(mEp, mReq);
  673. if (retval < 0)
  674. break;
  675. list_del_init(&mReq->queue);
  676. dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
  677. if (mReq->req.complete != NULL) {
  678. spin_unlock(mEp->lock);
  679. if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
  680. mReq->req.length)
  681. mEpTemp = mEp->ci->ep0in;
  682. mReq->req.complete(&mEpTemp->ep, &mReq->req);
  683. spin_lock(mEp->lock);
  684. }
  685. }
  686. if (retval == -EBUSY)
  687. retval = 0;
  688. if (retval < 0)
  689. dbg_event(_usb_addr(mEp), "DONE", retval);
  690. return retval;
  691. }
  692. /**
  693. * isr_tr_complete_handler: transaction complete interrupt handler
  694. * @ci: UDC descriptor
  695. *
  696. * This function handles traffic events
  697. */
  698. static void isr_tr_complete_handler(struct ci13xxx *ci)
  699. __releases(ci->lock)
  700. __acquires(ci->lock)
  701. {
  702. unsigned i;
  703. u8 tmode = 0;
  704. for (i = 0; i < ci->hw_ep_max; i++) {
  705. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  706. int type, num, dir, err = -EINVAL;
  707. struct usb_ctrlrequest req;
  708. if (mEp->ep.desc == NULL)
  709. continue; /* not configured */
  710. if (hw_test_and_clear_complete(ci, i)) {
  711. err = isr_tr_complete_low(mEp);
  712. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  713. if (err > 0) /* needs status phase */
  714. err = isr_setup_status_phase(ci);
  715. if (err < 0) {
  716. dbg_event(_usb_addr(mEp),
  717. "ERROR", err);
  718. spin_unlock(&ci->lock);
  719. if (usb_ep_set_halt(&mEp->ep))
  720. dev_err(ci->dev,
  721. "error: ep_set_halt\n");
  722. spin_lock(&ci->lock);
  723. }
  724. }
  725. }
  726. if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
  727. !hw_test_and_clear_setup_status(ci, i))
  728. continue;
  729. if (i != 0) {
  730. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  731. continue;
  732. }
  733. /*
  734. * Flush data and handshake transactions of previous
  735. * setup packet.
  736. */
  737. _ep_nuke(ci->ep0out);
  738. _ep_nuke(ci->ep0in);
  739. /* read_setup_packet */
  740. do {
  741. hw_test_and_set_setup_guard(ci);
  742. memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
  743. } while (!hw_test_and_clear_setup_guard(ci));
  744. type = req.bRequestType;
  745. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  746. dbg_setup(_usb_addr(mEp), &req);
  747. switch (req.bRequest) {
  748. case USB_REQ_CLEAR_FEATURE:
  749. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  750. le16_to_cpu(req.wValue) ==
  751. USB_ENDPOINT_HALT) {
  752. if (req.wLength != 0)
  753. break;
  754. num = le16_to_cpu(req.wIndex);
  755. dir = num & USB_ENDPOINT_DIR_MASK;
  756. num &= USB_ENDPOINT_NUMBER_MASK;
  757. if (dir) /* TX */
  758. num += ci->hw_ep_max/2;
  759. if (!ci->ci13xxx_ep[num].wedge) {
  760. spin_unlock(&ci->lock);
  761. err = usb_ep_clear_halt(
  762. &ci->ci13xxx_ep[num].ep);
  763. spin_lock(&ci->lock);
  764. if (err)
  765. break;
  766. }
  767. err = isr_setup_status_phase(ci);
  768. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  769. le16_to_cpu(req.wValue) ==
  770. USB_DEVICE_REMOTE_WAKEUP) {
  771. if (req.wLength != 0)
  772. break;
  773. ci->remote_wakeup = 0;
  774. err = isr_setup_status_phase(ci);
  775. } else {
  776. goto delegate;
  777. }
  778. break;
  779. case USB_REQ_GET_STATUS:
  780. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  781. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  782. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  783. goto delegate;
  784. if (le16_to_cpu(req.wLength) != 2 ||
  785. le16_to_cpu(req.wValue) != 0)
  786. break;
  787. err = isr_get_status_response(ci, &req);
  788. break;
  789. case USB_REQ_SET_ADDRESS:
  790. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  791. goto delegate;
  792. if (le16_to_cpu(req.wLength) != 0 ||
  793. le16_to_cpu(req.wIndex) != 0)
  794. break;
  795. ci->address = (u8)le16_to_cpu(req.wValue);
  796. ci->setaddr = true;
  797. err = isr_setup_status_phase(ci);
  798. break;
  799. case USB_REQ_SET_FEATURE:
  800. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  801. le16_to_cpu(req.wValue) ==
  802. USB_ENDPOINT_HALT) {
  803. if (req.wLength != 0)
  804. break;
  805. num = le16_to_cpu(req.wIndex);
  806. dir = num & USB_ENDPOINT_DIR_MASK;
  807. num &= USB_ENDPOINT_NUMBER_MASK;
  808. if (dir) /* TX */
  809. num += ci->hw_ep_max/2;
  810. spin_unlock(&ci->lock);
  811. err = usb_ep_set_halt(&ci->ci13xxx_ep[num].ep);
  812. spin_lock(&ci->lock);
  813. if (!err)
  814. isr_setup_status_phase(ci);
  815. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  816. if (req.wLength != 0)
  817. break;
  818. switch (le16_to_cpu(req.wValue)) {
  819. case USB_DEVICE_REMOTE_WAKEUP:
  820. ci->remote_wakeup = 1;
  821. err = isr_setup_status_phase(ci);
  822. break;
  823. case USB_DEVICE_TEST_MODE:
  824. tmode = le16_to_cpu(req.wIndex) >> 8;
  825. switch (tmode) {
  826. case TEST_J:
  827. case TEST_K:
  828. case TEST_SE0_NAK:
  829. case TEST_PACKET:
  830. case TEST_FORCE_EN:
  831. ci->test_mode = tmode;
  832. err = isr_setup_status_phase(
  833. ci);
  834. break;
  835. default:
  836. break;
  837. }
  838. default:
  839. goto delegate;
  840. }
  841. } else {
  842. goto delegate;
  843. }
  844. break;
  845. default:
  846. delegate:
  847. if (req.wLength == 0) /* no data phase */
  848. ci->ep0_dir = TX;
  849. spin_unlock(&ci->lock);
  850. err = ci->driver->setup(&ci->gadget, &req);
  851. spin_lock(&ci->lock);
  852. break;
  853. }
  854. if (err < 0) {
  855. dbg_event(_usb_addr(mEp), "ERROR", err);
  856. spin_unlock(&ci->lock);
  857. if (usb_ep_set_halt(&mEp->ep))
  858. dev_err(ci->dev, "error: ep_set_halt\n");
  859. spin_lock(&ci->lock);
  860. }
  861. }
  862. }
  863. /******************************************************************************
  864. * ENDPT block
  865. *****************************************************************************/
  866. /**
  867. * ep_enable: configure endpoint, making it usable
  868. *
  869. * Check usb_ep_enable() at "usb_gadget.h" for details
  870. */
  871. static int ep_enable(struct usb_ep *ep,
  872. const struct usb_endpoint_descriptor *desc)
  873. {
  874. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  875. int retval = 0;
  876. unsigned long flags;
  877. if (ep == NULL || desc == NULL)
  878. return -EINVAL;
  879. spin_lock_irqsave(mEp->lock, flags);
  880. /* only internal SW should enable ctrl endpts */
  881. mEp->ep.desc = desc;
  882. if (!list_empty(&mEp->qh.queue))
  883. dev_warn(mEp->ci->dev, "enabling a non-empty endpoint!\n");
  884. mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  885. mEp->num = usb_endpoint_num(desc);
  886. mEp->type = usb_endpoint_type(desc);
  887. mEp->ep.maxpacket = usb_endpoint_maxp(desc);
  888. dbg_event(_usb_addr(mEp), "ENABLE", 0);
  889. mEp->qh.ptr->cap = 0;
  890. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  891. mEp->qh.ptr->cap |= QH_IOS;
  892. else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
  893. mEp->qh.ptr->cap &= ~QH_MULT;
  894. else
  895. mEp->qh.ptr->cap &= ~QH_ZLT;
  896. mEp->qh.ptr->cap |=
  897. (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
  898. mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
  899. /*
  900. * Enable endpoints in the HW other than ep0 as ep0
  901. * is always enabled
  902. */
  903. if (mEp->num)
  904. retval |= hw_ep_enable(mEp->ci, mEp->num, mEp->dir, mEp->type);
  905. spin_unlock_irqrestore(mEp->lock, flags);
  906. return retval;
  907. }
  908. /**
  909. * ep_disable: endpoint is no longer usable
  910. *
  911. * Check usb_ep_disable() at "usb_gadget.h" for details
  912. */
  913. static int ep_disable(struct usb_ep *ep)
  914. {
  915. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  916. int direction, retval = 0;
  917. unsigned long flags;
  918. if (ep == NULL)
  919. return -EINVAL;
  920. else if (mEp->ep.desc == NULL)
  921. return -EBUSY;
  922. spin_lock_irqsave(mEp->lock, flags);
  923. /* only internal SW should disable ctrl endpts */
  924. direction = mEp->dir;
  925. do {
  926. dbg_event(_usb_addr(mEp), "DISABLE", 0);
  927. retval |= _ep_nuke(mEp);
  928. retval |= hw_ep_disable(mEp->ci, mEp->num, mEp->dir);
  929. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  930. mEp->dir = (mEp->dir == TX) ? RX : TX;
  931. } while (mEp->dir != direction);
  932. mEp->ep.desc = NULL;
  933. spin_unlock_irqrestore(mEp->lock, flags);
  934. return retval;
  935. }
  936. /**
  937. * ep_alloc_request: allocate a request object to use with this endpoint
  938. *
  939. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  940. */
  941. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  942. {
  943. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  944. struct ci13xxx_req *mReq = NULL;
  945. if (ep == NULL)
  946. return NULL;
  947. mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
  948. if (mReq != NULL) {
  949. INIT_LIST_HEAD(&mReq->queue);
  950. mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
  951. &mReq->dma);
  952. if (mReq->ptr == NULL) {
  953. kfree(mReq);
  954. mReq = NULL;
  955. }
  956. }
  957. dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
  958. return (mReq == NULL) ? NULL : &mReq->req;
  959. }
  960. /**
  961. * ep_free_request: frees a request object
  962. *
  963. * Check usb_ep_free_request() at "usb_gadget.h" for details
  964. */
  965. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  966. {
  967. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  968. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  969. unsigned long flags;
  970. if (ep == NULL || req == NULL) {
  971. return;
  972. } else if (!list_empty(&mReq->queue)) {
  973. dev_err(mEp->ci->dev, "freeing queued request\n");
  974. return;
  975. }
  976. spin_lock_irqsave(mEp->lock, flags);
  977. if (mReq->ptr)
  978. dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
  979. kfree(mReq);
  980. dbg_event(_usb_addr(mEp), "FREE", 0);
  981. spin_unlock_irqrestore(mEp->lock, flags);
  982. }
  983. /**
  984. * ep_queue: queues (submits) an I/O request to an endpoint
  985. *
  986. * Check usb_ep_queue()* at usb_gadget.h" for details
  987. */
  988. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  989. gfp_t __maybe_unused gfp_flags)
  990. {
  991. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  992. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  993. struct ci13xxx *ci = mEp->ci;
  994. int retval = 0;
  995. unsigned long flags;
  996. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  997. return -EINVAL;
  998. spin_lock_irqsave(mEp->lock, flags);
  999. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  1000. if (req->length)
  1001. mEp = (ci->ep0_dir == RX) ?
  1002. ci->ep0out : ci->ep0in;
  1003. if (!list_empty(&mEp->qh.queue)) {
  1004. _ep_nuke(mEp);
  1005. retval = -EOVERFLOW;
  1006. dev_warn(mEp->ci->dev, "endpoint ctrl %X nuked\n",
  1007. _usb_addr(mEp));
  1008. }
  1009. }
  1010. /* first nuke then test link, e.g. previous status has not sent */
  1011. if (!list_empty(&mReq->queue)) {
  1012. retval = -EBUSY;
  1013. dev_err(mEp->ci->dev, "request already in queue\n");
  1014. goto done;
  1015. }
  1016. if (req->length > 4 * CI13XXX_PAGE_SIZE) {
  1017. req->length = 4 * CI13XXX_PAGE_SIZE;
  1018. retval = -EMSGSIZE;
  1019. dev_warn(mEp->ci->dev, "request length truncated\n");
  1020. }
  1021. dbg_queue(_usb_addr(mEp), req, retval);
  1022. /* push request */
  1023. mReq->req.status = -EINPROGRESS;
  1024. mReq->req.actual = 0;
  1025. retval = _hardware_enqueue(mEp, mReq);
  1026. if (retval == -EALREADY) {
  1027. dbg_event(_usb_addr(mEp), "QUEUE", retval);
  1028. retval = 0;
  1029. }
  1030. if (!retval)
  1031. list_add_tail(&mReq->queue, &mEp->qh.queue);
  1032. done:
  1033. spin_unlock_irqrestore(mEp->lock, flags);
  1034. return retval;
  1035. }
  1036. /**
  1037. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1038. *
  1039. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1040. */
  1041. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1042. {
  1043. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1044. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1045. unsigned long flags;
  1046. if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
  1047. mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
  1048. list_empty(&mEp->qh.queue))
  1049. return -EINVAL;
  1050. spin_lock_irqsave(mEp->lock, flags);
  1051. dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
  1052. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1053. /* pop request */
  1054. list_del_init(&mReq->queue);
  1055. usb_gadget_unmap_request(&mEp->ci->gadget, req, mEp->dir);
  1056. req->status = -ECONNRESET;
  1057. if (mReq->req.complete != NULL) {
  1058. spin_unlock(mEp->lock);
  1059. mReq->req.complete(&mEp->ep, &mReq->req);
  1060. spin_lock(mEp->lock);
  1061. }
  1062. spin_unlock_irqrestore(mEp->lock, flags);
  1063. return 0;
  1064. }
  1065. /**
  1066. * ep_set_halt: sets the endpoint halt feature
  1067. *
  1068. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1069. */
  1070. static int ep_set_halt(struct usb_ep *ep, int value)
  1071. {
  1072. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1073. int direction, retval = 0;
  1074. unsigned long flags;
  1075. if (ep == NULL || mEp->ep.desc == NULL)
  1076. return -EINVAL;
  1077. spin_lock_irqsave(mEp->lock, flags);
  1078. #ifndef STALL_IN
  1079. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1080. if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
  1081. !list_empty(&mEp->qh.queue)) {
  1082. spin_unlock_irqrestore(mEp->lock, flags);
  1083. return -EAGAIN;
  1084. }
  1085. #endif
  1086. direction = mEp->dir;
  1087. do {
  1088. dbg_event(_usb_addr(mEp), "HALT", value);
  1089. retval |= hw_ep_set_halt(mEp->ci, mEp->num, mEp->dir, value);
  1090. if (!value)
  1091. mEp->wedge = 0;
  1092. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  1093. mEp->dir = (mEp->dir == TX) ? RX : TX;
  1094. } while (mEp->dir != direction);
  1095. spin_unlock_irqrestore(mEp->lock, flags);
  1096. return retval;
  1097. }
  1098. /**
  1099. * ep_set_wedge: sets the halt feature and ignores clear requests
  1100. *
  1101. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1102. */
  1103. static int ep_set_wedge(struct usb_ep *ep)
  1104. {
  1105. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1106. unsigned long flags;
  1107. if (ep == NULL || mEp->ep.desc == NULL)
  1108. return -EINVAL;
  1109. spin_lock_irqsave(mEp->lock, flags);
  1110. dbg_event(_usb_addr(mEp), "WEDGE", 0);
  1111. mEp->wedge = 1;
  1112. spin_unlock_irqrestore(mEp->lock, flags);
  1113. return usb_ep_set_halt(ep);
  1114. }
  1115. /**
  1116. * ep_fifo_flush: flushes contents of a fifo
  1117. *
  1118. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1119. */
  1120. static void ep_fifo_flush(struct usb_ep *ep)
  1121. {
  1122. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1123. unsigned long flags;
  1124. if (ep == NULL) {
  1125. dev_err(mEp->ci->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
  1126. return;
  1127. }
  1128. spin_lock_irqsave(mEp->lock, flags);
  1129. dbg_event(_usb_addr(mEp), "FFLUSH", 0);
  1130. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1131. spin_unlock_irqrestore(mEp->lock, flags);
  1132. }
  1133. /**
  1134. * Endpoint-specific part of the API to the USB controller hardware
  1135. * Check "usb_gadget.h" for details
  1136. */
  1137. static const struct usb_ep_ops usb_ep_ops = {
  1138. .enable = ep_enable,
  1139. .disable = ep_disable,
  1140. .alloc_request = ep_alloc_request,
  1141. .free_request = ep_free_request,
  1142. .queue = ep_queue,
  1143. .dequeue = ep_dequeue,
  1144. .set_halt = ep_set_halt,
  1145. .set_wedge = ep_set_wedge,
  1146. .fifo_flush = ep_fifo_flush,
  1147. };
  1148. /******************************************************************************
  1149. * GADGET block
  1150. *****************************************************************************/
  1151. static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
  1152. {
  1153. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1154. unsigned long flags;
  1155. int gadget_ready = 0;
  1156. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS))
  1157. return -EOPNOTSUPP;
  1158. spin_lock_irqsave(&ci->lock, flags);
  1159. ci->vbus_active = is_active;
  1160. if (ci->driver)
  1161. gadget_ready = 1;
  1162. spin_unlock_irqrestore(&ci->lock, flags);
  1163. if (gadget_ready) {
  1164. if (is_active) {
  1165. pm_runtime_get_sync(&_gadget->dev);
  1166. hw_device_reset(ci, USBMODE_CM_DC);
  1167. hw_device_state(ci, ci->ep0out->qh.dma);
  1168. } else {
  1169. hw_device_state(ci, 0);
  1170. if (ci->platdata->notify_event)
  1171. ci->platdata->notify_event(ci,
  1172. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1173. _gadget_stop_activity(&ci->gadget);
  1174. pm_runtime_put_sync(&_gadget->dev);
  1175. }
  1176. }
  1177. return 0;
  1178. }
  1179. static int ci13xxx_wakeup(struct usb_gadget *_gadget)
  1180. {
  1181. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1182. unsigned long flags;
  1183. int ret = 0;
  1184. spin_lock_irqsave(&ci->lock, flags);
  1185. if (!ci->remote_wakeup) {
  1186. ret = -EOPNOTSUPP;
  1187. goto out;
  1188. }
  1189. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1190. ret = -EINVAL;
  1191. goto out;
  1192. }
  1193. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1194. out:
  1195. spin_unlock_irqrestore(&ci->lock, flags);
  1196. return ret;
  1197. }
  1198. static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
  1199. {
  1200. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1201. if (ci->transceiver)
  1202. return usb_phy_set_power(ci->transceiver, mA);
  1203. return -ENOTSUPP;
  1204. }
  1205. /* Change Data+ pullup status
  1206. * this func is used by usb_gadget_connect/disconnet
  1207. */
  1208. static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
  1209. {
  1210. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1211. if (is_on)
  1212. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1213. else
  1214. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1215. return 0;
  1216. }
  1217. static int ci13xxx_start(struct usb_gadget *gadget,
  1218. struct usb_gadget_driver *driver);
  1219. static int ci13xxx_stop(struct usb_gadget *gadget,
  1220. struct usb_gadget_driver *driver);
  1221. /**
  1222. * Device operations part of the API to the USB controller hardware,
  1223. * which don't involve endpoints (or i/o)
  1224. * Check "usb_gadget.h" for details
  1225. */
  1226. static const struct usb_gadget_ops usb_gadget_ops = {
  1227. .vbus_session = ci13xxx_vbus_session,
  1228. .wakeup = ci13xxx_wakeup,
  1229. .pullup = ci13xxx_pullup,
  1230. .vbus_draw = ci13xxx_vbus_draw,
  1231. .udc_start = ci13xxx_start,
  1232. .udc_stop = ci13xxx_stop,
  1233. };
  1234. static int init_eps(struct ci13xxx *ci)
  1235. {
  1236. int retval = 0, i, j;
  1237. for (i = 0; i < ci->hw_ep_max/2; i++)
  1238. for (j = RX; j <= TX; j++) {
  1239. int k = i + j * ci->hw_ep_max/2;
  1240. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[k];
  1241. scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
  1242. (j == TX) ? "in" : "out");
  1243. mEp->ci = ci;
  1244. mEp->lock = &ci->lock;
  1245. mEp->td_pool = ci->td_pool;
  1246. mEp->ep.name = mEp->name;
  1247. mEp->ep.ops = &usb_ep_ops;
  1248. /*
  1249. * for ep0: maxP defined in desc, for other
  1250. * eps, maxP is set by epautoconfig() called
  1251. * by gadget layer
  1252. */
  1253. mEp->ep.maxpacket = (unsigned short)~0;
  1254. INIT_LIST_HEAD(&mEp->qh.queue);
  1255. mEp->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1256. &mEp->qh.dma);
  1257. if (mEp->qh.ptr == NULL)
  1258. retval = -ENOMEM;
  1259. else
  1260. memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
  1261. /*
  1262. * set up shorthands for ep0 out and in endpoints,
  1263. * don't add to gadget's ep_list
  1264. */
  1265. if (i == 0) {
  1266. if (j == RX)
  1267. ci->ep0out = mEp;
  1268. else
  1269. ci->ep0in = mEp;
  1270. mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1271. continue;
  1272. }
  1273. list_add_tail(&mEp->ep.ep_list, &ci->gadget.ep_list);
  1274. }
  1275. return retval;
  1276. }
  1277. static void destroy_eps(struct ci13xxx *ci)
  1278. {
  1279. int i;
  1280. for (i = 0; i < ci->hw_ep_max; i++) {
  1281. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  1282. dma_pool_free(ci->qh_pool, mEp->qh.ptr, mEp->qh.dma);
  1283. }
  1284. }
  1285. /**
  1286. * ci13xxx_start: register a gadget driver
  1287. * @gadget: our gadget
  1288. * @driver: the driver being registered
  1289. *
  1290. * Interrupts are enabled here.
  1291. */
  1292. static int ci13xxx_start(struct usb_gadget *gadget,
  1293. struct usb_gadget_driver *driver)
  1294. {
  1295. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1296. unsigned long flags;
  1297. int retval = -ENOMEM;
  1298. if (driver->disconnect == NULL)
  1299. return -EINVAL;
  1300. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1301. retval = usb_ep_enable(&ci->ep0out->ep);
  1302. if (retval)
  1303. return retval;
  1304. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1305. retval = usb_ep_enable(&ci->ep0in->ep);
  1306. if (retval)
  1307. return retval;
  1308. spin_lock_irqsave(&ci->lock, flags);
  1309. ci->driver = driver;
  1310. pm_runtime_get_sync(&ci->gadget.dev);
  1311. if (ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) {
  1312. if (ci->vbus_active) {
  1313. if (ci->platdata->flags & CI13XXX_REGS_SHARED)
  1314. hw_device_reset(ci, USBMODE_CM_DC);
  1315. } else {
  1316. pm_runtime_put_sync(&ci->gadget.dev);
  1317. goto done;
  1318. }
  1319. }
  1320. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1321. if (retval)
  1322. pm_runtime_put_sync(&ci->gadget.dev);
  1323. done:
  1324. spin_unlock_irqrestore(&ci->lock, flags);
  1325. return retval;
  1326. }
  1327. /**
  1328. * ci13xxx_stop: unregister a gadget driver
  1329. */
  1330. static int ci13xxx_stop(struct usb_gadget *gadget,
  1331. struct usb_gadget_driver *driver)
  1332. {
  1333. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1334. unsigned long flags;
  1335. spin_lock_irqsave(&ci->lock, flags);
  1336. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) ||
  1337. ci->vbus_active) {
  1338. hw_device_state(ci, 0);
  1339. if (ci->platdata->notify_event)
  1340. ci->platdata->notify_event(ci,
  1341. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1342. ci->driver = NULL;
  1343. spin_unlock_irqrestore(&ci->lock, flags);
  1344. _gadget_stop_activity(&ci->gadget);
  1345. spin_lock_irqsave(&ci->lock, flags);
  1346. pm_runtime_put(&ci->gadget.dev);
  1347. }
  1348. spin_unlock_irqrestore(&ci->lock, flags);
  1349. return 0;
  1350. }
  1351. /******************************************************************************
  1352. * BUS block
  1353. *****************************************************************************/
  1354. /**
  1355. * udc_irq: ci interrupt handler
  1356. *
  1357. * This function returns IRQ_HANDLED if the IRQ has been handled
  1358. * It locks access to registers
  1359. */
  1360. static irqreturn_t udc_irq(struct ci13xxx *ci)
  1361. {
  1362. irqreturn_t retval;
  1363. u32 intr;
  1364. if (ci == NULL)
  1365. return IRQ_HANDLED;
  1366. spin_lock(&ci->lock);
  1367. if (ci->platdata->flags & CI13XXX_REGS_SHARED) {
  1368. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1369. USBMODE_CM_DC) {
  1370. spin_unlock(&ci->lock);
  1371. return IRQ_NONE;
  1372. }
  1373. }
  1374. intr = hw_test_and_clear_intr_active(ci);
  1375. dbg_interrupt(intr);
  1376. if (intr) {
  1377. /* order defines priority - do NOT change it */
  1378. if (USBi_URI & intr)
  1379. isr_reset_handler(ci);
  1380. if (USBi_PCI & intr) {
  1381. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1382. USB_SPEED_HIGH : USB_SPEED_FULL;
  1383. if (ci->suspended && ci->driver->resume) {
  1384. spin_unlock(&ci->lock);
  1385. ci->driver->resume(&ci->gadget);
  1386. spin_lock(&ci->lock);
  1387. ci->suspended = 0;
  1388. }
  1389. }
  1390. if (USBi_UI & intr)
  1391. isr_tr_complete_handler(ci);
  1392. if (USBi_SLI & intr) {
  1393. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1394. ci->driver->suspend) {
  1395. ci->suspended = 1;
  1396. spin_unlock(&ci->lock);
  1397. ci->driver->suspend(&ci->gadget);
  1398. spin_lock(&ci->lock);
  1399. }
  1400. }
  1401. retval = IRQ_HANDLED;
  1402. } else {
  1403. retval = IRQ_NONE;
  1404. }
  1405. spin_unlock(&ci->lock);
  1406. return retval;
  1407. }
  1408. /**
  1409. * udc_release: driver release function
  1410. * @dev: device
  1411. *
  1412. * Currently does nothing
  1413. */
  1414. static void udc_release(struct device *dev)
  1415. {
  1416. }
  1417. /**
  1418. * udc_start: initialize gadget role
  1419. * @ci: chipidea controller
  1420. */
  1421. static int udc_start(struct ci13xxx *ci)
  1422. {
  1423. struct device *dev = ci->dev;
  1424. int retval = 0;
  1425. spin_lock_init(&ci->lock);
  1426. ci->gadget.ops = &usb_gadget_ops;
  1427. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1428. ci->gadget.max_speed = USB_SPEED_HIGH;
  1429. ci->gadget.is_otg = 0;
  1430. ci->gadget.name = ci->platdata->name;
  1431. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1432. dev_set_name(&ci->gadget.dev, "gadget");
  1433. ci->gadget.dev.dma_mask = dev->dma_mask;
  1434. ci->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
  1435. ci->gadget.dev.parent = dev;
  1436. ci->gadget.dev.release = udc_release;
  1437. /* alloc resources */
  1438. ci->qh_pool = dma_pool_create("ci13xxx_qh", dev,
  1439. sizeof(struct ci13xxx_qh),
  1440. 64, CI13XXX_PAGE_SIZE);
  1441. if (ci->qh_pool == NULL)
  1442. return -ENOMEM;
  1443. ci->td_pool = dma_pool_create("ci13xxx_td", dev,
  1444. sizeof(struct ci13xxx_td),
  1445. 64, CI13XXX_PAGE_SIZE);
  1446. if (ci->td_pool == NULL) {
  1447. retval = -ENOMEM;
  1448. goto free_qh_pool;
  1449. }
  1450. retval = init_eps(ci);
  1451. if (retval)
  1452. goto free_pools;
  1453. ci->gadget.ep0 = &ci->ep0in->ep;
  1454. if (ci->global_phy)
  1455. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1456. if (ci->platdata->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
  1457. if (ci->transceiver == NULL) {
  1458. retval = -ENODEV;
  1459. goto destroy_eps;
  1460. }
  1461. }
  1462. if (!(ci->platdata->flags & CI13XXX_REGS_SHARED)) {
  1463. retval = hw_device_reset(ci, USBMODE_CM_DC);
  1464. if (retval)
  1465. goto put_transceiver;
  1466. }
  1467. retval = device_register(&ci->gadget.dev);
  1468. if (retval) {
  1469. put_device(&ci->gadget.dev);
  1470. goto put_transceiver;
  1471. }
  1472. retval = dbg_create_files(&ci->gadget.dev);
  1473. if (retval)
  1474. goto unreg_device;
  1475. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1476. retval = otg_set_peripheral(ci->transceiver->otg,
  1477. &ci->gadget);
  1478. if (retval)
  1479. goto remove_dbg;
  1480. }
  1481. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1482. if (retval)
  1483. goto remove_trans;
  1484. pm_runtime_no_callbacks(&ci->gadget.dev);
  1485. pm_runtime_enable(&ci->gadget.dev);
  1486. return retval;
  1487. remove_trans:
  1488. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1489. otg_set_peripheral(ci->transceiver->otg, NULL);
  1490. if (ci->global_phy)
  1491. usb_put_phy(ci->transceiver);
  1492. }
  1493. dev_err(dev, "error = %i\n", retval);
  1494. remove_dbg:
  1495. dbg_remove_files(&ci->gadget.dev);
  1496. unreg_device:
  1497. device_unregister(&ci->gadget.dev);
  1498. put_transceiver:
  1499. if (!IS_ERR_OR_NULL(ci->transceiver) && ci->global_phy)
  1500. usb_put_phy(ci->transceiver);
  1501. destroy_eps:
  1502. destroy_eps(ci);
  1503. free_pools:
  1504. dma_pool_destroy(ci->td_pool);
  1505. free_qh_pool:
  1506. dma_pool_destroy(ci->qh_pool);
  1507. return retval;
  1508. }
  1509. /**
  1510. * udc_remove: parent remove must call this to remove UDC
  1511. *
  1512. * No interrupts active, the IRQ has been released
  1513. */
  1514. static void udc_stop(struct ci13xxx *ci)
  1515. {
  1516. if (ci == NULL)
  1517. return;
  1518. usb_del_gadget_udc(&ci->gadget);
  1519. destroy_eps(ci);
  1520. dma_pool_destroy(ci->td_pool);
  1521. dma_pool_destroy(ci->qh_pool);
  1522. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1523. otg_set_peripheral(ci->transceiver->otg, NULL);
  1524. if (ci->global_phy)
  1525. usb_put_phy(ci->transceiver);
  1526. }
  1527. dbg_remove_files(&ci->gadget.dev);
  1528. device_unregister(&ci->gadget.dev);
  1529. /* my kobject is dynamic, I swear! */
  1530. memset(&ci->gadget, 0, sizeof(ci->gadget));
  1531. }
  1532. /**
  1533. * ci_hdrc_gadget_init - initialize device related bits
  1534. * ci: the controller
  1535. *
  1536. * This function enables the gadget role, if the device is "device capable".
  1537. */
  1538. int ci_hdrc_gadget_init(struct ci13xxx *ci)
  1539. {
  1540. struct ci_role_driver *rdrv;
  1541. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1542. return -ENXIO;
  1543. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1544. if (!rdrv)
  1545. return -ENOMEM;
  1546. rdrv->start = udc_start;
  1547. rdrv->stop = udc_stop;
  1548. rdrv->irq = udc_irq;
  1549. rdrv->name = "gadget";
  1550. ci->roles[CI_ROLE_GADGET] = rdrv;
  1551. return 0;
  1552. }