setup.c 24 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/crash_dump.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/cpu.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/smp.h>
  29. #include <linux/fs.h>
  30. #include <linux/proc_fs.h>
  31. #include <linux/memblock.h>
  32. #include <asm/unified.h>
  33. #include <asm/cpu.h>
  34. #include <asm/cputype.h>
  35. #include <asm/elf.h>
  36. #include <asm/procinfo.h>
  37. #include <asm/sections.h>
  38. #include <asm/setup.h>
  39. #include <asm/smp_plat.h>
  40. #include <asm/mach-types.h>
  41. #include <asm/cacheflush.h>
  42. #include <asm/cachetype.h>
  43. #include <asm/tlbflush.h>
  44. #include <asm/prom.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mach/irq.h>
  47. #include <asm/mach/time.h>
  48. #include <asm/traps.h>
  49. #include <asm/unwind.h>
  50. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  51. #include "compat.h"
  52. #endif
  53. #include "atags.h"
  54. #include "tcm.h"
  55. #ifndef MEM_SIZE
  56. #define MEM_SIZE (16*1024*1024)
  57. #endif
  58. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  59. char fpe_type[8];
  60. static int __init fpe_setup(char *line)
  61. {
  62. memcpy(fpe_type, line, 8);
  63. return 1;
  64. }
  65. __setup("fpe=", fpe_setup);
  66. #endif
  67. extern void paging_init(struct machine_desc *desc);
  68. extern void sanity_check_meminfo(void);
  69. extern void reboot_setup(char *str);
  70. unsigned int processor_id;
  71. EXPORT_SYMBOL(processor_id);
  72. unsigned int __machine_arch_type __read_mostly;
  73. EXPORT_SYMBOL(__machine_arch_type);
  74. unsigned int cacheid __read_mostly;
  75. EXPORT_SYMBOL(cacheid);
  76. unsigned int __atags_pointer __initdata;
  77. unsigned int system_rev;
  78. EXPORT_SYMBOL(system_rev);
  79. unsigned int system_serial_low;
  80. EXPORT_SYMBOL(system_serial_low);
  81. unsigned int system_serial_high;
  82. EXPORT_SYMBOL(system_serial_high);
  83. unsigned int elf_hwcap __read_mostly;
  84. EXPORT_SYMBOL(elf_hwcap);
  85. #ifdef MULTI_CPU
  86. struct processor processor __read_mostly;
  87. #endif
  88. #ifdef MULTI_TLB
  89. struct cpu_tlb_fns cpu_tlb __read_mostly;
  90. #endif
  91. #ifdef MULTI_USER
  92. struct cpu_user_fns cpu_user __read_mostly;
  93. #endif
  94. #ifdef MULTI_CACHE
  95. struct cpu_cache_fns cpu_cache __read_mostly;
  96. #endif
  97. #ifdef CONFIG_OUTER_CACHE
  98. struct outer_cache_fns outer_cache __read_mostly;
  99. EXPORT_SYMBOL(outer_cache);
  100. #endif
  101. struct stack {
  102. u32 irq[3];
  103. u32 abt[3];
  104. u32 und[3];
  105. } ____cacheline_aligned;
  106. static struct stack stacks[NR_CPUS];
  107. char elf_platform[ELF_PLATFORM_SIZE];
  108. EXPORT_SYMBOL(elf_platform);
  109. static const char *cpu_name;
  110. static const char *machine_name;
  111. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  112. struct machine_desc *machine_desc __initdata;
  113. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  114. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  115. #define ENDIANNESS ((char)endian_test.l)
  116. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  117. /*
  118. * Standard memory resources
  119. */
  120. static struct resource mem_res[] = {
  121. {
  122. .name = "Video RAM",
  123. .start = 0,
  124. .end = 0,
  125. .flags = IORESOURCE_MEM
  126. },
  127. {
  128. .name = "Kernel text",
  129. .start = 0,
  130. .end = 0,
  131. .flags = IORESOURCE_MEM
  132. },
  133. {
  134. .name = "Kernel data",
  135. .start = 0,
  136. .end = 0,
  137. .flags = IORESOURCE_MEM
  138. }
  139. };
  140. #define video_ram mem_res[0]
  141. #define kernel_code mem_res[1]
  142. #define kernel_data mem_res[2]
  143. static struct resource io_res[] = {
  144. {
  145. .name = "reserved",
  146. .start = 0x3bc,
  147. .end = 0x3be,
  148. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  149. },
  150. {
  151. .name = "reserved",
  152. .start = 0x378,
  153. .end = 0x37f,
  154. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  155. },
  156. {
  157. .name = "reserved",
  158. .start = 0x278,
  159. .end = 0x27f,
  160. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  161. }
  162. };
  163. #define lp0 io_res[0]
  164. #define lp1 io_res[1]
  165. #define lp2 io_res[2]
  166. static const char *proc_arch[] = {
  167. "undefined/unknown",
  168. "3",
  169. "4",
  170. "4T",
  171. "5",
  172. "5T",
  173. "5TE",
  174. "5TEJ",
  175. "6TEJ",
  176. "7",
  177. "?(11)",
  178. "?(12)",
  179. "?(13)",
  180. "?(14)",
  181. "?(15)",
  182. "?(16)",
  183. "?(17)",
  184. };
  185. int cpu_architecture(void)
  186. {
  187. int cpu_arch;
  188. if ((read_cpuid_id() & 0x0008f000) == 0) {
  189. cpu_arch = CPU_ARCH_UNKNOWN;
  190. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  191. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  192. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  193. cpu_arch = (read_cpuid_id() >> 16) & 7;
  194. if (cpu_arch)
  195. cpu_arch += CPU_ARCH_ARMv3;
  196. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  197. unsigned int mmfr0;
  198. /* Revised CPUID format. Read the Memory Model Feature
  199. * Register 0 and check for VMSAv7 or PMSAv7 */
  200. asm("mrc p15, 0, %0, c0, c1, 4"
  201. : "=r" (mmfr0));
  202. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  203. (mmfr0 & 0x000000f0) >= 0x00000030)
  204. cpu_arch = CPU_ARCH_ARMv7;
  205. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  206. (mmfr0 & 0x000000f0) == 0x00000020)
  207. cpu_arch = CPU_ARCH_ARMv6;
  208. else
  209. cpu_arch = CPU_ARCH_UNKNOWN;
  210. } else
  211. cpu_arch = CPU_ARCH_UNKNOWN;
  212. return cpu_arch;
  213. }
  214. static int cpu_has_aliasing_icache(unsigned int arch)
  215. {
  216. int aliasing_icache;
  217. unsigned int id_reg, num_sets, line_size;
  218. /* arch specifies the register format */
  219. switch (arch) {
  220. case CPU_ARCH_ARMv7:
  221. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  222. : /* No output operands */
  223. : "r" (1));
  224. isb();
  225. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  226. : "=r" (id_reg));
  227. line_size = 4 << ((id_reg & 0x7) + 2);
  228. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  229. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  230. break;
  231. case CPU_ARCH_ARMv6:
  232. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  233. break;
  234. default:
  235. /* I-cache aliases will be handled by D-cache aliasing code */
  236. aliasing_icache = 0;
  237. }
  238. return aliasing_icache;
  239. }
  240. static void __init cacheid_init(void)
  241. {
  242. unsigned int cachetype = read_cpuid_cachetype();
  243. unsigned int arch = cpu_architecture();
  244. if (arch >= CPU_ARCH_ARMv6) {
  245. if ((cachetype & (7 << 29)) == 4 << 29) {
  246. /* ARMv7 register format */
  247. arch = CPU_ARCH_ARMv7;
  248. cacheid = CACHEID_VIPT_NONALIASING;
  249. if ((cachetype & (3 << 14)) == 1 << 14)
  250. cacheid |= CACHEID_ASID_TAGGED;
  251. } else {
  252. arch = CPU_ARCH_ARMv6;
  253. if (cachetype & (1 << 23))
  254. cacheid = CACHEID_VIPT_ALIASING;
  255. else
  256. cacheid = CACHEID_VIPT_NONALIASING;
  257. }
  258. if (cpu_has_aliasing_icache(arch))
  259. cacheid |= CACHEID_VIPT_I_ALIASING;
  260. } else {
  261. cacheid = CACHEID_VIVT;
  262. }
  263. printk("CPU: %s data cache, %s instruction cache\n",
  264. cache_is_vivt() ? "VIVT" :
  265. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  266. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
  267. cache_is_vivt() ? "VIVT" :
  268. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  269. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  270. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  271. }
  272. /*
  273. * These functions re-use the assembly code in head.S, which
  274. * already provide the required functionality.
  275. */
  276. extern struct proc_info_list *lookup_processor_type(unsigned int);
  277. void __init early_print(const char *str, ...)
  278. {
  279. extern void printascii(const char *);
  280. char buf[256];
  281. va_list ap;
  282. va_start(ap, str);
  283. vsnprintf(buf, sizeof(buf), str, ap);
  284. va_end(ap);
  285. #ifdef CONFIG_DEBUG_LL
  286. printascii(buf);
  287. #endif
  288. printk("%s", buf);
  289. }
  290. static void __init feat_v6_fixup(void)
  291. {
  292. int id = read_cpuid_id();
  293. if ((id & 0xff0f0000) != 0x41070000)
  294. return;
  295. /*
  296. * HWCAP_TLS is available only on 1136 r1p0 and later,
  297. * see also kuser_get_tls_init.
  298. */
  299. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  300. elf_hwcap &= ~HWCAP_TLS;
  301. }
  302. /*
  303. * cpu_init - initialise one CPU.
  304. *
  305. * cpu_init sets up the per-CPU stacks.
  306. */
  307. void cpu_init(void)
  308. {
  309. unsigned int cpu = smp_processor_id();
  310. struct stack *stk = &stacks[cpu];
  311. if (cpu >= NR_CPUS) {
  312. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  313. BUG();
  314. }
  315. cpu_proc_init();
  316. /*
  317. * Define the placement constraint for the inline asm directive below.
  318. * In Thumb-2, msr with an immediate value is not allowed.
  319. */
  320. #ifdef CONFIG_THUMB2_KERNEL
  321. #define PLC "r"
  322. #else
  323. #define PLC "I"
  324. #endif
  325. /*
  326. * setup stacks for re-entrant exception handlers
  327. */
  328. __asm__ (
  329. "msr cpsr_c, %1\n\t"
  330. "add r14, %0, %2\n\t"
  331. "mov sp, r14\n\t"
  332. "msr cpsr_c, %3\n\t"
  333. "add r14, %0, %4\n\t"
  334. "mov sp, r14\n\t"
  335. "msr cpsr_c, %5\n\t"
  336. "add r14, %0, %6\n\t"
  337. "mov sp, r14\n\t"
  338. "msr cpsr_c, %7"
  339. :
  340. : "r" (stk),
  341. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  342. "I" (offsetof(struct stack, irq[0])),
  343. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  344. "I" (offsetof(struct stack, abt[0])),
  345. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  346. "I" (offsetof(struct stack, und[0])),
  347. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  348. : "r14");
  349. }
  350. static void __init setup_processor(void)
  351. {
  352. struct proc_info_list *list;
  353. /*
  354. * locate processor in the list of supported processor
  355. * types. The linker builds this table for us from the
  356. * entries in arch/arm/mm/proc-*.S
  357. */
  358. list = lookup_processor_type(read_cpuid_id());
  359. if (!list) {
  360. printk("CPU configuration botched (ID %08x), unable "
  361. "to continue.\n", read_cpuid_id());
  362. while (1);
  363. }
  364. cpu_name = list->cpu_name;
  365. #ifdef MULTI_CPU
  366. processor = *list->proc;
  367. #endif
  368. #ifdef MULTI_TLB
  369. cpu_tlb = *list->tlb;
  370. #endif
  371. #ifdef MULTI_USER
  372. cpu_user = *list->user;
  373. #endif
  374. #ifdef MULTI_CACHE
  375. cpu_cache = *list->cache;
  376. #endif
  377. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  378. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  379. proc_arch[cpu_architecture()], cr_alignment);
  380. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  381. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  382. elf_hwcap = list->elf_hwcap;
  383. #ifndef CONFIG_ARM_THUMB
  384. elf_hwcap &= ~HWCAP_THUMB;
  385. #endif
  386. feat_v6_fixup();
  387. cacheid_init();
  388. cpu_init();
  389. }
  390. void __init dump_machine_table(void)
  391. {
  392. struct machine_desc *p;
  393. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  394. for_each_machine_desc(p)
  395. early_print("%08x\t%s\n", p->nr, p->name);
  396. early_print("\nPlease check your kernel config and/or bootloader.\n");
  397. while (true)
  398. /* can't use cpu_relax() here as it may require MMU setup */;
  399. }
  400. int __init arm_add_memory(phys_addr_t start, unsigned long size)
  401. {
  402. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  403. if (meminfo.nr_banks >= NR_BANKS) {
  404. printk(KERN_CRIT "NR_BANKS too low, "
  405. "ignoring memory at 0x%08llx\n", (long long)start);
  406. return -EINVAL;
  407. }
  408. /*
  409. * Ensure that start/size are aligned to a page boundary.
  410. * Size is appropriately rounded down, start is rounded up.
  411. */
  412. size -= start & ~PAGE_MASK;
  413. bank->start = PAGE_ALIGN(start);
  414. bank->size = size & PAGE_MASK;
  415. /*
  416. * Check whether this memory region has non-zero size or
  417. * invalid node number.
  418. */
  419. if (bank->size == 0)
  420. return -EINVAL;
  421. meminfo.nr_banks++;
  422. return 0;
  423. }
  424. /*
  425. * Pick out the memory size. We look for mem=size@start,
  426. * where start and size are "size[KkMm]"
  427. */
  428. static int __init early_mem(char *p)
  429. {
  430. static int usermem __initdata = 0;
  431. unsigned long size;
  432. phys_addr_t start;
  433. char *endp;
  434. /*
  435. * If the user specifies memory size, we
  436. * blow away any automatically generated
  437. * size.
  438. */
  439. if (usermem == 0) {
  440. usermem = 1;
  441. meminfo.nr_banks = 0;
  442. }
  443. start = PHYS_OFFSET;
  444. size = memparse(p, &endp);
  445. if (*endp == '@')
  446. start = memparse(endp + 1, NULL);
  447. arm_add_memory(start, size);
  448. return 0;
  449. }
  450. early_param("mem", early_mem);
  451. static void __init
  452. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  453. {
  454. #ifdef CONFIG_BLK_DEV_RAM
  455. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  456. rd_image_start = image_start;
  457. rd_prompt = prompt;
  458. rd_doload = doload;
  459. if (rd_sz)
  460. rd_size = rd_sz;
  461. #endif
  462. }
  463. static void __init request_standard_resources(struct machine_desc *mdesc)
  464. {
  465. struct memblock_region *region;
  466. struct resource *res;
  467. kernel_code.start = virt_to_phys(_text);
  468. kernel_code.end = virt_to_phys(_etext - 1);
  469. kernel_data.start = virt_to_phys(_sdata);
  470. kernel_data.end = virt_to_phys(_end - 1);
  471. for_each_memblock(memory, region) {
  472. res = alloc_bootmem_low(sizeof(*res));
  473. res->name = "System RAM";
  474. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  475. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  476. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  477. request_resource(&iomem_resource, res);
  478. if (kernel_code.start >= res->start &&
  479. kernel_code.end <= res->end)
  480. request_resource(res, &kernel_code);
  481. if (kernel_data.start >= res->start &&
  482. kernel_data.end <= res->end)
  483. request_resource(res, &kernel_data);
  484. }
  485. if (mdesc->video_start) {
  486. video_ram.start = mdesc->video_start;
  487. video_ram.end = mdesc->video_end;
  488. request_resource(&iomem_resource, &video_ram);
  489. }
  490. /*
  491. * Some machines don't have the possibility of ever
  492. * possessing lp0, lp1 or lp2
  493. */
  494. if (mdesc->reserve_lp0)
  495. request_resource(&ioport_resource, &lp0);
  496. if (mdesc->reserve_lp1)
  497. request_resource(&ioport_resource, &lp1);
  498. if (mdesc->reserve_lp2)
  499. request_resource(&ioport_resource, &lp2);
  500. }
  501. /*
  502. * Tag parsing.
  503. *
  504. * This is the new way of passing data to the kernel at boot time. Rather
  505. * than passing a fixed inflexible structure to the kernel, we pass a list
  506. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  507. * tag for the list to be recognised (to distinguish the tagged list from
  508. * a param_struct). The list is terminated with a zero-length tag (this tag
  509. * is not parsed in any way).
  510. */
  511. static int __init parse_tag_core(const struct tag *tag)
  512. {
  513. if (tag->hdr.size > 2) {
  514. if ((tag->u.core.flags & 1) == 0)
  515. root_mountflags &= ~MS_RDONLY;
  516. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  517. }
  518. return 0;
  519. }
  520. __tagtable(ATAG_CORE, parse_tag_core);
  521. static int __init parse_tag_mem32(const struct tag *tag)
  522. {
  523. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  524. }
  525. __tagtable(ATAG_MEM, parse_tag_mem32);
  526. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  527. struct screen_info screen_info = {
  528. .orig_video_lines = 30,
  529. .orig_video_cols = 80,
  530. .orig_video_mode = 0,
  531. .orig_video_ega_bx = 0,
  532. .orig_video_isVGA = 1,
  533. .orig_video_points = 8
  534. };
  535. static int __init parse_tag_videotext(const struct tag *tag)
  536. {
  537. screen_info.orig_x = tag->u.videotext.x;
  538. screen_info.orig_y = tag->u.videotext.y;
  539. screen_info.orig_video_page = tag->u.videotext.video_page;
  540. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  541. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  542. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  543. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  544. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  545. screen_info.orig_video_points = tag->u.videotext.video_points;
  546. return 0;
  547. }
  548. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  549. #endif
  550. static int __init parse_tag_ramdisk(const struct tag *tag)
  551. {
  552. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  553. (tag->u.ramdisk.flags & 2) == 0,
  554. tag->u.ramdisk.start, tag->u.ramdisk.size);
  555. return 0;
  556. }
  557. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  558. static int __init parse_tag_serialnr(const struct tag *tag)
  559. {
  560. system_serial_low = tag->u.serialnr.low;
  561. system_serial_high = tag->u.serialnr.high;
  562. return 0;
  563. }
  564. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  565. static int __init parse_tag_revision(const struct tag *tag)
  566. {
  567. system_rev = tag->u.revision.rev;
  568. return 0;
  569. }
  570. __tagtable(ATAG_REVISION, parse_tag_revision);
  571. static int __init parse_tag_cmdline(const struct tag *tag)
  572. {
  573. #if defined(CONFIG_CMDLINE_EXTEND)
  574. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  575. strlcat(default_command_line, tag->u.cmdline.cmdline,
  576. COMMAND_LINE_SIZE);
  577. #elif defined(CONFIG_CMDLINE_FORCE)
  578. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  579. #else
  580. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  581. COMMAND_LINE_SIZE);
  582. #endif
  583. return 0;
  584. }
  585. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  586. /*
  587. * Scan the tag table for this tag, and call its parse function.
  588. * The tag table is built by the linker from all the __tagtable
  589. * declarations.
  590. */
  591. static int __init parse_tag(const struct tag *tag)
  592. {
  593. extern struct tagtable __tagtable_begin, __tagtable_end;
  594. struct tagtable *t;
  595. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  596. if (tag->hdr.tag == t->tag) {
  597. t->parse(tag);
  598. break;
  599. }
  600. return t < &__tagtable_end;
  601. }
  602. /*
  603. * Parse all tags in the list, checking both the global and architecture
  604. * specific tag tables.
  605. */
  606. static void __init parse_tags(const struct tag *t)
  607. {
  608. for (; t->hdr.size; t = tag_next(t))
  609. if (!parse_tag(t))
  610. printk(KERN_WARNING
  611. "Ignoring unrecognised tag 0x%08x\n",
  612. t->hdr.tag);
  613. }
  614. /*
  615. * This holds our defaults.
  616. */
  617. static struct init_tags {
  618. struct tag_header hdr1;
  619. struct tag_core core;
  620. struct tag_header hdr2;
  621. struct tag_mem32 mem;
  622. struct tag_header hdr3;
  623. } init_tags __initdata = {
  624. { tag_size(tag_core), ATAG_CORE },
  625. { 1, PAGE_SIZE, 0xff },
  626. { tag_size(tag_mem32), ATAG_MEM },
  627. { MEM_SIZE },
  628. { 0, ATAG_NONE }
  629. };
  630. static int __init customize_machine(void)
  631. {
  632. /* customizes platform devices, or adds new ones */
  633. if (machine_desc->init_machine)
  634. machine_desc->init_machine();
  635. return 0;
  636. }
  637. arch_initcall(customize_machine);
  638. #ifdef CONFIG_KEXEC
  639. static inline unsigned long long get_total_mem(void)
  640. {
  641. unsigned long total;
  642. total = max_low_pfn - min_low_pfn;
  643. return total << PAGE_SHIFT;
  644. }
  645. /**
  646. * reserve_crashkernel() - reserves memory are for crash kernel
  647. *
  648. * This function reserves memory area given in "crashkernel=" kernel command
  649. * line parameter. The memory reserved is used by a dump capture kernel when
  650. * primary kernel is crashing.
  651. */
  652. static void __init reserve_crashkernel(void)
  653. {
  654. unsigned long long crash_size, crash_base;
  655. unsigned long long total_mem;
  656. int ret;
  657. total_mem = get_total_mem();
  658. ret = parse_crashkernel(boot_command_line, total_mem,
  659. &crash_size, &crash_base);
  660. if (ret)
  661. return;
  662. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  663. if (ret < 0) {
  664. printk(KERN_WARNING "crashkernel reservation failed - "
  665. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  666. return;
  667. }
  668. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  669. "for crashkernel (System RAM: %ldMB)\n",
  670. (unsigned long)(crash_size >> 20),
  671. (unsigned long)(crash_base >> 20),
  672. (unsigned long)(total_mem >> 20));
  673. crashk_res.start = crash_base;
  674. crashk_res.end = crash_base + crash_size - 1;
  675. insert_resource(&iomem_resource, &crashk_res);
  676. }
  677. #else
  678. static inline void reserve_crashkernel(void) {}
  679. #endif /* CONFIG_KEXEC */
  680. static void __init squash_mem_tags(struct tag *tag)
  681. {
  682. for (; tag->hdr.size; tag = tag_next(tag))
  683. if (tag->hdr.tag == ATAG_MEM)
  684. tag->hdr.tag = ATAG_NONE;
  685. }
  686. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  687. {
  688. struct tag *tags = (struct tag *)&init_tags;
  689. struct machine_desc *mdesc = NULL, *p;
  690. char *from = default_command_line;
  691. init_tags.mem.start = PHYS_OFFSET;
  692. /*
  693. * locate machine in the list of supported machines.
  694. */
  695. for_each_machine_desc(p)
  696. if (nr == p->nr) {
  697. printk("Machine: %s\n", p->name);
  698. mdesc = p;
  699. break;
  700. }
  701. if (!mdesc) {
  702. early_print("\nError: unrecognized/unsupported machine ID"
  703. " (r1 = 0x%08x).\n\n", nr);
  704. dump_machine_table(); /* does not return */
  705. }
  706. if (__atags_pointer)
  707. tags = phys_to_virt(__atags_pointer);
  708. else if (mdesc->atag_offset)
  709. tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
  710. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  711. /*
  712. * If we have the old style parameters, convert them to
  713. * a tag list.
  714. */
  715. if (tags->hdr.tag != ATAG_CORE)
  716. convert_to_tag_list(tags);
  717. #endif
  718. if (tags->hdr.tag != ATAG_CORE) {
  719. #if defined(CONFIG_OF)
  720. /*
  721. * If CONFIG_OF is set, then assume this is a reasonably
  722. * modern system that should pass boot parameters
  723. */
  724. early_print("Warning: Neither atags nor dtb found\n");
  725. #endif
  726. tags = (struct tag *)&init_tags;
  727. }
  728. if (mdesc->fixup)
  729. mdesc->fixup(mdesc, tags, &from, &meminfo);
  730. if (tags->hdr.tag == ATAG_CORE) {
  731. if (meminfo.nr_banks != 0)
  732. squash_mem_tags(tags);
  733. save_atags(tags);
  734. parse_tags(tags);
  735. }
  736. /* parse_early_param needs a boot_command_line */
  737. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  738. return mdesc;
  739. }
  740. void __init setup_arch(char **cmdline_p)
  741. {
  742. struct machine_desc *mdesc;
  743. unwind_init();
  744. setup_processor();
  745. mdesc = setup_machine_fdt(__atags_pointer);
  746. if (!mdesc)
  747. mdesc = setup_machine_tags(machine_arch_type);
  748. machine_desc = mdesc;
  749. machine_name = mdesc->name;
  750. if (mdesc->soft_reboot)
  751. reboot_setup("s");
  752. init_mm.start_code = (unsigned long) _text;
  753. init_mm.end_code = (unsigned long) _etext;
  754. init_mm.end_data = (unsigned long) _edata;
  755. init_mm.brk = (unsigned long) _end;
  756. /* populate cmd_line too for later use, preserving boot_command_line */
  757. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  758. *cmdline_p = cmd_line;
  759. parse_early_param();
  760. sanity_check_meminfo();
  761. arm_memblock_init(&meminfo, mdesc);
  762. paging_init(mdesc);
  763. request_standard_resources(mdesc);
  764. unflatten_device_tree();
  765. #ifdef CONFIG_SMP
  766. if (is_smp())
  767. smp_init_cpus();
  768. #endif
  769. reserve_crashkernel();
  770. tcm_init();
  771. #ifdef CONFIG_ZONE_DMA
  772. if (mdesc->dma_zone_size) {
  773. extern unsigned long arm_dma_zone_size;
  774. arm_dma_zone_size = mdesc->dma_zone_size;
  775. }
  776. #endif
  777. #ifdef CONFIG_MULTI_IRQ_HANDLER
  778. handle_arch_irq = mdesc->handle_irq;
  779. #endif
  780. #ifdef CONFIG_VT
  781. #if defined(CONFIG_VGA_CONSOLE)
  782. conswitchp = &vga_con;
  783. #elif defined(CONFIG_DUMMY_CONSOLE)
  784. conswitchp = &dummy_con;
  785. #endif
  786. #endif
  787. early_trap_init();
  788. if (mdesc->init_early)
  789. mdesc->init_early();
  790. }
  791. static int __init topology_init(void)
  792. {
  793. int cpu;
  794. for_each_possible_cpu(cpu) {
  795. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  796. cpuinfo->cpu.hotpluggable = 1;
  797. register_cpu(&cpuinfo->cpu, cpu);
  798. }
  799. return 0;
  800. }
  801. subsys_initcall(topology_init);
  802. #ifdef CONFIG_HAVE_PROC_CPU
  803. static int __init proc_cpu_init(void)
  804. {
  805. struct proc_dir_entry *res;
  806. res = proc_mkdir("cpu", NULL);
  807. if (!res)
  808. return -ENOMEM;
  809. return 0;
  810. }
  811. fs_initcall(proc_cpu_init);
  812. #endif
  813. static const char *hwcap_str[] = {
  814. "swp",
  815. "half",
  816. "thumb",
  817. "26bit",
  818. "fastmult",
  819. "fpa",
  820. "vfp",
  821. "edsp",
  822. "java",
  823. "iwmmxt",
  824. "crunch",
  825. "thumbee",
  826. "neon",
  827. "vfpv3",
  828. "vfpv3d16",
  829. "tls",
  830. "vfpv4",
  831. "idiva",
  832. "idivt",
  833. NULL
  834. };
  835. static int c_show(struct seq_file *m, void *v)
  836. {
  837. int i;
  838. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  839. cpu_name, read_cpuid_id() & 15, elf_platform);
  840. #if defined(CONFIG_SMP)
  841. for_each_online_cpu(i) {
  842. /*
  843. * glibc reads /proc/cpuinfo to determine the number of
  844. * online processors, looking for lines beginning with
  845. * "processor". Give glibc what it expects.
  846. */
  847. seq_printf(m, "processor\t: %d\n", i);
  848. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  849. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  850. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  851. }
  852. #else /* CONFIG_SMP */
  853. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  854. loops_per_jiffy / (500000/HZ),
  855. (loops_per_jiffy / (5000/HZ)) % 100);
  856. #endif
  857. /* dump out the processor features */
  858. seq_puts(m, "Features\t: ");
  859. for (i = 0; hwcap_str[i]; i++)
  860. if (elf_hwcap & (1 << i))
  861. seq_printf(m, "%s ", hwcap_str[i]);
  862. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  863. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  864. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  865. /* pre-ARM7 */
  866. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  867. } else {
  868. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  869. /* ARM7 */
  870. seq_printf(m, "CPU variant\t: 0x%02x\n",
  871. (read_cpuid_id() >> 16) & 127);
  872. } else {
  873. /* post-ARM7 */
  874. seq_printf(m, "CPU variant\t: 0x%x\n",
  875. (read_cpuid_id() >> 20) & 15);
  876. }
  877. seq_printf(m, "CPU part\t: 0x%03x\n",
  878. (read_cpuid_id() >> 4) & 0xfff);
  879. }
  880. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  881. seq_puts(m, "\n");
  882. seq_printf(m, "Hardware\t: %s\n", machine_name);
  883. seq_printf(m, "Revision\t: %04x\n", system_rev);
  884. seq_printf(m, "Serial\t\t: %08x%08x\n",
  885. system_serial_high, system_serial_low);
  886. return 0;
  887. }
  888. static void *c_start(struct seq_file *m, loff_t *pos)
  889. {
  890. return *pos < 1 ? (void *)1 : NULL;
  891. }
  892. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  893. {
  894. ++*pos;
  895. return NULL;
  896. }
  897. static void c_stop(struct seq_file *m, void *v)
  898. {
  899. }
  900. const struct seq_operations cpuinfo_op = {
  901. .start = c_start,
  902. .next = c_next,
  903. .stop = c_stop,
  904. .show = c_show
  905. };