Kconfig 63 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if !XIP_KERNEL
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. select HAVE_GENERIC_HARDIRQS
  30. select HAVE_SPARSE_IRQ
  31. select GENERIC_IRQ_SHOW
  32. select CPU_PM if (SUSPEND || CPU_IDLE)
  33. help
  34. The ARM series is a line of low-power-consumption RISC chip designs
  35. licensed by ARM Ltd and targeted at embedded applications and
  36. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  37. manufactured, but legacy ARM-based PC hardware remains popular in
  38. Europe. There is an ARM Linux project with a web page at
  39. <http://www.arm.linux.org.uk/>.
  40. config ARM_HAS_SG_CHAIN
  41. bool
  42. config HAVE_PWM
  43. bool
  44. config MIGHT_HAVE_PCI
  45. bool
  46. config SYS_SUPPORTS_APM_EMULATION
  47. bool
  48. config HAVE_SCHED_CLOCK
  49. bool
  50. config GENERIC_GPIO
  51. bool
  52. config ARCH_USES_GETTIMEOFFSET
  53. bool
  54. default n
  55. config GENERIC_CLOCKEVENTS
  56. bool
  57. config GENERIC_CLOCKEVENTS_BROADCAST
  58. bool
  59. depends on GENERIC_CLOCKEVENTS
  60. default y if SMP
  61. config KTIME_SCALAR
  62. bool
  63. default y
  64. config HAVE_TCM
  65. bool
  66. select GENERIC_ALLOCATOR
  67. config HAVE_PROC_CPU
  68. bool
  69. config NO_IOPORT
  70. bool
  71. config EISA
  72. bool
  73. ---help---
  74. The Extended Industry Standard Architecture (EISA) bus was
  75. developed as an open alternative to the IBM MicroChannel bus.
  76. The EISA bus provided some of the features of the IBM MicroChannel
  77. bus while maintaining backward compatibility with cards made for
  78. the older ISA bus. The EISA bus saw limited use between 1988 and
  79. 1995 when it was made obsolete by the PCI bus.
  80. Say Y here if you are building a kernel for an EISA-based machine.
  81. Otherwise, say N.
  82. config SBUS
  83. bool
  84. config MCA
  85. bool
  86. help
  87. MicroChannel Architecture is found in some IBM PS/2 machines and
  88. laptops. It is a bus system similar to PCI or ISA. See
  89. <file:Documentation/mca.txt> (and especially the web page given
  90. there) before attempting to build an MCA bus kernel.
  91. config STACKTRACE_SUPPORT
  92. bool
  93. default y
  94. config HAVE_LATENCYTOP_SUPPORT
  95. bool
  96. depends on !SMP
  97. default y
  98. config LOCKDEP_SUPPORT
  99. bool
  100. default y
  101. config TRACE_IRQFLAGS_SUPPORT
  102. bool
  103. default y
  104. config HARDIRQS_SW_RESEND
  105. bool
  106. default y
  107. config GENERIC_IRQ_PROBE
  108. bool
  109. default y
  110. config GENERIC_LOCKBREAK
  111. bool
  112. default y
  113. depends on SMP && PREEMPT
  114. config RWSEM_GENERIC_SPINLOCK
  115. bool
  116. default y
  117. config RWSEM_XCHGADD_ALGORITHM
  118. bool
  119. config ARCH_HAS_ILOG2_U32
  120. bool
  121. config ARCH_HAS_ILOG2_U64
  122. bool
  123. config ARCH_HAS_CPUFREQ
  124. bool
  125. help
  126. Internal node to signify that the ARCH has CPUFREQ support
  127. and that the relevant menu configurations are displayed for
  128. it.
  129. config ARCH_HAS_CPU_IDLE_WAIT
  130. def_bool y
  131. config GENERIC_HWEIGHT
  132. bool
  133. default y
  134. config GENERIC_CALIBRATE_DELAY
  135. bool
  136. default y
  137. config ARCH_MAY_HAVE_PC_FDC
  138. bool
  139. config ZONE_DMA
  140. bool
  141. config NEED_DMA_MAP_STATE
  142. def_bool y
  143. config GENERIC_ISA_DMA
  144. bool
  145. config FIQ
  146. bool
  147. config ARCH_MTD_XIP
  148. bool
  149. config VECTORS_BASE
  150. hex
  151. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  152. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  153. default 0x00000000
  154. help
  155. The base address of exception vectors.
  156. config ARM_PATCH_PHYS_VIRT
  157. bool "Patch physical to virtual translations at runtime" if EMBEDDED
  158. default y
  159. depends on !XIP_KERNEL && MMU
  160. depends on !ARCH_REALVIEW || !SPARSEMEM
  161. help
  162. Patch phys-to-virt and virt-to-phys translation functions at
  163. boot and module load time according to the position of the
  164. kernel in system memory.
  165. This can only be used with non-XIP MMU kernels where the base
  166. of physical memory is at a 16MB boundary.
  167. Only disable this option if you know that you do not require
  168. this feature (eg, building a kernel for a single machine) and
  169. you need to shrink the kernel to the minimal size.
  170. config NEED_MACH_MEMORY_H
  171. bool
  172. help
  173. Select this when mach/memory.h is required to provide special
  174. definitions for this platform. The need for mach/memory.h should
  175. be avoided when possible.
  176. config PHYS_OFFSET
  177. hex "Physical address of main memory"
  178. depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
  179. help
  180. Please provide the physical address corresponding to the
  181. location of main memory in your system.
  182. source "init/Kconfig"
  183. source "kernel/Kconfig.freezer"
  184. menu "System Type"
  185. config MMU
  186. bool "MMU-based Paged Memory Management Support"
  187. default y
  188. help
  189. Select if you want MMU-based virtualised addressing space
  190. support by paged memory management. If unsure, say 'Y'.
  191. #
  192. # The "ARM system type" choice list is ordered alphabetically by option
  193. # text. Please add new entries in the option alphabetic order.
  194. #
  195. choice
  196. prompt "ARM system type"
  197. default ARCH_VERSATILE
  198. config ARCH_INTEGRATOR
  199. bool "ARM Ltd. Integrator family"
  200. select ARM_AMBA
  201. select ARCH_HAS_CPUFREQ
  202. select CLKDEV_LOOKUP
  203. select HAVE_MACH_CLKDEV
  204. select ICST
  205. select GENERIC_CLOCKEVENTS
  206. select PLAT_VERSATILE
  207. select PLAT_VERSATILE_FPGA_IRQ
  208. select NEED_MACH_MEMORY_H
  209. help
  210. Support for ARM's Integrator platform.
  211. config ARCH_REALVIEW
  212. bool "ARM Ltd. RealView family"
  213. select ARM_AMBA
  214. select CLKDEV_LOOKUP
  215. select HAVE_MACH_CLKDEV
  216. select ICST
  217. select GENERIC_CLOCKEVENTS
  218. select ARCH_WANT_OPTIONAL_GPIOLIB
  219. select PLAT_VERSATILE
  220. select PLAT_VERSATILE_CLCD
  221. select ARM_TIMER_SP804
  222. select GPIO_PL061 if GPIOLIB
  223. select NEED_MACH_MEMORY_H
  224. help
  225. This enables support for ARM Ltd RealView boards.
  226. config ARCH_VERSATILE
  227. bool "ARM Ltd. Versatile family"
  228. select ARM_AMBA
  229. select ARM_VIC
  230. select CLKDEV_LOOKUP
  231. select HAVE_MACH_CLKDEV
  232. select ICST
  233. select GENERIC_CLOCKEVENTS
  234. select ARCH_WANT_OPTIONAL_GPIOLIB
  235. select PLAT_VERSATILE
  236. select PLAT_VERSATILE_CLCD
  237. select PLAT_VERSATILE_FPGA_IRQ
  238. select ARM_TIMER_SP804
  239. help
  240. This enables support for ARM Ltd Versatile board.
  241. config ARCH_VEXPRESS
  242. bool "ARM Ltd. Versatile Express family"
  243. select ARCH_WANT_OPTIONAL_GPIOLIB
  244. select ARM_AMBA
  245. select ARM_TIMER_SP804
  246. select CLKDEV_LOOKUP
  247. select HAVE_MACH_CLKDEV
  248. select GENERIC_CLOCKEVENTS
  249. select HAVE_CLK
  250. select HAVE_PATA_PLATFORM
  251. select ICST
  252. select PLAT_VERSATILE
  253. select PLAT_VERSATILE_CLCD
  254. help
  255. This enables support for the ARM Ltd Versatile Express boards.
  256. config ARCH_AT91
  257. bool "Atmel AT91"
  258. select ARCH_REQUIRE_GPIOLIB
  259. select HAVE_CLK
  260. select CLKDEV_LOOKUP
  261. help
  262. This enables support for systems based on the Atmel AT91RM9200,
  263. AT91SAM9 and AT91CAP9 processors.
  264. config ARCH_BCMRING
  265. bool "Broadcom BCMRING"
  266. depends on MMU
  267. select CPU_V6
  268. select ARM_AMBA
  269. select ARM_TIMER_SP804
  270. select CLKDEV_LOOKUP
  271. select GENERIC_CLOCKEVENTS
  272. select ARCH_WANT_OPTIONAL_GPIOLIB
  273. help
  274. Support for Broadcom's BCMRing platform.
  275. config ARCH_CLPS711X
  276. bool "Cirrus Logic CLPS711x/EP721x-based"
  277. select CPU_ARM720T
  278. select ARCH_USES_GETTIMEOFFSET
  279. select NEED_MACH_MEMORY_H
  280. help
  281. Support for Cirrus Logic 711x/721x based boards.
  282. config ARCH_CNS3XXX
  283. bool "Cavium Networks CNS3XXX family"
  284. select CPU_V6K
  285. select GENERIC_CLOCKEVENTS
  286. select ARM_GIC
  287. select MIGHT_HAVE_PCI
  288. select PCI_DOMAINS if PCI
  289. help
  290. Support for Cavium Networks CNS3XXX platform.
  291. config ARCH_GEMINI
  292. bool "Cortina Systems Gemini"
  293. select CPU_FA526
  294. select ARCH_REQUIRE_GPIOLIB
  295. select ARCH_USES_GETTIMEOFFSET
  296. help
  297. Support for the Cortina Systems Gemini family SoCs
  298. config ARCH_PRIMA2
  299. bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
  300. select CPU_V7
  301. select GENERIC_TIME
  302. select NO_IOPORT
  303. select GENERIC_CLOCKEVENTS
  304. select CLKDEV_LOOKUP
  305. select GENERIC_IRQ_CHIP
  306. select USE_OF
  307. select ZONE_DMA
  308. help
  309. Support for CSR SiRFSoC ARM Cortex A9 Platform
  310. config ARCH_EBSA110
  311. bool "EBSA-110"
  312. select CPU_SA110
  313. select ISA
  314. select NO_IOPORT
  315. select ARCH_USES_GETTIMEOFFSET
  316. select NEED_MACH_MEMORY_H
  317. help
  318. This is an evaluation board for the StrongARM processor available
  319. from Digital. It has limited hardware on-board, including an
  320. Ethernet interface, two PCMCIA sockets, two serial ports and a
  321. parallel port.
  322. config ARCH_EP93XX
  323. bool "EP93xx-based"
  324. select CPU_ARM920T
  325. select ARM_AMBA
  326. select ARM_VIC
  327. select CLKDEV_LOOKUP
  328. select ARCH_REQUIRE_GPIOLIB
  329. select ARCH_HAS_HOLES_MEMORYMODEL
  330. select ARCH_USES_GETTIMEOFFSET
  331. select NEED_MEMORY_H
  332. help
  333. This enables support for the Cirrus EP93xx series of CPUs.
  334. config ARCH_FOOTBRIDGE
  335. bool "FootBridge"
  336. select CPU_SA110
  337. select FOOTBRIDGE
  338. select GENERIC_CLOCKEVENTS
  339. select NEED_MACH_MEMORY_H
  340. help
  341. Support for systems based on the DC21285 companion chip
  342. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  343. config ARCH_MXC
  344. bool "Freescale MXC/iMX-based"
  345. select GENERIC_CLOCKEVENTS
  346. select ARCH_REQUIRE_GPIOLIB
  347. select CLKDEV_LOOKUP
  348. select CLKSRC_MMIO
  349. select GENERIC_IRQ_CHIP
  350. select HAVE_SCHED_CLOCK
  351. help
  352. Support for Freescale MXC/iMX-based family of processors
  353. config ARCH_MXS
  354. bool "Freescale MXS-based"
  355. select GENERIC_CLOCKEVENTS
  356. select ARCH_REQUIRE_GPIOLIB
  357. select CLKDEV_LOOKUP
  358. select CLKSRC_MMIO
  359. help
  360. Support for Freescale MXS-based family of processors
  361. config ARCH_NETX
  362. bool "Hilscher NetX based"
  363. select CLKSRC_MMIO
  364. select CPU_ARM926T
  365. select ARM_VIC
  366. select GENERIC_CLOCKEVENTS
  367. help
  368. This enables support for systems based on the Hilscher NetX Soc
  369. config ARCH_H720X
  370. bool "Hynix HMS720x-based"
  371. select CPU_ARM720T
  372. select ISA_DMA_API
  373. select ARCH_USES_GETTIMEOFFSET
  374. help
  375. This enables support for systems based on the Hynix HMS720x
  376. config ARCH_IOP13XX
  377. bool "IOP13xx-based"
  378. depends on MMU
  379. select CPU_XSC3
  380. select PLAT_IOP
  381. select PCI
  382. select ARCH_SUPPORTS_MSI
  383. select VMSPLIT_1G
  384. select NEED_MACH_MEMORY_H
  385. help
  386. Support for Intel's IOP13XX (XScale) family of processors.
  387. config ARCH_IOP32X
  388. bool "IOP32x-based"
  389. depends on MMU
  390. select CPU_XSCALE
  391. select PLAT_IOP
  392. select PCI
  393. select ARCH_REQUIRE_GPIOLIB
  394. help
  395. Support for Intel's 80219 and IOP32X (XScale) family of
  396. processors.
  397. config ARCH_IOP33X
  398. bool "IOP33x-based"
  399. depends on MMU
  400. select CPU_XSCALE
  401. select PLAT_IOP
  402. select PCI
  403. select ARCH_REQUIRE_GPIOLIB
  404. help
  405. Support for Intel's IOP33X (XScale) family of processors.
  406. config ARCH_IXP23XX
  407. bool "IXP23XX-based"
  408. depends on MMU
  409. select CPU_XSC3
  410. select PCI
  411. select ARCH_USES_GETTIMEOFFSET
  412. select NEED_MACH_MEMORY_H
  413. help
  414. Support for Intel's IXP23xx (XScale) family of processors.
  415. config ARCH_IXP2000
  416. bool "IXP2400/2800-based"
  417. depends on MMU
  418. select CPU_XSCALE
  419. select PCI
  420. select ARCH_USES_GETTIMEOFFSET
  421. select NEED_MACH_MEMORY_H
  422. help
  423. Support for Intel's IXP2400/2800 (XScale) family of processors.
  424. config ARCH_IXP4XX
  425. bool "IXP4xx-based"
  426. depends on MMU
  427. select CLKSRC_MMIO
  428. select CPU_XSCALE
  429. select GENERIC_GPIO
  430. select GENERIC_CLOCKEVENTS
  431. select HAVE_SCHED_CLOCK
  432. select MIGHT_HAVE_PCI
  433. select DMABOUNCE if PCI
  434. help
  435. Support for Intel's IXP4XX (XScale) family of processors.
  436. config ARCH_DOVE
  437. bool "Marvell Dove"
  438. select CPU_V7
  439. select PCI
  440. select ARCH_REQUIRE_GPIOLIB
  441. select GENERIC_CLOCKEVENTS
  442. select PLAT_ORION
  443. help
  444. Support for the Marvell Dove SoC 88AP510
  445. config ARCH_KIRKWOOD
  446. bool "Marvell Kirkwood"
  447. select CPU_FEROCEON
  448. select PCI
  449. select ARCH_REQUIRE_GPIOLIB
  450. select GENERIC_CLOCKEVENTS
  451. select PLAT_ORION
  452. help
  453. Support for the following Marvell Kirkwood series SoCs:
  454. 88F6180, 88F6192 and 88F6281.
  455. config ARCH_LPC32XX
  456. bool "NXP LPC32XX"
  457. select CLKSRC_MMIO
  458. select CPU_ARM926T
  459. select ARCH_REQUIRE_GPIOLIB
  460. select HAVE_IDE
  461. select ARM_AMBA
  462. select USB_ARCH_HAS_OHCI
  463. select CLKDEV_LOOKUP
  464. select GENERIC_TIME
  465. select GENERIC_CLOCKEVENTS
  466. help
  467. Support for the NXP LPC32XX family of processors
  468. config ARCH_MV78XX0
  469. bool "Marvell MV78xx0"
  470. select CPU_FEROCEON
  471. select PCI
  472. select ARCH_REQUIRE_GPIOLIB
  473. select GENERIC_CLOCKEVENTS
  474. select PLAT_ORION
  475. help
  476. Support for the following Marvell MV78xx0 series SoCs:
  477. MV781x0, MV782x0.
  478. config ARCH_ORION5X
  479. bool "Marvell Orion"
  480. depends on MMU
  481. select CPU_FEROCEON
  482. select PCI
  483. select ARCH_REQUIRE_GPIOLIB
  484. select GENERIC_CLOCKEVENTS
  485. select PLAT_ORION
  486. help
  487. Support for the following Marvell Orion 5x series SoCs:
  488. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  489. Orion-2 (5281), Orion-1-90 (6183).
  490. config ARCH_MMP
  491. bool "Marvell PXA168/910/MMP2"
  492. depends on MMU
  493. select ARCH_REQUIRE_GPIOLIB
  494. select CLKDEV_LOOKUP
  495. select GENERIC_CLOCKEVENTS
  496. select HAVE_SCHED_CLOCK
  497. select TICK_ONESHOT
  498. select PLAT_PXA
  499. select SPARSE_IRQ
  500. help
  501. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  502. config ARCH_KS8695
  503. bool "Micrel/Kendin KS8695"
  504. select CPU_ARM922T
  505. select ARCH_REQUIRE_GPIOLIB
  506. select ARCH_USES_GETTIMEOFFSET
  507. select NEED_MACH_MEMORY_H
  508. help
  509. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  510. System-on-Chip devices.
  511. config ARCH_W90X900
  512. bool "Nuvoton W90X900 CPU"
  513. select CPU_ARM926T
  514. select ARCH_REQUIRE_GPIOLIB
  515. select CLKDEV_LOOKUP
  516. select CLKSRC_MMIO
  517. select GENERIC_CLOCKEVENTS
  518. help
  519. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  520. At present, the w90x900 has been renamed nuc900, regarding
  521. the ARM series product line, you can login the following
  522. link address to know more.
  523. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  524. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  525. config ARCH_NUC93X
  526. bool "Nuvoton NUC93X CPU"
  527. select CPU_ARM926T
  528. select CLKDEV_LOOKUP
  529. help
  530. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  531. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  532. config ARCH_TEGRA
  533. bool "NVIDIA Tegra"
  534. select CLKDEV_LOOKUP
  535. select CLKSRC_MMIO
  536. select GENERIC_TIME
  537. select GENERIC_CLOCKEVENTS
  538. select GENERIC_GPIO
  539. select HAVE_CLK
  540. select HAVE_SCHED_CLOCK
  541. select ARCH_HAS_CPUFREQ
  542. help
  543. This enables support for NVIDIA Tegra based systems (Tegra APX,
  544. Tegra 6xx and Tegra 2 series).
  545. config ARCH_PNX4008
  546. bool "Philips Nexperia PNX4008 Mobile"
  547. select CPU_ARM926T
  548. select CLKDEV_LOOKUP
  549. select ARCH_USES_GETTIMEOFFSET
  550. help
  551. This enables support for Philips PNX4008 mobile platform.
  552. config ARCH_PXA
  553. bool "PXA2xx/PXA3xx-based"
  554. depends on MMU
  555. select ARCH_MTD_XIP
  556. select ARCH_HAS_CPUFREQ
  557. select CLKDEV_LOOKUP
  558. select CLKSRC_MMIO
  559. select ARCH_REQUIRE_GPIOLIB
  560. select GENERIC_CLOCKEVENTS
  561. select HAVE_SCHED_CLOCK
  562. select TICK_ONESHOT
  563. select PLAT_PXA
  564. select SPARSE_IRQ
  565. select AUTO_ZRELADDR
  566. select MULTI_IRQ_HANDLER
  567. help
  568. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  569. config ARCH_MSM
  570. bool "Qualcomm MSM"
  571. select HAVE_CLK
  572. select GENERIC_CLOCKEVENTS
  573. select ARCH_REQUIRE_GPIOLIB
  574. select CLKDEV_LOOKUP
  575. help
  576. Support for Qualcomm MSM/QSD based systems. This runs on the
  577. apps processor of the MSM/QSD and depends on a shared memory
  578. interface to the modem processor which runs the baseband
  579. stack and controls some vital subsystems
  580. (clock and power control, etc).
  581. config ARCH_SHMOBILE
  582. bool "Renesas SH-Mobile / R-Mobile"
  583. select HAVE_CLK
  584. select CLKDEV_LOOKUP
  585. select HAVE_MACH_CLKDEV
  586. select GENERIC_CLOCKEVENTS
  587. select NO_IOPORT
  588. select SPARSE_IRQ
  589. select MULTI_IRQ_HANDLER
  590. select PM_GENERIC_DOMAINS if PM
  591. select NEED_MACH_MEMORY_H
  592. help
  593. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  594. config ARCH_RPC
  595. bool "RiscPC"
  596. select ARCH_ACORN
  597. select FIQ
  598. select TIMER_ACORN
  599. select ARCH_MAY_HAVE_PC_FDC
  600. select HAVE_PATA_PLATFORM
  601. select ISA_DMA_API
  602. select NO_IOPORT
  603. select ARCH_SPARSEMEM_ENABLE
  604. select ARCH_USES_GETTIMEOFFSET
  605. select NEED_MACH_MEMORY_H
  606. help
  607. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  608. CD-ROM interface, serial and parallel port, and the floppy drive.
  609. config ARCH_SA1100
  610. bool "SA1100-based"
  611. select CLKSRC_MMIO
  612. select CPU_SA1100
  613. select ISA
  614. select ARCH_SPARSEMEM_ENABLE
  615. select ARCH_MTD_XIP
  616. select ARCH_HAS_CPUFREQ
  617. select CPU_FREQ
  618. select GENERIC_CLOCKEVENTS
  619. select HAVE_CLK
  620. select HAVE_SCHED_CLOCK
  621. select TICK_ONESHOT
  622. select ARCH_REQUIRE_GPIOLIB
  623. select NEED_MACH_MEMORY_H
  624. help
  625. Support for StrongARM 11x0 based boards.
  626. config ARCH_S3C2410
  627. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  628. select GENERIC_GPIO
  629. select ARCH_HAS_CPUFREQ
  630. select HAVE_CLK
  631. select CLKDEV_LOOKUP
  632. select ARCH_USES_GETTIMEOFFSET
  633. select HAVE_S3C2410_I2C if I2C
  634. help
  635. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  636. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  637. the Samsung SMDK2410 development board (and derivatives).
  638. Note, the S3C2416 and the S3C2450 are so close that they even share
  639. the same SoC ID code. This means that there is no separate machine
  640. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  641. config ARCH_S3C64XX
  642. bool "Samsung S3C64XX"
  643. select PLAT_SAMSUNG
  644. select CPU_V6
  645. select ARM_VIC
  646. select HAVE_CLK
  647. select CLKDEV_LOOKUP
  648. select NO_IOPORT
  649. select ARCH_USES_GETTIMEOFFSET
  650. select ARCH_HAS_CPUFREQ
  651. select ARCH_REQUIRE_GPIOLIB
  652. select SAMSUNG_CLKSRC
  653. select SAMSUNG_IRQ_VIC_TIMER
  654. select SAMSUNG_IRQ_UART
  655. select S3C_GPIO_TRACK
  656. select S3C_GPIO_PULL_UPDOWN
  657. select S3C_GPIO_CFG_S3C24XX
  658. select S3C_GPIO_CFG_S3C64XX
  659. select S3C_DEV_NAND
  660. select USB_ARCH_HAS_OHCI
  661. select SAMSUNG_GPIOLIB_4BIT
  662. select HAVE_S3C2410_I2C if I2C
  663. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  664. help
  665. Samsung S3C64XX series based systems
  666. config ARCH_S5P64X0
  667. bool "Samsung S5P6440 S5P6450"
  668. select CPU_V6
  669. select GENERIC_GPIO
  670. select HAVE_CLK
  671. select CLKDEV_LOOKUP
  672. select CLKSRC_MMIO
  673. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  674. select GENERIC_CLOCKEVENTS
  675. select HAVE_SCHED_CLOCK
  676. select HAVE_S3C2410_I2C if I2C
  677. select HAVE_S3C_RTC if RTC_CLASS
  678. help
  679. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  680. SMDK6450.
  681. config ARCH_S5PC100
  682. bool "Samsung S5PC100"
  683. select GENERIC_GPIO
  684. select HAVE_CLK
  685. select CLKDEV_LOOKUP
  686. select CPU_V7
  687. select ARM_L1_CACHE_SHIFT_6
  688. select ARCH_USES_GETTIMEOFFSET
  689. select HAVE_S3C2410_I2C if I2C
  690. select HAVE_S3C_RTC if RTC_CLASS
  691. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  692. help
  693. Samsung S5PC100 series based systems
  694. config ARCH_S5PV210
  695. bool "Samsung S5PV210/S5PC110"
  696. select CPU_V7
  697. select ARCH_SPARSEMEM_ENABLE
  698. select ARCH_HAS_HOLES_MEMORYMODEL
  699. select GENERIC_GPIO
  700. select HAVE_CLK
  701. select CLKDEV_LOOKUP
  702. select CLKSRC_MMIO
  703. select ARM_L1_CACHE_SHIFT_6
  704. select ARCH_HAS_CPUFREQ
  705. select GENERIC_CLOCKEVENTS
  706. select HAVE_SCHED_CLOCK
  707. select HAVE_S3C2410_I2C if I2C
  708. select HAVE_S3C_RTC if RTC_CLASS
  709. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  710. select NEED_MACH_MEMORY_H
  711. help
  712. Samsung S5PV210/S5PC110 series based systems
  713. config ARCH_EXYNOS4
  714. bool "Samsung EXYNOS4"
  715. select CPU_V7
  716. select ARCH_SPARSEMEM_ENABLE
  717. select ARCH_HAS_HOLES_MEMORYMODEL
  718. select GENERIC_GPIO
  719. select HAVE_CLK
  720. select CLKDEV_LOOKUP
  721. select ARCH_HAS_CPUFREQ
  722. select GENERIC_CLOCKEVENTS
  723. select HAVE_S3C_RTC if RTC_CLASS
  724. select HAVE_S3C2410_I2C if I2C
  725. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  726. select NEED_MACH_MEMORY_H
  727. help
  728. Samsung EXYNOS4 series based systems
  729. config ARCH_SHARK
  730. bool "Shark"
  731. select CPU_SA110
  732. select ISA
  733. select ISA_DMA
  734. select ZONE_DMA
  735. select PCI
  736. select ARCH_USES_GETTIMEOFFSET
  737. select NEED_MACH_MEMORY_H
  738. help
  739. Support for the StrongARM based Digital DNARD machine, also known
  740. as "Shark" (<http://www.shark-linux.de/shark.html>).
  741. config ARCH_TCC_926
  742. bool "Telechips TCC ARM926-based systems"
  743. select CLKSRC_MMIO
  744. select CPU_ARM926T
  745. select HAVE_CLK
  746. select CLKDEV_LOOKUP
  747. select GENERIC_CLOCKEVENTS
  748. help
  749. Support for Telechips TCC ARM926-based systems.
  750. config ARCH_U300
  751. bool "ST-Ericsson U300 Series"
  752. depends on MMU
  753. select CLKSRC_MMIO
  754. select CPU_ARM926T
  755. select HAVE_SCHED_CLOCK
  756. select HAVE_TCM
  757. select ARM_AMBA
  758. select ARM_VIC
  759. select GENERIC_CLOCKEVENTS
  760. select CLKDEV_LOOKUP
  761. select HAVE_MACH_CLKDEV
  762. select GENERIC_GPIO
  763. select NEED_MACH_MEMORY_H
  764. help
  765. Support for ST-Ericsson U300 series mobile platforms.
  766. config ARCH_U8500
  767. bool "ST-Ericsson U8500 Series"
  768. select CPU_V7
  769. select ARM_AMBA
  770. select GENERIC_CLOCKEVENTS
  771. select CLKDEV_LOOKUP
  772. select ARCH_REQUIRE_GPIOLIB
  773. select ARCH_HAS_CPUFREQ
  774. help
  775. Support for ST-Ericsson's Ux500 architecture
  776. config ARCH_NOMADIK
  777. bool "STMicroelectronics Nomadik"
  778. select ARM_AMBA
  779. select ARM_VIC
  780. select CPU_ARM926T
  781. select CLKDEV_LOOKUP
  782. select GENERIC_CLOCKEVENTS
  783. select ARCH_REQUIRE_GPIOLIB
  784. help
  785. Support for the Nomadik platform by ST-Ericsson
  786. config ARCH_DAVINCI
  787. bool "TI DaVinci"
  788. select GENERIC_CLOCKEVENTS
  789. select ARCH_REQUIRE_GPIOLIB
  790. select ZONE_DMA
  791. select HAVE_IDE
  792. select CLKDEV_LOOKUP
  793. select GENERIC_ALLOCATOR
  794. select GENERIC_IRQ_CHIP
  795. select ARCH_HAS_HOLES_MEMORYMODEL
  796. help
  797. Support for TI's DaVinci platform.
  798. config ARCH_OMAP
  799. bool "TI OMAP"
  800. select HAVE_CLK
  801. select ARCH_REQUIRE_GPIOLIB
  802. select ARCH_HAS_CPUFREQ
  803. select CLKSRC_MMIO
  804. select GENERIC_CLOCKEVENTS
  805. select HAVE_SCHED_CLOCK
  806. select ARCH_HAS_HOLES_MEMORYMODEL
  807. help
  808. Support for TI's OMAP platform (OMAP1/2/3/4).
  809. config PLAT_SPEAR
  810. bool "ST SPEAr"
  811. select ARM_AMBA
  812. select ARCH_REQUIRE_GPIOLIB
  813. select CLKDEV_LOOKUP
  814. select CLKSRC_MMIO
  815. select GENERIC_CLOCKEVENTS
  816. select HAVE_CLK
  817. help
  818. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  819. config ARCH_VT8500
  820. bool "VIA/WonderMedia 85xx"
  821. select CPU_ARM926T
  822. select GENERIC_GPIO
  823. select ARCH_HAS_CPUFREQ
  824. select GENERIC_CLOCKEVENTS
  825. select ARCH_REQUIRE_GPIOLIB
  826. select HAVE_PWM
  827. help
  828. Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  829. config ARCH_ZYNQ
  830. bool "Xilinx Zynq ARM Cortex A9 Platform"
  831. select CPU_V7
  832. select GENERIC_TIME
  833. select GENERIC_CLOCKEVENTS
  834. select CLKDEV_LOOKUP
  835. select ARM_GIC
  836. select ARM_AMBA
  837. select ICST
  838. select USE_OF
  839. help
  840. Support for Xilinx Zynq ARM Cortex A9 Platform
  841. endchoice
  842. #
  843. # This is sorted alphabetically by mach-* pathname. However, plat-*
  844. # Kconfigs may be included either alphabetically (according to the
  845. # plat- suffix) or along side the corresponding mach-* source.
  846. #
  847. source "arch/arm/mach-at91/Kconfig"
  848. source "arch/arm/mach-bcmring/Kconfig"
  849. source "arch/arm/mach-clps711x/Kconfig"
  850. source "arch/arm/mach-cns3xxx/Kconfig"
  851. source "arch/arm/mach-davinci/Kconfig"
  852. source "arch/arm/mach-dove/Kconfig"
  853. source "arch/arm/mach-ep93xx/Kconfig"
  854. source "arch/arm/mach-footbridge/Kconfig"
  855. source "arch/arm/mach-gemini/Kconfig"
  856. source "arch/arm/mach-h720x/Kconfig"
  857. source "arch/arm/mach-integrator/Kconfig"
  858. source "arch/arm/mach-iop32x/Kconfig"
  859. source "arch/arm/mach-iop33x/Kconfig"
  860. source "arch/arm/mach-iop13xx/Kconfig"
  861. source "arch/arm/mach-ixp4xx/Kconfig"
  862. source "arch/arm/mach-ixp2000/Kconfig"
  863. source "arch/arm/mach-ixp23xx/Kconfig"
  864. source "arch/arm/mach-kirkwood/Kconfig"
  865. source "arch/arm/mach-ks8695/Kconfig"
  866. source "arch/arm/mach-lpc32xx/Kconfig"
  867. source "arch/arm/mach-msm/Kconfig"
  868. source "arch/arm/mach-mv78xx0/Kconfig"
  869. source "arch/arm/plat-mxc/Kconfig"
  870. source "arch/arm/mach-mxs/Kconfig"
  871. source "arch/arm/mach-netx/Kconfig"
  872. source "arch/arm/mach-nomadik/Kconfig"
  873. source "arch/arm/plat-nomadik/Kconfig"
  874. source "arch/arm/mach-nuc93x/Kconfig"
  875. source "arch/arm/plat-omap/Kconfig"
  876. source "arch/arm/mach-omap1/Kconfig"
  877. source "arch/arm/mach-omap2/Kconfig"
  878. source "arch/arm/mach-orion5x/Kconfig"
  879. source "arch/arm/mach-pxa/Kconfig"
  880. source "arch/arm/plat-pxa/Kconfig"
  881. source "arch/arm/mach-mmp/Kconfig"
  882. source "arch/arm/mach-realview/Kconfig"
  883. source "arch/arm/mach-sa1100/Kconfig"
  884. source "arch/arm/plat-samsung/Kconfig"
  885. source "arch/arm/plat-s3c24xx/Kconfig"
  886. source "arch/arm/plat-s5p/Kconfig"
  887. source "arch/arm/plat-spear/Kconfig"
  888. source "arch/arm/plat-tcc/Kconfig"
  889. if ARCH_S3C2410
  890. source "arch/arm/mach-s3c2410/Kconfig"
  891. source "arch/arm/mach-s3c2412/Kconfig"
  892. source "arch/arm/mach-s3c2416/Kconfig"
  893. source "arch/arm/mach-s3c2440/Kconfig"
  894. source "arch/arm/mach-s3c2443/Kconfig"
  895. endif
  896. if ARCH_S3C64XX
  897. source "arch/arm/mach-s3c64xx/Kconfig"
  898. endif
  899. source "arch/arm/mach-s5p64x0/Kconfig"
  900. source "arch/arm/mach-s5pc100/Kconfig"
  901. source "arch/arm/mach-s5pv210/Kconfig"
  902. source "arch/arm/mach-exynos4/Kconfig"
  903. source "arch/arm/mach-shmobile/Kconfig"
  904. source "arch/arm/mach-tegra/Kconfig"
  905. source "arch/arm/mach-u300/Kconfig"
  906. source "arch/arm/mach-ux500/Kconfig"
  907. source "arch/arm/mach-versatile/Kconfig"
  908. source "arch/arm/mach-vexpress/Kconfig"
  909. source "arch/arm/plat-versatile/Kconfig"
  910. source "arch/arm/mach-vt8500/Kconfig"
  911. source "arch/arm/mach-w90x900/Kconfig"
  912. # Definitions to make life easier
  913. config ARCH_ACORN
  914. bool
  915. config PLAT_IOP
  916. bool
  917. select GENERIC_CLOCKEVENTS
  918. select HAVE_SCHED_CLOCK
  919. config PLAT_ORION
  920. bool
  921. select CLKSRC_MMIO
  922. select GENERIC_IRQ_CHIP
  923. select HAVE_SCHED_CLOCK
  924. config PLAT_PXA
  925. bool
  926. config PLAT_VERSATILE
  927. bool
  928. config ARM_TIMER_SP804
  929. bool
  930. select CLKSRC_MMIO
  931. source arch/arm/mm/Kconfig
  932. config IWMMXT
  933. bool "Enable iWMMXt support"
  934. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  935. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  936. help
  937. Enable support for iWMMXt context switching at run time if
  938. running on a CPU that supports it.
  939. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  940. config XSCALE_PMU
  941. bool
  942. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  943. default y
  944. config CPU_HAS_PMU
  945. depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
  946. (!ARCH_OMAP3 || OMAP3_EMU)
  947. default y
  948. bool
  949. config MULTI_IRQ_HANDLER
  950. bool
  951. help
  952. Allow each machine to specify it's own IRQ handler at run time.
  953. if !MMU
  954. source "arch/arm/Kconfig-nommu"
  955. endif
  956. config ARM_ERRATA_411920
  957. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  958. depends on CPU_V6 || CPU_V6K
  959. help
  960. Invalidation of the Instruction Cache operation can
  961. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  962. It does not affect the MPCore. This option enables the ARM Ltd.
  963. recommended workaround.
  964. config ARM_ERRATA_430973
  965. bool "ARM errata: Stale prediction on replaced interworking branch"
  966. depends on CPU_V7
  967. help
  968. This option enables the workaround for the 430973 Cortex-A8
  969. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  970. interworking branch is replaced with another code sequence at the
  971. same virtual address, whether due to self-modifying code or virtual
  972. to physical address re-mapping, Cortex-A8 does not recover from the
  973. stale interworking branch prediction. This results in Cortex-A8
  974. executing the new code sequence in the incorrect ARM or Thumb state.
  975. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  976. and also flushes the branch target cache at every context switch.
  977. Note that setting specific bits in the ACTLR register may not be
  978. available in non-secure mode.
  979. config ARM_ERRATA_458693
  980. bool "ARM errata: Processor deadlock when a false hazard is created"
  981. depends on CPU_V7
  982. help
  983. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  984. erratum. For very specific sequences of memory operations, it is
  985. possible for a hazard condition intended for a cache line to instead
  986. be incorrectly associated with a different cache line. This false
  987. hazard might then cause a processor deadlock. The workaround enables
  988. the L1 caching of the NEON accesses and disables the PLD instruction
  989. in the ACTLR register. Note that setting specific bits in the ACTLR
  990. register may not be available in non-secure mode.
  991. config ARM_ERRATA_460075
  992. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  993. depends on CPU_V7
  994. help
  995. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  996. erratum. Any asynchronous access to the L2 cache may encounter a
  997. situation in which recent store transactions to the L2 cache are lost
  998. and overwritten with stale memory contents from external memory. The
  999. workaround disables the write-allocate mode for the L2 cache via the
  1000. ACTLR register. Note that setting specific bits in the ACTLR register
  1001. may not be available in non-secure mode.
  1002. config ARM_ERRATA_742230
  1003. bool "ARM errata: DMB operation may be faulty"
  1004. depends on CPU_V7 && SMP
  1005. help
  1006. This option enables the workaround for the 742230 Cortex-A9
  1007. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  1008. between two write operations may not ensure the correct visibility
  1009. ordering of the two writes. This workaround sets a specific bit in
  1010. the diagnostic register of the Cortex-A9 which causes the DMB
  1011. instruction to behave as a DSB, ensuring the correct behaviour of
  1012. the two writes.
  1013. config ARM_ERRATA_742231
  1014. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  1015. depends on CPU_V7 && SMP
  1016. help
  1017. This option enables the workaround for the 742231 Cortex-A9
  1018. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  1019. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  1020. accessing some data located in the same cache line, may get corrupted
  1021. data due to bad handling of the address hazard when the line gets
  1022. replaced from one of the CPUs at the same time as another CPU is
  1023. accessing it. This workaround sets specific bits in the diagnostic
  1024. register of the Cortex-A9 which reduces the linefill issuing
  1025. capabilities of the processor.
  1026. config PL310_ERRATA_588369
  1027. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  1028. depends on CACHE_L2X0
  1029. help
  1030. The PL310 L2 cache controller implements three types of Clean &
  1031. Invalidate maintenance operations: by Physical Address
  1032. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  1033. They are architecturally defined to behave as the execution of a
  1034. clean operation followed immediately by an invalidate operation,
  1035. both performing to the same memory location. This functionality
  1036. is not correctly implemented in PL310 as clean lines are not
  1037. invalidated as a result of these operations.
  1038. config ARM_ERRATA_720789
  1039. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  1040. depends on CPU_V7 && SMP
  1041. help
  1042. This option enables the workaround for the 720789 Cortex-A9 (prior to
  1043. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  1044. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  1045. As a consequence of this erratum, some TLB entries which should be
  1046. invalidated are not, resulting in an incoherency in the system page
  1047. tables. The workaround changes the TLB flushing routines to invalidate
  1048. entries regardless of the ASID.
  1049. config PL310_ERRATA_727915
  1050. bool "Background Clean & Invalidate by Way operation can cause data corruption"
  1051. depends on CACHE_L2X0
  1052. help
  1053. PL310 implements the Clean & Invalidate by Way L2 cache maintenance
  1054. operation (offset 0x7FC). This operation runs in background so that
  1055. PL310 can handle normal accesses while it is in progress. Under very
  1056. rare circumstances, due to this erratum, write data can be lost when
  1057. PL310 treats a cacheable write transaction during a Clean &
  1058. Invalidate by Way operation.
  1059. config ARM_ERRATA_743622
  1060. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  1061. depends on CPU_V7
  1062. help
  1063. This option enables the workaround for the 743622 Cortex-A9
  1064. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  1065. optimisation in the Cortex-A9 Store Buffer may lead to data
  1066. corruption. This workaround sets a specific bit in the diagnostic
  1067. register of the Cortex-A9 which disables the Store Buffer
  1068. optimisation, preventing the defect from occurring. This has no
  1069. visible impact on the overall performance or power consumption of the
  1070. processor.
  1071. config ARM_ERRATA_751472
  1072. bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
  1073. depends on CPU_V7 && SMP
  1074. help
  1075. This option enables the workaround for the 751472 Cortex-A9 (prior
  1076. to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
  1077. completion of a following broadcasted operation if the second
  1078. operation is received by a CPU before the ICIALLUIS has completed,
  1079. potentially leading to corrupted entries in the cache or TLB.
  1080. config ARM_ERRATA_753970
  1081. bool "ARM errata: cache sync operation may be faulty"
  1082. depends on CACHE_PL310
  1083. help
  1084. This option enables the workaround for the 753970 PL310 (r3p0) erratum.
  1085. Under some condition the effect of cache sync operation on
  1086. the store buffer still remains when the operation completes.
  1087. This means that the store buffer is always asked to drain and
  1088. this prevents it from merging any further writes. The workaround
  1089. is to replace the normal offset of cache sync operation (0x730)
  1090. by another offset targeting an unmapped PL310 register 0x740.
  1091. This has the same effect as the cache sync operation: store buffer
  1092. drain and waiting for all buffers empty.
  1093. config ARM_ERRATA_754322
  1094. bool "ARM errata: possible faulty MMU translations following an ASID switch"
  1095. depends on CPU_V7
  1096. help
  1097. This option enables the workaround for the 754322 Cortex-A9 (r2p*,
  1098. r3p*) erratum. A speculative memory access may cause a page table walk
  1099. which starts prior to an ASID switch but completes afterwards. This
  1100. can populate the micro-TLB with a stale entry which may be hit with
  1101. the new ASID. This workaround places two dsb instructions in the mm
  1102. switching code so that no page table walks can cross the ASID switch.
  1103. config ARM_ERRATA_754327
  1104. bool "ARM errata: no automatic Store Buffer drain"
  1105. depends on CPU_V7 && SMP
  1106. help
  1107. This option enables the workaround for the 754327 Cortex-A9 (prior to
  1108. r2p0) erratum. The Store Buffer does not have any automatic draining
  1109. mechanism and therefore a livelock may occur if an external agent
  1110. continuously polls a memory location waiting to observe an update.
  1111. This workaround defines cpu_relax() as smp_mb(), preventing correctly
  1112. written polling loops from denying visibility of updates to memory.
  1113. config ARM_ERRATA_364296
  1114. bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
  1115. depends on CPU_V6 && !SMP
  1116. help
  1117. This options enables the workaround for the 364296 ARM1136
  1118. r0p2 erratum (possible cache data corruption with
  1119. hit-under-miss enabled). It sets the undocumented bit 31 in
  1120. the auxiliary control register and the FI bit in the control
  1121. register, thus disabling hit-under-miss without putting the
  1122. processor into full low interrupt latency mode. ARM11MPCore
  1123. is not affected.
  1124. config ARM_ERRATA_764369
  1125. bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
  1126. depends on CPU_V7 && SMP
  1127. help
  1128. This option enables the workaround for erratum 764369
  1129. affecting Cortex-A9 MPCore with two or more processors (all
  1130. current revisions). Under certain timing circumstances, a data
  1131. cache line maintenance operation by MVA targeting an Inner
  1132. Shareable memory region may fail to proceed up to either the
  1133. Point of Coherency or to the Point of Unification of the
  1134. system. This workaround adds a DSB instruction before the
  1135. relevant cache maintenance functions and sets a specific bit
  1136. in the diagnostic control register of the SCU.
  1137. endmenu
  1138. source "arch/arm/common/Kconfig"
  1139. menu "Bus support"
  1140. config ARM_AMBA
  1141. bool
  1142. config ISA
  1143. bool
  1144. help
  1145. Find out whether you have ISA slots on your motherboard. ISA is the
  1146. name of a bus system, i.e. the way the CPU talks to the other stuff
  1147. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1148. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1149. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1150. # Select ISA DMA controller support
  1151. config ISA_DMA
  1152. bool
  1153. select ISA_DMA_API
  1154. # Select ISA DMA interface
  1155. config ISA_DMA_API
  1156. bool
  1157. config PCI
  1158. bool "PCI support" if MIGHT_HAVE_PCI
  1159. help
  1160. Find out whether you have a PCI motherboard. PCI is the name of a
  1161. bus system, i.e. the way the CPU talks to the other stuff inside
  1162. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1163. VESA. If you have PCI, say Y, otherwise N.
  1164. config PCI_DOMAINS
  1165. bool
  1166. depends on PCI
  1167. config PCI_NANOENGINE
  1168. bool "BSE nanoEngine PCI support"
  1169. depends on SA1100_NANOENGINE
  1170. help
  1171. Enable PCI on the BSE nanoEngine board.
  1172. config PCI_SYSCALL
  1173. def_bool PCI
  1174. # Select the host bridge type
  1175. config PCI_HOST_VIA82C505
  1176. bool
  1177. depends on PCI && ARCH_SHARK
  1178. default y
  1179. config PCI_HOST_ITE8152
  1180. bool
  1181. depends on PCI && MACH_ARMCORE
  1182. default y
  1183. select DMABOUNCE
  1184. source "drivers/pci/Kconfig"
  1185. source "drivers/pcmcia/Kconfig"
  1186. endmenu
  1187. menu "Kernel Features"
  1188. source "kernel/time/Kconfig"
  1189. config SMP
  1190. bool "Symmetric Multi-Processing"
  1191. depends on CPU_V6K || CPU_V7
  1192. depends on GENERIC_CLOCKEVENTS
  1193. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1194. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1195. ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1196. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1197. select USE_GENERIC_SMP_HELPERS
  1198. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1199. help
  1200. This enables support for systems with more than one CPU. If you have
  1201. a system with only one CPU, like most personal computers, say N. If
  1202. you have a system with more than one CPU, say Y.
  1203. If you say N here, the kernel will run on single and multiprocessor
  1204. machines, but will use only one CPU of a multiprocessor machine. If
  1205. you say Y here, the kernel will run on many, but not all, single
  1206. processor machines. On a single processor machine, the kernel will
  1207. run faster if you say N here.
  1208. See also <file:Documentation/i386/IO-APIC.txt>,
  1209. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1210. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1211. If you don't know what to do here, say N.
  1212. config SMP_ON_UP
  1213. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1214. depends on EXPERIMENTAL
  1215. depends on SMP && !XIP_KERNEL
  1216. default y
  1217. help
  1218. SMP kernels contain instructions which fail on non-SMP processors.
  1219. Enabling this option allows the kernel to modify itself to make
  1220. these instructions safe. Disabling it allows about 1K of space
  1221. savings.
  1222. If you don't know what to do here, say Y.
  1223. config ARM_CPU_TOPOLOGY
  1224. bool "Support cpu topology definition"
  1225. depends on SMP && CPU_V7
  1226. default y
  1227. help
  1228. Support ARM cpu topology definition. The MPIDR register defines
  1229. affinity between processors which is then used to describe the cpu
  1230. topology of an ARM System.
  1231. config SCHED_MC
  1232. bool "Multi-core scheduler support"
  1233. depends on ARM_CPU_TOPOLOGY
  1234. help
  1235. Multi-core scheduler support improves the CPU scheduler's decision
  1236. making when dealing with multi-core CPU chips at a cost of slightly
  1237. increased overhead in some places. If unsure say N here.
  1238. config SCHED_SMT
  1239. bool "SMT scheduler support"
  1240. depends on ARM_CPU_TOPOLOGY
  1241. help
  1242. Improves the CPU scheduler's decision making when dealing with
  1243. MultiThreading at a cost of slightly increased overhead in some
  1244. places. If unsure say N here.
  1245. config HAVE_ARM_SCU
  1246. bool
  1247. help
  1248. This option enables support for the ARM system coherency unit
  1249. config HAVE_ARM_TWD
  1250. bool
  1251. depends on SMP
  1252. select TICK_ONESHOT
  1253. help
  1254. This options enables support for the ARM timer and watchdog unit
  1255. choice
  1256. prompt "Memory split"
  1257. default VMSPLIT_3G
  1258. help
  1259. Select the desired split between kernel and user memory.
  1260. If you are not absolutely sure what you are doing, leave this
  1261. option alone!
  1262. config VMSPLIT_3G
  1263. bool "3G/1G user/kernel split"
  1264. config VMSPLIT_2G
  1265. bool "2G/2G user/kernel split"
  1266. config VMSPLIT_1G
  1267. bool "1G/3G user/kernel split"
  1268. endchoice
  1269. config PAGE_OFFSET
  1270. hex
  1271. default 0x40000000 if VMSPLIT_1G
  1272. default 0x80000000 if VMSPLIT_2G
  1273. default 0xC0000000
  1274. config NR_CPUS
  1275. int "Maximum number of CPUs (2-32)"
  1276. range 2 32
  1277. depends on SMP
  1278. default "4"
  1279. config HOTPLUG_CPU
  1280. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1281. depends on SMP && HOTPLUG && EXPERIMENTAL
  1282. help
  1283. Say Y here to experiment with turning CPUs off and on. CPUs
  1284. can be controlled through /sys/devices/system/cpu.
  1285. config LOCAL_TIMERS
  1286. bool "Use local timer interrupts"
  1287. depends on SMP
  1288. default y
  1289. select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
  1290. help
  1291. Enable support for local timers on SMP platforms, rather then the
  1292. legacy IPI broadcast method. Local timers allows the system
  1293. accounting to be spread across the timer interval, preventing a
  1294. "thundering herd" at every timer tick.
  1295. source kernel/Kconfig.preempt
  1296. config HZ
  1297. int
  1298. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1299. ARCH_S5PV210 || ARCH_EXYNOS4
  1300. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1301. default AT91_TIMER_HZ if ARCH_AT91
  1302. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1303. default 100
  1304. config THUMB2_KERNEL
  1305. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1306. depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
  1307. select AEABI
  1308. select ARM_ASM_UNIFIED
  1309. help
  1310. By enabling this option, the kernel will be compiled in
  1311. Thumb-2 mode. A compiler/assembler that understand the unified
  1312. ARM-Thumb syntax is needed.
  1313. If unsure, say N.
  1314. config THUMB2_AVOID_R_ARM_THM_JUMP11
  1315. bool "Work around buggy Thumb-2 short branch relocations in gas"
  1316. depends on THUMB2_KERNEL && MODULES
  1317. default y
  1318. help
  1319. Various binutils versions can resolve Thumb-2 branches to
  1320. locally-defined, preemptible global symbols as short-range "b.n"
  1321. branch instructions.
  1322. This is a problem, because there's no guarantee the final
  1323. destination of the symbol, or any candidate locations for a
  1324. trampoline, are within range of the branch. For this reason, the
  1325. kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
  1326. relocation in modules at all, and it makes little sense to add
  1327. support.
  1328. The symptom is that the kernel fails with an "unsupported
  1329. relocation" error when loading some modules.
  1330. Until fixed tools are available, passing
  1331. -fno-optimize-sibling-calls to gcc should prevent gcc generating
  1332. code which hits this problem, at the cost of a bit of extra runtime
  1333. stack usage in some cases.
  1334. The problem is described in more detail at:
  1335. https://bugs.launchpad.net/binutils-linaro/+bug/725126
  1336. Only Thumb-2 kernels are affected.
  1337. Unless you are sure your tools don't have this problem, say Y.
  1338. config ARM_ASM_UNIFIED
  1339. bool
  1340. config AEABI
  1341. bool "Use the ARM EABI to compile the kernel"
  1342. help
  1343. This option allows for the kernel to be compiled using the latest
  1344. ARM ABI (aka EABI). This is only useful if you are using a user
  1345. space environment that is also compiled with EABI.
  1346. Since there are major incompatibilities between the legacy ABI and
  1347. EABI, especially with regard to structure member alignment, this
  1348. option also changes the kernel syscall calling convention to
  1349. disambiguate both ABIs and allow for backward compatibility support
  1350. (selected with CONFIG_OABI_COMPAT).
  1351. To use this you need GCC version 4.0.0 or later.
  1352. config OABI_COMPAT
  1353. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1354. depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
  1355. default y
  1356. help
  1357. This option preserves the old syscall interface along with the
  1358. new (ARM EABI) one. It also provides a compatibility layer to
  1359. intercept syscalls that have structure arguments which layout
  1360. in memory differs between the legacy ABI and the new ARM EABI
  1361. (only for non "thumb" binaries). This option adds a tiny
  1362. overhead to all syscalls and produces a slightly larger kernel.
  1363. If you know you'll be using only pure EABI user space then you
  1364. can say N here. If this option is not selected and you attempt
  1365. to execute a legacy ABI binary then the result will be
  1366. UNPREDICTABLE (in fact it can be predicted that it won't work
  1367. at all). If in doubt say Y.
  1368. config ARCH_HAS_HOLES_MEMORYMODEL
  1369. bool
  1370. config ARCH_SPARSEMEM_ENABLE
  1371. bool
  1372. config ARCH_SPARSEMEM_DEFAULT
  1373. def_bool ARCH_SPARSEMEM_ENABLE
  1374. config ARCH_SELECT_MEMORY_MODEL
  1375. def_bool ARCH_SPARSEMEM_ENABLE
  1376. config HAVE_ARCH_PFN_VALID
  1377. def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
  1378. config HIGHMEM
  1379. bool "High Memory Support"
  1380. depends on MMU
  1381. help
  1382. The address space of ARM processors is only 4 Gigabytes large
  1383. and it has to accommodate user address space, kernel address
  1384. space as well as some memory mapped IO. That means that, if you
  1385. have a large amount of physical memory and/or IO, not all of the
  1386. memory can be "permanently mapped" by the kernel. The physical
  1387. memory that is not permanently mapped is called "high memory".
  1388. Depending on the selected kernel/user memory split, minimum
  1389. vmalloc space and actual amount of RAM, you may not need this
  1390. option which should result in a slightly faster kernel.
  1391. If unsure, say n.
  1392. config HIGHPTE
  1393. bool "Allocate 2nd-level pagetables from highmem"
  1394. depends on HIGHMEM
  1395. config HW_PERF_EVENTS
  1396. bool "Enable hardware performance counter support for perf events"
  1397. depends on PERF_EVENTS && CPU_HAS_PMU
  1398. default y
  1399. help
  1400. Enable hardware performance counter support for perf events. If
  1401. disabled, perf events will use software events only.
  1402. source "mm/Kconfig"
  1403. config FORCE_MAX_ZONEORDER
  1404. int "Maximum zone order" if ARCH_SHMOBILE
  1405. range 11 64 if ARCH_SHMOBILE
  1406. default "9" if SA1111
  1407. default "11"
  1408. help
  1409. The kernel memory allocator divides physically contiguous memory
  1410. blocks into "zones", where each zone is a power of two number of
  1411. pages. This option selects the largest power of two that the kernel
  1412. keeps in the memory allocator. If you need to allocate very large
  1413. blocks of physically contiguous memory, then you may need to
  1414. increase this value.
  1415. This config option is actually maximum order plus one. For example,
  1416. a value of 11 means that the largest free memory block is 2^10 pages.
  1417. config LEDS
  1418. bool "Timer and CPU usage LEDs"
  1419. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1420. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1421. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1422. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1423. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1424. ARCH_AT91 || ARCH_DAVINCI || \
  1425. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1426. help
  1427. If you say Y here, the LEDs on your machine will be used
  1428. to provide useful information about your current system status.
  1429. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1430. be able to select which LEDs are active using the options below. If
  1431. you are compiling a kernel for the EBSA-110 or the LART however, the
  1432. red LED will simply flash regularly to indicate that the system is
  1433. still functional. It is safe to say Y here if you have a CATS
  1434. system, but the driver will do nothing.
  1435. config LEDS_TIMER
  1436. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1437. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1438. || MACH_OMAP_PERSEUS2
  1439. depends on LEDS
  1440. depends on !GENERIC_CLOCKEVENTS
  1441. default y if ARCH_EBSA110
  1442. help
  1443. If you say Y here, one of the system LEDs (the green one on the
  1444. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1445. will flash regularly to indicate that the system is still
  1446. operational. This is mainly useful to kernel hackers who are
  1447. debugging unstable kernels.
  1448. The LART uses the same LED for both Timer LED and CPU usage LED
  1449. functions. You may choose to use both, but the Timer LED function
  1450. will overrule the CPU usage LED.
  1451. config LEDS_CPU
  1452. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1453. !ARCH_OMAP) \
  1454. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1455. || MACH_OMAP_PERSEUS2
  1456. depends on LEDS
  1457. help
  1458. If you say Y here, the red LED will be used to give a good real
  1459. time indication of CPU usage, by lighting whenever the idle task
  1460. is not currently executing.
  1461. The LART uses the same LED for both Timer LED and CPU usage LED
  1462. functions. You may choose to use both, but the Timer LED function
  1463. will overrule the CPU usage LED.
  1464. config ALIGNMENT_TRAP
  1465. bool
  1466. depends on CPU_CP15_MMU
  1467. default y if !ARCH_EBSA110
  1468. select HAVE_PROC_CPU if PROC_FS
  1469. help
  1470. ARM processors cannot fetch/store information which is not
  1471. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1472. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1473. fetch/store instructions will be emulated in software if you say
  1474. here, which has a severe performance impact. This is necessary for
  1475. correct operation of some network protocols. With an IP-only
  1476. configuration it is safe to say N, otherwise say Y.
  1477. config UACCESS_WITH_MEMCPY
  1478. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1479. depends on MMU && EXPERIMENTAL
  1480. default y if CPU_FEROCEON
  1481. help
  1482. Implement faster copy_to_user and clear_user methods for CPU
  1483. cores where a 8-word STM instruction give significantly higher
  1484. memory write throughput than a sequence of individual 32bit stores.
  1485. A possible side effect is a slight increase in scheduling latency
  1486. between threads sharing the same address space if they invoke
  1487. such copy operations with large buffers.
  1488. However, if the CPU data cache is using a write-allocate mode,
  1489. this option is unlikely to provide any performance gain.
  1490. config SECCOMP
  1491. bool
  1492. prompt "Enable seccomp to safely compute untrusted bytecode"
  1493. ---help---
  1494. This kernel feature is useful for number crunching applications
  1495. that may need to compute untrusted bytecode during their
  1496. execution. By using pipes or other transports made available to
  1497. the process as file descriptors supporting the read/write
  1498. syscalls, it's possible to isolate those applications in
  1499. their own address space using seccomp. Once seccomp is
  1500. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1501. and the task is only allowed to execute a few safe syscalls
  1502. defined by each seccomp mode.
  1503. config CC_STACKPROTECTOR
  1504. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1505. depends on EXPERIMENTAL
  1506. help
  1507. This option turns on the -fstack-protector GCC feature. This
  1508. feature puts, at the beginning of functions, a canary value on
  1509. the stack just before the return address, and validates
  1510. the value just before actually returning. Stack based buffer
  1511. overflows (that need to overwrite this return address) now also
  1512. overwrite the canary, which gets detected and the attack is then
  1513. neutralized via a kernel panic.
  1514. This feature requires gcc version 4.2 or above.
  1515. config DEPRECATED_PARAM_STRUCT
  1516. bool "Provide old way to pass kernel parameters"
  1517. help
  1518. This was deprecated in 2001 and announced to live on for 5 years.
  1519. Some old boot loaders still use this way.
  1520. endmenu
  1521. menu "Boot options"
  1522. config USE_OF
  1523. bool "Flattened Device Tree support"
  1524. select OF
  1525. select OF_EARLY_FLATTREE
  1526. select IRQ_DOMAIN
  1527. help
  1528. Include support for flattened device tree machine descriptions.
  1529. # Compressed boot loader in ROM. Yes, we really want to ask about
  1530. # TEXT and BSS so we preserve their values in the config files.
  1531. config ZBOOT_ROM_TEXT
  1532. hex "Compressed ROM boot loader base address"
  1533. default "0"
  1534. help
  1535. The physical address at which the ROM-able zImage is to be
  1536. placed in the target. Platforms which normally make use of
  1537. ROM-able zImage formats normally set this to a suitable
  1538. value in their defconfig file.
  1539. If ZBOOT_ROM is not enabled, this has no effect.
  1540. config ZBOOT_ROM_BSS
  1541. hex "Compressed ROM boot loader BSS address"
  1542. default "0"
  1543. help
  1544. The base address of an area of read/write memory in the target
  1545. for the ROM-able zImage which must be available while the
  1546. decompressor is running. It must be large enough to hold the
  1547. entire decompressed kernel plus an additional 128 KiB.
  1548. Platforms which normally make use of ROM-able zImage formats
  1549. normally set this to a suitable value in their defconfig file.
  1550. If ZBOOT_ROM is not enabled, this has no effect.
  1551. config ZBOOT_ROM
  1552. bool "Compressed boot loader in ROM/flash"
  1553. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1554. help
  1555. Say Y here if you intend to execute your compressed kernel image
  1556. (zImage) directly from ROM or flash. If unsure, say N.
  1557. choice
  1558. prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
  1559. depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
  1560. default ZBOOT_ROM_NONE
  1561. help
  1562. Include experimental SD/MMC loading code in the ROM-able zImage.
  1563. With this enabled it is possible to write the the ROM-able zImage
  1564. kernel image to an MMC or SD card and boot the kernel straight
  1565. from the reset vector. At reset the processor Mask ROM will load
  1566. the first part of the the ROM-able zImage which in turn loads the
  1567. rest the kernel image to RAM.
  1568. config ZBOOT_ROM_NONE
  1569. bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
  1570. help
  1571. Do not load image from SD or MMC
  1572. config ZBOOT_ROM_MMCIF
  1573. bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
  1574. help
  1575. Load image from MMCIF hardware block.
  1576. config ZBOOT_ROM_SH_MOBILE_SDHI
  1577. bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
  1578. help
  1579. Load image from SDHI hardware block
  1580. endchoice
  1581. config ARM_APPENDED_DTB
  1582. bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
  1583. depends on OF && !ZBOOT_ROM && EXPERIMENTAL
  1584. help
  1585. With this option, the boot code will look for a device tree binary
  1586. (DTB) appended to zImage
  1587. (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
  1588. This is meant as a backward compatibility convenience for those
  1589. systems with a bootloader that can't be upgraded to accommodate
  1590. the documented boot protocol using a device tree.
  1591. Beware that there is very little in terms of protection against
  1592. this option being confused by leftover garbage in memory that might
  1593. look like a DTB header after a reboot if no actual DTB is appended
  1594. to zImage. Do not leave this option active in a production kernel
  1595. if you don't intend to always append a DTB. Proper passing of the
  1596. location into r2 of a bootloader provided DTB is always preferable
  1597. to this option.
  1598. config ARM_ATAG_DTB_COMPAT
  1599. bool "Supplement the appended DTB with traditional ATAG information"
  1600. depends on ARM_APPENDED_DTB
  1601. help
  1602. Some old bootloaders can't be updated to a DTB capable one, yet
  1603. they provide ATAGs with memory configuration, the ramdisk address,
  1604. the kernel cmdline string, etc. Such information is dynamically
  1605. provided by the bootloader and can't always be stored in a static
  1606. DTB. To allow a device tree enabled kernel to be used with such
  1607. bootloaders, this option allows zImage to extract the information
  1608. from the ATAG list and store it at run time into the appended DTB.
  1609. config CMDLINE
  1610. string "Default kernel command string"
  1611. default ""
  1612. help
  1613. On some architectures (EBSA110 and CATS), there is currently no way
  1614. for the boot loader to pass arguments to the kernel. For these
  1615. architectures, you should supply some command-line options at build
  1616. time by entering them here. As a minimum, you should specify the
  1617. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1618. choice
  1619. prompt "Kernel command line type" if CMDLINE != ""
  1620. default CMDLINE_FROM_BOOTLOADER
  1621. config CMDLINE_FROM_BOOTLOADER
  1622. bool "Use bootloader kernel arguments if available"
  1623. help
  1624. Uses the command-line options passed by the boot loader. If
  1625. the boot loader doesn't provide any, the default kernel command
  1626. string provided in CMDLINE will be used.
  1627. config CMDLINE_EXTEND
  1628. bool "Extend bootloader kernel arguments"
  1629. help
  1630. The command-line arguments provided by the boot loader will be
  1631. appended to the default kernel command string.
  1632. config CMDLINE_FORCE
  1633. bool "Always use the default kernel command string"
  1634. help
  1635. Always use the default kernel command string, even if the boot
  1636. loader passes other arguments to the kernel.
  1637. This is useful if you cannot or don't want to change the
  1638. command-line options your boot loader passes to the kernel.
  1639. endchoice
  1640. config XIP_KERNEL
  1641. bool "Kernel Execute-In-Place from ROM"
  1642. depends on !ZBOOT_ROM
  1643. help
  1644. Execute-In-Place allows the kernel to run from non-volatile storage
  1645. directly addressable by the CPU, such as NOR flash. This saves RAM
  1646. space since the text section of the kernel is not loaded from flash
  1647. to RAM. Read-write sections, such as the data section and stack,
  1648. are still copied to RAM. The XIP kernel is not compressed since
  1649. it has to run directly from flash, so it will take more space to
  1650. store it. The flash address used to link the kernel object files,
  1651. and for storing it, is configuration dependent. Therefore, if you
  1652. say Y here, you must know the proper physical address where to
  1653. store the kernel image depending on your own flash memory usage.
  1654. Also note that the make target becomes "make xipImage" rather than
  1655. "make zImage" or "make Image". The final kernel binary to put in
  1656. ROM memory will be arch/arm/boot/xipImage.
  1657. If unsure, say N.
  1658. config XIP_PHYS_ADDR
  1659. hex "XIP Kernel Physical Location"
  1660. depends on XIP_KERNEL
  1661. default "0x00080000"
  1662. help
  1663. This is the physical address in your flash memory the kernel will
  1664. be linked for and stored to. This address is dependent on your
  1665. own flash usage.
  1666. config KEXEC
  1667. bool "Kexec system call (EXPERIMENTAL)"
  1668. depends on EXPERIMENTAL
  1669. help
  1670. kexec is a system call that implements the ability to shutdown your
  1671. current kernel, and to start another kernel. It is like a reboot
  1672. but it is independent of the system firmware. And like a reboot
  1673. you can start any kernel with it, not just Linux.
  1674. It is an ongoing process to be certain the hardware in a machine
  1675. is properly shutdown, so do not be surprised if this code does not
  1676. initially work for you. It may help to enable device hotplugging
  1677. support.
  1678. config ATAGS_PROC
  1679. bool "Export atags in procfs"
  1680. depends on KEXEC
  1681. default y
  1682. help
  1683. Should the atags used to boot the kernel be exported in an "atags"
  1684. file in procfs. Useful with kexec.
  1685. config CRASH_DUMP
  1686. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1687. depends on EXPERIMENTAL
  1688. help
  1689. Generate crash dump after being started by kexec. This should
  1690. be normally only set in special crash dump kernels which are
  1691. loaded in the main kernel with kexec-tools into a specially
  1692. reserved region and then later executed after a crash by
  1693. kdump/kexec. The crash dump kernel must be compiled to a
  1694. memory address not used by the main kernel
  1695. For more details see Documentation/kdump/kdump.txt
  1696. config AUTO_ZRELADDR
  1697. bool "Auto calculation of the decompressed kernel image address"
  1698. depends on !ZBOOT_ROM && !ARCH_U300
  1699. help
  1700. ZRELADDR is the physical address where the decompressed kernel
  1701. image will be placed. If AUTO_ZRELADDR is selected, the address
  1702. will be determined at run-time by masking the current IP with
  1703. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1704. from start of memory.
  1705. endmenu
  1706. menu "CPU Power Management"
  1707. if ARCH_HAS_CPUFREQ
  1708. source "drivers/cpufreq/Kconfig"
  1709. config CPU_FREQ_IMX
  1710. tristate "CPUfreq driver for i.MX CPUs"
  1711. depends on ARCH_MXC && CPU_FREQ
  1712. help
  1713. This enables the CPUfreq driver for i.MX CPUs.
  1714. config CPU_FREQ_SA1100
  1715. bool
  1716. config CPU_FREQ_SA1110
  1717. bool
  1718. config CPU_FREQ_INTEGRATOR
  1719. tristate "CPUfreq driver for ARM Integrator CPUs"
  1720. depends on ARCH_INTEGRATOR && CPU_FREQ
  1721. default y
  1722. help
  1723. This enables the CPUfreq driver for ARM Integrator CPUs.
  1724. For details, take a look at <file:Documentation/cpu-freq>.
  1725. If in doubt, say Y.
  1726. config CPU_FREQ_PXA
  1727. bool
  1728. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1729. default y
  1730. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1731. config CPU_FREQ_S3C
  1732. bool
  1733. help
  1734. Internal configuration node for common cpufreq on Samsung SoC
  1735. config CPU_FREQ_S3C24XX
  1736. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1737. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1738. select CPU_FREQ_S3C
  1739. help
  1740. This enables the CPUfreq driver for the Samsung S3C24XX family
  1741. of CPUs.
  1742. For details, take a look at <file:Documentation/cpu-freq>.
  1743. If in doubt, say N.
  1744. config CPU_FREQ_S3C24XX_PLL
  1745. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1746. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1747. help
  1748. Compile in support for changing the PLL frequency from the
  1749. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1750. after a frequency change, so by default it is not enabled.
  1751. This also means that the PLL tables for the selected CPU(s) will
  1752. be built which may increase the size of the kernel image.
  1753. config CPU_FREQ_S3C24XX_DEBUG
  1754. bool "Debug CPUfreq Samsung driver core"
  1755. depends on CPU_FREQ_S3C24XX
  1756. help
  1757. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1758. config CPU_FREQ_S3C24XX_IODEBUG
  1759. bool "Debug CPUfreq Samsung driver IO timing"
  1760. depends on CPU_FREQ_S3C24XX
  1761. help
  1762. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1763. config CPU_FREQ_S3C24XX_DEBUGFS
  1764. bool "Export debugfs for CPUFreq"
  1765. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1766. help
  1767. Export status information via debugfs.
  1768. endif
  1769. source "drivers/cpuidle/Kconfig"
  1770. endmenu
  1771. menu "Floating point emulation"
  1772. comment "At least one emulation must be selected"
  1773. config FPE_NWFPE
  1774. bool "NWFPE math emulation"
  1775. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1776. ---help---
  1777. Say Y to include the NWFPE floating point emulator in the kernel.
  1778. This is necessary to run most binaries. Linux does not currently
  1779. support floating point hardware so you need to say Y here even if
  1780. your machine has an FPA or floating point co-processor podule.
  1781. You may say N here if you are going to load the Acorn FPEmulator
  1782. early in the bootup.
  1783. config FPE_NWFPE_XP
  1784. bool "Support extended precision"
  1785. depends on FPE_NWFPE
  1786. help
  1787. Say Y to include 80-bit support in the kernel floating-point
  1788. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1789. Note that gcc does not generate 80-bit operations by default,
  1790. so in most cases this option only enlarges the size of the
  1791. floating point emulator without any good reason.
  1792. You almost surely want to say N here.
  1793. config FPE_FASTFPE
  1794. bool "FastFPE math emulation (EXPERIMENTAL)"
  1795. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1796. ---help---
  1797. Say Y here to include the FAST floating point emulator in the kernel.
  1798. This is an experimental much faster emulator which now also has full
  1799. precision for the mantissa. It does not support any exceptions.
  1800. It is very simple, and approximately 3-6 times faster than NWFPE.
  1801. It should be sufficient for most programs. It may be not suitable
  1802. for scientific calculations, but you have to check this for yourself.
  1803. If you do not feel you need a faster FP emulation you should better
  1804. choose NWFPE.
  1805. config VFP
  1806. bool "VFP-format floating point maths"
  1807. depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1808. help
  1809. Say Y to include VFP support code in the kernel. This is needed
  1810. if your hardware includes a VFP unit.
  1811. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1812. release notes and additional status information.
  1813. Say N if your target does not have VFP hardware.
  1814. config VFPv3
  1815. bool
  1816. depends on VFP
  1817. default y if CPU_V7
  1818. config NEON
  1819. bool "Advanced SIMD (NEON) Extension support"
  1820. depends on VFPv3 && CPU_V7
  1821. help
  1822. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1823. Extension.
  1824. endmenu
  1825. menu "Userspace binary formats"
  1826. source "fs/Kconfig.binfmt"
  1827. config ARTHUR
  1828. tristate "RISC OS personality"
  1829. depends on !AEABI
  1830. help
  1831. Say Y here to include the kernel code necessary if you want to run
  1832. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1833. experimental; if this sounds frightening, say N and sleep in peace.
  1834. You can also say M here to compile this support as a module (which
  1835. will be called arthur).
  1836. endmenu
  1837. menu "Power management options"
  1838. source "kernel/power/Kconfig"
  1839. config ARCH_SUSPEND_POSSIBLE
  1840. depends on !ARCH_S5P64X0 && !ARCH_S5PC100
  1841. depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
  1842. CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
  1843. def_bool y
  1844. endmenu
  1845. source "net/Kconfig"
  1846. source "drivers/Kconfig"
  1847. source "fs/Kconfig"
  1848. source "arch/arm/Kconfig.debug"
  1849. source "security/Kconfig"
  1850. source "crypto/Kconfig"
  1851. source "lib/Kconfig"