nouveau_drm.c 26 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/client.h>
  33. #include <core/gpuobj.h>
  34. #include <core/class.h>
  35. #include <engine/device.h>
  36. #include <engine/disp.h>
  37. #include <engine/fifo.h>
  38. #include <engine/software.h>
  39. #include <subdev/vm.h>
  40. #include "nouveau_drm.h"
  41. #include "nouveau_dma.h"
  42. #include "nouveau_ttm.h"
  43. #include "nouveau_gem.h"
  44. #include "nouveau_agp.h"
  45. #include "nouveau_vga.h"
  46. #include "nouveau_sysfs.h"
  47. #include "nouveau_hwmon.h"
  48. #include "nouveau_acpi.h"
  49. #include "nouveau_bios.h"
  50. #include "nouveau_ioctl.h"
  51. #include "nouveau_abi16.h"
  52. #include "nouveau_fbcon.h"
  53. #include "nouveau_fence.h"
  54. #include "nouveau_debugfs.h"
  55. MODULE_PARM_DESC(config, "option string to pass to driver core");
  56. static char *nouveau_config;
  57. module_param_named(config, nouveau_config, charp, 0400);
  58. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  59. static char *nouveau_debug;
  60. module_param_named(debug, nouveau_debug, charp, 0400);
  61. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  62. static int nouveau_noaccel = 0;
  63. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  64. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  65. "0 = disabled, 1 = enabled, 2 = headless)");
  66. int nouveau_modeset = -1;
  67. module_param_named(modeset, nouveau_modeset, int, 0400);
  68. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  69. int nouveau_runtime_pm = -1;
  70. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  71. static struct drm_driver driver;
  72. static u64
  73. nouveau_name(struct pci_dev *pdev)
  74. {
  75. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  76. name |= pdev->bus->number << 16;
  77. name |= PCI_SLOT(pdev->devfn) << 8;
  78. return name | PCI_FUNC(pdev->devfn);
  79. }
  80. static int
  81. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  82. int size, void **pcli)
  83. {
  84. struct nouveau_cli *cli;
  85. int ret;
  86. *pcli = NULL;
  87. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  88. nouveau_debug, size, pcli);
  89. cli = *pcli;
  90. if (ret) {
  91. if (cli)
  92. nouveau_client_destroy(&cli->base);
  93. *pcli = NULL;
  94. return ret;
  95. }
  96. mutex_init(&cli->mutex);
  97. return 0;
  98. }
  99. static void
  100. nouveau_cli_destroy(struct nouveau_cli *cli)
  101. {
  102. struct nouveau_object *client = nv_object(cli);
  103. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  104. nouveau_client_fini(&cli->base, false);
  105. atomic_set(&client->refcount, 1);
  106. nouveau_object_ref(NULL, &client);
  107. }
  108. static void
  109. nouveau_accel_fini(struct nouveau_drm *drm)
  110. {
  111. nouveau_gpuobj_ref(NULL, &drm->notify);
  112. nouveau_channel_del(&drm->channel);
  113. nouveau_channel_del(&drm->cechan);
  114. if (drm->fence)
  115. nouveau_fence(drm)->dtor(drm);
  116. }
  117. static void
  118. nouveau_accel_init(struct nouveau_drm *drm)
  119. {
  120. struct nouveau_device *device = nv_device(drm->device);
  121. struct nouveau_object *object;
  122. u32 arg0, arg1;
  123. int ret;
  124. if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
  125. return;
  126. /* initialise synchronisation routines */
  127. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  128. else if (device->card_type < NV_11 ||
  129. device->chipset < 0x17) ret = nv10_fence_create(drm);
  130. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  131. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  132. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  133. else ret = nvc0_fence_create(drm);
  134. if (ret) {
  135. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  136. nouveau_accel_fini(drm);
  137. return;
  138. }
  139. if (device->card_type >= NV_E0) {
  140. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  141. NVDRM_CHAN + 1,
  142. NVE0_CHANNEL_IND_ENGINE_CE0 |
  143. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  144. &drm->cechan);
  145. if (ret)
  146. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  147. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  148. arg1 = 1;
  149. } else
  150. if (device->chipset >= 0xa3 &&
  151. device->chipset != 0xaa &&
  152. device->chipset != 0xac) {
  153. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  154. NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
  155. &drm->cechan);
  156. if (ret)
  157. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  158. arg0 = NvDmaFB;
  159. arg1 = NvDmaTT;
  160. } else {
  161. arg0 = NvDmaFB;
  162. arg1 = NvDmaTT;
  163. }
  164. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  165. arg0, arg1, &drm->channel);
  166. if (ret) {
  167. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  168. nouveau_accel_fini(drm);
  169. return;
  170. }
  171. ret = nouveau_object_new(nv_object(drm), NVDRM_CHAN, NVDRM_NVSW,
  172. nouveau_abi16_swclass(drm), NULL, 0, &object);
  173. if (ret == 0) {
  174. struct nouveau_software_chan *swch = (void *)object->parent;
  175. ret = RING_SPACE(drm->channel, 2);
  176. if (ret == 0) {
  177. if (device->card_type < NV_C0) {
  178. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  179. OUT_RING (drm->channel, NVDRM_NVSW);
  180. } else
  181. if (device->card_type < NV_E0) {
  182. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  183. OUT_RING (drm->channel, 0x001f0000);
  184. }
  185. }
  186. swch = (void *)object->parent;
  187. swch->flip = nouveau_flip_complete;
  188. swch->flip_data = drm->channel;
  189. }
  190. if (ret) {
  191. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  192. nouveau_accel_fini(drm);
  193. return;
  194. }
  195. if (device->card_type < NV_C0) {
  196. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  197. &drm->notify);
  198. if (ret) {
  199. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  200. nouveau_accel_fini(drm);
  201. return;
  202. }
  203. ret = nouveau_object_new(nv_object(drm),
  204. drm->channel->handle, NvNotify0,
  205. 0x003d, &(struct nv_dma_class) {
  206. .flags = NV_DMA_TARGET_VRAM |
  207. NV_DMA_ACCESS_RDWR,
  208. .start = drm->notify->addr,
  209. .limit = drm->notify->addr + 31
  210. }, sizeof(struct nv_dma_class),
  211. &object);
  212. if (ret) {
  213. nouveau_accel_fini(drm);
  214. return;
  215. }
  216. }
  217. nouveau_bo_move_init(drm);
  218. }
  219. static int nouveau_drm_probe(struct pci_dev *pdev,
  220. const struct pci_device_id *pent)
  221. {
  222. struct nouveau_device *device;
  223. struct apertures_struct *aper;
  224. bool boot = false;
  225. int ret;
  226. /* remove conflicting drivers (vesafb, efifb etc) */
  227. aper = alloc_apertures(3);
  228. if (!aper)
  229. return -ENOMEM;
  230. aper->ranges[0].base = pci_resource_start(pdev, 1);
  231. aper->ranges[0].size = pci_resource_len(pdev, 1);
  232. aper->count = 1;
  233. if (pci_resource_len(pdev, 2)) {
  234. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  235. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  236. aper->count++;
  237. }
  238. if (pci_resource_len(pdev, 3)) {
  239. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  240. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  241. aper->count++;
  242. }
  243. #ifdef CONFIG_X86
  244. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  245. #endif
  246. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  247. kfree(aper);
  248. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  249. nouveau_config, nouveau_debug, &device);
  250. if (ret)
  251. return ret;
  252. pci_set_master(pdev);
  253. ret = drm_get_pci_dev(pdev, pent, &driver);
  254. if (ret) {
  255. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  256. return ret;
  257. }
  258. return 0;
  259. }
  260. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  261. static void
  262. nouveau_get_hdmi_dev(struct drm_device *dev)
  263. {
  264. struct nouveau_drm *drm = dev->dev_private;
  265. struct pci_dev *pdev = dev->pdev;
  266. /* subfunction one is a hdmi audio device? */
  267. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  268. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  269. if (!drm->hdmi_device) {
  270. DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  271. return;
  272. }
  273. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  274. DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class);
  275. pci_dev_put(drm->hdmi_device);
  276. drm->hdmi_device = NULL;
  277. return;
  278. }
  279. }
  280. static int
  281. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  282. {
  283. struct pci_dev *pdev = dev->pdev;
  284. struct nouveau_device *device;
  285. struct nouveau_drm *drm;
  286. int ret;
  287. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  288. if (ret)
  289. return ret;
  290. dev->dev_private = drm;
  291. drm->dev = dev;
  292. INIT_LIST_HEAD(&drm->clients);
  293. spin_lock_init(&drm->tile.lock);
  294. nouveau_get_hdmi_dev(dev);
  295. /* make sure AGP controller is in a consistent state before we
  296. * (possibly) execute vbios init tables (see nouveau_agp.h)
  297. */
  298. if (drm_pci_device_is_agp(dev) && dev->agp) {
  299. /* dummy device object, doesn't init anything, but allows
  300. * agp code access to registers
  301. */
  302. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  303. NVDRM_DEVICE, 0x0080,
  304. &(struct nv_device_class) {
  305. .device = ~0,
  306. .disable =
  307. ~(NV_DEVICE_DISABLE_MMIO |
  308. NV_DEVICE_DISABLE_IDENTIFY),
  309. .debug0 = ~0,
  310. }, sizeof(struct nv_device_class),
  311. &drm->device);
  312. if (ret)
  313. goto fail_device;
  314. nouveau_agp_reset(drm);
  315. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  316. }
  317. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  318. 0x0080, &(struct nv_device_class) {
  319. .device = ~0,
  320. .disable = 0,
  321. .debug0 = 0,
  322. }, sizeof(struct nv_device_class),
  323. &drm->device);
  324. if (ret)
  325. goto fail_device;
  326. /* workaround an odd issue on nvc1 by disabling the device's
  327. * nosnoop capability. hopefully won't cause issues until a
  328. * better fix is found - assuming there is one...
  329. */
  330. device = nv_device(drm->device);
  331. if (nv_device(drm->device)->chipset == 0xc1)
  332. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  333. nouveau_vga_init(drm);
  334. nouveau_agp_init(drm);
  335. if (device->card_type >= NV_50) {
  336. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  337. 0x1000, &drm->client.base.vm);
  338. if (ret)
  339. goto fail_device;
  340. }
  341. ret = nouveau_ttm_init(drm);
  342. if (ret)
  343. goto fail_ttm;
  344. ret = nouveau_bios_init(dev);
  345. if (ret)
  346. goto fail_bios;
  347. ret = nouveau_display_create(dev);
  348. if (ret)
  349. goto fail_dispctor;
  350. if (dev->mode_config.num_crtc) {
  351. ret = nouveau_display_init(dev);
  352. if (ret)
  353. goto fail_dispinit;
  354. }
  355. nouveau_sysfs_init(dev);
  356. nouveau_hwmon_init(dev);
  357. nouveau_accel_init(drm);
  358. nouveau_fbcon_init(dev);
  359. if (nouveau_runtime_pm != 0) {
  360. pm_runtime_use_autosuspend(dev->dev);
  361. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  362. pm_runtime_set_active(dev->dev);
  363. pm_runtime_allow(dev->dev);
  364. pm_runtime_mark_last_busy(dev->dev);
  365. pm_runtime_put(dev->dev);
  366. }
  367. return 0;
  368. fail_dispinit:
  369. nouveau_display_destroy(dev);
  370. fail_dispctor:
  371. nouveau_bios_takedown(dev);
  372. fail_bios:
  373. nouveau_ttm_fini(drm);
  374. fail_ttm:
  375. nouveau_agp_fini(drm);
  376. nouveau_vga_fini(drm);
  377. fail_device:
  378. nouveau_cli_destroy(&drm->client);
  379. return ret;
  380. }
  381. static int
  382. nouveau_drm_unload(struct drm_device *dev)
  383. {
  384. struct nouveau_drm *drm = nouveau_drm(dev);
  385. pm_runtime_get_sync(dev->dev);
  386. nouveau_fbcon_fini(dev);
  387. nouveau_accel_fini(drm);
  388. nouveau_hwmon_fini(dev);
  389. nouveau_sysfs_fini(dev);
  390. if (dev->mode_config.num_crtc)
  391. nouveau_display_fini(dev);
  392. nouveau_display_destroy(dev);
  393. nouveau_bios_takedown(dev);
  394. nouveau_ttm_fini(drm);
  395. nouveau_agp_fini(drm);
  396. nouveau_vga_fini(drm);
  397. if (drm->hdmi_device)
  398. pci_dev_put(drm->hdmi_device);
  399. nouveau_cli_destroy(&drm->client);
  400. return 0;
  401. }
  402. static void
  403. nouveau_drm_remove(struct pci_dev *pdev)
  404. {
  405. struct drm_device *dev = pci_get_drvdata(pdev);
  406. struct nouveau_drm *drm = nouveau_drm(dev);
  407. struct nouveau_object *device;
  408. device = drm->client.base.device;
  409. drm_put_dev(dev);
  410. nouveau_object_ref(NULL, &device);
  411. nouveau_object_debug();
  412. }
  413. static int
  414. nouveau_do_suspend(struct drm_device *dev)
  415. {
  416. struct nouveau_drm *drm = nouveau_drm(dev);
  417. struct nouveau_cli *cli;
  418. int ret;
  419. if (dev->mode_config.num_crtc) {
  420. NV_INFO(drm, "suspending display...\n");
  421. ret = nouveau_display_suspend(dev);
  422. if (ret)
  423. return ret;
  424. }
  425. NV_INFO(drm, "evicting buffers...\n");
  426. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  427. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  428. if (drm->cechan) {
  429. ret = nouveau_channel_idle(drm->cechan);
  430. if (ret)
  431. return ret;
  432. }
  433. if (drm->channel) {
  434. ret = nouveau_channel_idle(drm->channel);
  435. if (ret)
  436. return ret;
  437. }
  438. NV_INFO(drm, "suspending client object trees...\n");
  439. if (drm->fence && nouveau_fence(drm)->suspend) {
  440. if (!nouveau_fence(drm)->suspend(drm))
  441. return -ENOMEM;
  442. }
  443. list_for_each_entry(cli, &drm->clients, head) {
  444. ret = nouveau_client_fini(&cli->base, true);
  445. if (ret)
  446. goto fail_client;
  447. }
  448. NV_INFO(drm, "suspending kernel object tree...\n");
  449. ret = nouveau_client_fini(&drm->client.base, true);
  450. if (ret)
  451. goto fail_client;
  452. nouveau_agp_fini(drm);
  453. return 0;
  454. fail_client:
  455. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  456. nouveau_client_init(&cli->base);
  457. }
  458. if (dev->mode_config.num_crtc) {
  459. NV_INFO(drm, "resuming display...\n");
  460. nouveau_display_resume(dev);
  461. }
  462. return ret;
  463. }
  464. int nouveau_pmops_suspend(struct device *dev)
  465. {
  466. struct pci_dev *pdev = to_pci_dev(dev);
  467. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  468. int ret;
  469. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  470. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  471. return 0;
  472. if (drm_dev->mode_config.num_crtc)
  473. nouveau_fbcon_set_suspend(drm_dev, 1);
  474. ret = nouveau_do_suspend(drm_dev);
  475. if (ret)
  476. return ret;
  477. pci_save_state(pdev);
  478. pci_disable_device(pdev);
  479. pci_set_power_state(pdev, PCI_D3hot);
  480. return 0;
  481. }
  482. static int
  483. nouveau_do_resume(struct drm_device *dev)
  484. {
  485. struct nouveau_drm *drm = nouveau_drm(dev);
  486. struct nouveau_cli *cli;
  487. NV_INFO(drm, "re-enabling device...\n");
  488. nouveau_agp_reset(drm);
  489. NV_INFO(drm, "resuming kernel object tree...\n");
  490. nouveau_client_init(&drm->client.base);
  491. nouveau_agp_init(drm);
  492. NV_INFO(drm, "resuming client object trees...\n");
  493. if (drm->fence && nouveau_fence(drm)->resume)
  494. nouveau_fence(drm)->resume(drm);
  495. list_for_each_entry(cli, &drm->clients, head) {
  496. nouveau_client_init(&cli->base);
  497. }
  498. nouveau_run_vbios_init(dev);
  499. if (dev->mode_config.num_crtc) {
  500. NV_INFO(drm, "resuming display...\n");
  501. nouveau_display_repin(dev);
  502. }
  503. return 0;
  504. }
  505. int nouveau_pmops_resume(struct device *dev)
  506. {
  507. struct pci_dev *pdev = to_pci_dev(dev);
  508. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  509. int ret;
  510. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  511. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  512. return 0;
  513. pci_set_power_state(pdev, PCI_D0);
  514. pci_restore_state(pdev);
  515. ret = pci_enable_device(pdev);
  516. if (ret)
  517. return ret;
  518. pci_set_master(pdev);
  519. ret = nouveau_do_resume(drm_dev);
  520. if (ret)
  521. return ret;
  522. if (drm_dev->mode_config.num_crtc)
  523. nouveau_fbcon_set_suspend(drm_dev, 0);
  524. nouveau_fbcon_zfill_all(drm_dev);
  525. if (drm_dev->mode_config.num_crtc)
  526. nouveau_display_resume(drm_dev);
  527. return 0;
  528. }
  529. static int nouveau_pmops_freeze(struct device *dev)
  530. {
  531. struct pci_dev *pdev = to_pci_dev(dev);
  532. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  533. int ret;
  534. if (drm_dev->mode_config.num_crtc)
  535. nouveau_fbcon_set_suspend(drm_dev, 1);
  536. ret = nouveau_do_suspend(drm_dev);
  537. return ret;
  538. }
  539. static int nouveau_pmops_thaw(struct device *dev)
  540. {
  541. struct pci_dev *pdev = to_pci_dev(dev);
  542. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  543. int ret;
  544. ret = nouveau_do_resume(drm_dev);
  545. if (ret)
  546. return ret;
  547. if (drm_dev->mode_config.num_crtc)
  548. nouveau_fbcon_set_suspend(drm_dev, 0);
  549. nouveau_fbcon_zfill_all(drm_dev);
  550. if (drm_dev->mode_config.num_crtc)
  551. nouveau_display_resume(drm_dev);
  552. return 0;
  553. }
  554. static int
  555. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  556. {
  557. struct pci_dev *pdev = dev->pdev;
  558. struct nouveau_drm *drm = nouveau_drm(dev);
  559. struct nouveau_cli *cli;
  560. char name[32], tmpname[TASK_COMM_LEN];
  561. int ret;
  562. /* need to bring up power immediately if opening device */
  563. ret = pm_runtime_get_sync(dev->dev);
  564. if (ret < 0)
  565. return ret;
  566. get_task_comm(tmpname, current);
  567. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  568. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  569. if (ret)
  570. goto out_suspend;
  571. if (nv_device(drm->device)->card_type >= NV_50) {
  572. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  573. 0x1000, &cli->base.vm);
  574. if (ret) {
  575. nouveau_cli_destroy(cli);
  576. goto out_suspend;
  577. }
  578. }
  579. fpriv->driver_priv = cli;
  580. mutex_lock(&drm->client.mutex);
  581. list_add(&cli->head, &drm->clients);
  582. mutex_unlock(&drm->client.mutex);
  583. out_suspend:
  584. pm_runtime_mark_last_busy(dev->dev);
  585. pm_runtime_put_autosuspend(dev->dev);
  586. return ret;
  587. }
  588. static void
  589. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  590. {
  591. struct nouveau_cli *cli = nouveau_cli(fpriv);
  592. struct nouveau_drm *drm = nouveau_drm(dev);
  593. pm_runtime_get_sync(dev->dev);
  594. if (cli->abi16)
  595. nouveau_abi16_fini(cli->abi16);
  596. mutex_lock(&drm->client.mutex);
  597. list_del(&cli->head);
  598. mutex_unlock(&drm->client.mutex);
  599. }
  600. static void
  601. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  602. {
  603. struct nouveau_cli *cli = nouveau_cli(fpriv);
  604. nouveau_cli_destroy(cli);
  605. pm_runtime_mark_last_busy(dev->dev);
  606. pm_runtime_put_autosuspend(dev->dev);
  607. }
  608. static const struct drm_ioctl_desc
  609. nouveau_ioctls[] = {
  610. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  611. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  612. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  613. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  614. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  615. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  616. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  617. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  618. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  619. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  620. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  621. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  622. };
  623. long nouveau_drm_ioctl(struct file *filp,
  624. unsigned int cmd, unsigned long arg)
  625. {
  626. struct drm_file *file_priv = filp->private_data;
  627. struct drm_device *dev;
  628. long ret;
  629. dev = file_priv->minor->dev;
  630. ret = pm_runtime_get_sync(dev->dev);
  631. if (ret < 0)
  632. return ret;
  633. ret = drm_ioctl(filp, cmd, arg);
  634. pm_runtime_mark_last_busy(dev->dev);
  635. pm_runtime_put_autosuspend(dev->dev);
  636. return ret;
  637. }
  638. static const struct file_operations
  639. nouveau_driver_fops = {
  640. .owner = THIS_MODULE,
  641. .open = drm_open,
  642. .release = drm_release,
  643. .unlocked_ioctl = nouveau_drm_ioctl,
  644. .mmap = nouveau_ttm_mmap,
  645. .poll = drm_poll,
  646. .read = drm_read,
  647. #if defined(CONFIG_COMPAT)
  648. .compat_ioctl = nouveau_compat_ioctl,
  649. #endif
  650. .llseek = noop_llseek,
  651. };
  652. static struct drm_driver
  653. driver = {
  654. .driver_features =
  655. DRIVER_USE_AGP |
  656. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  657. .load = nouveau_drm_load,
  658. .unload = nouveau_drm_unload,
  659. .open = nouveau_drm_open,
  660. .preclose = nouveau_drm_preclose,
  661. .postclose = nouveau_drm_postclose,
  662. .lastclose = nouveau_vga_lastclose,
  663. #if defined(CONFIG_DEBUG_FS)
  664. .debugfs_init = nouveau_debugfs_init,
  665. .debugfs_cleanup = nouveau_debugfs_takedown,
  666. #endif
  667. .get_vblank_counter = drm_vblank_count,
  668. .enable_vblank = nouveau_display_vblank_enable,
  669. .disable_vblank = nouveau_display_vblank_disable,
  670. .ioctls = nouveau_ioctls,
  671. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  672. .fops = &nouveau_driver_fops,
  673. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  674. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  675. .gem_prime_export = drm_gem_prime_export,
  676. .gem_prime_import = drm_gem_prime_import,
  677. .gem_prime_pin = nouveau_gem_prime_pin,
  678. .gem_prime_unpin = nouveau_gem_prime_unpin,
  679. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  680. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  681. .gem_prime_vmap = nouveau_gem_prime_vmap,
  682. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  683. .gem_free_object = nouveau_gem_object_del,
  684. .gem_open_object = nouveau_gem_object_open,
  685. .gem_close_object = nouveau_gem_object_close,
  686. .dumb_create = nouveau_display_dumb_create,
  687. .dumb_map_offset = nouveau_display_dumb_map_offset,
  688. .dumb_destroy = drm_gem_dumb_destroy,
  689. .name = DRIVER_NAME,
  690. .desc = DRIVER_DESC,
  691. #ifdef GIT_REVISION
  692. .date = GIT_REVISION,
  693. #else
  694. .date = DRIVER_DATE,
  695. #endif
  696. .major = DRIVER_MAJOR,
  697. .minor = DRIVER_MINOR,
  698. .patchlevel = DRIVER_PATCHLEVEL,
  699. };
  700. static struct pci_device_id
  701. nouveau_drm_pci_table[] = {
  702. {
  703. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  704. .class = PCI_BASE_CLASS_DISPLAY << 16,
  705. .class_mask = 0xff << 16,
  706. },
  707. {
  708. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  709. .class = PCI_BASE_CLASS_DISPLAY << 16,
  710. .class_mask = 0xff << 16,
  711. },
  712. {}
  713. };
  714. static int nouveau_pmops_runtime_suspend(struct device *dev)
  715. {
  716. struct pci_dev *pdev = to_pci_dev(dev);
  717. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  718. int ret;
  719. if (nouveau_runtime_pm == 0)
  720. return -EINVAL;
  721. nv_debug_level(SILENT);
  722. drm_kms_helper_poll_disable(drm_dev);
  723. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  724. nouveau_switcheroo_optimus_dsm();
  725. ret = nouveau_do_suspend(drm_dev);
  726. pci_save_state(pdev);
  727. pci_disable_device(pdev);
  728. pci_set_power_state(pdev, PCI_D3cold);
  729. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  730. return ret;
  731. }
  732. static int nouveau_pmops_runtime_resume(struct device *dev)
  733. {
  734. struct pci_dev *pdev = to_pci_dev(dev);
  735. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  736. struct nouveau_device *device = nouveau_dev(drm_dev);
  737. int ret;
  738. if (nouveau_runtime_pm == 0)
  739. return -EINVAL;
  740. pci_set_power_state(pdev, PCI_D0);
  741. pci_restore_state(pdev);
  742. ret = pci_enable_device(pdev);
  743. if (ret)
  744. return ret;
  745. pci_set_master(pdev);
  746. ret = nouveau_do_resume(drm_dev);
  747. if (drm_dev->mode_config.num_crtc)
  748. nouveau_display_resume(drm_dev);
  749. drm_kms_helper_poll_enable(drm_dev);
  750. /* do magic */
  751. nv_mask(device, 0x88488, (1 << 25), (1 << 25));
  752. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  753. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  754. nv_debug_level(NORMAL);
  755. return ret;
  756. }
  757. static int nouveau_pmops_runtime_idle(struct device *dev)
  758. {
  759. struct pci_dev *pdev = to_pci_dev(dev);
  760. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  761. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  762. struct drm_crtc *crtc;
  763. if (nouveau_runtime_pm == 0)
  764. return -EBUSY;
  765. /* are we optimus enabled? */
  766. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  767. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  768. return -EBUSY;
  769. }
  770. /* if we have a hdmi audio device - make sure it has a driver loaded */
  771. if (drm->hdmi_device) {
  772. if (!drm->hdmi_device->driver) {
  773. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  774. pm_runtime_mark_last_busy(dev);
  775. return -EBUSY;
  776. }
  777. }
  778. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  779. if (crtc->enabled) {
  780. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  781. return -EBUSY;
  782. }
  783. }
  784. pm_runtime_mark_last_busy(dev);
  785. pm_runtime_autosuspend(dev);
  786. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  787. return 1;
  788. }
  789. static const struct dev_pm_ops nouveau_pm_ops = {
  790. .suspend = nouveau_pmops_suspend,
  791. .resume = nouveau_pmops_resume,
  792. .freeze = nouveau_pmops_freeze,
  793. .thaw = nouveau_pmops_thaw,
  794. .poweroff = nouveau_pmops_freeze,
  795. .restore = nouveau_pmops_resume,
  796. .runtime_suspend = nouveau_pmops_runtime_suspend,
  797. .runtime_resume = nouveau_pmops_runtime_resume,
  798. .runtime_idle = nouveau_pmops_runtime_idle,
  799. };
  800. static struct pci_driver
  801. nouveau_drm_pci_driver = {
  802. .name = "nouveau",
  803. .id_table = nouveau_drm_pci_table,
  804. .probe = nouveau_drm_probe,
  805. .remove = nouveau_drm_remove,
  806. .driver.pm = &nouveau_pm_ops,
  807. };
  808. static int __init
  809. nouveau_drm_init(void)
  810. {
  811. if (nouveau_modeset == -1) {
  812. #ifdef CONFIG_VGA_CONSOLE
  813. if (vgacon_text_force())
  814. nouveau_modeset = 0;
  815. #endif
  816. }
  817. if (!nouveau_modeset)
  818. return 0;
  819. nouveau_register_dsm_handler();
  820. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  821. }
  822. static void __exit
  823. nouveau_drm_exit(void)
  824. {
  825. if (!nouveau_modeset)
  826. return;
  827. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  828. nouveau_unregister_dsm_handler();
  829. }
  830. module_init(nouveau_drm_init);
  831. module_exit(nouveau_drm_exit);
  832. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  833. MODULE_AUTHOR(DRIVER_AUTHOR);
  834. MODULE_DESCRIPTION(DRIVER_DESC);
  835. MODULE_LICENSE("GPL and additional rights");