bnx2x_sriov.c 95 KB

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  1. /* bnx2x_sriov.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Shmulik Ravid <shmulikr@broadcom.com>
  17. * Ariel Elior <ariele@broadcom.com>
  18. *
  19. */
  20. #include "bnx2x.h"
  21. #include "bnx2x_init.h"
  22. #include "bnx2x_cmn.h"
  23. #include "bnx2x_sp.h"
  24. #include <linux/crc32.h>
  25. #include <linux/if_vlan.h>
  26. /* General service functions */
  27. static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
  28. u16 pf_id)
  29. {
  30. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
  31. pf_id);
  32. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
  33. pf_id);
  34. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
  35. pf_id);
  36. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
  37. pf_id);
  38. }
  39. static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
  40. u8 enable)
  41. {
  42. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
  43. enable);
  44. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
  45. enable);
  46. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
  47. enable);
  48. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
  49. enable);
  50. }
  51. int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  52. {
  53. int idx;
  54. for_each_vf(bp, idx)
  55. if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
  56. break;
  57. return idx;
  58. }
  59. static
  60. struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  61. {
  62. u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
  63. return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
  64. }
  65. static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
  66. u8 igu_sb_id, u8 segment, u16 index, u8 op,
  67. u8 update)
  68. {
  69. /* acking a VF sb through the PF - use the GRC */
  70. u32 ctl;
  71. u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
  72. u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
  73. u32 func_encode = vf->abs_vfid;
  74. u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
  75. struct igu_regular cmd_data = {0};
  76. cmd_data.sb_id_and_flags =
  77. ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
  78. (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
  79. (update << IGU_REGULAR_BUPDATE_SHIFT) |
  80. (op << IGU_REGULAR_ENABLE_INT_SHIFT));
  81. ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
  82. func_encode << IGU_CTRL_REG_FID_SHIFT |
  83. IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
  84. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  85. cmd_data.sb_id_and_flags, igu_addr_data);
  86. REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
  87. mmiowb();
  88. barrier();
  89. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  90. ctl, igu_addr_ctl);
  91. REG_WR(bp, igu_addr_ctl, ctl);
  92. mmiowb();
  93. barrier();
  94. }
  95. /* VFOP - VF slow-path operation support */
  96. #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
  97. /* VFOP operations states */
  98. enum bnx2x_vfop_qctor_state {
  99. BNX2X_VFOP_QCTOR_INIT,
  100. BNX2X_VFOP_QCTOR_SETUP,
  101. BNX2X_VFOP_QCTOR_INT_EN
  102. };
  103. enum bnx2x_vfop_qdtor_state {
  104. BNX2X_VFOP_QDTOR_HALT,
  105. BNX2X_VFOP_QDTOR_TERMINATE,
  106. BNX2X_VFOP_QDTOR_CFCDEL,
  107. BNX2X_VFOP_QDTOR_DONE
  108. };
  109. enum bnx2x_vfop_vlan_mac_state {
  110. BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  111. BNX2X_VFOP_VLAN_MAC_CLEAR,
  112. BNX2X_VFOP_VLAN_MAC_CHK_DONE,
  113. BNX2X_VFOP_MAC_CONFIG_LIST,
  114. BNX2X_VFOP_VLAN_CONFIG_LIST,
  115. BNX2X_VFOP_VLAN_CONFIG_LIST_0
  116. };
  117. enum bnx2x_vfop_qsetup_state {
  118. BNX2X_VFOP_QSETUP_CTOR,
  119. BNX2X_VFOP_QSETUP_VLAN0,
  120. BNX2X_VFOP_QSETUP_DONE
  121. };
  122. enum bnx2x_vfop_mcast_state {
  123. BNX2X_VFOP_MCAST_DEL,
  124. BNX2X_VFOP_MCAST_ADD,
  125. BNX2X_VFOP_MCAST_CHK_DONE
  126. };
  127. enum bnx2x_vfop_qflr_state {
  128. BNX2X_VFOP_QFLR_CLR_VLAN,
  129. BNX2X_VFOP_QFLR_CLR_MAC,
  130. BNX2X_VFOP_QFLR_TERMINATE,
  131. BNX2X_VFOP_QFLR_DONE
  132. };
  133. enum bnx2x_vfop_flr_state {
  134. BNX2X_VFOP_FLR_QUEUES,
  135. BNX2X_VFOP_FLR_HW
  136. };
  137. enum bnx2x_vfop_close_state {
  138. BNX2X_VFOP_CLOSE_QUEUES,
  139. BNX2X_VFOP_CLOSE_HW
  140. };
  141. enum bnx2x_vfop_rxmode_state {
  142. BNX2X_VFOP_RXMODE_CONFIG,
  143. BNX2X_VFOP_RXMODE_DONE
  144. };
  145. enum bnx2x_vfop_qteardown_state {
  146. BNX2X_VFOP_QTEARDOWN_RXMODE,
  147. BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
  148. BNX2X_VFOP_QTEARDOWN_CLR_MAC,
  149. BNX2X_VFOP_QTEARDOWN_QDTOR,
  150. BNX2X_VFOP_QTEARDOWN_DONE
  151. };
  152. #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
  153. void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  154. struct bnx2x_queue_init_params *init_params,
  155. struct bnx2x_queue_setup_params *setup_params,
  156. u16 q_idx, u16 sb_idx)
  157. {
  158. DP(BNX2X_MSG_IOV,
  159. "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
  160. vf->abs_vfid,
  161. q_idx,
  162. sb_idx,
  163. init_params->tx.sb_cq_index,
  164. init_params->tx.hc_rate,
  165. setup_params->flags,
  166. setup_params->txq_params.traffic_type);
  167. }
  168. void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  169. struct bnx2x_queue_init_params *init_params,
  170. struct bnx2x_queue_setup_params *setup_params,
  171. u16 q_idx, u16 sb_idx)
  172. {
  173. struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
  174. DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
  175. "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
  176. vf->abs_vfid,
  177. q_idx,
  178. sb_idx,
  179. init_params->rx.sb_cq_index,
  180. init_params->rx.hc_rate,
  181. setup_params->gen_params.mtu,
  182. rxq_params->buf_sz,
  183. rxq_params->sge_buf_sz,
  184. rxq_params->max_sges_pkt,
  185. rxq_params->tpa_agg_sz,
  186. setup_params->flags,
  187. rxq_params->drop_flags,
  188. rxq_params->cache_line_log);
  189. }
  190. void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
  191. struct bnx2x_virtf *vf,
  192. struct bnx2x_vf_queue *q,
  193. struct bnx2x_vfop_qctor_params *p,
  194. unsigned long q_type)
  195. {
  196. struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
  197. struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
  198. /* INIT */
  199. /* Enable host coalescing in the transition to INIT state */
  200. if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
  201. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
  202. if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
  203. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
  204. /* FW SB ID */
  205. init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  206. init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  207. /* context */
  208. init_p->cxts[0] = q->cxt;
  209. /* SETUP */
  210. /* Setup-op general parameters */
  211. setup_p->gen_params.spcl_id = vf->sp_cl_id;
  212. setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
  213. /* Setup-op pause params:
  214. * Nothing to do, the pause thresholds are set by default to 0 which
  215. * effectively turns off the feature for this queue. We don't want
  216. * one queue (VF) to interfering with another queue (another VF)
  217. */
  218. if (vf->cfg_flags & VF_CFG_FW_FC)
  219. BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
  220. vf->abs_vfid);
  221. /* Setup-op flags:
  222. * collect statistics, zero statistics, local-switching, security,
  223. * OV for Flex10, RSS and MCAST for leading
  224. */
  225. if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
  226. __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
  227. /* for VFs, enable tx switching, bd coherency, and mac address
  228. * anti-spoofing
  229. */
  230. __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
  231. __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
  232. __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
  233. if (vfq_is_leading(q)) {
  234. __set_bit(BNX2X_Q_FLG_LEADING_RSS, &setup_p->flags);
  235. __set_bit(BNX2X_Q_FLG_MCAST, &setup_p->flags);
  236. }
  237. /* Setup-op rx parameters */
  238. if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
  239. struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
  240. rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
  241. rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  242. rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
  243. if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
  244. rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
  245. }
  246. /* Setup-op tx parameters */
  247. if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
  248. setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
  249. setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  250. }
  251. }
  252. /* VFOP queue construction */
  253. static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  254. {
  255. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  256. struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
  257. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  258. enum bnx2x_vfop_qctor_state state = vfop->state;
  259. bnx2x_vfop_reset_wq(vf);
  260. if (vfop->rc < 0)
  261. goto op_err;
  262. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  263. switch (state) {
  264. case BNX2X_VFOP_QCTOR_INIT:
  265. /* has this queue already been opened? */
  266. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  267. BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  268. DP(BNX2X_MSG_IOV,
  269. "Entered qctor but queue was already up. Aborting gracefully\n");
  270. goto op_done;
  271. }
  272. /* next state */
  273. vfop->state = BNX2X_VFOP_QCTOR_SETUP;
  274. q_params->cmd = BNX2X_Q_CMD_INIT;
  275. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  276. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  277. case BNX2X_VFOP_QCTOR_SETUP:
  278. /* next state */
  279. vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
  280. /* copy pre-prepared setup params to the queue-state params */
  281. vfop->op_p->qctor.qstate.params.setup =
  282. vfop->op_p->qctor.prep_qsetup;
  283. q_params->cmd = BNX2X_Q_CMD_SETUP;
  284. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  285. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  286. case BNX2X_VFOP_QCTOR_INT_EN:
  287. /* enable interrupts */
  288. bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
  289. USTORM_ID, 0, IGU_INT_ENABLE, 0);
  290. goto op_done;
  291. default:
  292. bnx2x_vfop_default(state);
  293. }
  294. op_err:
  295. BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
  296. vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
  297. op_done:
  298. bnx2x_vfop_end(bp, vf, vfop);
  299. op_pending:
  300. return;
  301. }
  302. static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
  303. struct bnx2x_virtf *vf,
  304. struct bnx2x_vfop_cmd *cmd,
  305. int qid)
  306. {
  307. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  308. if (vfop) {
  309. vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  310. vfop->args.qctor.qid = qid;
  311. vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
  312. bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
  313. bnx2x_vfop_qctor, cmd->done);
  314. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
  315. cmd->block);
  316. }
  317. return -ENOMEM;
  318. }
  319. /* VFOP queue destruction */
  320. static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  321. {
  322. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  323. struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
  324. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  325. enum bnx2x_vfop_qdtor_state state = vfop->state;
  326. bnx2x_vfop_reset_wq(vf);
  327. if (vfop->rc < 0)
  328. goto op_err;
  329. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  330. switch (state) {
  331. case BNX2X_VFOP_QDTOR_HALT:
  332. /* has this queue already been stopped? */
  333. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  334. BNX2X_Q_LOGICAL_STATE_STOPPED) {
  335. DP(BNX2X_MSG_IOV,
  336. "Entered qdtor but queue was already stopped. Aborting gracefully\n");
  337. goto op_done;
  338. }
  339. /* next state */
  340. vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
  341. q_params->cmd = BNX2X_Q_CMD_HALT;
  342. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  343. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  344. case BNX2X_VFOP_QDTOR_TERMINATE:
  345. /* next state */
  346. vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
  347. q_params->cmd = BNX2X_Q_CMD_TERMINATE;
  348. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  349. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  350. case BNX2X_VFOP_QDTOR_CFCDEL:
  351. /* next state */
  352. vfop->state = BNX2X_VFOP_QDTOR_DONE;
  353. q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
  354. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  355. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  356. op_err:
  357. BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
  358. vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
  359. op_done:
  360. case BNX2X_VFOP_QDTOR_DONE:
  361. /* invalidate the context */
  362. qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
  363. qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
  364. bnx2x_vfop_end(bp, vf, vfop);
  365. return;
  366. default:
  367. bnx2x_vfop_default(state);
  368. }
  369. op_pending:
  370. return;
  371. }
  372. static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
  373. struct bnx2x_virtf *vf,
  374. struct bnx2x_vfop_cmd *cmd,
  375. int qid)
  376. {
  377. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  378. if (vfop) {
  379. struct bnx2x_queue_state_params *qstate =
  380. &vf->op_params.qctor.qstate;
  381. memset(qstate, 0, sizeof(*qstate));
  382. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  383. vfop->args.qdtor.qid = qid;
  384. vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
  385. bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
  386. bnx2x_vfop_qdtor, cmd->done);
  387. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
  388. cmd->block);
  389. }
  390. DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop.\n", vf->abs_vfid);
  391. return -ENOMEM;
  392. }
  393. static void
  394. bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
  395. {
  396. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  397. if (vf) {
  398. if (!vf_sb_count(vf))
  399. vf->igu_base_id = igu_sb_id;
  400. ++vf_sb_count(vf);
  401. }
  402. }
  403. /* VFOP MAC/VLAN helpers */
  404. static inline void bnx2x_vfop_credit(struct bnx2x *bp,
  405. struct bnx2x_vfop *vfop,
  406. struct bnx2x_vlan_mac_obj *obj)
  407. {
  408. struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
  409. /* update credit only if there is no error
  410. * and a valid credit counter
  411. */
  412. if (!vfop->rc && args->credit) {
  413. int cnt = 0;
  414. struct list_head *pos;
  415. list_for_each(pos, &obj->head)
  416. cnt++;
  417. atomic_set(args->credit, cnt);
  418. }
  419. }
  420. static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
  421. struct bnx2x_vfop_filter *pos,
  422. struct bnx2x_vlan_mac_data *user_req)
  423. {
  424. user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
  425. BNX2X_VLAN_MAC_DEL;
  426. switch (pos->type) {
  427. case BNX2X_VFOP_FILTER_MAC:
  428. memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
  429. break;
  430. case BNX2X_VFOP_FILTER_VLAN:
  431. user_req->u.vlan.vlan = pos->vid;
  432. break;
  433. default:
  434. BNX2X_ERR("Invalid filter type, skipping\n");
  435. return 1;
  436. }
  437. return 0;
  438. }
  439. static int bnx2x_vfop_config_list(struct bnx2x *bp,
  440. struct bnx2x_vfop_filters *filters,
  441. struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
  442. {
  443. struct bnx2x_vfop_filter *pos, *tmp;
  444. struct list_head rollback_list, *filters_list = &filters->head;
  445. struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
  446. int rc = 0, cnt = 0;
  447. INIT_LIST_HEAD(&rollback_list);
  448. list_for_each_entry_safe(pos, tmp, filters_list, link) {
  449. if (bnx2x_vfop_set_user_req(bp, pos, user_req))
  450. continue;
  451. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  452. if (rc >= 0) {
  453. cnt += pos->add ? 1 : -1;
  454. list_move(&pos->link, &rollback_list);
  455. rc = 0;
  456. } else if (rc == -EEXIST) {
  457. rc = 0;
  458. } else {
  459. BNX2X_ERR("Failed to add a new vlan_mac command\n");
  460. break;
  461. }
  462. }
  463. /* rollback if error or too many rules added */
  464. if (rc || cnt > filters->add_cnt) {
  465. BNX2X_ERR("error or too many rules added. Performing rollback\n");
  466. list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
  467. pos->add = !pos->add; /* reverse op */
  468. bnx2x_vfop_set_user_req(bp, pos, user_req);
  469. bnx2x_config_vlan_mac(bp, vlan_mac);
  470. list_del(&pos->link);
  471. }
  472. cnt = 0;
  473. if (!rc)
  474. rc = -EINVAL;
  475. }
  476. filters->add_cnt = cnt;
  477. return rc;
  478. }
  479. /* VFOP set VLAN/MAC */
  480. static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
  481. {
  482. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  483. struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
  484. struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
  485. struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
  486. enum bnx2x_vfop_vlan_mac_state state = vfop->state;
  487. if (vfop->rc < 0)
  488. goto op_err;
  489. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  490. bnx2x_vfop_reset_wq(vf);
  491. switch (state) {
  492. case BNX2X_VFOP_VLAN_MAC_CLEAR:
  493. /* next state */
  494. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  495. /* do delete */
  496. vfop->rc = obj->delete_all(bp, obj,
  497. &vlan_mac->user_req.vlan_mac_flags,
  498. &vlan_mac->ramrod_flags);
  499. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  500. case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
  501. /* next state */
  502. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  503. /* do config */
  504. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  505. if (vfop->rc == -EEXIST)
  506. vfop->rc = 0;
  507. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  508. case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
  509. vfop->rc = !!obj->raw.check_pending(&obj->raw);
  510. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  511. case BNX2X_VFOP_MAC_CONFIG_LIST:
  512. /* next state */
  513. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  514. /* do list config */
  515. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  516. if (vfop->rc)
  517. goto op_err;
  518. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  519. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  520. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  521. case BNX2X_VFOP_VLAN_CONFIG_LIST:
  522. /* next state */
  523. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  524. /* do list config */
  525. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  526. if (!vfop->rc) {
  527. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  528. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  529. }
  530. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  531. default:
  532. bnx2x_vfop_default(state);
  533. }
  534. op_err:
  535. BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
  536. op_done:
  537. kfree(filters);
  538. bnx2x_vfop_credit(bp, vfop, obj);
  539. bnx2x_vfop_end(bp, vf, vfop);
  540. op_pending:
  541. return;
  542. }
  543. struct bnx2x_vfop_vlan_mac_flags {
  544. bool drv_only;
  545. bool dont_consume;
  546. bool single_cmd;
  547. bool add;
  548. };
  549. static void
  550. bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  551. struct bnx2x_vfop_vlan_mac_flags *flags)
  552. {
  553. struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
  554. memset(ramrod, 0, sizeof(*ramrod));
  555. /* ramrod flags */
  556. if (flags->drv_only)
  557. set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
  558. if (flags->single_cmd)
  559. set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
  560. /* mac_vlan flags */
  561. if (flags->dont_consume)
  562. set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
  563. /* cmd */
  564. ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
  565. }
  566. static inline void
  567. bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  568. struct bnx2x_vfop_vlan_mac_flags *flags)
  569. {
  570. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
  571. set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
  572. }
  573. static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
  574. struct bnx2x_virtf *vf,
  575. struct bnx2x_vfop_cmd *cmd,
  576. int qid, bool drv_only)
  577. {
  578. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  579. if (vfop) {
  580. struct bnx2x_vfop_args_filters filters = {
  581. .multi_filter = NULL, /* single */
  582. .credit = NULL, /* consume credit */
  583. };
  584. struct bnx2x_vfop_vlan_mac_flags flags = {
  585. .drv_only = drv_only,
  586. .dont_consume = (filters.credit != NULL),
  587. .single_cmd = true,
  588. .add = false /* don't care */,
  589. };
  590. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  591. &vf->op_params.vlan_mac;
  592. /* set ramrod params */
  593. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  594. /* set object */
  595. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  596. /* set extra args */
  597. vfop->args.filters = filters;
  598. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  599. bnx2x_vfop_vlan_mac, cmd->done);
  600. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  601. cmd->block);
  602. }
  603. return -ENOMEM;
  604. }
  605. int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
  606. struct bnx2x_virtf *vf,
  607. struct bnx2x_vfop_cmd *cmd,
  608. struct bnx2x_vfop_filters *macs,
  609. int qid, bool drv_only)
  610. {
  611. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  612. if (vfop) {
  613. struct bnx2x_vfop_args_filters filters = {
  614. .multi_filter = macs,
  615. .credit = NULL, /* consume credit */
  616. };
  617. struct bnx2x_vfop_vlan_mac_flags flags = {
  618. .drv_only = drv_only,
  619. .dont_consume = (filters.credit != NULL),
  620. .single_cmd = false,
  621. .add = false, /* don't care since only the items in the
  622. * filters list affect the sp operation,
  623. * not the list itself
  624. */
  625. };
  626. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  627. &vf->op_params.vlan_mac;
  628. /* set ramrod params */
  629. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  630. /* set object */
  631. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  632. /* set extra args */
  633. filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
  634. vfop->args.filters = filters;
  635. bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
  636. bnx2x_vfop_vlan_mac, cmd->done);
  637. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  638. cmd->block);
  639. }
  640. return -ENOMEM;
  641. }
  642. int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
  643. struct bnx2x_virtf *vf,
  644. struct bnx2x_vfop_cmd *cmd,
  645. int qid, u16 vid, bool add)
  646. {
  647. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  648. if (vfop) {
  649. struct bnx2x_vfop_args_filters filters = {
  650. .multi_filter = NULL, /* single command */
  651. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  652. };
  653. struct bnx2x_vfop_vlan_mac_flags flags = {
  654. .drv_only = false,
  655. .dont_consume = (filters.credit != NULL),
  656. .single_cmd = true,
  657. .add = add,
  658. };
  659. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  660. &vf->op_params.vlan_mac;
  661. /* set ramrod params */
  662. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  663. ramrod->user_req.u.vlan.vlan = vid;
  664. /* set object */
  665. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  666. /* set extra args */
  667. vfop->args.filters = filters;
  668. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  669. bnx2x_vfop_vlan_mac, cmd->done);
  670. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  671. cmd->block);
  672. }
  673. return -ENOMEM;
  674. }
  675. static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
  676. struct bnx2x_virtf *vf,
  677. struct bnx2x_vfop_cmd *cmd,
  678. int qid, bool drv_only)
  679. {
  680. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  681. if (vfop) {
  682. struct bnx2x_vfop_args_filters filters = {
  683. .multi_filter = NULL, /* single command */
  684. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  685. };
  686. struct bnx2x_vfop_vlan_mac_flags flags = {
  687. .drv_only = drv_only,
  688. .dont_consume = (filters.credit != NULL),
  689. .single_cmd = true,
  690. .add = false, /* don't care */
  691. };
  692. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  693. &vf->op_params.vlan_mac;
  694. /* set ramrod params */
  695. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  696. /* set object */
  697. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  698. /* set extra args */
  699. vfop->args.filters = filters;
  700. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  701. bnx2x_vfop_vlan_mac, cmd->done);
  702. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  703. cmd->block);
  704. }
  705. return -ENOMEM;
  706. }
  707. int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
  708. struct bnx2x_virtf *vf,
  709. struct bnx2x_vfop_cmd *cmd,
  710. struct bnx2x_vfop_filters *vlans,
  711. int qid, bool drv_only)
  712. {
  713. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  714. if (vfop) {
  715. struct bnx2x_vfop_args_filters filters = {
  716. .multi_filter = vlans,
  717. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  718. };
  719. struct bnx2x_vfop_vlan_mac_flags flags = {
  720. .drv_only = drv_only,
  721. .dont_consume = (filters.credit != NULL),
  722. .single_cmd = false,
  723. .add = false, /* don't care */
  724. };
  725. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  726. &vf->op_params.vlan_mac;
  727. /* set ramrod params */
  728. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  729. /* set object */
  730. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  731. /* set extra args */
  732. filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
  733. atomic_read(filters.credit);
  734. vfop->args.filters = filters;
  735. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
  736. bnx2x_vfop_vlan_mac, cmd->done);
  737. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  738. cmd->block);
  739. }
  740. return -ENOMEM;
  741. }
  742. /* VFOP queue setup (queue constructor + set vlan 0) */
  743. static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
  744. {
  745. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  746. int qid = vfop->args.qctor.qid;
  747. enum bnx2x_vfop_qsetup_state state = vfop->state;
  748. struct bnx2x_vfop_cmd cmd = {
  749. .done = bnx2x_vfop_qsetup,
  750. .block = false,
  751. };
  752. if (vfop->rc < 0)
  753. goto op_err;
  754. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  755. switch (state) {
  756. case BNX2X_VFOP_QSETUP_CTOR:
  757. /* init the queue ctor command */
  758. vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
  759. vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
  760. if (vfop->rc)
  761. goto op_err;
  762. return;
  763. case BNX2X_VFOP_QSETUP_VLAN0:
  764. /* skip if non-leading or FPGA/EMU*/
  765. if (qid)
  766. goto op_done;
  767. /* init the queue set-vlan command (for vlan 0) */
  768. vfop->state = BNX2X_VFOP_QSETUP_DONE;
  769. vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
  770. if (vfop->rc)
  771. goto op_err;
  772. return;
  773. op_err:
  774. BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
  775. op_done:
  776. case BNX2X_VFOP_QSETUP_DONE:
  777. vf->cfg_flags |= VF_CFG_VLAN;
  778. smp_mb__before_clear_bit();
  779. set_bit(BNX2X_SP_RTNL_HYPERVISOR_VLAN,
  780. &bp->sp_rtnl_state);
  781. smp_mb__after_clear_bit();
  782. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  783. bnx2x_vfop_end(bp, vf, vfop);
  784. return;
  785. default:
  786. bnx2x_vfop_default(state);
  787. }
  788. }
  789. int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
  790. struct bnx2x_virtf *vf,
  791. struct bnx2x_vfop_cmd *cmd,
  792. int qid)
  793. {
  794. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  795. if (vfop) {
  796. vfop->args.qctor.qid = qid;
  797. bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
  798. bnx2x_vfop_qsetup, cmd->done);
  799. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
  800. cmd->block);
  801. }
  802. return -ENOMEM;
  803. }
  804. /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
  805. static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  806. {
  807. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  808. int qid = vfop->args.qx.qid;
  809. enum bnx2x_vfop_qflr_state state = vfop->state;
  810. struct bnx2x_queue_state_params *qstate;
  811. struct bnx2x_vfop_cmd cmd;
  812. bnx2x_vfop_reset_wq(vf);
  813. if (vfop->rc < 0)
  814. goto op_err;
  815. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
  816. cmd.done = bnx2x_vfop_qflr;
  817. cmd.block = false;
  818. switch (state) {
  819. case BNX2X_VFOP_QFLR_CLR_VLAN:
  820. /* vlan-clear-all: driver-only, don't consume credit */
  821. vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
  822. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, true);
  823. if (vfop->rc)
  824. goto op_err;
  825. return;
  826. case BNX2X_VFOP_QFLR_CLR_MAC:
  827. /* mac-clear-all: driver only consume credit */
  828. vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
  829. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, true);
  830. DP(BNX2X_MSG_IOV,
  831. "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d",
  832. vf->abs_vfid, vfop->rc);
  833. if (vfop->rc)
  834. goto op_err;
  835. return;
  836. case BNX2X_VFOP_QFLR_TERMINATE:
  837. qstate = &vfop->op_p->qctor.qstate;
  838. memset(qstate , 0, sizeof(*qstate));
  839. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  840. vfop->state = BNX2X_VFOP_QFLR_DONE;
  841. DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
  842. vf->abs_vfid, qstate->q_obj->state);
  843. if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
  844. qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
  845. qstate->cmd = BNX2X_Q_CMD_TERMINATE;
  846. vfop->rc = bnx2x_queue_state_change(bp, qstate);
  847. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
  848. } else {
  849. goto op_done;
  850. }
  851. op_err:
  852. BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
  853. vf->abs_vfid, qid, vfop->rc);
  854. op_done:
  855. case BNX2X_VFOP_QFLR_DONE:
  856. bnx2x_vfop_end(bp, vf, vfop);
  857. return;
  858. default:
  859. bnx2x_vfop_default(state);
  860. }
  861. op_pending:
  862. return;
  863. }
  864. static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
  865. struct bnx2x_virtf *vf,
  866. struct bnx2x_vfop_cmd *cmd,
  867. int qid)
  868. {
  869. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  870. if (vfop) {
  871. vfop->args.qx.qid = qid;
  872. bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
  873. bnx2x_vfop_qflr, cmd->done);
  874. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
  875. cmd->block);
  876. }
  877. return -ENOMEM;
  878. }
  879. /* VFOP multi-casts */
  880. static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
  881. {
  882. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  883. struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
  884. struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
  885. struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
  886. enum bnx2x_vfop_mcast_state state = vfop->state;
  887. int i;
  888. bnx2x_vfop_reset_wq(vf);
  889. if (vfop->rc < 0)
  890. goto op_err;
  891. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  892. switch (state) {
  893. case BNX2X_VFOP_MCAST_DEL:
  894. /* clear existing mcasts */
  895. vfop->state = BNX2X_VFOP_MCAST_ADD;
  896. vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
  897. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  898. case BNX2X_VFOP_MCAST_ADD:
  899. if (raw->check_pending(raw))
  900. goto op_pending;
  901. if (args->mc_num) {
  902. /* update mcast list on the ramrod params */
  903. INIT_LIST_HEAD(&mcast->mcast_list);
  904. for (i = 0; i < args->mc_num; i++)
  905. list_add_tail(&(args->mc[i].link),
  906. &mcast->mcast_list);
  907. /* add new mcasts */
  908. vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
  909. vfop->rc = bnx2x_config_mcast(bp, mcast,
  910. BNX2X_MCAST_CMD_ADD);
  911. }
  912. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  913. case BNX2X_VFOP_MCAST_CHK_DONE:
  914. vfop->rc = raw->check_pending(raw) ? 1 : 0;
  915. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  916. default:
  917. bnx2x_vfop_default(state);
  918. }
  919. op_err:
  920. BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
  921. op_done:
  922. kfree(args->mc);
  923. bnx2x_vfop_end(bp, vf, vfop);
  924. op_pending:
  925. return;
  926. }
  927. int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
  928. struct bnx2x_virtf *vf,
  929. struct bnx2x_vfop_cmd *cmd,
  930. bnx2x_mac_addr_t *mcasts,
  931. int mcast_num, bool drv_only)
  932. {
  933. struct bnx2x_vfop *vfop = NULL;
  934. size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
  935. struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
  936. NULL;
  937. if (!mc_sz || mc) {
  938. vfop = bnx2x_vfop_add(bp, vf);
  939. if (vfop) {
  940. int i;
  941. struct bnx2x_mcast_ramrod_params *ramrod =
  942. &vf->op_params.mcast;
  943. /* set ramrod params */
  944. memset(ramrod, 0, sizeof(*ramrod));
  945. ramrod->mcast_obj = &vf->mcast_obj;
  946. if (drv_only)
  947. set_bit(RAMROD_DRV_CLR_ONLY,
  948. &ramrod->ramrod_flags);
  949. /* copy mcasts pointers */
  950. vfop->args.mc_list.mc_num = mcast_num;
  951. vfop->args.mc_list.mc = mc;
  952. for (i = 0; i < mcast_num; i++)
  953. mc[i].mac = mcasts[i];
  954. bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
  955. bnx2x_vfop_mcast, cmd->done);
  956. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
  957. cmd->block);
  958. } else {
  959. kfree(mc);
  960. }
  961. }
  962. return -ENOMEM;
  963. }
  964. /* VFOP rx-mode */
  965. static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
  966. {
  967. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  968. struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
  969. enum bnx2x_vfop_rxmode_state state = vfop->state;
  970. bnx2x_vfop_reset_wq(vf);
  971. if (vfop->rc < 0)
  972. goto op_err;
  973. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  974. switch (state) {
  975. case BNX2X_VFOP_RXMODE_CONFIG:
  976. /* next state */
  977. vfop->state = BNX2X_VFOP_RXMODE_DONE;
  978. vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
  979. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  980. op_err:
  981. BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
  982. op_done:
  983. case BNX2X_VFOP_RXMODE_DONE:
  984. bnx2x_vfop_end(bp, vf, vfop);
  985. return;
  986. default:
  987. bnx2x_vfop_default(state);
  988. }
  989. op_pending:
  990. return;
  991. }
  992. int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
  993. struct bnx2x_virtf *vf,
  994. struct bnx2x_vfop_cmd *cmd,
  995. int qid, unsigned long accept_flags)
  996. {
  997. struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
  998. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  999. if (vfop) {
  1000. struct bnx2x_rx_mode_ramrod_params *ramrod =
  1001. &vf->op_params.rx_mode;
  1002. memset(ramrod, 0, sizeof(*ramrod));
  1003. /* Prepare ramrod parameters */
  1004. ramrod->cid = vfq->cid;
  1005. ramrod->cl_id = vfq_cl_id(vf, vfq);
  1006. ramrod->rx_mode_obj = &bp->rx_mode_obj;
  1007. ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
  1008. ramrod->rx_accept_flags = accept_flags;
  1009. ramrod->tx_accept_flags = accept_flags;
  1010. ramrod->pstate = &vf->filter_state;
  1011. ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
  1012. set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1013. set_bit(RAMROD_RX, &ramrod->ramrod_flags);
  1014. set_bit(RAMROD_TX, &ramrod->ramrod_flags);
  1015. ramrod->rdata =
  1016. bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
  1017. ramrod->rdata_mapping =
  1018. bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
  1019. bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
  1020. bnx2x_vfop_rxmode, cmd->done);
  1021. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
  1022. cmd->block);
  1023. }
  1024. return -ENOMEM;
  1025. }
  1026. /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
  1027. * queue destructor)
  1028. */
  1029. static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1030. {
  1031. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1032. int qid = vfop->args.qx.qid;
  1033. enum bnx2x_vfop_qteardown_state state = vfop->state;
  1034. struct bnx2x_vfop_cmd cmd;
  1035. if (vfop->rc < 0)
  1036. goto op_err;
  1037. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1038. cmd.done = bnx2x_vfop_qdown;
  1039. cmd.block = false;
  1040. switch (state) {
  1041. case BNX2X_VFOP_QTEARDOWN_RXMODE:
  1042. /* Drop all */
  1043. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
  1044. vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
  1045. if (vfop->rc)
  1046. goto op_err;
  1047. return;
  1048. case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
  1049. /* vlan-clear-all: don't consume credit */
  1050. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
  1051. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
  1052. if (vfop->rc)
  1053. goto op_err;
  1054. return;
  1055. case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
  1056. /* mac-clear-all: consume credit */
  1057. vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
  1058. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
  1059. if (vfop->rc)
  1060. goto op_err;
  1061. return;
  1062. case BNX2X_VFOP_QTEARDOWN_QDTOR:
  1063. /* run the queue destruction flow */
  1064. DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
  1065. vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
  1066. DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
  1067. vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
  1068. DP(BNX2X_MSG_IOV, "returned from cmd\n");
  1069. if (vfop->rc)
  1070. goto op_err;
  1071. return;
  1072. op_err:
  1073. BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
  1074. vf->abs_vfid, qid, vfop->rc);
  1075. case BNX2X_VFOP_QTEARDOWN_DONE:
  1076. bnx2x_vfop_end(bp, vf, vfop);
  1077. return;
  1078. default:
  1079. bnx2x_vfop_default(state);
  1080. }
  1081. }
  1082. int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
  1083. struct bnx2x_virtf *vf,
  1084. struct bnx2x_vfop_cmd *cmd,
  1085. int qid)
  1086. {
  1087. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1088. if (vfop) {
  1089. vfop->args.qx.qid = qid;
  1090. bnx2x_vfop_opset(BNX2X_VFOP_QTEARDOWN_RXMODE,
  1091. bnx2x_vfop_qdown, cmd->done);
  1092. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
  1093. cmd->block);
  1094. }
  1095. return -ENOMEM;
  1096. }
  1097. /* VF enable primitives
  1098. * when pretend is required the caller is responsible
  1099. * for calling pretend prior to calling these routines
  1100. */
  1101. /* internal vf enable - until vf is enabled internally all transactions
  1102. * are blocked. This routine should always be called last with pretend.
  1103. */
  1104. static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
  1105. {
  1106. REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
  1107. }
  1108. /* clears vf error in all semi blocks */
  1109. static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1110. {
  1111. REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1112. REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
  1113. REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1114. REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1115. }
  1116. static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1117. {
  1118. u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
  1119. u32 was_err_reg = 0;
  1120. switch (was_err_group) {
  1121. case 0:
  1122. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
  1123. break;
  1124. case 1:
  1125. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
  1126. break;
  1127. case 2:
  1128. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
  1129. break;
  1130. case 3:
  1131. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
  1132. break;
  1133. }
  1134. REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
  1135. }
  1136. static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1137. {
  1138. int i;
  1139. u32 val;
  1140. /* Set VF masks and configuration - pretend */
  1141. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1142. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
  1143. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
  1144. REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
  1145. REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
  1146. REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
  1147. REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
  1148. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  1149. val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
  1150. if (vf->cfg_flags & VF_CFG_INT_SIMD)
  1151. val |= IGU_VF_CONF_SINGLE_ISR_EN;
  1152. val &= ~IGU_VF_CONF_PARENT_MASK;
  1153. val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */
  1154. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  1155. DP(BNX2X_MSG_IOV,
  1156. "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n",
  1157. vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION));
  1158. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1159. /* iterate over all queues, clear sb consumer */
  1160. for (i = 0; i < vf_sb_count(vf); i++) {
  1161. u8 igu_sb_id = vf_igu_sb(vf, i);
  1162. /* zero prod memory */
  1163. REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
  1164. /* clear sb state machine */
  1165. bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
  1166. false /* VF */);
  1167. /* disable + update */
  1168. bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
  1169. IGU_INT_DISABLE, 1);
  1170. }
  1171. }
  1172. void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
  1173. {
  1174. /* set the VF-PF association in the FW */
  1175. storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
  1176. storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
  1177. /* clear vf errors*/
  1178. bnx2x_vf_semi_clear_err(bp, abs_vfid);
  1179. bnx2x_vf_pglue_clear_err(bp, abs_vfid);
  1180. /* internal vf-enable - pretend */
  1181. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
  1182. DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
  1183. bnx2x_vf_enable_internal(bp, true);
  1184. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1185. }
  1186. static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1187. {
  1188. /* Reset vf in IGU interrupts are still disabled */
  1189. bnx2x_vf_igu_reset(bp, vf);
  1190. /* pretend to enable the vf with the PBF */
  1191. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1192. REG_WR(bp, PBF_REG_DISABLE_VF, 0);
  1193. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1194. }
  1195. static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
  1196. {
  1197. struct pci_dev *dev;
  1198. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1199. if (!vf)
  1200. return false;
  1201. dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
  1202. if (dev)
  1203. return bnx2x_is_pcie_pending(dev);
  1204. return false;
  1205. }
  1206. int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
  1207. {
  1208. /* Verify no pending pci transactions */
  1209. if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
  1210. BNX2X_ERR("PCIE Transactions still pending\n");
  1211. return 0;
  1212. }
  1213. /* must be called after the number of PF queues and the number of VFs are
  1214. * both known
  1215. */
  1216. static void
  1217. bnx2x_iov_static_resc(struct bnx2x *bp, struct vf_pf_resc_request *resc)
  1218. {
  1219. u16 vlan_count = 0;
  1220. /* will be set only during VF-ACQUIRE */
  1221. resc->num_rxqs = 0;
  1222. resc->num_txqs = 0;
  1223. /* no credit calculcis for macs (just yet) */
  1224. resc->num_mac_filters = 1;
  1225. /* divvy up vlan rules */
  1226. vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
  1227. vlan_count = 1 << ilog2(vlan_count);
  1228. resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
  1229. /* no real limitation */
  1230. resc->num_mc_filters = 0;
  1231. /* num_sbs already set */
  1232. }
  1233. /* FLR routines: */
  1234. static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1235. {
  1236. /* reset the state variables */
  1237. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1238. vf->state = VF_FREE;
  1239. }
  1240. static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1241. {
  1242. u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
  1243. /* DQ usage counter */
  1244. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1245. bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
  1246. "DQ VF usage counter timed out",
  1247. poll_cnt);
  1248. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1249. /* FW cleanup command - poll for the results */
  1250. if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
  1251. poll_cnt))
  1252. BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
  1253. /* verify TX hw is flushed */
  1254. bnx2x_tx_hw_flushed(bp, poll_cnt);
  1255. }
  1256. static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1257. {
  1258. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1259. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  1260. enum bnx2x_vfop_flr_state state = vfop->state;
  1261. struct bnx2x_vfop_cmd cmd = {
  1262. .done = bnx2x_vfop_flr,
  1263. .block = false,
  1264. };
  1265. if (vfop->rc < 0)
  1266. goto op_err;
  1267. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1268. switch (state) {
  1269. case BNX2X_VFOP_FLR_QUEUES:
  1270. /* the cleanup operations are valid if and only if the VF
  1271. * was first acquired.
  1272. */
  1273. if (++(qx->qid) < vf_rxq_count(vf)) {
  1274. vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
  1275. qx->qid);
  1276. if (vfop->rc)
  1277. goto op_err;
  1278. return;
  1279. }
  1280. /* remove multicasts */
  1281. vfop->state = BNX2X_VFOP_FLR_HW;
  1282. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
  1283. 0, true);
  1284. if (vfop->rc)
  1285. goto op_err;
  1286. return;
  1287. case BNX2X_VFOP_FLR_HW:
  1288. /* dispatch final cleanup and wait for HW queues to flush */
  1289. bnx2x_vf_flr_clnup_hw(bp, vf);
  1290. /* release VF resources */
  1291. bnx2x_vf_free_resc(bp, vf);
  1292. /* re-open the mailbox */
  1293. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1294. goto op_done;
  1295. default:
  1296. bnx2x_vfop_default(state);
  1297. }
  1298. op_err:
  1299. BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
  1300. op_done:
  1301. vf->flr_clnup_stage = VF_FLR_ACK;
  1302. bnx2x_vfop_end(bp, vf, vfop);
  1303. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1304. }
  1305. static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
  1306. struct bnx2x_virtf *vf,
  1307. vfop_handler_t done)
  1308. {
  1309. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1310. if (vfop) {
  1311. vfop->args.qx.qid = -1; /* loop */
  1312. bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
  1313. bnx2x_vfop_flr, done);
  1314. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
  1315. }
  1316. return -ENOMEM;
  1317. }
  1318. static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
  1319. {
  1320. int i = prev_vf ? prev_vf->index + 1 : 0;
  1321. struct bnx2x_virtf *vf;
  1322. /* find next VF to cleanup */
  1323. next_vf_to_clean:
  1324. for (;
  1325. i < BNX2X_NR_VIRTFN(bp) &&
  1326. (bnx2x_vf(bp, i, state) != VF_RESET ||
  1327. bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
  1328. i++)
  1329. ;
  1330. DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
  1331. BNX2X_NR_VIRTFN(bp));
  1332. if (i < BNX2X_NR_VIRTFN(bp)) {
  1333. vf = BP_VF(bp, i);
  1334. /* lock the vf pf channel */
  1335. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1336. /* invoke the VF FLR SM */
  1337. if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
  1338. BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
  1339. vf->abs_vfid);
  1340. /* mark the VF to be ACKED and continue */
  1341. vf->flr_clnup_stage = VF_FLR_ACK;
  1342. goto next_vf_to_clean;
  1343. }
  1344. return;
  1345. }
  1346. /* we are done, update vf records */
  1347. for_each_vf(bp, i) {
  1348. vf = BP_VF(bp, i);
  1349. if (vf->flr_clnup_stage != VF_FLR_ACK)
  1350. continue;
  1351. vf->flr_clnup_stage = VF_FLR_EPILOG;
  1352. }
  1353. /* Acknowledge the handled VFs.
  1354. * we are acknowledge all the vfs which an flr was requested for, even
  1355. * if amongst them there are such that we never opened, since the mcp
  1356. * will interrupt us immediately again if we only ack some of the bits,
  1357. * resulting in an endless loop. This can happen for example in KVM
  1358. * where an 'all ones' flr request is sometimes given by hyper visor
  1359. */
  1360. DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
  1361. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1362. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1363. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
  1364. bp->vfdb->flrd_vfs[i]);
  1365. bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
  1366. /* clear the acked bits - better yet if the MCP implemented
  1367. * write to clear semantics
  1368. */
  1369. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1370. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
  1371. }
  1372. void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
  1373. {
  1374. int i;
  1375. /* Read FLR'd VFs */
  1376. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1377. bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
  1378. DP(BNX2X_MSG_MCP,
  1379. "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
  1380. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1381. for_each_vf(bp, i) {
  1382. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1383. u32 reset = 0;
  1384. if (vf->abs_vfid < 32)
  1385. reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
  1386. else
  1387. reset = bp->vfdb->flrd_vfs[1] &
  1388. (1 << (vf->abs_vfid - 32));
  1389. if (reset) {
  1390. /* set as reset and ready for cleanup */
  1391. vf->state = VF_RESET;
  1392. vf->flr_clnup_stage = VF_FLR_CLN;
  1393. DP(BNX2X_MSG_IOV,
  1394. "Initiating Final cleanup for VF %d\n",
  1395. vf->abs_vfid);
  1396. }
  1397. }
  1398. /* do the FLR cleanup for all marked VFs*/
  1399. bnx2x_vf_flr_clnup(bp, NULL);
  1400. }
  1401. /* IOV global initialization routines */
  1402. void bnx2x_iov_init_dq(struct bnx2x *bp)
  1403. {
  1404. if (!IS_SRIOV(bp))
  1405. return;
  1406. /* Set the DQ such that the CID reflect the abs_vfid */
  1407. REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
  1408. REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
  1409. /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
  1410. * the PF L2 queues
  1411. */
  1412. REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
  1413. /* The VF window size is the log2 of the max number of CIDs per VF */
  1414. REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
  1415. /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
  1416. * the Pf doorbell size although the 2 are independent.
  1417. */
  1418. REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST,
  1419. BNX2X_DB_SHIFT - BNX2X_DB_MIN_SHIFT);
  1420. /* No security checks for now -
  1421. * configure single rule (out of 16) mask = 0x1, value = 0x0,
  1422. * CID range 0 - 0x1ffff
  1423. */
  1424. REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
  1425. REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
  1426. REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
  1427. REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
  1428. /* set the number of VF allowed doorbells to the full DQ range */
  1429. REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000);
  1430. /* set the VF doorbell threshold */
  1431. REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
  1432. }
  1433. void bnx2x_iov_init_dmae(struct bnx2x *bp)
  1434. {
  1435. if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
  1436. REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
  1437. }
  1438. static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
  1439. {
  1440. struct pci_dev *dev = bp->pdev;
  1441. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1442. return dev->bus->number + ((dev->devfn + iov->offset +
  1443. iov->stride * vfid) >> 8);
  1444. }
  1445. static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
  1446. {
  1447. struct pci_dev *dev = bp->pdev;
  1448. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1449. return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
  1450. }
  1451. static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1452. {
  1453. int i, n;
  1454. struct pci_dev *dev = bp->pdev;
  1455. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1456. for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
  1457. u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
  1458. u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
  1459. size /= iov->total;
  1460. vf->bars[n].bar = start + size * vf->abs_vfid;
  1461. vf->bars[n].size = size;
  1462. }
  1463. }
  1464. static int bnx2x_ari_enabled(struct pci_dev *dev)
  1465. {
  1466. return dev->bus->self && dev->bus->self->ari_enabled;
  1467. }
  1468. static void
  1469. bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
  1470. {
  1471. int sb_id;
  1472. u32 val;
  1473. u8 fid;
  1474. /* IGU in normal mode - read CAM */
  1475. for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
  1476. val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
  1477. if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
  1478. continue;
  1479. fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
  1480. if (!(fid & IGU_FID_ENCODE_IS_PF))
  1481. bnx2x_vf_set_igu_info(bp, sb_id,
  1482. (fid & IGU_FID_VF_NUM_MASK));
  1483. DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
  1484. ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
  1485. ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
  1486. (fid & IGU_FID_VF_NUM_MASK)), sb_id,
  1487. GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
  1488. }
  1489. }
  1490. static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
  1491. {
  1492. if (bp->vfdb) {
  1493. kfree(bp->vfdb->vfqs);
  1494. kfree(bp->vfdb->vfs);
  1495. kfree(bp->vfdb);
  1496. }
  1497. bp->vfdb = NULL;
  1498. }
  1499. static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1500. {
  1501. int pos;
  1502. struct pci_dev *dev = bp->pdev;
  1503. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  1504. if (!pos) {
  1505. BNX2X_ERR("failed to find SRIOV capability in device\n");
  1506. return -ENODEV;
  1507. }
  1508. iov->pos = pos;
  1509. DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
  1510. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  1511. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
  1512. pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
  1513. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  1514. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  1515. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  1516. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  1517. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  1518. return 0;
  1519. }
  1520. static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1521. {
  1522. u32 val;
  1523. /* read the SRIOV capability structure
  1524. * The fields can be read via configuration read or
  1525. * directly from the device (starting at offset PCICFG_OFFSET)
  1526. */
  1527. if (bnx2x_sriov_pci_cfg_info(bp, iov))
  1528. return -ENODEV;
  1529. /* get the number of SRIOV bars */
  1530. iov->nres = 0;
  1531. /* read the first_vfid */
  1532. val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
  1533. iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
  1534. * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
  1535. DP(BNX2X_MSG_IOV,
  1536. "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  1537. BP_FUNC(bp),
  1538. iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
  1539. iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  1540. return 0;
  1541. }
  1542. static u8 bnx2x_iov_get_max_queue_count(struct bnx2x *bp)
  1543. {
  1544. int i;
  1545. u8 queue_count = 0;
  1546. if (IS_SRIOV(bp))
  1547. for_each_vf(bp, i)
  1548. queue_count += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1549. return queue_count;
  1550. }
  1551. /* must be called after PF bars are mapped */
  1552. int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
  1553. int num_vfs_param)
  1554. {
  1555. int err, i, qcount;
  1556. struct bnx2x_sriov *iov;
  1557. struct pci_dev *dev = bp->pdev;
  1558. bp->vfdb = NULL;
  1559. /* verify is pf */
  1560. if (IS_VF(bp))
  1561. return 0;
  1562. /* verify sriov capability is present in configuration space */
  1563. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
  1564. return 0;
  1565. /* verify chip revision */
  1566. if (CHIP_IS_E1x(bp))
  1567. return 0;
  1568. /* check if SRIOV support is turned off */
  1569. if (!num_vfs_param)
  1570. return 0;
  1571. /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
  1572. if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
  1573. BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
  1574. BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
  1575. return 0;
  1576. }
  1577. /* SRIOV can be enabled only with MSIX */
  1578. if (int_mode_param == BNX2X_INT_MODE_MSI ||
  1579. int_mode_param == BNX2X_INT_MODE_INTX) {
  1580. BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
  1581. return 0;
  1582. }
  1583. err = -EIO;
  1584. /* verify ari is enabled */
  1585. if (!bnx2x_ari_enabled(bp->pdev)) {
  1586. BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
  1587. return 0;
  1588. }
  1589. /* verify igu is in normal mode */
  1590. if (CHIP_INT_MODE_IS_BC(bp)) {
  1591. BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
  1592. return 0;
  1593. }
  1594. /* allocate the vfs database */
  1595. bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
  1596. if (!bp->vfdb) {
  1597. BNX2X_ERR("failed to allocate vf database\n");
  1598. err = -ENOMEM;
  1599. goto failed;
  1600. }
  1601. /* get the sriov info - Linux already collected all the pertinent
  1602. * information, however the sriov structure is for the private use
  1603. * of the pci module. Also we want this information regardless
  1604. * of the hyper-visor.
  1605. */
  1606. iov = &(bp->vfdb->sriov);
  1607. err = bnx2x_sriov_info(bp, iov);
  1608. if (err)
  1609. goto failed;
  1610. /* SR-IOV capability was enabled but there are no VFs*/
  1611. if (iov->total == 0)
  1612. goto failed;
  1613. iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
  1614. DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
  1615. num_vfs_param, iov->nr_virtfn);
  1616. /* allocate the vf array */
  1617. bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
  1618. BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
  1619. if (!bp->vfdb->vfs) {
  1620. BNX2X_ERR("failed to allocate vf array\n");
  1621. err = -ENOMEM;
  1622. goto failed;
  1623. }
  1624. /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
  1625. for_each_vf(bp, i) {
  1626. bnx2x_vf(bp, i, index) = i;
  1627. bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
  1628. bnx2x_vf(bp, i, state) = VF_FREE;
  1629. INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
  1630. mutex_init(&bnx2x_vf(bp, i, op_mutex));
  1631. bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
  1632. }
  1633. /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
  1634. bnx2x_get_vf_igu_cam_info(bp);
  1635. /* get the total queue count and allocate the global queue arrays */
  1636. qcount = bnx2x_iov_get_max_queue_count(bp);
  1637. /* allocate the queue arrays for all VFs */
  1638. bp->vfdb->vfqs = kzalloc(qcount * sizeof(struct bnx2x_vf_queue),
  1639. GFP_KERNEL);
  1640. if (!bp->vfdb->vfqs) {
  1641. BNX2X_ERR("failed to allocate vf queue array\n");
  1642. err = -ENOMEM;
  1643. goto failed;
  1644. }
  1645. return 0;
  1646. failed:
  1647. DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
  1648. __bnx2x_iov_free_vfdb(bp);
  1649. return err;
  1650. }
  1651. void bnx2x_iov_remove_one(struct bnx2x *bp)
  1652. {
  1653. /* if SRIOV is not enabled there's nothing to do */
  1654. if (!IS_SRIOV(bp))
  1655. return;
  1656. DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
  1657. pci_disable_sriov(bp->pdev);
  1658. DP(BNX2X_MSG_IOV, "sriov disabled\n");
  1659. /* free vf database */
  1660. __bnx2x_iov_free_vfdb(bp);
  1661. }
  1662. void bnx2x_iov_free_mem(struct bnx2x *bp)
  1663. {
  1664. int i;
  1665. if (!IS_SRIOV(bp))
  1666. return;
  1667. /* free vfs hw contexts */
  1668. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1669. struct hw_dma *cxt = &bp->vfdb->context[i];
  1670. BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
  1671. }
  1672. BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
  1673. BP_VFDB(bp)->sp_dma.mapping,
  1674. BP_VFDB(bp)->sp_dma.size);
  1675. BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
  1676. BP_VF_MBX_DMA(bp)->mapping,
  1677. BP_VF_MBX_DMA(bp)->size);
  1678. BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
  1679. BP_VF_BULLETIN_DMA(bp)->mapping,
  1680. BP_VF_BULLETIN_DMA(bp)->size);
  1681. }
  1682. int bnx2x_iov_alloc_mem(struct bnx2x *bp)
  1683. {
  1684. size_t tot_size;
  1685. int i, rc = 0;
  1686. if (!IS_SRIOV(bp))
  1687. return rc;
  1688. /* allocate vfs hw contexts */
  1689. tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
  1690. BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
  1691. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1692. struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
  1693. cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
  1694. if (cxt->size) {
  1695. BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
  1696. } else {
  1697. cxt->addr = NULL;
  1698. cxt->mapping = 0;
  1699. }
  1700. tot_size -= cxt->size;
  1701. }
  1702. /* allocate vfs ramrods dma memory - client_init and set_mac */
  1703. tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
  1704. BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
  1705. tot_size);
  1706. BP_VFDB(bp)->sp_dma.size = tot_size;
  1707. /* allocate mailboxes */
  1708. tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
  1709. BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
  1710. tot_size);
  1711. BP_VF_MBX_DMA(bp)->size = tot_size;
  1712. /* allocate local bulletin boards */
  1713. tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
  1714. BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
  1715. &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
  1716. BP_VF_BULLETIN_DMA(bp)->size = tot_size;
  1717. return 0;
  1718. alloc_mem_err:
  1719. return -ENOMEM;
  1720. }
  1721. static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
  1722. struct bnx2x_vf_queue *q)
  1723. {
  1724. u8 cl_id = vfq_cl_id(vf, q);
  1725. u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
  1726. unsigned long q_type = 0;
  1727. set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
  1728. set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
  1729. /* Queue State object */
  1730. bnx2x_init_queue_obj(bp, &q->sp_obj,
  1731. cl_id, &q->cid, 1, func_id,
  1732. bnx2x_vf_sp(bp, vf, q_data),
  1733. bnx2x_vf_sp_map(bp, vf, q_data),
  1734. q_type);
  1735. DP(BNX2X_MSG_IOV,
  1736. "initialized vf %d's queue object. func id set to %d\n",
  1737. vf->abs_vfid, q->sp_obj.func_id);
  1738. /* mac/vlan objects are per queue, but only those
  1739. * that belong to the leading queue are initialized
  1740. */
  1741. if (vfq_is_leading(q)) {
  1742. /* mac */
  1743. bnx2x_init_mac_obj(bp, &q->mac_obj,
  1744. cl_id, q->cid, func_id,
  1745. bnx2x_vf_sp(bp, vf, mac_rdata),
  1746. bnx2x_vf_sp_map(bp, vf, mac_rdata),
  1747. BNX2X_FILTER_MAC_PENDING,
  1748. &vf->filter_state,
  1749. BNX2X_OBJ_TYPE_RX_TX,
  1750. &bp->macs_pool);
  1751. /* vlan */
  1752. bnx2x_init_vlan_obj(bp, &q->vlan_obj,
  1753. cl_id, q->cid, func_id,
  1754. bnx2x_vf_sp(bp, vf, vlan_rdata),
  1755. bnx2x_vf_sp_map(bp, vf, vlan_rdata),
  1756. BNX2X_FILTER_VLAN_PENDING,
  1757. &vf->filter_state,
  1758. BNX2X_OBJ_TYPE_RX_TX,
  1759. &bp->vlans_pool);
  1760. /* mcast */
  1761. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, cl_id,
  1762. q->cid, func_id, func_id,
  1763. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1764. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1765. BNX2X_FILTER_MCAST_PENDING,
  1766. &vf->filter_state,
  1767. BNX2X_OBJ_TYPE_RX_TX);
  1768. vf->leading_rss = cl_id;
  1769. }
  1770. }
  1771. /* called by bnx2x_nic_load */
  1772. int bnx2x_iov_nic_init(struct bnx2x *bp)
  1773. {
  1774. int vfid, qcount, i;
  1775. if (!IS_SRIOV(bp)) {
  1776. DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
  1777. return 0;
  1778. }
  1779. DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
  1780. /* let FLR complete ... */
  1781. msleep(100);
  1782. /* initialize vf database */
  1783. for_each_vf(bp, vfid) {
  1784. struct bnx2x_virtf *vf = BP_VF(bp, vfid);
  1785. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
  1786. BNX2X_CIDS_PER_VF;
  1787. union cdu_context *base_cxt = (union cdu_context *)
  1788. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  1789. (base_vf_cid & (ILT_PAGE_CIDS-1));
  1790. DP(BNX2X_MSG_IOV,
  1791. "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
  1792. vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
  1793. BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
  1794. /* init statically provisioned resources */
  1795. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1796. /* queues are initialized during VF-ACQUIRE */
  1797. /* reserve the vf vlan credit */
  1798. bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
  1799. vf->filter_state = 0;
  1800. vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
  1801. /* init mcast object - This object will be re-initialized
  1802. * during VF-ACQUIRE with the proper cl_id and cid.
  1803. * It needs to be initialized here so that it can be safely
  1804. * handled by a subsequent FLR flow.
  1805. */
  1806. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
  1807. 0xFF, 0xFF, 0xFF,
  1808. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1809. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1810. BNX2X_FILTER_MCAST_PENDING,
  1811. &vf->filter_state,
  1812. BNX2X_OBJ_TYPE_RX_TX);
  1813. /* set the mailbox message addresses */
  1814. BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
  1815. (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
  1816. MBX_MSG_ALIGNED_SIZE);
  1817. BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
  1818. vfid * MBX_MSG_ALIGNED_SIZE;
  1819. /* Enable vf mailbox */
  1820. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1821. }
  1822. /* Final VF init */
  1823. qcount = 0;
  1824. for_each_vf(bp, i) {
  1825. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1826. /* fill in the BDF and bars */
  1827. vf->bus = bnx2x_vf_bus(bp, i);
  1828. vf->devfn = bnx2x_vf_devfn(bp, i);
  1829. bnx2x_vf_set_bars(bp, vf);
  1830. DP(BNX2X_MSG_IOV,
  1831. "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
  1832. vf->abs_vfid, vf->bus, vf->devfn,
  1833. (unsigned)vf->bars[0].bar, vf->bars[0].size,
  1834. (unsigned)vf->bars[1].bar, vf->bars[1].size,
  1835. (unsigned)vf->bars[2].bar, vf->bars[2].size);
  1836. /* set local queue arrays */
  1837. vf->vfqs = &bp->vfdb->vfqs[qcount];
  1838. qcount += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1839. }
  1840. return 0;
  1841. }
  1842. /* called by bnx2x_chip_cleanup */
  1843. int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
  1844. {
  1845. int i;
  1846. if (!IS_SRIOV(bp))
  1847. return 0;
  1848. /* release all the VFs */
  1849. for_each_vf(bp, i)
  1850. bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
  1851. return 0;
  1852. }
  1853. /* called by bnx2x_init_hw_func, returns the next ilt line */
  1854. int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
  1855. {
  1856. int i;
  1857. struct bnx2x_ilt *ilt = BP_ILT(bp);
  1858. if (!IS_SRIOV(bp))
  1859. return line;
  1860. /* set vfs ilt lines */
  1861. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1862. struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
  1863. ilt->lines[line+i].page = hw_cxt->addr;
  1864. ilt->lines[line+i].page_mapping = hw_cxt->mapping;
  1865. ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
  1866. }
  1867. return line + i;
  1868. }
  1869. static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
  1870. {
  1871. return ((cid >= BNX2X_FIRST_VF_CID) &&
  1872. ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
  1873. }
  1874. static
  1875. void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
  1876. struct bnx2x_vf_queue *vfq,
  1877. union event_ring_elem *elem)
  1878. {
  1879. unsigned long ramrod_flags = 0;
  1880. int rc = 0;
  1881. /* Always push next commands out, don't wait here */
  1882. set_bit(RAMROD_CONT, &ramrod_flags);
  1883. switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
  1884. case BNX2X_FILTER_MAC_PENDING:
  1885. rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
  1886. &ramrod_flags);
  1887. break;
  1888. case BNX2X_FILTER_VLAN_PENDING:
  1889. rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
  1890. &ramrod_flags);
  1891. break;
  1892. default:
  1893. BNX2X_ERR("Unsupported classification command: %d\n",
  1894. elem->message.data.eth_event.echo);
  1895. return;
  1896. }
  1897. if (rc < 0)
  1898. BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
  1899. else if (rc > 0)
  1900. DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
  1901. }
  1902. static
  1903. void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
  1904. struct bnx2x_virtf *vf)
  1905. {
  1906. struct bnx2x_mcast_ramrod_params rparam = {NULL};
  1907. int rc;
  1908. rparam.mcast_obj = &vf->mcast_obj;
  1909. vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
  1910. /* If there are pending mcast commands - send them */
  1911. if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
  1912. rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
  1913. if (rc < 0)
  1914. BNX2X_ERR("Failed to send pending mcast commands: %d\n",
  1915. rc);
  1916. }
  1917. }
  1918. static
  1919. void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
  1920. struct bnx2x_virtf *vf)
  1921. {
  1922. smp_mb__before_clear_bit();
  1923. clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1924. smp_mb__after_clear_bit();
  1925. }
  1926. int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
  1927. {
  1928. struct bnx2x_virtf *vf;
  1929. int qidx = 0, abs_vfid;
  1930. u8 opcode;
  1931. u16 cid = 0xffff;
  1932. if (!IS_SRIOV(bp))
  1933. return 1;
  1934. /* first get the cid - the only events we handle here are cfc-delete
  1935. * and set-mac completion
  1936. */
  1937. opcode = elem->message.opcode;
  1938. switch (opcode) {
  1939. case EVENT_RING_OPCODE_CFC_DEL:
  1940. cid = SW_CID((__force __le32)
  1941. elem->message.data.cfc_del_event.cid);
  1942. DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
  1943. break;
  1944. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  1945. case EVENT_RING_OPCODE_MULTICAST_RULES:
  1946. case EVENT_RING_OPCODE_FILTERS_RULES:
  1947. cid = (elem->message.data.eth_event.echo &
  1948. BNX2X_SWCID_MASK);
  1949. DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
  1950. break;
  1951. case EVENT_RING_OPCODE_VF_FLR:
  1952. abs_vfid = elem->message.data.vf_flr_event.vf_id;
  1953. DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
  1954. abs_vfid);
  1955. goto get_vf;
  1956. case EVENT_RING_OPCODE_MALICIOUS_VF:
  1957. abs_vfid = elem->message.data.malicious_vf_event.vf_id;
  1958. DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
  1959. abs_vfid, elem->message.data.malicious_vf_event.err_id);
  1960. goto get_vf;
  1961. default:
  1962. return 1;
  1963. }
  1964. /* check if the cid is the VF range */
  1965. if (!bnx2x_iov_is_vf_cid(bp, cid)) {
  1966. DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
  1967. return 1;
  1968. }
  1969. /* extract vf and rxq index from vf_cid - relies on the following:
  1970. * 1. vfid on cid reflects the true abs_vfid
  1971. * 2. The max number of VFs (per path) is 64
  1972. */
  1973. qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
  1974. abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  1975. get_vf:
  1976. vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1977. if (!vf) {
  1978. BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
  1979. cid, abs_vfid);
  1980. return 0;
  1981. }
  1982. switch (opcode) {
  1983. case EVENT_RING_OPCODE_CFC_DEL:
  1984. DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
  1985. vf->abs_vfid, qidx);
  1986. vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
  1987. &vfq_get(vf,
  1988. qidx)->sp_obj,
  1989. BNX2X_Q_CMD_CFC_DEL);
  1990. break;
  1991. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  1992. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
  1993. vf->abs_vfid, qidx);
  1994. bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
  1995. break;
  1996. case EVENT_RING_OPCODE_MULTICAST_RULES:
  1997. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
  1998. vf->abs_vfid, qidx);
  1999. bnx2x_vf_handle_mcast_eqe(bp, vf);
  2000. break;
  2001. case EVENT_RING_OPCODE_FILTERS_RULES:
  2002. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
  2003. vf->abs_vfid, qidx);
  2004. bnx2x_vf_handle_filters_eqe(bp, vf);
  2005. break;
  2006. case EVENT_RING_OPCODE_VF_FLR:
  2007. DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n",
  2008. vf->abs_vfid);
  2009. /* Do nothing for now */
  2010. break;
  2011. case EVENT_RING_OPCODE_MALICIOUS_VF:
  2012. DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d error id %x\n",
  2013. abs_vfid, elem->message.data.malicious_vf_event.err_id);
  2014. /* Do nothing for now */
  2015. break;
  2016. }
  2017. /* SRIOV: reschedule any 'in_progress' operations */
  2018. bnx2x_iov_sp_event(bp, cid, false);
  2019. return 0;
  2020. }
  2021. static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
  2022. {
  2023. /* extract the vf from vf_cid - relies on the following:
  2024. * 1. vfid on cid reflects the true abs_vfid
  2025. * 2. The max number of VFs (per path) is 64
  2026. */
  2027. int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2028. return bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2029. }
  2030. void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
  2031. struct bnx2x_queue_sp_obj **q_obj)
  2032. {
  2033. struct bnx2x_virtf *vf;
  2034. if (!IS_SRIOV(bp))
  2035. return;
  2036. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2037. if (vf) {
  2038. /* extract queue index from vf_cid - relies on the following:
  2039. * 1. vfid on cid reflects the true abs_vfid
  2040. * 2. The max number of VFs (per path) is 64
  2041. */
  2042. int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
  2043. *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
  2044. } else {
  2045. BNX2X_ERR("No vf matching cid %d\n", vf_cid);
  2046. }
  2047. }
  2048. void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
  2049. {
  2050. struct bnx2x_virtf *vf;
  2051. /* check if the cid is the VF range */
  2052. if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
  2053. return;
  2054. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2055. if (vf) {
  2056. /* set in_progress flag */
  2057. atomic_set(&vf->op_in_progress, 1);
  2058. if (queue_work)
  2059. queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
  2060. }
  2061. }
  2062. void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
  2063. {
  2064. int i;
  2065. int first_queue_query_index, num_queues_req;
  2066. dma_addr_t cur_data_offset;
  2067. struct stats_query_entry *cur_query_entry;
  2068. u8 stats_count = 0;
  2069. bool is_fcoe = false;
  2070. if (!IS_SRIOV(bp))
  2071. return;
  2072. if (!NO_FCOE(bp))
  2073. is_fcoe = true;
  2074. /* fcoe adds one global request and one queue request */
  2075. num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
  2076. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
  2077. (is_fcoe ? 0 : 1);
  2078. DP(BNX2X_MSG_IOV,
  2079. "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
  2080. BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
  2081. first_queue_query_index + num_queues_req);
  2082. cur_data_offset = bp->fw_stats_data_mapping +
  2083. offsetof(struct bnx2x_fw_stats_data, queue_stats) +
  2084. num_queues_req * sizeof(struct per_queue_stats);
  2085. cur_query_entry = &bp->fw_stats_req->
  2086. query[first_queue_query_index + num_queues_req];
  2087. for_each_vf(bp, i) {
  2088. int j;
  2089. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2090. if (vf->state != VF_ENABLED) {
  2091. DP(BNX2X_MSG_IOV,
  2092. "vf %d not enabled so no stats for it\n",
  2093. vf->abs_vfid);
  2094. continue;
  2095. }
  2096. DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
  2097. for_each_vfq(vf, j) {
  2098. struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
  2099. /* collect stats fro active queues only */
  2100. if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
  2101. BNX2X_Q_LOGICAL_STATE_STOPPED)
  2102. continue;
  2103. /* create stats query entry for this queue */
  2104. cur_query_entry->kind = STATS_TYPE_QUEUE;
  2105. cur_query_entry->index = vfq_cl_id(vf, rxq);
  2106. cur_query_entry->funcID =
  2107. cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
  2108. cur_query_entry->address.hi =
  2109. cpu_to_le32(U64_HI(vf->fw_stat_map));
  2110. cur_query_entry->address.lo =
  2111. cpu_to_le32(U64_LO(vf->fw_stat_map));
  2112. DP(BNX2X_MSG_IOV,
  2113. "added address %x %x for vf %d queue %d client %d\n",
  2114. cur_query_entry->address.hi,
  2115. cur_query_entry->address.lo, cur_query_entry->funcID,
  2116. j, cur_query_entry->index);
  2117. cur_query_entry++;
  2118. cur_data_offset += sizeof(struct per_queue_stats);
  2119. stats_count++;
  2120. }
  2121. }
  2122. bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
  2123. }
  2124. void bnx2x_iov_sp_task(struct bnx2x *bp)
  2125. {
  2126. int i;
  2127. if (!IS_SRIOV(bp))
  2128. return;
  2129. /* Iterate over all VFs and invoke state transition for VFs with
  2130. * 'in-progress' slow-path operations
  2131. */
  2132. DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
  2133. for_each_vf(bp, i) {
  2134. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2135. if (!list_empty(&vf->op_list_head) &&
  2136. atomic_read(&vf->op_in_progress)) {
  2137. DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
  2138. bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
  2139. }
  2140. }
  2141. }
  2142. static inline
  2143. struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
  2144. {
  2145. int i;
  2146. struct bnx2x_virtf *vf = NULL;
  2147. for_each_vf(bp, i) {
  2148. vf = BP_VF(bp, i);
  2149. if (stat_id >= vf->igu_base_id &&
  2150. stat_id < vf->igu_base_id + vf_sb_count(vf))
  2151. break;
  2152. }
  2153. return vf;
  2154. }
  2155. /* VF API helpers */
  2156. static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
  2157. u8 enable)
  2158. {
  2159. u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
  2160. u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
  2161. REG_WR(bp, reg, val);
  2162. }
  2163. static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2164. {
  2165. int i;
  2166. for_each_vfq(vf, i)
  2167. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2168. vfq_qzone_id(vf, vfq_get(vf, i)), false);
  2169. }
  2170. static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2171. {
  2172. u32 val;
  2173. /* clear the VF configuration - pretend */
  2174. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  2175. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  2176. val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
  2177. IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
  2178. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  2179. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  2180. }
  2181. u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2182. {
  2183. return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
  2184. BNX2X_VF_MAX_QUEUES);
  2185. }
  2186. static
  2187. int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2188. struct vf_pf_resc_request *req_resc)
  2189. {
  2190. u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2191. u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2192. return ((req_resc->num_rxqs <= rxq_cnt) &&
  2193. (req_resc->num_txqs <= txq_cnt) &&
  2194. (req_resc->num_sbs <= vf_sb_count(vf)) &&
  2195. (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
  2196. (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
  2197. }
  2198. /* CORE VF API */
  2199. int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2200. struct vf_pf_resc_request *resc)
  2201. {
  2202. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
  2203. BNX2X_CIDS_PER_VF;
  2204. union cdu_context *base_cxt = (union cdu_context *)
  2205. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  2206. (base_vf_cid & (ILT_PAGE_CIDS-1));
  2207. int i;
  2208. /* if state is 'acquired' the VF was not released or FLR'd, in
  2209. * this case the returned resources match the acquired already
  2210. * acquired resources. Verify that the requested numbers do
  2211. * not exceed the already acquired numbers.
  2212. */
  2213. if (vf->state == VF_ACQUIRED) {
  2214. DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
  2215. vf->abs_vfid);
  2216. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2217. BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
  2218. vf->abs_vfid);
  2219. return -EINVAL;
  2220. }
  2221. return 0;
  2222. }
  2223. /* Otherwise vf state must be 'free' or 'reset' */
  2224. if (vf->state != VF_FREE && vf->state != VF_RESET) {
  2225. BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
  2226. vf->abs_vfid, vf->state);
  2227. return -EINVAL;
  2228. }
  2229. /* static allocation:
  2230. * the global maximum number are fixed per VF. Fail the request if
  2231. * requested number exceed these globals
  2232. */
  2233. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2234. DP(BNX2X_MSG_IOV,
  2235. "cannot fulfill vf resource request. Placing maximal available values in response\n");
  2236. /* set the max resource in the vf */
  2237. return -ENOMEM;
  2238. }
  2239. /* Set resources counters - 0 request means max available */
  2240. vf_sb_count(vf) = resc->num_sbs;
  2241. vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2242. vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2243. if (resc->num_mac_filters)
  2244. vf_mac_rules_cnt(vf) = resc->num_mac_filters;
  2245. if (resc->num_vlan_filters)
  2246. vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
  2247. DP(BNX2X_MSG_IOV,
  2248. "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
  2249. vf_sb_count(vf), vf_rxq_count(vf),
  2250. vf_txq_count(vf), vf_mac_rules_cnt(vf),
  2251. vf_vlan_rules_cnt(vf));
  2252. /* Initialize the queues */
  2253. if (!vf->vfqs) {
  2254. DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
  2255. return -EINVAL;
  2256. }
  2257. for_each_vfq(vf, i) {
  2258. struct bnx2x_vf_queue *q = vfq_get(vf, i);
  2259. if (!q) {
  2260. DP(BNX2X_MSG_IOV, "q number %d was not allocated\n", i);
  2261. return -EINVAL;
  2262. }
  2263. q->index = i;
  2264. q->cxt = &((base_cxt + i)->eth);
  2265. q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
  2266. DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
  2267. vf->abs_vfid, i, q->index, q->cid, q->cxt);
  2268. /* init SP objects */
  2269. bnx2x_vfq_init(bp, vf, q);
  2270. }
  2271. vf->state = VF_ACQUIRED;
  2272. return 0;
  2273. }
  2274. int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
  2275. {
  2276. struct bnx2x_func_init_params func_init = {0};
  2277. u16 flags = 0;
  2278. int i;
  2279. /* the sb resources are initialized at this point, do the
  2280. * FW/HW initializations
  2281. */
  2282. for_each_vf_sb(vf, i)
  2283. bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
  2284. vf_igu_sb(vf, i), vf_igu_sb(vf, i));
  2285. /* Sanity checks */
  2286. if (vf->state != VF_ACQUIRED) {
  2287. DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
  2288. vf->abs_vfid, vf->state);
  2289. return -EINVAL;
  2290. }
  2291. /* let FLR complete ... */
  2292. msleep(100);
  2293. /* FLR cleanup epilogue */
  2294. if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
  2295. return -EBUSY;
  2296. /* reset IGU VF statistics: MSIX */
  2297. REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
  2298. /* vf init */
  2299. if (vf->cfg_flags & VF_CFG_STATS)
  2300. flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
  2301. if (vf->cfg_flags & VF_CFG_TPA)
  2302. flags |= FUNC_FLG_TPA;
  2303. if (is_vf_multi(vf))
  2304. flags |= FUNC_FLG_RSS;
  2305. /* function setup */
  2306. func_init.func_flgs = flags;
  2307. func_init.pf_id = BP_FUNC(bp);
  2308. func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
  2309. func_init.fw_stat_map = vf->fw_stat_map;
  2310. func_init.spq_map = vf->spq_map;
  2311. func_init.spq_prod = 0;
  2312. bnx2x_func_init(bp, &func_init);
  2313. /* Enable the vf */
  2314. bnx2x_vf_enable_access(bp, vf->abs_vfid);
  2315. bnx2x_vf_enable_traffic(bp, vf);
  2316. /* queue protection table */
  2317. for_each_vfq(vf, i)
  2318. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2319. vfq_qzone_id(vf, vfq_get(vf, i)), true);
  2320. vf->state = VF_ENABLED;
  2321. /* update vf bulletin board */
  2322. bnx2x_post_vf_bulletin(bp, vf->index);
  2323. return 0;
  2324. }
  2325. struct set_vf_state_cookie {
  2326. struct bnx2x_virtf *vf;
  2327. u8 state;
  2328. };
  2329. void bnx2x_set_vf_state(void *cookie)
  2330. {
  2331. struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
  2332. p->vf->state = p->state;
  2333. }
  2334. /* VFOP close (teardown the queues, delete mcasts and close HW) */
  2335. static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2336. {
  2337. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2338. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  2339. enum bnx2x_vfop_close_state state = vfop->state;
  2340. struct bnx2x_vfop_cmd cmd = {
  2341. .done = bnx2x_vfop_close,
  2342. .block = false,
  2343. };
  2344. if (vfop->rc < 0)
  2345. goto op_err;
  2346. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  2347. switch (state) {
  2348. case BNX2X_VFOP_CLOSE_QUEUES:
  2349. if (++(qx->qid) < vf_rxq_count(vf)) {
  2350. vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
  2351. if (vfop->rc)
  2352. goto op_err;
  2353. return;
  2354. }
  2355. /* remove multicasts */
  2356. vfop->state = BNX2X_VFOP_CLOSE_HW;
  2357. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
  2358. if (vfop->rc)
  2359. goto op_err;
  2360. return;
  2361. case BNX2X_VFOP_CLOSE_HW:
  2362. /* disable the interrupts */
  2363. DP(BNX2X_MSG_IOV, "disabling igu\n");
  2364. bnx2x_vf_igu_disable(bp, vf);
  2365. /* disable the VF */
  2366. DP(BNX2X_MSG_IOV, "clearing qtbl\n");
  2367. bnx2x_vf_clr_qtbl(bp, vf);
  2368. goto op_done;
  2369. default:
  2370. bnx2x_vfop_default(state);
  2371. }
  2372. op_err:
  2373. BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2374. op_done:
  2375. /* need to make sure there are no outstanding stats ramrods which may
  2376. * cause the device to access the VF's stats buffer which it will free
  2377. * as soon as we return from the close flow.
  2378. */
  2379. {
  2380. struct set_vf_state_cookie cookie;
  2381. cookie.vf = vf;
  2382. cookie.state = VF_ACQUIRED;
  2383. bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
  2384. }
  2385. DP(BNX2X_MSG_IOV, "set state to acquired\n");
  2386. bnx2x_vfop_end(bp, vf, vfop);
  2387. }
  2388. int bnx2x_vfop_close_cmd(struct bnx2x *bp,
  2389. struct bnx2x_virtf *vf,
  2390. struct bnx2x_vfop_cmd *cmd)
  2391. {
  2392. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2393. if (vfop) {
  2394. vfop->args.qx.qid = -1; /* loop */
  2395. bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
  2396. bnx2x_vfop_close, cmd->done);
  2397. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
  2398. cmd->block);
  2399. }
  2400. return -ENOMEM;
  2401. }
  2402. /* VF release can be called either: 1. The VF was acquired but
  2403. * not enabled 2. the vf was enabled or in the process of being
  2404. * enabled
  2405. */
  2406. static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2407. {
  2408. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2409. struct bnx2x_vfop_cmd cmd = {
  2410. .done = bnx2x_vfop_release,
  2411. .block = false,
  2412. };
  2413. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2414. if (vfop->rc < 0)
  2415. goto op_err;
  2416. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
  2417. vf->state == VF_FREE ? "Free" :
  2418. vf->state == VF_ACQUIRED ? "Acquired" :
  2419. vf->state == VF_ENABLED ? "Enabled" :
  2420. vf->state == VF_RESET ? "Reset" :
  2421. "Unknown");
  2422. switch (vf->state) {
  2423. case VF_ENABLED:
  2424. vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
  2425. if (vfop->rc)
  2426. goto op_err;
  2427. return;
  2428. case VF_ACQUIRED:
  2429. DP(BNX2X_MSG_IOV, "about to free resources\n");
  2430. bnx2x_vf_free_resc(bp, vf);
  2431. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2432. goto op_done;
  2433. case VF_FREE:
  2434. case VF_RESET:
  2435. /* do nothing */
  2436. goto op_done;
  2437. default:
  2438. bnx2x_vfop_default(vf->state);
  2439. }
  2440. op_err:
  2441. BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2442. op_done:
  2443. bnx2x_vfop_end(bp, vf, vfop);
  2444. }
  2445. int bnx2x_vfop_release_cmd(struct bnx2x *bp,
  2446. struct bnx2x_virtf *vf,
  2447. struct bnx2x_vfop_cmd *cmd)
  2448. {
  2449. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2450. if (vfop) {
  2451. bnx2x_vfop_opset(-1, /* use vf->state */
  2452. bnx2x_vfop_release, cmd->done);
  2453. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
  2454. cmd->block);
  2455. }
  2456. return -ENOMEM;
  2457. }
  2458. /* VF release ~ VF close + VF release-resources
  2459. * Release is the ultimate SW shutdown and is called whenever an
  2460. * irrecoverable error is encountered.
  2461. */
  2462. void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
  2463. {
  2464. struct bnx2x_vfop_cmd cmd = {
  2465. .done = NULL,
  2466. .block = block,
  2467. };
  2468. int rc;
  2469. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
  2470. rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
  2471. if (rc)
  2472. WARN(rc,
  2473. "VF[%d] Failed to allocate resources for release op- rc=%d\n",
  2474. vf->abs_vfid, rc);
  2475. }
  2476. static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
  2477. struct bnx2x_virtf *vf, u32 *sbdf)
  2478. {
  2479. *sbdf = vf->devfn | (vf->bus << 8);
  2480. }
  2481. static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2482. struct bnx2x_vf_bar_info *bar_info)
  2483. {
  2484. int n;
  2485. bar_info->nr_bars = bp->vfdb->sriov.nres;
  2486. for (n = 0; n < bar_info->nr_bars; n++)
  2487. bar_info->bars[n] = vf->bars[n];
  2488. }
  2489. void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2490. enum channel_tlvs tlv)
  2491. {
  2492. /* lock the channel */
  2493. mutex_lock(&vf->op_mutex);
  2494. /* record the locking op */
  2495. vf->op_current = tlv;
  2496. /* log the lock */
  2497. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
  2498. vf->abs_vfid, tlv);
  2499. }
  2500. void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2501. enum channel_tlvs expected_tlv)
  2502. {
  2503. WARN(expected_tlv != vf->op_current,
  2504. "lock mismatch: expected %d found %d", expected_tlv,
  2505. vf->op_current);
  2506. /* lock the channel */
  2507. mutex_unlock(&vf->op_mutex);
  2508. /* log the unlock */
  2509. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
  2510. vf->abs_vfid, vf->op_current);
  2511. /* record the locking op */
  2512. vf->op_current = CHANNEL_TLV_NONE;
  2513. }
  2514. int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
  2515. {
  2516. struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
  2517. DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
  2518. num_vfs_param, BNX2X_NR_VIRTFN(bp));
  2519. /* HW channel is only operational when PF is up */
  2520. if (bp->state != BNX2X_STATE_OPEN) {
  2521. BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
  2522. return -EINVAL;
  2523. }
  2524. /* we are always bound by the total_vfs in the configuration space */
  2525. if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
  2526. BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
  2527. num_vfs_param, BNX2X_NR_VIRTFN(bp));
  2528. num_vfs_param = BNX2X_NR_VIRTFN(bp);
  2529. }
  2530. bp->requested_nr_virtfn = num_vfs_param;
  2531. if (num_vfs_param == 0) {
  2532. pci_disable_sriov(dev);
  2533. return 0;
  2534. } else {
  2535. return bnx2x_enable_sriov(bp);
  2536. }
  2537. }
  2538. int bnx2x_enable_sriov(struct bnx2x *bp)
  2539. {
  2540. int rc = 0, req_vfs = bp->requested_nr_virtfn;
  2541. rc = pci_enable_sriov(bp->pdev, req_vfs);
  2542. if (rc) {
  2543. BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
  2544. return rc;
  2545. }
  2546. DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
  2547. return req_vfs;
  2548. }
  2549. void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
  2550. {
  2551. int vfidx;
  2552. struct pf_vf_bulletin_content *bulletin;
  2553. DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
  2554. for_each_vf(bp, vfidx) {
  2555. bulletin = BP_VF_BULLETIN(bp, vfidx);
  2556. if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
  2557. bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
  2558. }
  2559. }
  2560. void bnx2x_disable_sriov(struct bnx2x *bp)
  2561. {
  2562. pci_disable_sriov(bp->pdev);
  2563. }
  2564. static int bnx2x_vf_ndo_prep(struct bnx2x *bp, int vfidx,
  2565. struct bnx2x_virtf **vf,
  2566. struct pf_vf_bulletin_content **bulletin)
  2567. {
  2568. if (bp->state != BNX2X_STATE_OPEN) {
  2569. BNX2X_ERR("vf ndo called though PF is down\n");
  2570. return -EINVAL;
  2571. }
  2572. if (!IS_SRIOV(bp)) {
  2573. BNX2X_ERR("vf ndo called though sriov is disabled\n");
  2574. return -EINVAL;
  2575. }
  2576. if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
  2577. BNX2X_ERR("vf ndo called for uninitialized VF. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
  2578. vfidx, BNX2X_NR_VIRTFN(bp));
  2579. return -EINVAL;
  2580. }
  2581. /* init members */
  2582. *vf = BP_VF(bp, vfidx);
  2583. *bulletin = BP_VF_BULLETIN(bp, vfidx);
  2584. if (!*vf) {
  2585. BNX2X_ERR("vf ndo called but vf was null. vfidx was %d\n",
  2586. vfidx);
  2587. return -EINVAL;
  2588. }
  2589. if (!*bulletin) {
  2590. BNX2X_ERR("vf ndo called but Bulletin Board struct is null. vfidx was %d\n",
  2591. vfidx);
  2592. return -EINVAL;
  2593. }
  2594. return 0;
  2595. }
  2596. int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
  2597. struct ifla_vf_info *ivi)
  2598. {
  2599. struct bnx2x *bp = netdev_priv(dev);
  2600. struct bnx2x_virtf *vf = NULL;
  2601. struct pf_vf_bulletin_content *bulletin = NULL;
  2602. struct bnx2x_vlan_mac_obj *mac_obj;
  2603. struct bnx2x_vlan_mac_obj *vlan_obj;
  2604. int rc;
  2605. /* sanity and init */
  2606. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2607. if (rc)
  2608. return rc;
  2609. mac_obj = &bnx2x_vfq(vf, 0, mac_obj);
  2610. vlan_obj = &bnx2x_vfq(vf, 0, vlan_obj);
  2611. if (!mac_obj || !vlan_obj) {
  2612. BNX2X_ERR("VF partially initialized\n");
  2613. return -EINVAL;
  2614. }
  2615. ivi->vf = vfidx;
  2616. ivi->qos = 0;
  2617. ivi->tx_rate = 10000; /* always 10G. TBA take from link struct */
  2618. ivi->spoofchk = 1; /*always enabled */
  2619. if (vf->state == VF_ENABLED) {
  2620. /* mac and vlan are in vlan_mac objects */
  2621. mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
  2622. 0, ETH_ALEN);
  2623. vlan_obj->get_n_elements(bp, vlan_obj, 1, (u8 *)&ivi->vlan,
  2624. 0, VLAN_HLEN);
  2625. } else {
  2626. /* mac */
  2627. if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
  2628. /* mac configured by ndo so its in bulletin board */
  2629. memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
  2630. else
  2631. /* function has not been loaded yet. Show mac as 0s */
  2632. memset(&ivi->mac, 0, ETH_ALEN);
  2633. /* vlan */
  2634. if (bulletin->valid_bitmap & (1 << VLAN_VALID))
  2635. /* vlan configured by ndo so its in bulletin board */
  2636. memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
  2637. else
  2638. /* function has not been loaded yet. Show vlans as 0s */
  2639. memset(&ivi->vlan, 0, VLAN_HLEN);
  2640. }
  2641. return 0;
  2642. }
  2643. /* New mac for VF. Consider these cases:
  2644. * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
  2645. * supply at acquire.
  2646. * 2. VF has already been acquired but has not yet initialized - store in local
  2647. * bulletin board. mac will be posted on VF bulletin board after VF init. VF
  2648. * will configure this mac when it is ready.
  2649. * 3. VF has already initialized but has not yet setup a queue - post the new
  2650. * mac on VF's bulletin board right now. VF will configure this mac when it
  2651. * is ready.
  2652. * 4. VF has already set a queue - delete any macs already configured for this
  2653. * queue and manually config the new mac.
  2654. * In any event, once this function has been called refuse any attempts by the
  2655. * VF to configure any mac for itself except for this mac. In case of a race
  2656. * where the VF fails to see the new post on its bulletin board before sending a
  2657. * mac configuration request, the PF will simply fail the request and VF can try
  2658. * again after consulting its bulletin board.
  2659. */
  2660. int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
  2661. {
  2662. struct bnx2x *bp = netdev_priv(dev);
  2663. int rc, q_logical_state;
  2664. struct bnx2x_virtf *vf = NULL;
  2665. struct pf_vf_bulletin_content *bulletin = NULL;
  2666. /* sanity and init */
  2667. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2668. if (rc)
  2669. return rc;
  2670. if (!is_valid_ether_addr(mac)) {
  2671. BNX2X_ERR("mac address invalid\n");
  2672. return -EINVAL;
  2673. }
  2674. /* update PF's copy of the VF's bulletin. Will no longer accept mac
  2675. * configuration requests from vf unless match this mac
  2676. */
  2677. bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
  2678. memcpy(bulletin->mac, mac, ETH_ALEN);
  2679. /* Post update on VF's bulletin board */
  2680. rc = bnx2x_post_vf_bulletin(bp, vfidx);
  2681. if (rc) {
  2682. BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
  2683. return rc;
  2684. }
  2685. /* is vf initialized and queue set up? */
  2686. q_logical_state =
  2687. bnx2x_get_q_logical_state(bp, &bnx2x_vfq(vf, 0, sp_obj));
  2688. if (vf->state == VF_ENABLED &&
  2689. q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  2690. /* configure the mac in device on this vf's queue */
  2691. unsigned long ramrod_flags = 0;
  2692. struct bnx2x_vlan_mac_obj *mac_obj = &bnx2x_vfq(vf, 0, mac_obj);
  2693. /* must lock vfpf channel to protect against vf flows */
  2694. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2695. /* remove existing eth macs */
  2696. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
  2697. if (rc) {
  2698. BNX2X_ERR("failed to delete eth macs\n");
  2699. return -EINVAL;
  2700. }
  2701. /* remove existing uc list macs */
  2702. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
  2703. if (rc) {
  2704. BNX2X_ERR("failed to delete uc_list macs\n");
  2705. return -EINVAL;
  2706. }
  2707. /* configure the new mac to device */
  2708. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  2709. bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
  2710. BNX2X_ETH_MAC, &ramrod_flags);
  2711. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2712. }
  2713. return 0;
  2714. }
  2715. int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
  2716. {
  2717. struct bnx2x *bp = netdev_priv(dev);
  2718. int rc, q_logical_state;
  2719. struct bnx2x_virtf *vf = NULL;
  2720. struct pf_vf_bulletin_content *bulletin = NULL;
  2721. /* sanity and init */
  2722. rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
  2723. if (rc)
  2724. return rc;
  2725. if (vlan > 4095) {
  2726. BNX2X_ERR("illegal vlan value %d\n", vlan);
  2727. return -EINVAL;
  2728. }
  2729. DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
  2730. vfidx, vlan, 0);
  2731. /* update PF's copy of the VF's bulletin. No point in posting the vlan
  2732. * to the VF since it doesn't have anything to do with it. But it useful
  2733. * to store it here in case the VF is not up yet and we can only
  2734. * configure the vlan later when it does.
  2735. */
  2736. bulletin->valid_bitmap |= 1 << VLAN_VALID;
  2737. bulletin->vlan = vlan;
  2738. /* is vf initialized and queue set up? */
  2739. q_logical_state =
  2740. bnx2x_get_q_logical_state(bp, &bnx2x_vfq(vf, 0, sp_obj));
  2741. if (vf->state == VF_ENABLED &&
  2742. q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  2743. /* configure the vlan in device on this vf's queue */
  2744. unsigned long ramrod_flags = 0;
  2745. unsigned long vlan_mac_flags = 0;
  2746. struct bnx2x_vlan_mac_obj *vlan_obj =
  2747. &bnx2x_vfq(vf, 0, vlan_obj);
  2748. struct bnx2x_vlan_mac_ramrod_params ramrod_param;
  2749. struct bnx2x_queue_state_params q_params = {NULL};
  2750. struct bnx2x_queue_update_params *update_params;
  2751. memset(&ramrod_param, 0, sizeof(ramrod_param));
  2752. /* must lock vfpf channel to protect against vf flows */
  2753. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
  2754. /* remove existing vlans */
  2755. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  2756. rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
  2757. &ramrod_flags);
  2758. if (rc) {
  2759. BNX2X_ERR("failed to delete vlans\n");
  2760. return -EINVAL;
  2761. }
  2762. /* send queue update ramrod to configure default vlan and silent
  2763. * vlan removal
  2764. */
  2765. __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
  2766. q_params.cmd = BNX2X_Q_CMD_UPDATE;
  2767. q_params.q_obj = &bnx2x_vfq(vf, 0, sp_obj);
  2768. update_params = &q_params.params.update;
  2769. __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
  2770. &update_params->update_flags);
  2771. __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
  2772. &update_params->update_flags);
  2773. if (vlan == 0) {
  2774. /* if vlan is 0 then we want to leave the VF traffic
  2775. * untagged, and leave the incoming traffic untouched
  2776. * (i.e. do not remove any vlan tags).
  2777. */
  2778. __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
  2779. &update_params->update_flags);
  2780. __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
  2781. &update_params->update_flags);
  2782. } else {
  2783. /* configure the new vlan to device */
  2784. __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
  2785. ramrod_param.vlan_mac_obj = vlan_obj;
  2786. ramrod_param.ramrod_flags = ramrod_flags;
  2787. ramrod_param.user_req.u.vlan.vlan = vlan;
  2788. ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
  2789. rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
  2790. if (rc) {
  2791. BNX2X_ERR("failed to configure vlan\n");
  2792. return -EINVAL;
  2793. }
  2794. /* configure default vlan to vf queue and set silent
  2795. * vlan removal (the vf remains unaware of this vlan).
  2796. */
  2797. update_params = &q_params.params.update;
  2798. __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
  2799. &update_params->update_flags);
  2800. __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
  2801. &update_params->update_flags);
  2802. update_params->def_vlan = vlan;
  2803. }
  2804. /* Update the Queue state */
  2805. rc = bnx2x_queue_state_change(bp, &q_params);
  2806. if (rc) {
  2807. BNX2X_ERR("Failed to configure default VLAN\n");
  2808. return rc;
  2809. }
  2810. /* clear the flag indicating that this VF needs its vlan
  2811. * (will only be set if the HV configured th Vlan before vf was
  2812. * and we were called because the VF came up later
  2813. */
  2814. vf->cfg_flags &= ~VF_CFG_VLAN;
  2815. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
  2816. }
  2817. return 0;
  2818. }
  2819. /* crc is the first field in the bulletin board. Compute the crc over the
  2820. * entire bulletin board excluding the crc field itself. Use the length field
  2821. * as the Bulletin Board was posted by a PF with possibly a different version
  2822. * from the vf which will sample it. Therefore, the length is computed by the
  2823. * PF and the used blindly by the VF.
  2824. */
  2825. u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
  2826. struct pf_vf_bulletin_content *bulletin)
  2827. {
  2828. return crc32(BULLETIN_CRC_SEED,
  2829. ((u8 *)bulletin) + sizeof(bulletin->crc),
  2830. bulletin->length - sizeof(bulletin->crc));
  2831. }
  2832. /* Check for new posts on the bulletin board */
  2833. enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
  2834. {
  2835. struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
  2836. int attempts;
  2837. /* bulletin board hasn't changed since last sample */
  2838. if (bp->old_bulletin.version == bulletin.version)
  2839. return PFVF_BULLETIN_UNCHANGED;
  2840. /* validate crc of new bulletin board */
  2841. if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
  2842. /* sampling structure in mid post may result with corrupted data
  2843. * validate crc to ensure coherency.
  2844. */
  2845. for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
  2846. bulletin = bp->pf2vf_bulletin->content;
  2847. if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
  2848. &bulletin))
  2849. break;
  2850. BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
  2851. bulletin.crc,
  2852. bnx2x_crc_vf_bulletin(bp, &bulletin));
  2853. }
  2854. if (attempts >= BULLETIN_ATTEMPTS) {
  2855. BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
  2856. attempts);
  2857. return PFVF_BULLETIN_CRC_ERR;
  2858. }
  2859. }
  2860. /* the mac address in bulletin board is valid and is new */
  2861. if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
  2862. memcmp(bulletin.mac, bp->old_bulletin.mac, ETH_ALEN)) {
  2863. /* update new mac to net device */
  2864. memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
  2865. }
  2866. /* the vlan in bulletin board is valid and is new */
  2867. if (bulletin.valid_bitmap & 1 << VLAN_VALID)
  2868. memcpy(&bulletin.vlan, &bp->old_bulletin.vlan, VLAN_HLEN);
  2869. /* copy new bulletin board to bp */
  2870. bp->old_bulletin = bulletin;
  2871. return PFVF_BULLETIN_UPDATED;
  2872. }
  2873. void bnx2x_timer_sriov(struct bnx2x *bp)
  2874. {
  2875. bnx2x_sample_bulletin(bp);
  2876. /* if channel is down we need to self destruct */
  2877. if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) {
  2878. smp_mb__before_clear_bit();
  2879. set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
  2880. &bp->sp_rtnl_state);
  2881. smp_mb__after_clear_bit();
  2882. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  2883. }
  2884. }
  2885. void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
  2886. {
  2887. /* vf doorbells are embedded within the regview */
  2888. return bp->regview + PXP_VF_ADDR_DB_START;
  2889. }
  2890. int bnx2x_vf_pci_alloc(struct bnx2x *bp)
  2891. {
  2892. mutex_init(&bp->vf2pf_mutex);
  2893. /* allocate vf2pf mailbox for vf to pf channel */
  2894. BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
  2895. sizeof(struct bnx2x_vf_mbx_msg));
  2896. /* allocate pf 2 vf bulletin board */
  2897. BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
  2898. sizeof(union pf_vf_bulletin));
  2899. return 0;
  2900. alloc_mem_err:
  2901. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
  2902. sizeof(struct bnx2x_vf_mbx_msg));
  2903. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
  2904. sizeof(union pf_vf_bulletin));
  2905. return -ENOMEM;
  2906. }
  2907. int bnx2x_open_epilog(struct bnx2x *bp)
  2908. {
  2909. /* Enable sriov via delayed work. This must be done via delayed work
  2910. * because it causes the probe of the vf devices to be run, which invoke
  2911. * register_netdevice which must have rtnl lock taken. As we are holding
  2912. * the lock right now, that could only work if the probe would not take
  2913. * the lock. However, as the probe of the vf may be called from other
  2914. * contexts as well (such as passthrough to vm fails) it can't assume
  2915. * the lock is being held for it. Using delayed work here allows the
  2916. * probe code to simply take the lock (i.e. wait for it to be released
  2917. * if it is being held). We only want to do this if the number of VFs
  2918. * was set before PF driver was loaded.
  2919. */
  2920. if (IS_SRIOV(bp) && BNX2X_NR_VIRTFN(bp)) {
  2921. smp_mb__before_clear_bit();
  2922. set_bit(BNX2X_SP_RTNL_ENABLE_SRIOV, &bp->sp_rtnl_state);
  2923. smp_mb__after_clear_bit();
  2924. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  2925. }
  2926. return 0;
  2927. }
  2928. void bnx2x_iov_channel_down(struct bnx2x *bp)
  2929. {
  2930. int vf_idx;
  2931. struct pf_vf_bulletin_content *bulletin;
  2932. if (!IS_SRIOV(bp))
  2933. return;
  2934. for_each_vf(bp, vf_idx) {
  2935. /* locate this VFs bulletin board and update the channel down
  2936. * bit
  2937. */
  2938. bulletin = BP_VF_BULLETIN(bp, vf_idx);
  2939. bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
  2940. /* update vf bulletin board */
  2941. bnx2x_post_vf_bulletin(bp, vf_idx);
  2942. }
  2943. }