Accueil Explorer Aide
S'inscrire Connexion
phyus
/
linux-vybrid_public
8
0
Fork 0
Fichiers Tickets 0 Pull Requests 0 Wiki
Aborescence: 07d9714365
Branches Tags
linux-vybrid_pu...
/
arch
/
arm
/
mach-stmp378x
/
include
/
mach
/
regs-pinctrl.h

regs-pinctrl.h 7.9 KB
Historique Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143 
  1. /*
    2. 

  2.  * STMP PINCTRL Register Definitions
    3. 

  3.  *
    4. 

  4.  * Copyright (c) 2008 Freescale Semiconductor
    5. 

  5.  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
    6. 

  6.  *
    7. 

  7.  * This program is free software; you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License as published by
    9. 

  9.  * the Free Software Foundation; either version 2 of the License, or
    10. 

  10.  * (at your option) any later version.
    11. 

  11.  *
    12. 

  12.  * This program is distributed in the hope that it will be useful,
    13. 

  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14. 

  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15. 

  15.  * GNU General Public License for more details.
    16. 

  16.  *
    17. 

  17.  * You should have received a copy of the GNU General Public License
    18. 

  18.  * along with this program; if not, write to the Free Software
    19. 

  19.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
    20. 

  20.  */
    21. 

  21. 

  22. #ifndef __ARCH_ARM___PINCTRL_H
    23. 

  23. #define __ARCH_ARM___PINCTRL_H  1
    24. 

  24. 

  25. #include <mach/stmp3xxx_regs.h>
    26. 

  26. 

  27. #define REGS_PINCTRL_BASE (REGS_BASE + 0x18000)
    28. 

  28. #define REGS_PINCTRL_BASE_PHYS (0x80018000)
    29. 

  29. #define REGS_PINCTRL_SIZE 0x00002000
    30. 

  30. HW_REGISTER(HW_PINCTRL_CTRL, REGS_PINCTRL_BASE, 0x00000000)
    31. 

  31. #define HW_PINCTRL_CTRL_ADDR (REGS_PINCTRL_BASE + 0x00000000)
    32. 

  32. #define BM_PINCTRL_CTRL_SFTRST 0x80000000
    33. 

  33. #define BM_PINCTRL_CTRL_CLKGATE 0x40000000
    34. 

  34. #define BM_PINCTRL_CTRL_PRESENT3 0x08000000
    35. 

  35. #define BM_PINCTRL_CTRL_PRESENT2 0x04000000
    36. 

  36. #define BM_PINCTRL_CTRL_PRESENT1 0x02000000
    37. 

  37. #define BM_PINCTRL_CTRL_PRESENT0 0x01000000
    38. 

  38. #define BM_PINCTRL_CTRL_IRQOUT2 0x00000004
    39. 

  39. #define BM_PINCTRL_CTRL_IRQOUT1 0x00000002
    40. 

  40. #define BM_PINCTRL_CTRL_IRQOUT0 0x00000001
    41. 

  41. HW_REGISTER(HW_PINCTRL_MUXSEL0, REGS_PINCTRL_BASE, 0x00000100)
    42. 

  42. #define HW_PINCTRL_MUXSEL0_ADDR (REGS_PINCTRL_BASE + 0x00000100)
    43. 

  43. HW_REGISTER(HW_PINCTRL_MUXSEL1, REGS_PINCTRL_BASE, 0x00000110)
    44. 

  44. #define HW_PINCTRL_MUXSEL1_ADDR (REGS_PINCTRL_BASE + 0x00000110)
    45. 

  45. HW_REGISTER(HW_PINCTRL_MUXSEL2, REGS_PINCTRL_BASE, 0x00000120)
    46. 

  46. #define HW_PINCTRL_MUXSEL2_ADDR (REGS_PINCTRL_BASE + 0x00000120)
    47. 

  47. HW_REGISTER(HW_PINCTRL_MUXSEL3, REGS_PINCTRL_BASE, 0x00000130)
    48. 

  48. #define HW_PINCTRL_MUXSEL3_ADDR (REGS_PINCTRL_BASE + 0x00000130)
    49. 

  49. HW_REGISTER(HW_PINCTRL_MUXSEL4, REGS_PINCTRL_BASE, 0x00000140)
    50. 

  50. #define HW_PINCTRL_MUXSEL4_ADDR (REGS_PINCTRL_BASE + 0x00000140)
    51. 

  51. HW_REGISTER(HW_PINCTRL_MUXSEL5, REGS_PINCTRL_BASE, 0x00000150)
    52. 

  52. #define HW_PINCTRL_MUXSEL5_ADDR (REGS_PINCTRL_BASE + 0x00000150)
    53. 

  53. HW_REGISTER(HW_PINCTRL_MUXSEL6, REGS_PINCTRL_BASE, 0x00000160)
    54. 

  54. #define HW_PINCTRL_MUXSEL6_ADDR (REGS_PINCTRL_BASE + 0x00000160)
    55. 

  55. HW_REGISTER(HW_PINCTRL_MUXSEL7, REGS_PINCTRL_BASE, 0x00000170)
    56. 

  56. #define HW_PINCTRL_MUXSEL7_ADDR (REGS_PINCTRL_BASE + 0x00000170)
    57. 

  57. HW_REGISTER(HW_PINCTRL_DRIVE0, REGS_PINCTRL_BASE, 0x00000200)
    58. 

  58. #define HW_PINCTRL_DRIVE0_ADDR (REGS_PINCTRL_BASE + 0x00000200)
    59. 

  59. HW_REGISTER(HW_PINCTRL_DRIVE1, REGS_PINCTRL_BASE, 0x00000210)
    60. 

  60. #define HW_PINCTRL_DRIVE1_ADDR (REGS_PINCTRL_BASE + 0x00000210)
    61. 

  61. HW_REGISTER(HW_PINCTRL_DRIVE2, REGS_PINCTRL_BASE, 0x00000220)
    62. 

  62. #define HW_PINCTRL_DRIVE2_ADDR (REGS_PINCTRL_BASE + 0x00000220)
    63. 

  63. HW_REGISTER(HW_PINCTRL_DRIVE3, REGS_PINCTRL_BASE, 0x00000230)
    64. 

  64. #define HW_PINCTRL_DRIVE3_ADDR (REGS_PINCTRL_BASE + 0x00000230)
    65. 

  65. HW_REGISTER(HW_PINCTRL_DRIVE4, REGS_PINCTRL_BASE, 0x00000240)
    66. 

  66. #define HW_PINCTRL_DRIVE4_ADDR (REGS_PINCTRL_BASE + 0x00000240)
    67. 

  67. HW_REGISTER(HW_PINCTRL_DRIVE5, REGS_PINCTRL_BASE, 0x00000250)
    68. 

  68. #define HW_PINCTRL_DRIVE5_ADDR (REGS_PINCTRL_BASE + 0x00000250)
    69. 

  69. HW_REGISTER(HW_PINCTRL_DRIVE6, REGS_PINCTRL_BASE, 0x00000260)
    70. 

  70. #define HW_PINCTRL_DRIVE6_ADDR (REGS_PINCTRL_BASE + 0x00000260)
    71. 

  71. HW_REGISTER(HW_PINCTRL_DRIVE7, REGS_PINCTRL_BASE, 0x00000270)
    72. 

  72. #define HW_PINCTRL_DRIVE7_ADDR (REGS_PINCTRL_BASE + 0x00000270)
    73. 

  73. HW_REGISTER(HW_PINCTRL_DRIVE8, REGS_PINCTRL_BASE, 0x00000280)
    74. 

  74. #define HW_PINCTRL_DRIVE8_ADDR (REGS_PINCTRL_BASE + 0x00000280)
    75. 

  75. HW_REGISTER(HW_PINCTRL_DRIVE9, REGS_PINCTRL_BASE, 0x00000290)
    76. 

  76. #define HW_PINCTRL_DRIVE9_ADDR (REGS_PINCTRL_BASE + 0x00000290)
    77. 

  77. HW_REGISTER(HW_PINCTRL_DRIVE10, REGS_PINCTRL_BASE, 0x000002a0)
    78. 

  78. #define HW_PINCTRL_DRIVE10_ADDR (REGS_PINCTRL_BASE + 0x000002a0)
    79. 

  79. HW_REGISTER(HW_PINCTRL_DRIVE11, REGS_PINCTRL_BASE, 0x000002b0)
    80. 

  80. #define HW_PINCTRL_DRIVE11_ADDR (REGS_PINCTRL_BASE + 0x000002b0)
    81. 

  81. HW_REGISTER(HW_PINCTRL_DRIVE12, REGS_PINCTRL_BASE, 0x000002c0)
    82. 

  82. #define HW_PINCTRL_DRIVE12_ADDR (REGS_PINCTRL_BASE + 0x000002c0)
    83. 

  83. HW_REGISTER(HW_PINCTRL_DRIVE13, REGS_PINCTRL_BASE, 0x000002d0)
    84. 

  84. #define HW_PINCTRL_DRIVE13_ADDR (REGS_PINCTRL_BASE + 0x000002d0)
    85. 

  85. HW_REGISTER(HW_PINCTRL_DRIVE14, REGS_PINCTRL_BASE, 0x000002e0)
    86. 

  86. #define HW_PINCTRL_DRIVE14_ADDR (REGS_PINCTRL_BASE + 0x000002e0)
    87. 

  87. HW_REGISTER(HW_PINCTRL_PULL0, REGS_PINCTRL_BASE, 0x00000400)
    88. 

  88. #define HW_PINCTRL_PULL0_ADDR (REGS_PINCTRL_BASE + 0x00000400)
    89. 

  89. HW_REGISTER(HW_PINCTRL_PULL1, REGS_PINCTRL_BASE, 0x00000410)
    90. 

  90. #define HW_PINCTRL_PULL1_ADDR (REGS_PINCTRL_BASE + 0x00000410)
    91. 

  91. HW_REGISTER(HW_PINCTRL_PULL2, REGS_PINCTRL_BASE, 0x00000420)
    92. 

  92. #define HW_PINCTRL_PULL2_ADDR (REGS_PINCTRL_BASE + 0x00000420)
    93. 

  93. HW_REGISTER(HW_PINCTRL_PULL3, REGS_PINCTRL_BASE, 0x00000430)
    94. 

  94. #define HW_PINCTRL_PULL3_ADDR (REGS_PINCTRL_BASE + 0x00000430)
    95. 

  95. HW_REGISTER(HW_PINCTRL_DOUT0, REGS_PINCTRL_BASE, 0x00000500)
    96. 

  96. #define HW_PINCTRL_DOUT0_ADDR (REGS_PINCTRL_BASE + 0x00000500)
    97. 

  97. HW_REGISTER(HW_PINCTRL_DOUT1, REGS_PINCTRL_BASE, 0x00000510)
    98. 

  98. #define HW_PINCTRL_DOUT1_ADDR (REGS_PINCTRL_BASE + 0x00000510)
    99. 

  99. HW_REGISTER(HW_PINCTRL_DOUT2, REGS_PINCTRL_BASE, 0x00000520)
    100. 

  100. #define HW_PINCTRL_DOUT2_ADDR (REGS_PINCTRL_BASE + 0x00000520)
    101. 

  101. HW_REGISTER(HW_PINCTRL_DIN0, REGS_PINCTRL_BASE, 0x00000600)
    102. 

  102. #define HW_PINCTRL_DIN0_ADDR (REGS_PINCTRL_BASE + 0x00000600)
    103. 

  103. HW_REGISTER(HW_PINCTRL_DIN1, REGS_PINCTRL_BASE, 0x00000610)
    104. 

  104. #define HW_PINCTRL_DIN1_ADDR (REGS_PINCTRL_BASE + 0x00000610)
    105. 

  105. HW_REGISTER(HW_PINCTRL_DIN2, REGS_PINCTRL_BASE, 0x00000620)
    106. 

  106. #define HW_PINCTRL_DIN2_ADDR (REGS_PINCTRL_BASE + 0x00000620)
    107. 

  107. HW_REGISTER(HW_PINCTRL_DOE0, REGS_PINCTRL_BASE, 0x00000700)
    108. 

  108. #define HW_PINCTRL_DOE0_ADDR (REGS_PINCTRL_BASE + 0x00000700)
    109. 

  109. HW_REGISTER(HW_PINCTRL_DOE1, REGS_PINCTRL_BASE, 0x00000710)
    110. 

  110. #define HW_PINCTRL_DOE1_ADDR (REGS_PINCTRL_BASE + 0x00000710)
    111. 

  111. HW_REGISTER(HW_PINCTRL_DOE2, REGS_PINCTRL_BASE, 0x00000720)
    112. 

  112. #define HW_PINCTRL_DOE2_ADDR (REGS_PINCTRL_BASE + 0x00000720)
    113. 

  113. HW_REGISTER(HW_PINCTRL_PIN2IRQ0, REGS_PINCTRL_BASE, 0x00000800)
    114. 

  114. #define HW_PINCTRL_PIN2IRQ0_ADDR (REGS_PINCTRL_BASE + 0x00000800)
    115. 

  115. HW_REGISTER(HW_PINCTRL_PIN2IRQ1, REGS_PINCTRL_BASE, 0x00000810)
    116. 

  116. #define HW_PINCTRL_PIN2IRQ1_ADDR (REGS_PINCTRL_BASE + 0x00000810)
    117. 

  117. HW_REGISTER(HW_PINCTRL_PIN2IRQ2, REGS_PINCTRL_BASE, 0x00000820)
    118. 

  118. #define HW_PINCTRL_PIN2IRQ2_ADDR (REGS_PINCTRL_BASE + 0x00000820)
    119. 

  119. HW_REGISTER(HW_PINCTRL_IRQEN0, REGS_PINCTRL_BASE, 0x00000900)
    120. 

  120. #define HW_PINCTRL_IRQEN0_ADDR (REGS_PINCTRL_BASE + 0x00000900)
    121. 

  121. HW_REGISTER(HW_PINCTRL_IRQEN1, REGS_PINCTRL_BASE, 0x00000910)
    122. 

  122. #define HW_PINCTRL_IRQEN1_ADDR (REGS_PINCTRL_BASE + 0x00000910)
    123. 

  123. HW_REGISTER(HW_PINCTRL_IRQEN2, REGS_PINCTRL_BASE, 0x00000920)
    124. 

  124. #define HW_PINCTRL_IRQEN2_ADDR (REGS_PINCTRL_BASE + 0x00000920)
    125. 

  125. HW_REGISTER(HW_PINCTRL_IRQLEVEL0, REGS_PINCTRL_BASE, 0x00000a00)
    126. 

  126. #define HW_PINCTRL_IRQLEVEL0_ADDR (REGS_PINCTRL_BASE + 0x00000a00)
    127. 

  127. HW_REGISTER(HW_PINCTRL_IRQLEVEL1, REGS_PINCTRL_BASE, 0x00000a10)
    128. 

  128. #define HW_PINCTRL_IRQLEVEL1_ADDR (REGS_PINCTRL_BASE + 0x00000a10)
    129. 

  129. HW_REGISTER(HW_PINCTRL_IRQLEVEL2, REGS_PINCTRL_BASE, 0x00000a20)
    130. 

  130. #define HW_PINCTRL_IRQLEVEL2_ADDR (REGS_PINCTRL_BASE + 0x00000a20)
    131. 

  131. HW_REGISTER(HW_PINCTRL_IRQPOL0, REGS_PINCTRL_BASE, 0x00000b00)
    132. 

  132. #define HW_PINCTRL_IRQPOL0_ADDR (REGS_PINCTRL_BASE + 0x00000b00)
    133. 

  133. HW_REGISTER(HW_PINCTRL_IRQPOL1, REGS_PINCTRL_BASE, 0x00000b10)
    134. 

  134. #define HW_PINCTRL_IRQPOL1_ADDR (REGS_PINCTRL_BASE + 0x00000b10)
    135. 

  135. HW_REGISTER(HW_PINCTRL_IRQPOL2, REGS_PINCTRL_BASE, 0x00000b20)
    136. 

  136. #define HW_PINCTRL_IRQPOL2_ADDR (REGS_PINCTRL_BASE + 0x00000b20)
    137. 

  137. HW_REGISTER(HW_PINCTRL_IRQSTAT0, REGS_PINCTRL_BASE, 0x00000c00)
    138. 

  138. #define HW_PINCTRL_IRQSTAT0_ADDR (REGS_PINCTRL_BASE + 0x00000c00)
    139. 

  139. HW_REGISTER(HW_PINCTRL_IRQSTAT1, REGS_PINCTRL_BASE, 0x00000c10)
    140. 

  140. #define HW_PINCTRL_IRQSTAT1_ADDR (REGS_PINCTRL_BASE + 0x00000c10)
    141. 

  141. HW_REGISTER(HW_PINCTRL_IRQSTAT2, REGS_PINCTRL_BASE, 0x00000c20)
    142. 

  142. #define HW_PINCTRL_IRQSTAT2_ADDR (REGS_PINCTRL_BASE + 0x00000c20)
    143. 

  143. #endif /* __ARCH_ARM___PINCTRL_H */
    144.