e1000_main.c 121 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.1.16-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  89. /* required last entry */
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  93. int e1000_up(struct e1000_adapter *adapter);
  94. void e1000_down(struct e1000_adapter *adapter);
  95. void e1000_reset(struct e1000_adapter *adapter);
  96. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  97. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  98. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  99. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  100. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  101. int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  102. struct e1000_tx_ring *txdr);
  103. int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  104. struct e1000_rx_ring *rxdr);
  105. void e1000_free_tx_resources(struct e1000_adapter *adapter,
  106. struct e1000_tx_ring *tx_ring);
  107. void e1000_free_rx_resources(struct e1000_adapter *adapter,
  108. struct e1000_rx_ring *rx_ring);
  109. void e1000_update_stats(struct e1000_adapter *adapter);
  110. /* Local Function Prototypes */
  111. static int e1000_init_module(void);
  112. static void e1000_exit_module(void);
  113. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  114. static void __devexit e1000_remove(struct pci_dev *pdev);
  115. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  116. #ifdef CONFIG_E1000_MQ
  117. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  118. #endif
  119. static int e1000_sw_init(struct e1000_adapter *adapter);
  120. static int e1000_open(struct net_device *netdev);
  121. static int e1000_close(struct net_device *netdev);
  122. static void e1000_configure_tx(struct e1000_adapter *adapter);
  123. static void e1000_configure_rx(struct e1000_adapter *adapter);
  124. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  125. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  126. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  127. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  130. struct e1000_rx_ring *rx_ring);
  131. static void e1000_set_multi(struct net_device *netdev);
  132. static void e1000_update_phy_info(unsigned long data);
  133. static void e1000_watchdog(unsigned long data);
  134. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  135. static void e1000_82547_tx_fifo_stall(unsigned long data);
  136. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  137. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  138. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  139. static int e1000_set_mac(struct net_device *netdev, void *p);
  140. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  141. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  142. struct e1000_tx_ring *tx_ring);
  143. #ifdef CONFIG_E1000_NAPI
  144. static int e1000_clean(struct net_device *poll_dev, int *budget);
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring,
  147. int *work_done, int work_to_do);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring,
  150. int *work_done, int work_to_do);
  151. #else
  152. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring);
  154. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. #endif
  157. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  158. struct e1000_rx_ring *rx_ring);
  159. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  160. struct e1000_rx_ring *rx_ring);
  161. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  162. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  163. int cmd);
  164. void e1000_set_ethtool_ops(struct net_device *netdev);
  165. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  166. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  167. static void e1000_tx_timeout(struct net_device *dev);
  168. static void e1000_tx_timeout_task(struct net_device *dev);
  169. static void e1000_smartspeed(struct e1000_adapter *adapter);
  170. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  171. struct sk_buff *skb);
  172. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  173. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  174. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  175. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  176. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  177. #ifdef CONFIG_PM
  178. static int e1000_resume(struct pci_dev *pdev);
  179. #endif
  180. #ifdef CONFIG_NET_POLL_CONTROLLER
  181. /* for netdump / net console */
  182. static void e1000_netpoll (struct net_device *netdev);
  183. #endif
  184. #ifdef CONFIG_E1000_MQ
  185. /* for multiple Rx queues */
  186. void e1000_rx_schedule(void *data);
  187. #endif
  188. /* Exported from other modules */
  189. extern void e1000_check_options(struct e1000_adapter *adapter);
  190. static struct pci_driver e1000_driver = {
  191. .name = e1000_driver_name,
  192. .id_table = e1000_pci_tbl,
  193. .probe = e1000_probe,
  194. .remove = __devexit_p(e1000_remove),
  195. /* Power Managment Hooks */
  196. #ifdef CONFIG_PM
  197. .suspend = e1000_suspend,
  198. .resume = e1000_resume
  199. #endif
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  206. module_param(debug, int, 0);
  207. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  208. /**
  209. * e1000_init_module - Driver Registration Routine
  210. *
  211. * e1000_init_module is the first routine called when the driver is
  212. * loaded. All it does is register with the PCI subsystem.
  213. **/
  214. static int __init
  215. e1000_init_module(void)
  216. {
  217. int ret;
  218. printk(KERN_INFO "%s - version %s\n",
  219. e1000_driver_string, e1000_driver_version);
  220. printk(KERN_INFO "%s\n", e1000_copyright);
  221. ret = pci_module_init(&e1000_driver);
  222. return ret;
  223. }
  224. module_init(e1000_init_module);
  225. /**
  226. * e1000_exit_module - Driver Exit Cleanup Routine
  227. *
  228. * e1000_exit_module is called just before the driver is removed
  229. * from memory.
  230. **/
  231. static void __exit
  232. e1000_exit_module(void)
  233. {
  234. pci_unregister_driver(&e1000_driver);
  235. }
  236. module_exit(e1000_exit_module);
  237. /**
  238. * e1000_irq_disable - Mask off interrupt generation on the NIC
  239. * @adapter: board private structure
  240. **/
  241. static inline void
  242. e1000_irq_disable(struct e1000_adapter *adapter)
  243. {
  244. atomic_inc(&adapter->irq_sem);
  245. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  246. E1000_WRITE_FLUSH(&adapter->hw);
  247. synchronize_irq(adapter->pdev->irq);
  248. }
  249. /**
  250. * e1000_irq_enable - Enable default interrupt generation settings
  251. * @adapter: board private structure
  252. **/
  253. static inline void
  254. e1000_irq_enable(struct e1000_adapter *adapter)
  255. {
  256. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  257. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  258. E1000_WRITE_FLUSH(&adapter->hw);
  259. }
  260. }
  261. void
  262. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  263. {
  264. struct net_device *netdev = adapter->netdev;
  265. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  266. uint16_t old_vid = adapter->mng_vlan_id;
  267. if(adapter->vlgrp) {
  268. if(!adapter->vlgrp->vlan_devices[vid]) {
  269. if(adapter->hw.mng_cookie.status &
  270. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  271. e1000_vlan_rx_add_vid(netdev, vid);
  272. adapter->mng_vlan_id = vid;
  273. } else
  274. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  275. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  276. (vid != old_vid) &&
  277. !adapter->vlgrp->vlan_devices[old_vid])
  278. e1000_vlan_rx_kill_vid(netdev, old_vid);
  279. }
  280. }
  281. }
  282. int
  283. e1000_up(struct e1000_adapter *adapter)
  284. {
  285. struct net_device *netdev = adapter->netdev;
  286. int i, err;
  287. /* hardware has been reset, we need to reload some things */
  288. /* Reset the PHY if it was previously powered down */
  289. if(adapter->hw.media_type == e1000_media_type_copper) {
  290. uint16_t mii_reg;
  291. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  292. if(mii_reg & MII_CR_POWER_DOWN)
  293. e1000_phy_reset(&adapter->hw);
  294. }
  295. e1000_set_multi(netdev);
  296. e1000_restore_vlan(adapter);
  297. e1000_configure_tx(adapter);
  298. e1000_setup_rctl(adapter);
  299. e1000_configure_rx(adapter);
  300. for (i = 0; i < adapter->num_queues; i++)
  301. adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
  302. #ifdef CONFIG_PCI_MSI
  303. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  304. adapter->have_msi = TRUE;
  305. if((err = pci_enable_msi(adapter->pdev))) {
  306. DPRINTK(PROBE, ERR,
  307. "Unable to allocate MSI interrupt Error: %d\n", err);
  308. adapter->have_msi = FALSE;
  309. }
  310. }
  311. #endif
  312. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  313. SA_SHIRQ | SA_SAMPLE_RANDOM,
  314. netdev->name, netdev))) {
  315. DPRINTK(PROBE, ERR,
  316. "Unable to allocate interrupt Error: %d\n", err);
  317. return err;
  318. }
  319. mod_timer(&adapter->watchdog_timer, jiffies);
  320. #ifdef CONFIG_E1000_NAPI
  321. netif_poll_enable(netdev);
  322. #endif
  323. e1000_irq_enable(adapter);
  324. return 0;
  325. }
  326. void
  327. e1000_down(struct e1000_adapter *adapter)
  328. {
  329. struct net_device *netdev = adapter->netdev;
  330. e1000_irq_disable(adapter);
  331. #ifdef CONFIG_E1000_MQ
  332. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  333. #endif
  334. free_irq(adapter->pdev->irq, netdev);
  335. #ifdef CONFIG_PCI_MSI
  336. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  337. adapter->have_msi == TRUE)
  338. pci_disable_msi(adapter->pdev);
  339. #endif
  340. del_timer_sync(&adapter->tx_fifo_stall_timer);
  341. del_timer_sync(&adapter->watchdog_timer);
  342. del_timer_sync(&adapter->phy_info_timer);
  343. #ifdef CONFIG_E1000_NAPI
  344. netif_poll_disable(netdev);
  345. #endif
  346. adapter->link_speed = 0;
  347. adapter->link_duplex = 0;
  348. netif_carrier_off(netdev);
  349. netif_stop_queue(netdev);
  350. e1000_reset(adapter);
  351. e1000_clean_all_tx_rings(adapter);
  352. e1000_clean_all_rx_rings(adapter);
  353. /* If WoL is not enabled and management mode is not IAMT
  354. * Power down the PHY so no link is implied when interface is down */
  355. if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  356. adapter->hw.media_type == e1000_media_type_copper &&
  357. !e1000_check_mng_mode(&adapter->hw) &&
  358. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
  359. uint16_t mii_reg;
  360. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  361. mii_reg |= MII_CR_POWER_DOWN;
  362. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  363. mdelay(1);
  364. }
  365. }
  366. void
  367. e1000_reset(struct e1000_adapter *adapter)
  368. {
  369. struct net_device *netdev = adapter->netdev;
  370. uint32_t pba, manc;
  371. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  372. uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
  373. /* Repartition Pba for greater than 9k mtu
  374. * To take effect CTRL.RST is required.
  375. */
  376. switch (adapter->hw.mac_type) {
  377. case e1000_82547:
  378. case e1000_82547_rev_2:
  379. pba = E1000_PBA_30K;
  380. break;
  381. case e1000_82571:
  382. case e1000_82572:
  383. pba = E1000_PBA_38K;
  384. break;
  385. case e1000_82573:
  386. pba = E1000_PBA_12K;
  387. break;
  388. default:
  389. pba = E1000_PBA_48K;
  390. break;
  391. }
  392. if((adapter->hw.mac_type != e1000_82573) &&
  393. (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
  394. pba -= 8; /* allocate more FIFO for Tx */
  395. /* send an XOFF when there is enough space in the
  396. * Rx FIFO to hold one extra full size Rx packet
  397. */
  398. fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
  399. ETHERNET_FCS_SIZE + 1;
  400. fc_low_water_mark = fc_high_water_mark + 8;
  401. }
  402. if(adapter->hw.mac_type == e1000_82547) {
  403. adapter->tx_fifo_head = 0;
  404. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  405. adapter->tx_fifo_size =
  406. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  407. atomic_set(&adapter->tx_fifo_stall, 0);
  408. }
  409. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  410. /* flow control settings */
  411. adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
  412. fc_high_water_mark;
  413. adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
  414. fc_low_water_mark;
  415. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  416. adapter->hw.fc_send_xon = 1;
  417. adapter->hw.fc = adapter->hw.original_fc;
  418. /* Allow time for pending master requests to run */
  419. e1000_reset_hw(&adapter->hw);
  420. if(adapter->hw.mac_type >= e1000_82544)
  421. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  422. if(e1000_init_hw(&adapter->hw))
  423. DPRINTK(PROBE, ERR, "Hardware Error\n");
  424. e1000_update_mng_vlan(adapter);
  425. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  426. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  427. e1000_reset_adaptive(&adapter->hw);
  428. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  429. if (adapter->en_mng_pt) {
  430. manc = E1000_READ_REG(&adapter->hw, MANC);
  431. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  432. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  433. }
  434. }
  435. /**
  436. * e1000_probe - Device Initialization Routine
  437. * @pdev: PCI device information struct
  438. * @ent: entry in e1000_pci_tbl
  439. *
  440. * Returns 0 on success, negative on failure
  441. *
  442. * e1000_probe initializes an adapter identified by a pci_dev structure.
  443. * The OS initialization, configuring of the adapter private structure,
  444. * and a hardware reset occur.
  445. **/
  446. static int __devinit
  447. e1000_probe(struct pci_dev *pdev,
  448. const struct pci_device_id *ent)
  449. {
  450. struct net_device *netdev;
  451. struct e1000_adapter *adapter;
  452. unsigned long mmio_start, mmio_len;
  453. uint32_t ctrl_ext;
  454. uint32_t swsm;
  455. static int cards_found = 0;
  456. int i, err, pci_using_dac;
  457. uint16_t eeprom_data;
  458. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  459. if((err = pci_enable_device(pdev)))
  460. return err;
  461. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  462. pci_using_dac = 1;
  463. } else {
  464. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  465. E1000_ERR("No usable DMA configuration, aborting\n");
  466. return err;
  467. }
  468. pci_using_dac = 0;
  469. }
  470. if((err = pci_request_regions(pdev, e1000_driver_name)))
  471. return err;
  472. pci_set_master(pdev);
  473. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  474. if(!netdev) {
  475. err = -ENOMEM;
  476. goto err_alloc_etherdev;
  477. }
  478. SET_MODULE_OWNER(netdev);
  479. SET_NETDEV_DEV(netdev, &pdev->dev);
  480. pci_set_drvdata(pdev, netdev);
  481. adapter = netdev_priv(netdev);
  482. adapter->netdev = netdev;
  483. adapter->pdev = pdev;
  484. adapter->hw.back = adapter;
  485. adapter->msg_enable = (1 << debug) - 1;
  486. mmio_start = pci_resource_start(pdev, BAR_0);
  487. mmio_len = pci_resource_len(pdev, BAR_0);
  488. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  489. if(!adapter->hw.hw_addr) {
  490. err = -EIO;
  491. goto err_ioremap;
  492. }
  493. for(i = BAR_1; i <= BAR_5; i++) {
  494. if(pci_resource_len(pdev, i) == 0)
  495. continue;
  496. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  497. adapter->hw.io_base = pci_resource_start(pdev, i);
  498. break;
  499. }
  500. }
  501. netdev->open = &e1000_open;
  502. netdev->stop = &e1000_close;
  503. netdev->hard_start_xmit = &e1000_xmit_frame;
  504. netdev->get_stats = &e1000_get_stats;
  505. netdev->set_multicast_list = &e1000_set_multi;
  506. netdev->set_mac_address = &e1000_set_mac;
  507. netdev->change_mtu = &e1000_change_mtu;
  508. netdev->do_ioctl = &e1000_ioctl;
  509. e1000_set_ethtool_ops(netdev);
  510. netdev->tx_timeout = &e1000_tx_timeout;
  511. netdev->watchdog_timeo = 5 * HZ;
  512. #ifdef CONFIG_E1000_NAPI
  513. netdev->poll = &e1000_clean;
  514. netdev->weight = 64;
  515. #endif
  516. netdev->vlan_rx_register = e1000_vlan_rx_register;
  517. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  518. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  519. #ifdef CONFIG_NET_POLL_CONTROLLER
  520. netdev->poll_controller = e1000_netpoll;
  521. #endif
  522. strcpy(netdev->name, pci_name(pdev));
  523. netdev->mem_start = mmio_start;
  524. netdev->mem_end = mmio_start + mmio_len;
  525. netdev->base_addr = adapter->hw.io_base;
  526. adapter->bd_number = cards_found;
  527. /* setup the private structure */
  528. if((err = e1000_sw_init(adapter)))
  529. goto err_sw_init;
  530. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  531. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  532. if(adapter->hw.mac_type >= e1000_82543) {
  533. netdev->features = NETIF_F_SG |
  534. NETIF_F_HW_CSUM |
  535. NETIF_F_HW_VLAN_TX |
  536. NETIF_F_HW_VLAN_RX |
  537. NETIF_F_HW_VLAN_FILTER;
  538. }
  539. #ifdef NETIF_F_TSO
  540. if((adapter->hw.mac_type >= e1000_82544) &&
  541. (adapter->hw.mac_type != e1000_82547))
  542. netdev->features |= NETIF_F_TSO;
  543. #ifdef NETIF_F_TSO_IPV6
  544. if(adapter->hw.mac_type > e1000_82547_rev_2)
  545. netdev->features |= NETIF_F_TSO_IPV6;
  546. #endif
  547. #endif
  548. if(pci_using_dac)
  549. netdev->features |= NETIF_F_HIGHDMA;
  550. /* hard_start_xmit is safe against parallel locking */
  551. netdev->features |= NETIF_F_LLTX;
  552. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  553. /* before reading the EEPROM, reset the controller to
  554. * put the device in a known good starting state */
  555. e1000_reset_hw(&adapter->hw);
  556. /* make sure the EEPROM is good */
  557. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  558. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  559. err = -EIO;
  560. goto err_eeprom;
  561. }
  562. /* copy the MAC address out of the EEPROM */
  563. if(e1000_read_mac_addr(&adapter->hw))
  564. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  565. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  566. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  567. if(!is_valid_ether_addr(netdev->perm_addr)) {
  568. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  569. err = -EIO;
  570. goto err_eeprom;
  571. }
  572. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  573. e1000_get_bus_info(&adapter->hw);
  574. init_timer(&adapter->tx_fifo_stall_timer);
  575. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  576. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  577. init_timer(&adapter->watchdog_timer);
  578. adapter->watchdog_timer.function = &e1000_watchdog;
  579. adapter->watchdog_timer.data = (unsigned long) adapter;
  580. INIT_WORK(&adapter->watchdog_task,
  581. (void (*)(void *))e1000_watchdog_task, adapter);
  582. init_timer(&adapter->phy_info_timer);
  583. adapter->phy_info_timer.function = &e1000_update_phy_info;
  584. adapter->phy_info_timer.data = (unsigned long) adapter;
  585. INIT_WORK(&adapter->tx_timeout_task,
  586. (void (*)(void *))e1000_tx_timeout_task, netdev);
  587. /* we're going to reset, so assume we have no link for now */
  588. netif_carrier_off(netdev);
  589. netif_stop_queue(netdev);
  590. e1000_check_options(adapter);
  591. /* Initial Wake on LAN setting
  592. * If APM wake is enabled in the EEPROM,
  593. * enable the ACPI Magic Packet filter
  594. */
  595. switch(adapter->hw.mac_type) {
  596. case e1000_82542_rev2_0:
  597. case e1000_82542_rev2_1:
  598. case e1000_82543:
  599. break;
  600. case e1000_82544:
  601. e1000_read_eeprom(&adapter->hw,
  602. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  603. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  604. break;
  605. case e1000_82546:
  606. case e1000_82546_rev_3:
  607. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  608. && (adapter->hw.media_type == e1000_media_type_copper)) {
  609. e1000_read_eeprom(&adapter->hw,
  610. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  611. break;
  612. }
  613. /* Fall Through */
  614. default:
  615. e1000_read_eeprom(&adapter->hw,
  616. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  617. break;
  618. }
  619. if(eeprom_data & eeprom_apme_mask)
  620. adapter->wol |= E1000_WUFC_MAG;
  621. /* reset the hardware with the new settings */
  622. e1000_reset(adapter);
  623. /* Let firmware know the driver has taken over */
  624. switch(adapter->hw.mac_type) {
  625. case e1000_82571:
  626. case e1000_82572:
  627. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  628. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  629. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  630. break;
  631. case e1000_82573:
  632. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  633. E1000_WRITE_REG(&adapter->hw, SWSM,
  634. swsm | E1000_SWSM_DRV_LOAD);
  635. break;
  636. default:
  637. break;
  638. }
  639. strcpy(netdev->name, "eth%d");
  640. if((err = register_netdev(netdev)))
  641. goto err_register;
  642. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  643. cards_found++;
  644. return 0;
  645. err_register:
  646. err_sw_init:
  647. err_eeprom:
  648. iounmap(adapter->hw.hw_addr);
  649. err_ioremap:
  650. free_netdev(netdev);
  651. err_alloc_etherdev:
  652. pci_release_regions(pdev);
  653. return err;
  654. }
  655. /**
  656. * e1000_remove - Device Removal Routine
  657. * @pdev: PCI device information struct
  658. *
  659. * e1000_remove is called by the PCI subsystem to alert the driver
  660. * that it should release a PCI device. The could be caused by a
  661. * Hot-Plug event, or because the driver is going to be removed from
  662. * memory.
  663. **/
  664. static void __devexit
  665. e1000_remove(struct pci_dev *pdev)
  666. {
  667. struct net_device *netdev = pci_get_drvdata(pdev);
  668. struct e1000_adapter *adapter = netdev_priv(netdev);
  669. uint32_t ctrl_ext;
  670. uint32_t manc, swsm;
  671. #ifdef CONFIG_E1000_NAPI
  672. int i;
  673. #endif
  674. flush_scheduled_work();
  675. if(adapter->hw.mac_type >= e1000_82540 &&
  676. adapter->hw.media_type == e1000_media_type_copper) {
  677. manc = E1000_READ_REG(&adapter->hw, MANC);
  678. if(manc & E1000_MANC_SMBUS_EN) {
  679. manc |= E1000_MANC_ARP_EN;
  680. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  681. }
  682. }
  683. switch(adapter->hw.mac_type) {
  684. case e1000_82571:
  685. case e1000_82572:
  686. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  687. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  688. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  689. break;
  690. case e1000_82573:
  691. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  692. E1000_WRITE_REG(&adapter->hw, SWSM,
  693. swsm & ~E1000_SWSM_DRV_LOAD);
  694. break;
  695. default:
  696. break;
  697. }
  698. unregister_netdev(netdev);
  699. #ifdef CONFIG_E1000_NAPI
  700. for (i = 0; i < adapter->num_queues; i++)
  701. __dev_put(&adapter->polling_netdev[i]);
  702. #endif
  703. if(!e1000_check_phy_reset_block(&adapter->hw))
  704. e1000_phy_hw_reset(&adapter->hw);
  705. kfree(adapter->tx_ring);
  706. kfree(adapter->rx_ring);
  707. #ifdef CONFIG_E1000_NAPI
  708. kfree(adapter->polling_netdev);
  709. #endif
  710. iounmap(adapter->hw.hw_addr);
  711. pci_release_regions(pdev);
  712. #ifdef CONFIG_E1000_MQ
  713. free_percpu(adapter->cpu_netdev);
  714. free_percpu(adapter->cpu_tx_ring);
  715. #endif
  716. free_netdev(netdev);
  717. pci_disable_device(pdev);
  718. }
  719. /**
  720. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  721. * @adapter: board private structure to initialize
  722. *
  723. * e1000_sw_init initializes the Adapter private data structure.
  724. * Fields are initialized based on PCI device information and
  725. * OS network device settings (MTU size).
  726. **/
  727. static int __devinit
  728. e1000_sw_init(struct e1000_adapter *adapter)
  729. {
  730. struct e1000_hw *hw = &adapter->hw;
  731. struct net_device *netdev = adapter->netdev;
  732. struct pci_dev *pdev = adapter->pdev;
  733. #ifdef CONFIG_E1000_NAPI
  734. int i;
  735. #endif
  736. /* PCI config space info */
  737. hw->vendor_id = pdev->vendor;
  738. hw->device_id = pdev->device;
  739. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  740. hw->subsystem_id = pdev->subsystem_device;
  741. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  742. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  743. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  744. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  745. hw->max_frame_size = netdev->mtu +
  746. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  747. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  748. /* identify the MAC */
  749. if(e1000_set_mac_type(hw)) {
  750. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  751. return -EIO;
  752. }
  753. /* initialize eeprom parameters */
  754. if(e1000_init_eeprom_params(hw)) {
  755. E1000_ERR("EEPROM initialization failed\n");
  756. return -EIO;
  757. }
  758. switch(hw->mac_type) {
  759. default:
  760. break;
  761. case e1000_82541:
  762. case e1000_82547:
  763. case e1000_82541_rev_2:
  764. case e1000_82547_rev_2:
  765. hw->phy_init_script = 1;
  766. break;
  767. }
  768. e1000_set_media_type(hw);
  769. hw->wait_autoneg_complete = FALSE;
  770. hw->tbi_compatibility_en = TRUE;
  771. hw->adaptive_ifs = TRUE;
  772. /* Copper options */
  773. if(hw->media_type == e1000_media_type_copper) {
  774. hw->mdix = AUTO_ALL_MODES;
  775. hw->disable_polarity_correction = FALSE;
  776. hw->master_slave = E1000_MASTER_SLAVE;
  777. }
  778. #ifdef CONFIG_E1000_MQ
  779. /* Number of supported queues */
  780. switch (hw->mac_type) {
  781. case e1000_82571:
  782. case e1000_82572:
  783. adapter->num_queues = 2;
  784. break;
  785. default:
  786. adapter->num_queues = 1;
  787. break;
  788. }
  789. adapter->num_queues = min(adapter->num_queues, num_online_cpus());
  790. #else
  791. adapter->num_queues = 1;
  792. #endif
  793. if (e1000_alloc_queues(adapter)) {
  794. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  795. return -ENOMEM;
  796. }
  797. #ifdef CONFIG_E1000_NAPI
  798. for (i = 0; i < adapter->num_queues; i++) {
  799. adapter->polling_netdev[i].priv = adapter;
  800. adapter->polling_netdev[i].poll = &e1000_clean;
  801. adapter->polling_netdev[i].weight = 64;
  802. dev_hold(&adapter->polling_netdev[i]);
  803. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  804. }
  805. #endif
  806. #ifdef CONFIG_E1000_MQ
  807. e1000_setup_queue_mapping(adapter);
  808. #endif
  809. atomic_set(&adapter->irq_sem, 1);
  810. spin_lock_init(&adapter->stats_lock);
  811. return 0;
  812. }
  813. /**
  814. * e1000_alloc_queues - Allocate memory for all rings
  815. * @adapter: board private structure to initialize
  816. *
  817. * We allocate one ring per queue at run-time since we don't know the
  818. * number of queues at compile-time. The polling_netdev array is
  819. * intended for Multiqueue, but should work fine with a single queue.
  820. **/
  821. static int __devinit
  822. e1000_alloc_queues(struct e1000_adapter *adapter)
  823. {
  824. int size;
  825. size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
  826. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  827. if (!adapter->tx_ring)
  828. return -ENOMEM;
  829. memset(adapter->tx_ring, 0, size);
  830. size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
  831. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  832. if (!adapter->rx_ring) {
  833. kfree(adapter->tx_ring);
  834. return -ENOMEM;
  835. }
  836. memset(adapter->rx_ring, 0, size);
  837. #ifdef CONFIG_E1000_NAPI
  838. size = sizeof(struct net_device) * adapter->num_queues;
  839. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  840. if (!adapter->polling_netdev) {
  841. kfree(adapter->tx_ring);
  842. kfree(adapter->rx_ring);
  843. return -ENOMEM;
  844. }
  845. memset(adapter->polling_netdev, 0, size);
  846. #endif
  847. return E1000_SUCCESS;
  848. }
  849. #ifdef CONFIG_E1000_MQ
  850. static void __devinit
  851. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  852. {
  853. int i, cpu;
  854. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  855. adapter->rx_sched_call_data.info = adapter->netdev;
  856. cpus_clear(adapter->rx_sched_call_data.cpumask);
  857. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  858. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  859. lock_cpu_hotplug();
  860. i = 0;
  861. for_each_online_cpu(cpu) {
  862. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
  863. /* This is incomplete because we'd like to assign separate
  864. * physical cpus to these netdev polling structures and
  865. * avoid saturating a subset of cpus.
  866. */
  867. if (i < adapter->num_queues) {
  868. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  869. adapter->cpu_for_queue[i] = cpu;
  870. } else
  871. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  872. i++;
  873. }
  874. unlock_cpu_hotplug();
  875. }
  876. #endif
  877. /**
  878. * e1000_open - Called when a network interface is made active
  879. * @netdev: network interface device structure
  880. *
  881. * Returns 0 on success, negative value on failure
  882. *
  883. * The open entry point is called when a network interface is made
  884. * active by the system (IFF_UP). At this point all resources needed
  885. * for transmit and receive operations are allocated, the interrupt
  886. * handler is registered with the OS, the watchdog timer is started,
  887. * and the stack is notified that the interface is ready.
  888. **/
  889. static int
  890. e1000_open(struct net_device *netdev)
  891. {
  892. struct e1000_adapter *adapter = netdev_priv(netdev);
  893. int err;
  894. /* allocate transmit descriptors */
  895. if ((err = e1000_setup_all_tx_resources(adapter)))
  896. goto err_setup_tx;
  897. /* allocate receive descriptors */
  898. if ((err = e1000_setup_all_rx_resources(adapter)))
  899. goto err_setup_rx;
  900. if((err = e1000_up(adapter)))
  901. goto err_up;
  902. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  903. if((adapter->hw.mng_cookie.status &
  904. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  905. e1000_update_mng_vlan(adapter);
  906. }
  907. return E1000_SUCCESS;
  908. err_up:
  909. e1000_free_all_rx_resources(adapter);
  910. err_setup_rx:
  911. e1000_free_all_tx_resources(adapter);
  912. err_setup_tx:
  913. e1000_reset(adapter);
  914. return err;
  915. }
  916. /**
  917. * e1000_close - Disables a network interface
  918. * @netdev: network interface device structure
  919. *
  920. * Returns 0, this is not allowed to fail
  921. *
  922. * The close entry point is called when an interface is de-activated
  923. * by the OS. The hardware is still under the drivers control, but
  924. * needs to be disabled. A global MAC reset is issued to stop the
  925. * hardware, and all transmit and receive resources are freed.
  926. **/
  927. static int
  928. e1000_close(struct net_device *netdev)
  929. {
  930. struct e1000_adapter *adapter = netdev_priv(netdev);
  931. e1000_down(adapter);
  932. e1000_free_all_tx_resources(adapter);
  933. e1000_free_all_rx_resources(adapter);
  934. if((adapter->hw.mng_cookie.status &
  935. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  936. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  937. }
  938. return 0;
  939. }
  940. /**
  941. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  942. * @adapter: address of board private structure
  943. * @start: address of beginning of memory
  944. * @len: length of memory
  945. **/
  946. static inline boolean_t
  947. e1000_check_64k_bound(struct e1000_adapter *adapter,
  948. void *start, unsigned long len)
  949. {
  950. unsigned long begin = (unsigned long) start;
  951. unsigned long end = begin + len;
  952. /* First rev 82545 and 82546 need to not allow any memory
  953. * write location to cross 64k boundary due to errata 23 */
  954. if (adapter->hw.mac_type == e1000_82545 ||
  955. adapter->hw.mac_type == e1000_82546) {
  956. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  957. }
  958. return TRUE;
  959. }
  960. /**
  961. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  962. * @adapter: board private structure
  963. * @txdr: tx descriptor ring (for a specific queue) to setup
  964. *
  965. * Return 0 on success, negative on failure
  966. **/
  967. int
  968. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  969. struct e1000_tx_ring *txdr)
  970. {
  971. struct pci_dev *pdev = adapter->pdev;
  972. int size;
  973. size = sizeof(struct e1000_buffer) * txdr->count;
  974. txdr->buffer_info = vmalloc(size);
  975. if(!txdr->buffer_info) {
  976. DPRINTK(PROBE, ERR,
  977. "Unable to allocate memory for the transmit descriptor ring\n");
  978. return -ENOMEM;
  979. }
  980. memset(txdr->buffer_info, 0, size);
  981. memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer));
  982. /* round up to nearest 4K */
  983. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  984. E1000_ROUNDUP(txdr->size, 4096);
  985. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  986. if(!txdr->desc) {
  987. setup_tx_desc_die:
  988. vfree(txdr->buffer_info);
  989. DPRINTK(PROBE, ERR,
  990. "Unable to allocate memory for the transmit descriptor ring\n");
  991. return -ENOMEM;
  992. }
  993. /* Fix for errata 23, can't cross 64kB boundary */
  994. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  995. void *olddesc = txdr->desc;
  996. dma_addr_t olddma = txdr->dma;
  997. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  998. "at %p\n", txdr->size, txdr->desc);
  999. /* Try again, without freeing the previous */
  1000. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1001. if(!txdr->desc) {
  1002. /* Failed allocation, critical failure */
  1003. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1004. goto setup_tx_desc_die;
  1005. }
  1006. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1007. /* give up */
  1008. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1009. txdr->dma);
  1010. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1011. DPRINTK(PROBE, ERR,
  1012. "Unable to allocate aligned memory "
  1013. "for the transmit descriptor ring\n");
  1014. vfree(txdr->buffer_info);
  1015. return -ENOMEM;
  1016. } else {
  1017. /* Free old allocation, new allocation was successful */
  1018. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1019. }
  1020. }
  1021. memset(txdr->desc, 0, txdr->size);
  1022. txdr->next_to_use = 0;
  1023. txdr->next_to_clean = 0;
  1024. spin_lock_init(&txdr->tx_lock);
  1025. return 0;
  1026. }
  1027. /**
  1028. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1029. * (Descriptors) for all queues
  1030. * @adapter: board private structure
  1031. *
  1032. * If this function returns with an error, then it's possible one or
  1033. * more of the rings is populated (while the rest are not). It is the
  1034. * callers duty to clean those orphaned rings.
  1035. *
  1036. * Return 0 on success, negative on failure
  1037. **/
  1038. int
  1039. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1040. {
  1041. int i, err = 0;
  1042. for (i = 0; i < adapter->num_queues; i++) {
  1043. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1044. if (err) {
  1045. DPRINTK(PROBE, ERR,
  1046. "Allocation for Tx Queue %u failed\n", i);
  1047. break;
  1048. }
  1049. }
  1050. return err;
  1051. }
  1052. /**
  1053. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1054. * @adapter: board private structure
  1055. *
  1056. * Configure the Tx unit of the MAC after a reset.
  1057. **/
  1058. static void
  1059. e1000_configure_tx(struct e1000_adapter *adapter)
  1060. {
  1061. uint64_t tdba;
  1062. struct e1000_hw *hw = &adapter->hw;
  1063. uint32_t tdlen, tctl, tipg, tarc;
  1064. /* Setup the HW Tx Head and Tail descriptor pointers */
  1065. switch (adapter->num_queues) {
  1066. case 2:
  1067. tdba = adapter->tx_ring[1].dma;
  1068. tdlen = adapter->tx_ring[1].count *
  1069. sizeof(struct e1000_tx_desc);
  1070. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1071. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1072. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1073. E1000_WRITE_REG(hw, TDH1, 0);
  1074. E1000_WRITE_REG(hw, TDT1, 0);
  1075. adapter->tx_ring[1].tdh = E1000_TDH1;
  1076. adapter->tx_ring[1].tdt = E1000_TDT1;
  1077. /* Fall Through */
  1078. case 1:
  1079. default:
  1080. tdba = adapter->tx_ring[0].dma;
  1081. tdlen = adapter->tx_ring[0].count *
  1082. sizeof(struct e1000_tx_desc);
  1083. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1084. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1085. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1086. E1000_WRITE_REG(hw, TDH, 0);
  1087. E1000_WRITE_REG(hw, TDT, 0);
  1088. adapter->tx_ring[0].tdh = E1000_TDH;
  1089. adapter->tx_ring[0].tdt = E1000_TDT;
  1090. break;
  1091. }
  1092. /* Set the default values for the Tx Inter Packet Gap timer */
  1093. switch (hw->mac_type) {
  1094. case e1000_82542_rev2_0:
  1095. case e1000_82542_rev2_1:
  1096. tipg = DEFAULT_82542_TIPG_IPGT;
  1097. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1098. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1099. break;
  1100. default:
  1101. if (hw->media_type == e1000_media_type_fiber ||
  1102. hw->media_type == e1000_media_type_internal_serdes)
  1103. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1104. else
  1105. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1106. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1107. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1108. }
  1109. E1000_WRITE_REG(hw, TIPG, tipg);
  1110. /* Set the Tx Interrupt Delay register */
  1111. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1112. if (hw->mac_type >= e1000_82540)
  1113. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1114. /* Program the Transmit Control Register */
  1115. tctl = E1000_READ_REG(hw, TCTL);
  1116. tctl &= ~E1000_TCTL_CT;
  1117. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1118. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1119. E1000_WRITE_REG(hw, TCTL, tctl);
  1120. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1121. tarc = E1000_READ_REG(hw, TARC0);
  1122. tarc |= ((1 << 25) | (1 << 21));
  1123. E1000_WRITE_REG(hw, TARC0, tarc);
  1124. tarc = E1000_READ_REG(hw, TARC1);
  1125. tarc |= (1 << 25);
  1126. if (tctl & E1000_TCTL_MULR)
  1127. tarc &= ~(1 << 28);
  1128. else
  1129. tarc |= (1 << 28);
  1130. E1000_WRITE_REG(hw, TARC1, tarc);
  1131. }
  1132. e1000_config_collision_dist(hw);
  1133. /* Setup Transmit Descriptor Settings for eop descriptor */
  1134. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1135. E1000_TXD_CMD_IFCS;
  1136. if (hw->mac_type < e1000_82543)
  1137. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1138. else
  1139. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1140. /* Cache if we're 82544 running in PCI-X because we'll
  1141. * need this to apply a workaround later in the send path. */
  1142. if (hw->mac_type == e1000_82544 &&
  1143. hw->bus_type == e1000_bus_type_pcix)
  1144. adapter->pcix_82544 = 1;
  1145. }
  1146. /**
  1147. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1148. * @adapter: board private structure
  1149. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1150. *
  1151. * Returns 0 on success, negative on failure
  1152. **/
  1153. int
  1154. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1155. struct e1000_rx_ring *rxdr)
  1156. {
  1157. struct pci_dev *pdev = adapter->pdev;
  1158. int size, desc_len;
  1159. size = sizeof(struct e1000_buffer) * rxdr->count;
  1160. rxdr->buffer_info = vmalloc(size);
  1161. if (!rxdr->buffer_info) {
  1162. DPRINTK(PROBE, ERR,
  1163. "Unable to allocate memory for the receive descriptor ring\n");
  1164. return -ENOMEM;
  1165. }
  1166. memset(rxdr->buffer_info, 0, size);
  1167. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1168. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1169. if(!rxdr->ps_page) {
  1170. vfree(rxdr->buffer_info);
  1171. DPRINTK(PROBE, ERR,
  1172. "Unable to allocate memory for the receive descriptor ring\n");
  1173. return -ENOMEM;
  1174. }
  1175. memset(rxdr->ps_page, 0, size);
  1176. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1177. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1178. if(!rxdr->ps_page_dma) {
  1179. vfree(rxdr->buffer_info);
  1180. kfree(rxdr->ps_page);
  1181. DPRINTK(PROBE, ERR,
  1182. "Unable to allocate memory for the receive descriptor ring\n");
  1183. return -ENOMEM;
  1184. }
  1185. memset(rxdr->ps_page_dma, 0, size);
  1186. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1187. desc_len = sizeof(struct e1000_rx_desc);
  1188. else
  1189. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1190. /* Round up to nearest 4K */
  1191. rxdr->size = rxdr->count * desc_len;
  1192. E1000_ROUNDUP(rxdr->size, 4096);
  1193. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1194. if (!rxdr->desc) {
  1195. DPRINTK(PROBE, ERR,
  1196. "Unable to allocate memory for the receive descriptor ring\n");
  1197. setup_rx_desc_die:
  1198. vfree(rxdr->buffer_info);
  1199. kfree(rxdr->ps_page);
  1200. kfree(rxdr->ps_page_dma);
  1201. return -ENOMEM;
  1202. }
  1203. /* Fix for errata 23, can't cross 64kB boundary */
  1204. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1205. void *olddesc = rxdr->desc;
  1206. dma_addr_t olddma = rxdr->dma;
  1207. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1208. "at %p\n", rxdr->size, rxdr->desc);
  1209. /* Try again, without freeing the previous */
  1210. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1211. /* Failed allocation, critical failure */
  1212. if (!rxdr->desc) {
  1213. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1214. DPRINTK(PROBE, ERR,
  1215. "Unable to allocate memory "
  1216. "for the receive descriptor ring\n");
  1217. goto setup_rx_desc_die;
  1218. }
  1219. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1220. /* give up */
  1221. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1222. rxdr->dma);
  1223. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1224. DPRINTK(PROBE, ERR,
  1225. "Unable to allocate aligned memory "
  1226. "for the receive descriptor ring\n");
  1227. goto setup_rx_desc_die;
  1228. } else {
  1229. /* Free old allocation, new allocation was successful */
  1230. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1231. }
  1232. }
  1233. memset(rxdr->desc, 0, rxdr->size);
  1234. rxdr->next_to_clean = 0;
  1235. rxdr->next_to_use = 0;
  1236. return 0;
  1237. }
  1238. /**
  1239. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1240. * (Descriptors) for all queues
  1241. * @adapter: board private structure
  1242. *
  1243. * If this function returns with an error, then it's possible one or
  1244. * more of the rings is populated (while the rest are not). It is the
  1245. * callers duty to clean those orphaned rings.
  1246. *
  1247. * Return 0 on success, negative on failure
  1248. **/
  1249. int
  1250. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1251. {
  1252. int i, err = 0;
  1253. for (i = 0; i < adapter->num_queues; i++) {
  1254. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1255. if (err) {
  1256. DPRINTK(PROBE, ERR,
  1257. "Allocation for Rx Queue %u failed\n", i);
  1258. break;
  1259. }
  1260. }
  1261. return err;
  1262. }
  1263. /**
  1264. * e1000_setup_rctl - configure the receive control registers
  1265. * @adapter: Board private structure
  1266. **/
  1267. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1268. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1269. static void
  1270. e1000_setup_rctl(struct e1000_adapter *adapter)
  1271. {
  1272. uint32_t rctl, rfctl;
  1273. uint32_t psrctl = 0;
  1274. #ifdef CONFIG_E1000_PACKET_SPLIT
  1275. uint32_t pages = 0;
  1276. #endif
  1277. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1278. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1279. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1280. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1281. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1282. if(adapter->hw.tbi_compatibility_on == 1)
  1283. rctl |= E1000_RCTL_SBP;
  1284. else
  1285. rctl &= ~E1000_RCTL_SBP;
  1286. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1287. rctl &= ~E1000_RCTL_LPE;
  1288. else
  1289. rctl |= E1000_RCTL_LPE;
  1290. /* Setup buffer sizes */
  1291. if(adapter->hw.mac_type >= e1000_82571) {
  1292. /* We can now specify buffers in 1K increments.
  1293. * BSIZE and BSEX are ignored in this case. */
  1294. rctl |= adapter->rx_buffer_len << 0x11;
  1295. } else {
  1296. rctl &= ~E1000_RCTL_SZ_4096;
  1297. rctl |= E1000_RCTL_BSEX;
  1298. switch (adapter->rx_buffer_len) {
  1299. case E1000_RXBUFFER_2048:
  1300. default:
  1301. rctl |= E1000_RCTL_SZ_2048;
  1302. rctl &= ~E1000_RCTL_BSEX;
  1303. break;
  1304. case E1000_RXBUFFER_4096:
  1305. rctl |= E1000_RCTL_SZ_4096;
  1306. break;
  1307. case E1000_RXBUFFER_8192:
  1308. rctl |= E1000_RCTL_SZ_8192;
  1309. break;
  1310. case E1000_RXBUFFER_16384:
  1311. rctl |= E1000_RCTL_SZ_16384;
  1312. break;
  1313. }
  1314. }
  1315. #ifdef CONFIG_E1000_PACKET_SPLIT
  1316. /* 82571 and greater support packet-split where the protocol
  1317. * header is placed in skb->data and the packet data is
  1318. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1319. * In the case of a non-split, skb->data is linearly filled,
  1320. * followed by the page buffers. Therefore, skb->data is
  1321. * sized to hold the largest protocol header.
  1322. */
  1323. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1324. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1325. PAGE_SIZE <= 16384)
  1326. adapter->rx_ps_pages = pages;
  1327. else
  1328. adapter->rx_ps_pages = 0;
  1329. #endif
  1330. if (adapter->rx_ps_pages) {
  1331. /* Configure extra packet-split registers */
  1332. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1333. rfctl |= E1000_RFCTL_EXTEN;
  1334. /* disable IPv6 packet split support */
  1335. rfctl |= E1000_RFCTL_IPV6_DIS;
  1336. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1337. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1338. psrctl |= adapter->rx_ps_bsize0 >>
  1339. E1000_PSRCTL_BSIZE0_SHIFT;
  1340. switch (adapter->rx_ps_pages) {
  1341. case 3:
  1342. psrctl |= PAGE_SIZE <<
  1343. E1000_PSRCTL_BSIZE3_SHIFT;
  1344. case 2:
  1345. psrctl |= PAGE_SIZE <<
  1346. E1000_PSRCTL_BSIZE2_SHIFT;
  1347. case 1:
  1348. psrctl |= PAGE_SIZE >>
  1349. E1000_PSRCTL_BSIZE1_SHIFT;
  1350. break;
  1351. }
  1352. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1353. }
  1354. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1355. }
  1356. /**
  1357. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1358. * @adapter: board private structure
  1359. *
  1360. * Configure the Rx unit of the MAC after a reset.
  1361. **/
  1362. static void
  1363. e1000_configure_rx(struct e1000_adapter *adapter)
  1364. {
  1365. uint64_t rdba;
  1366. struct e1000_hw *hw = &adapter->hw;
  1367. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1368. #ifdef CONFIG_E1000_MQ
  1369. uint32_t reta, mrqc;
  1370. int i;
  1371. #endif
  1372. if (adapter->rx_ps_pages) {
  1373. rdlen = adapter->rx_ring[0].count *
  1374. sizeof(union e1000_rx_desc_packet_split);
  1375. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1376. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1377. } else {
  1378. rdlen = adapter->rx_ring[0].count *
  1379. sizeof(struct e1000_rx_desc);
  1380. adapter->clean_rx = e1000_clean_rx_irq;
  1381. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1382. }
  1383. /* disable receives while setting up the descriptors */
  1384. rctl = E1000_READ_REG(hw, RCTL);
  1385. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1386. /* set the Receive Delay Timer Register */
  1387. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1388. if (hw->mac_type >= e1000_82540) {
  1389. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1390. if(adapter->itr > 1)
  1391. E1000_WRITE_REG(hw, ITR,
  1392. 1000000000 / (adapter->itr * 256));
  1393. }
  1394. if (hw->mac_type >= e1000_82571) {
  1395. /* Reset delay timers after every interrupt */
  1396. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1397. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1398. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1399. E1000_WRITE_FLUSH(hw);
  1400. }
  1401. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1402. * the Base and Length of the Rx Descriptor Ring */
  1403. switch (adapter->num_queues) {
  1404. #ifdef CONFIG_E1000_MQ
  1405. case 2:
  1406. rdba = adapter->rx_ring[1].dma;
  1407. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1408. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1409. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1410. E1000_WRITE_REG(hw, RDH1, 0);
  1411. E1000_WRITE_REG(hw, RDT1, 0);
  1412. adapter->rx_ring[1].rdh = E1000_RDH1;
  1413. adapter->rx_ring[1].rdt = E1000_RDT1;
  1414. /* Fall Through */
  1415. #endif
  1416. case 1:
  1417. default:
  1418. rdba = adapter->rx_ring[0].dma;
  1419. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1420. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1421. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1422. E1000_WRITE_REG(hw, RDH, 0);
  1423. E1000_WRITE_REG(hw, RDT, 0);
  1424. adapter->rx_ring[0].rdh = E1000_RDH;
  1425. adapter->rx_ring[0].rdt = E1000_RDT;
  1426. break;
  1427. }
  1428. #ifdef CONFIG_E1000_MQ
  1429. if (adapter->num_queues > 1) {
  1430. uint32_t random[10];
  1431. get_random_bytes(&random[0], 40);
  1432. if (hw->mac_type <= e1000_82572) {
  1433. E1000_WRITE_REG(hw, RSSIR, 0);
  1434. E1000_WRITE_REG(hw, RSSIM, 0);
  1435. }
  1436. switch (adapter->num_queues) {
  1437. case 2:
  1438. default:
  1439. reta = 0x00800080;
  1440. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1441. break;
  1442. }
  1443. /* Fill out redirection table */
  1444. for (i = 0; i < 32; i++)
  1445. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1446. /* Fill out hash function seeds */
  1447. for (i = 0; i < 10; i++)
  1448. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1449. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1450. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1451. E1000_WRITE_REG(hw, MRQC, mrqc);
  1452. }
  1453. /* Multiqueue and packet checksumming are mutually exclusive. */
  1454. if (hw->mac_type >= e1000_82571) {
  1455. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1456. rxcsum |= E1000_RXCSUM_PCSD;
  1457. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1458. }
  1459. #else
  1460. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1461. if (hw->mac_type >= e1000_82543) {
  1462. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1463. if(adapter->rx_csum == TRUE) {
  1464. rxcsum |= E1000_RXCSUM_TUOFL;
  1465. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1466. * Must be used in conjunction with packet-split. */
  1467. if ((hw->mac_type >= e1000_82571) &&
  1468. (adapter->rx_ps_pages)) {
  1469. rxcsum |= E1000_RXCSUM_IPPCSE;
  1470. }
  1471. } else {
  1472. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1473. /* don't need to clear IPPCSE as it defaults to 0 */
  1474. }
  1475. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1476. }
  1477. #endif /* CONFIG_E1000_MQ */
  1478. if (hw->mac_type == e1000_82573)
  1479. E1000_WRITE_REG(hw, ERT, 0x0100);
  1480. /* Enable Receives */
  1481. E1000_WRITE_REG(hw, RCTL, rctl);
  1482. }
  1483. /**
  1484. * e1000_free_tx_resources - Free Tx Resources per Queue
  1485. * @adapter: board private structure
  1486. * @tx_ring: Tx descriptor ring for a specific queue
  1487. *
  1488. * Free all transmit software resources
  1489. **/
  1490. void
  1491. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1492. struct e1000_tx_ring *tx_ring)
  1493. {
  1494. struct pci_dev *pdev = adapter->pdev;
  1495. e1000_clean_tx_ring(adapter, tx_ring);
  1496. vfree(tx_ring->buffer_info);
  1497. tx_ring->buffer_info = NULL;
  1498. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1499. tx_ring->desc = NULL;
  1500. }
  1501. /**
  1502. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1503. * @adapter: board private structure
  1504. *
  1505. * Free all transmit software resources
  1506. **/
  1507. void
  1508. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1509. {
  1510. int i;
  1511. for (i = 0; i < adapter->num_queues; i++)
  1512. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1513. }
  1514. static inline void
  1515. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1516. struct e1000_buffer *buffer_info)
  1517. {
  1518. if(buffer_info->dma) {
  1519. pci_unmap_page(adapter->pdev,
  1520. buffer_info->dma,
  1521. buffer_info->length,
  1522. PCI_DMA_TODEVICE);
  1523. buffer_info->dma = 0;
  1524. }
  1525. if(buffer_info->skb) {
  1526. dev_kfree_skb_any(buffer_info->skb);
  1527. buffer_info->skb = NULL;
  1528. }
  1529. }
  1530. /**
  1531. * e1000_clean_tx_ring - Free Tx Buffers
  1532. * @adapter: board private structure
  1533. * @tx_ring: ring to be cleaned
  1534. **/
  1535. static void
  1536. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1537. struct e1000_tx_ring *tx_ring)
  1538. {
  1539. struct e1000_buffer *buffer_info;
  1540. unsigned long size;
  1541. unsigned int i;
  1542. /* Free all the Tx ring sk_buffs */
  1543. if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
  1544. e1000_unmap_and_free_tx_resource(adapter,
  1545. &tx_ring->previous_buffer_info);
  1546. }
  1547. for(i = 0; i < tx_ring->count; i++) {
  1548. buffer_info = &tx_ring->buffer_info[i];
  1549. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1550. }
  1551. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1552. memset(tx_ring->buffer_info, 0, size);
  1553. /* Zero out the descriptor ring */
  1554. memset(tx_ring->desc, 0, tx_ring->size);
  1555. tx_ring->next_to_use = 0;
  1556. tx_ring->next_to_clean = 0;
  1557. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1558. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1559. }
  1560. /**
  1561. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1562. * @adapter: board private structure
  1563. **/
  1564. static void
  1565. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1566. {
  1567. int i;
  1568. for (i = 0; i < adapter->num_queues; i++)
  1569. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1570. }
  1571. /**
  1572. * e1000_free_rx_resources - Free Rx Resources
  1573. * @adapter: board private structure
  1574. * @rx_ring: ring to clean the resources from
  1575. *
  1576. * Free all receive software resources
  1577. **/
  1578. void
  1579. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1580. struct e1000_rx_ring *rx_ring)
  1581. {
  1582. struct pci_dev *pdev = adapter->pdev;
  1583. e1000_clean_rx_ring(adapter, rx_ring);
  1584. vfree(rx_ring->buffer_info);
  1585. rx_ring->buffer_info = NULL;
  1586. kfree(rx_ring->ps_page);
  1587. rx_ring->ps_page = NULL;
  1588. kfree(rx_ring->ps_page_dma);
  1589. rx_ring->ps_page_dma = NULL;
  1590. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1591. rx_ring->desc = NULL;
  1592. }
  1593. /**
  1594. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1595. * @adapter: board private structure
  1596. *
  1597. * Free all receive software resources
  1598. **/
  1599. void
  1600. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1601. {
  1602. int i;
  1603. for (i = 0; i < adapter->num_queues; i++)
  1604. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1605. }
  1606. /**
  1607. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1608. * @adapter: board private structure
  1609. * @rx_ring: ring to free buffers from
  1610. **/
  1611. static void
  1612. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1613. struct e1000_rx_ring *rx_ring)
  1614. {
  1615. struct e1000_buffer *buffer_info;
  1616. struct e1000_ps_page *ps_page;
  1617. struct e1000_ps_page_dma *ps_page_dma;
  1618. struct pci_dev *pdev = adapter->pdev;
  1619. unsigned long size;
  1620. unsigned int i, j;
  1621. /* Free all the Rx ring sk_buffs */
  1622. for(i = 0; i < rx_ring->count; i++) {
  1623. buffer_info = &rx_ring->buffer_info[i];
  1624. if(buffer_info->skb) {
  1625. ps_page = &rx_ring->ps_page[i];
  1626. ps_page_dma = &rx_ring->ps_page_dma[i];
  1627. pci_unmap_single(pdev,
  1628. buffer_info->dma,
  1629. buffer_info->length,
  1630. PCI_DMA_FROMDEVICE);
  1631. dev_kfree_skb(buffer_info->skb);
  1632. buffer_info->skb = NULL;
  1633. for(j = 0; j < adapter->rx_ps_pages; j++) {
  1634. if(!ps_page->ps_page[j]) break;
  1635. pci_unmap_single(pdev,
  1636. ps_page_dma->ps_page_dma[j],
  1637. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1638. ps_page_dma->ps_page_dma[j] = 0;
  1639. put_page(ps_page->ps_page[j]);
  1640. ps_page->ps_page[j] = NULL;
  1641. }
  1642. }
  1643. }
  1644. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1645. memset(rx_ring->buffer_info, 0, size);
  1646. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1647. memset(rx_ring->ps_page, 0, size);
  1648. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1649. memset(rx_ring->ps_page_dma, 0, size);
  1650. /* Zero out the descriptor ring */
  1651. memset(rx_ring->desc, 0, rx_ring->size);
  1652. rx_ring->next_to_clean = 0;
  1653. rx_ring->next_to_use = 0;
  1654. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1655. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1656. }
  1657. /**
  1658. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1659. * @adapter: board private structure
  1660. **/
  1661. static void
  1662. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1663. {
  1664. int i;
  1665. for (i = 0; i < adapter->num_queues; i++)
  1666. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1667. }
  1668. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1669. * and memory write and invalidate disabled for certain operations
  1670. */
  1671. static void
  1672. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1673. {
  1674. struct net_device *netdev = adapter->netdev;
  1675. uint32_t rctl;
  1676. e1000_pci_clear_mwi(&adapter->hw);
  1677. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1678. rctl |= E1000_RCTL_RST;
  1679. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1680. E1000_WRITE_FLUSH(&adapter->hw);
  1681. mdelay(5);
  1682. if(netif_running(netdev))
  1683. e1000_clean_all_rx_rings(adapter);
  1684. }
  1685. static void
  1686. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1687. {
  1688. struct net_device *netdev = adapter->netdev;
  1689. uint32_t rctl;
  1690. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1691. rctl &= ~E1000_RCTL_RST;
  1692. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1693. E1000_WRITE_FLUSH(&adapter->hw);
  1694. mdelay(5);
  1695. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1696. e1000_pci_set_mwi(&adapter->hw);
  1697. if(netif_running(netdev)) {
  1698. e1000_configure_rx(adapter);
  1699. e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
  1700. }
  1701. }
  1702. /**
  1703. * e1000_set_mac - Change the Ethernet Address of the NIC
  1704. * @netdev: network interface device structure
  1705. * @p: pointer to an address structure
  1706. *
  1707. * Returns 0 on success, negative on failure
  1708. **/
  1709. static int
  1710. e1000_set_mac(struct net_device *netdev, void *p)
  1711. {
  1712. struct e1000_adapter *adapter = netdev_priv(netdev);
  1713. struct sockaddr *addr = p;
  1714. if(!is_valid_ether_addr(addr->sa_data))
  1715. return -EADDRNOTAVAIL;
  1716. /* 82542 2.0 needs to be in reset to write receive address registers */
  1717. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1718. e1000_enter_82542_rst(adapter);
  1719. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1720. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1721. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1722. /* With 82571 controllers, LAA may be overwritten (with the default)
  1723. * due to controller reset from the other port. */
  1724. if (adapter->hw.mac_type == e1000_82571) {
  1725. /* activate the work around */
  1726. adapter->hw.laa_is_present = 1;
  1727. /* Hold a copy of the LAA in RAR[14] This is done so that
  1728. * between the time RAR[0] gets clobbered and the time it
  1729. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1730. * of the RARs and no incoming packets directed to this port
  1731. * are dropped. Eventaully the LAA will be in RAR[0] and
  1732. * RAR[14] */
  1733. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1734. E1000_RAR_ENTRIES - 1);
  1735. }
  1736. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1737. e1000_leave_82542_rst(adapter);
  1738. return 0;
  1739. }
  1740. /**
  1741. * e1000_set_multi - Multicast and Promiscuous mode set
  1742. * @netdev: network interface device structure
  1743. *
  1744. * The set_multi entry point is called whenever the multicast address
  1745. * list or the network interface flags are updated. This routine is
  1746. * responsible for configuring the hardware for proper multicast,
  1747. * promiscuous mode, and all-multi behavior.
  1748. **/
  1749. static void
  1750. e1000_set_multi(struct net_device *netdev)
  1751. {
  1752. struct e1000_adapter *adapter = netdev_priv(netdev);
  1753. struct e1000_hw *hw = &adapter->hw;
  1754. struct dev_mc_list *mc_ptr;
  1755. uint32_t rctl;
  1756. uint32_t hash_value;
  1757. int i, rar_entries = E1000_RAR_ENTRIES;
  1758. /* reserve RAR[14] for LAA over-write work-around */
  1759. if (adapter->hw.mac_type == e1000_82571)
  1760. rar_entries--;
  1761. /* Check for Promiscuous and All Multicast modes */
  1762. rctl = E1000_READ_REG(hw, RCTL);
  1763. if(netdev->flags & IFF_PROMISC) {
  1764. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1765. } else if(netdev->flags & IFF_ALLMULTI) {
  1766. rctl |= E1000_RCTL_MPE;
  1767. rctl &= ~E1000_RCTL_UPE;
  1768. } else {
  1769. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1770. }
  1771. E1000_WRITE_REG(hw, RCTL, rctl);
  1772. /* 82542 2.0 needs to be in reset to write receive address registers */
  1773. if(hw->mac_type == e1000_82542_rev2_0)
  1774. e1000_enter_82542_rst(adapter);
  1775. /* load the first 14 multicast address into the exact filters 1-14
  1776. * RAR 0 is used for the station MAC adddress
  1777. * if there are not 14 addresses, go ahead and clear the filters
  1778. * -- with 82571 controllers only 0-13 entries are filled here
  1779. */
  1780. mc_ptr = netdev->mc_list;
  1781. for(i = 1; i < rar_entries; i++) {
  1782. if (mc_ptr) {
  1783. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1784. mc_ptr = mc_ptr->next;
  1785. } else {
  1786. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1787. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1788. }
  1789. }
  1790. /* clear the old settings from the multicast hash table */
  1791. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1792. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1793. /* load any remaining addresses into the hash table */
  1794. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1795. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1796. e1000_mta_set(hw, hash_value);
  1797. }
  1798. if(hw->mac_type == e1000_82542_rev2_0)
  1799. e1000_leave_82542_rst(adapter);
  1800. }
  1801. /* Need to wait a few seconds after link up to get diagnostic information from
  1802. * the phy */
  1803. static void
  1804. e1000_update_phy_info(unsigned long data)
  1805. {
  1806. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1807. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1808. }
  1809. /**
  1810. * e1000_82547_tx_fifo_stall - Timer Call-back
  1811. * @data: pointer to adapter cast into an unsigned long
  1812. **/
  1813. static void
  1814. e1000_82547_tx_fifo_stall(unsigned long data)
  1815. {
  1816. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1817. struct net_device *netdev = adapter->netdev;
  1818. uint32_t tctl;
  1819. if(atomic_read(&adapter->tx_fifo_stall)) {
  1820. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1821. E1000_READ_REG(&adapter->hw, TDH)) &&
  1822. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1823. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1824. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1825. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1826. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1827. E1000_WRITE_REG(&adapter->hw, TCTL,
  1828. tctl & ~E1000_TCTL_EN);
  1829. E1000_WRITE_REG(&adapter->hw, TDFT,
  1830. adapter->tx_head_addr);
  1831. E1000_WRITE_REG(&adapter->hw, TDFH,
  1832. adapter->tx_head_addr);
  1833. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1834. adapter->tx_head_addr);
  1835. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1836. adapter->tx_head_addr);
  1837. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1838. E1000_WRITE_FLUSH(&adapter->hw);
  1839. adapter->tx_fifo_head = 0;
  1840. atomic_set(&adapter->tx_fifo_stall, 0);
  1841. netif_wake_queue(netdev);
  1842. } else {
  1843. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1844. }
  1845. }
  1846. }
  1847. /**
  1848. * e1000_watchdog - Timer Call-back
  1849. * @data: pointer to adapter cast into an unsigned long
  1850. **/
  1851. static void
  1852. e1000_watchdog(unsigned long data)
  1853. {
  1854. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1855. /* Do the rest outside of interrupt context */
  1856. schedule_work(&adapter->watchdog_task);
  1857. }
  1858. static void
  1859. e1000_watchdog_task(struct e1000_adapter *adapter)
  1860. {
  1861. struct net_device *netdev = adapter->netdev;
  1862. struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
  1863. uint32_t link;
  1864. e1000_check_for_link(&adapter->hw);
  1865. if (adapter->hw.mac_type == e1000_82573) {
  1866. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1867. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1868. e1000_update_mng_vlan(adapter);
  1869. }
  1870. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1871. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1872. link = !adapter->hw.serdes_link_down;
  1873. else
  1874. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1875. if(link) {
  1876. if(!netif_carrier_ok(netdev)) {
  1877. e1000_get_speed_and_duplex(&adapter->hw,
  1878. &adapter->link_speed,
  1879. &adapter->link_duplex);
  1880. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1881. adapter->link_speed,
  1882. adapter->link_duplex == FULL_DUPLEX ?
  1883. "Full Duplex" : "Half Duplex");
  1884. netif_carrier_on(netdev);
  1885. netif_wake_queue(netdev);
  1886. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1887. adapter->smartspeed = 0;
  1888. }
  1889. } else {
  1890. if(netif_carrier_ok(netdev)) {
  1891. adapter->link_speed = 0;
  1892. adapter->link_duplex = 0;
  1893. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1894. netif_carrier_off(netdev);
  1895. netif_stop_queue(netdev);
  1896. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1897. }
  1898. e1000_smartspeed(adapter);
  1899. }
  1900. e1000_update_stats(adapter);
  1901. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1902. adapter->tpt_old = adapter->stats.tpt;
  1903. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1904. adapter->colc_old = adapter->stats.colc;
  1905. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1906. adapter->gorcl_old = adapter->stats.gorcl;
  1907. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1908. adapter->gotcl_old = adapter->stats.gotcl;
  1909. e1000_update_adaptive(&adapter->hw);
  1910. if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
  1911. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1912. /* We've lost link, so the controller stops DMA,
  1913. * but we've got queued Tx work that's never going
  1914. * to get done, so reset controller to flush Tx.
  1915. * (Do the reset outside of interrupt context). */
  1916. schedule_work(&adapter->tx_timeout_task);
  1917. }
  1918. }
  1919. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1920. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1921. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1922. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1923. * else is between 2000-8000. */
  1924. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1925. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1926. adapter->gotcl - adapter->gorcl :
  1927. adapter->gorcl - adapter->gotcl) / 10000;
  1928. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1929. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1930. }
  1931. /* Cause software interrupt to ensure rx ring is cleaned */
  1932. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1933. /* Force detection of hung controller every watchdog period */
  1934. adapter->detect_tx_hung = TRUE;
  1935. /* With 82571 controllers, LAA may be overwritten due to controller
  1936. * reset from the other port. Set the appropriate LAA in RAR[0] */
  1937. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  1938. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1939. /* Reset the timer */
  1940. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1941. }
  1942. #define E1000_TX_FLAGS_CSUM 0x00000001
  1943. #define E1000_TX_FLAGS_VLAN 0x00000002
  1944. #define E1000_TX_FLAGS_TSO 0x00000004
  1945. #define E1000_TX_FLAGS_IPV4 0x00000008
  1946. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1947. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1948. static inline int
  1949. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1950. struct sk_buff *skb)
  1951. {
  1952. #ifdef NETIF_F_TSO
  1953. struct e1000_context_desc *context_desc;
  1954. unsigned int i;
  1955. uint32_t cmd_length = 0;
  1956. uint16_t ipcse = 0, tucse, mss;
  1957. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1958. int err;
  1959. if(skb_shinfo(skb)->tso_size) {
  1960. if (skb_header_cloned(skb)) {
  1961. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1962. if (err)
  1963. return err;
  1964. }
  1965. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  1966. mss = skb_shinfo(skb)->tso_size;
  1967. if(skb->protocol == ntohs(ETH_P_IP)) {
  1968. skb->nh.iph->tot_len = 0;
  1969. skb->nh.iph->check = 0;
  1970. skb->h.th->check =
  1971. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  1972. skb->nh.iph->daddr,
  1973. 0,
  1974. IPPROTO_TCP,
  1975. 0);
  1976. cmd_length = E1000_TXD_CMD_IP;
  1977. ipcse = skb->h.raw - skb->data - 1;
  1978. #ifdef NETIF_F_TSO_IPV6
  1979. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  1980. skb->nh.ipv6h->payload_len = 0;
  1981. skb->h.th->check =
  1982. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  1983. &skb->nh.ipv6h->daddr,
  1984. 0,
  1985. IPPROTO_TCP,
  1986. 0);
  1987. ipcse = 0;
  1988. #endif
  1989. }
  1990. ipcss = skb->nh.raw - skb->data;
  1991. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  1992. tucss = skb->h.raw - skb->data;
  1993. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  1994. tucse = 0;
  1995. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  1996. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  1997. i = tx_ring->next_to_use;
  1998. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  1999. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2000. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2001. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2002. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2003. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2004. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2005. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2006. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2007. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2008. if (++i == tx_ring->count) i = 0;
  2009. tx_ring->next_to_use = i;
  2010. return 1;
  2011. }
  2012. #endif
  2013. return 0;
  2014. }
  2015. static inline boolean_t
  2016. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2017. struct sk_buff *skb)
  2018. {
  2019. struct e1000_context_desc *context_desc;
  2020. unsigned int i;
  2021. uint8_t css;
  2022. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2023. css = skb->h.raw - skb->data;
  2024. i = tx_ring->next_to_use;
  2025. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2026. context_desc->upper_setup.tcp_fields.tucss = css;
  2027. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2028. context_desc->upper_setup.tcp_fields.tucse = 0;
  2029. context_desc->tcp_seg_setup.data = 0;
  2030. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2031. if (unlikely(++i == tx_ring->count)) i = 0;
  2032. tx_ring->next_to_use = i;
  2033. return TRUE;
  2034. }
  2035. return FALSE;
  2036. }
  2037. #define E1000_MAX_TXD_PWR 12
  2038. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2039. static inline int
  2040. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2041. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2042. unsigned int nr_frags, unsigned int mss)
  2043. {
  2044. struct e1000_buffer *buffer_info;
  2045. unsigned int len = skb->len;
  2046. unsigned int offset = 0, size, count = 0, i;
  2047. unsigned int f;
  2048. len -= skb->data_len;
  2049. i = tx_ring->next_to_use;
  2050. while(len) {
  2051. buffer_info = &tx_ring->buffer_info[i];
  2052. size = min(len, max_per_txd);
  2053. #ifdef NETIF_F_TSO
  2054. /* Workaround for premature desc write-backs
  2055. * in TSO mode. Append 4-byte sentinel desc */
  2056. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2057. size -= 4;
  2058. #endif
  2059. /* work-around for errata 10 and it applies
  2060. * to all controllers in PCI-X mode
  2061. * The fix is to make sure that the first descriptor of a
  2062. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2063. */
  2064. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2065. (size > 2015) && count == 0))
  2066. size = 2015;
  2067. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2068. * terminating buffers within evenly-aligned dwords. */
  2069. if(unlikely(adapter->pcix_82544 &&
  2070. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2071. size > 4))
  2072. size -= 4;
  2073. buffer_info->length = size;
  2074. buffer_info->dma =
  2075. pci_map_single(adapter->pdev,
  2076. skb->data + offset,
  2077. size,
  2078. PCI_DMA_TODEVICE);
  2079. buffer_info->time_stamp = jiffies;
  2080. len -= size;
  2081. offset += size;
  2082. count++;
  2083. if(unlikely(++i == tx_ring->count)) i = 0;
  2084. }
  2085. for(f = 0; f < nr_frags; f++) {
  2086. struct skb_frag_struct *frag;
  2087. frag = &skb_shinfo(skb)->frags[f];
  2088. len = frag->size;
  2089. offset = frag->page_offset;
  2090. while(len) {
  2091. buffer_info = &tx_ring->buffer_info[i];
  2092. size = min(len, max_per_txd);
  2093. #ifdef NETIF_F_TSO
  2094. /* Workaround for premature desc write-backs
  2095. * in TSO mode. Append 4-byte sentinel desc */
  2096. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2097. size -= 4;
  2098. #endif
  2099. /* Workaround for potential 82544 hang in PCI-X.
  2100. * Avoid terminating buffers within evenly-aligned
  2101. * dwords. */
  2102. if(unlikely(adapter->pcix_82544 &&
  2103. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2104. size > 4))
  2105. size -= 4;
  2106. buffer_info->length = size;
  2107. buffer_info->dma =
  2108. pci_map_page(adapter->pdev,
  2109. frag->page,
  2110. offset,
  2111. size,
  2112. PCI_DMA_TODEVICE);
  2113. buffer_info->time_stamp = jiffies;
  2114. len -= size;
  2115. offset += size;
  2116. count++;
  2117. if(unlikely(++i == tx_ring->count)) i = 0;
  2118. }
  2119. }
  2120. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2121. tx_ring->buffer_info[i].skb = skb;
  2122. tx_ring->buffer_info[first].next_to_watch = i;
  2123. return count;
  2124. }
  2125. static inline void
  2126. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2127. int tx_flags, int count)
  2128. {
  2129. struct e1000_tx_desc *tx_desc = NULL;
  2130. struct e1000_buffer *buffer_info;
  2131. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2132. unsigned int i;
  2133. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2134. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2135. E1000_TXD_CMD_TSE;
  2136. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2137. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2138. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2139. }
  2140. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2141. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2142. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2143. }
  2144. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2145. txd_lower |= E1000_TXD_CMD_VLE;
  2146. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2147. }
  2148. i = tx_ring->next_to_use;
  2149. while(count--) {
  2150. buffer_info = &tx_ring->buffer_info[i];
  2151. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2152. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2153. tx_desc->lower.data =
  2154. cpu_to_le32(txd_lower | buffer_info->length);
  2155. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2156. if(unlikely(++i == tx_ring->count)) i = 0;
  2157. }
  2158. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2159. /* Force memory writes to complete before letting h/w
  2160. * know there are new descriptors to fetch. (Only
  2161. * applicable for weak-ordered memory model archs,
  2162. * such as IA-64). */
  2163. wmb();
  2164. tx_ring->next_to_use = i;
  2165. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2166. }
  2167. /**
  2168. * 82547 workaround to avoid controller hang in half-duplex environment.
  2169. * The workaround is to avoid queuing a large packet that would span
  2170. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2171. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2172. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2173. * to the beginning of the Tx FIFO.
  2174. **/
  2175. #define E1000_FIFO_HDR 0x10
  2176. #define E1000_82547_PAD_LEN 0x3E0
  2177. static inline int
  2178. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2179. {
  2180. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2181. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2182. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2183. if(adapter->link_duplex != HALF_DUPLEX)
  2184. goto no_fifo_stall_required;
  2185. if(atomic_read(&adapter->tx_fifo_stall))
  2186. return 1;
  2187. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2188. atomic_set(&adapter->tx_fifo_stall, 1);
  2189. return 1;
  2190. }
  2191. no_fifo_stall_required:
  2192. adapter->tx_fifo_head += skb_fifo_len;
  2193. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2194. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2195. return 0;
  2196. }
  2197. #define MINIMUM_DHCP_PACKET_SIZE 282
  2198. static inline int
  2199. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2200. {
  2201. struct e1000_hw *hw = &adapter->hw;
  2202. uint16_t length, offset;
  2203. if(vlan_tx_tag_present(skb)) {
  2204. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2205. ( adapter->hw.mng_cookie.status &
  2206. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2207. return 0;
  2208. }
  2209. if(htons(ETH_P_IP) == skb->protocol) {
  2210. const struct iphdr *ip = skb->nh.iph;
  2211. if(IPPROTO_UDP == ip->protocol) {
  2212. struct udphdr *udp = (struct udphdr *)(skb->h.uh);
  2213. if(ntohs(udp->dest) == 67) {
  2214. offset = (uint8_t *)udp + 8 - skb->data;
  2215. length = skb->len - offset;
  2216. return e1000_mng_write_dhcp_info(hw,
  2217. (uint8_t *)udp + 8, length);
  2218. }
  2219. }
  2220. } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2221. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2222. if((htons(ETH_P_IP) == eth->h_proto)) {
  2223. const struct iphdr *ip =
  2224. (struct iphdr *)((uint8_t *)skb->data+14);
  2225. if(IPPROTO_UDP == ip->protocol) {
  2226. struct udphdr *udp =
  2227. (struct udphdr *)((uint8_t *)ip +
  2228. (ip->ihl << 2));
  2229. if(ntohs(udp->dest) == 67) {
  2230. offset = (uint8_t *)udp + 8 - skb->data;
  2231. length = skb->len - offset;
  2232. return e1000_mng_write_dhcp_info(hw,
  2233. (uint8_t *)udp + 8,
  2234. length);
  2235. }
  2236. }
  2237. }
  2238. }
  2239. return 0;
  2240. }
  2241. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2242. static int
  2243. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2244. {
  2245. struct e1000_adapter *adapter = netdev_priv(netdev);
  2246. struct e1000_tx_ring *tx_ring;
  2247. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2248. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2249. unsigned int tx_flags = 0;
  2250. unsigned int len = skb->len;
  2251. unsigned long flags;
  2252. unsigned int nr_frags = 0;
  2253. unsigned int mss = 0;
  2254. int count = 0;
  2255. int tso;
  2256. unsigned int f;
  2257. len -= skb->data_len;
  2258. #ifdef CONFIG_E1000_MQ
  2259. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2260. #else
  2261. tx_ring = adapter->tx_ring;
  2262. #endif
  2263. if (unlikely(skb->len <= 0)) {
  2264. dev_kfree_skb_any(skb);
  2265. return NETDEV_TX_OK;
  2266. }
  2267. #ifdef NETIF_F_TSO
  2268. mss = skb_shinfo(skb)->tso_size;
  2269. /* The controller does a simple calculation to
  2270. * make sure there is enough room in the FIFO before
  2271. * initiating the DMA for each buffer. The calc is:
  2272. * 4 = ceil(buffer len/mss). To make sure we don't
  2273. * overrun the FIFO, adjust the max buffer len if mss
  2274. * drops. */
  2275. if(mss) {
  2276. max_per_txd = min(mss << 2, max_per_txd);
  2277. max_txd_pwr = fls(max_per_txd) - 1;
  2278. }
  2279. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2280. count++;
  2281. count++;
  2282. #else
  2283. if(skb->ip_summed == CHECKSUM_HW)
  2284. count++;
  2285. #endif
  2286. count += TXD_USE_COUNT(len, max_txd_pwr);
  2287. if(adapter->pcix_82544)
  2288. count++;
  2289. /* work-around for errata 10 and it applies to all controllers
  2290. * in PCI-X mode, so add one more descriptor to the count
  2291. */
  2292. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2293. (len > 2015)))
  2294. count++;
  2295. nr_frags = skb_shinfo(skb)->nr_frags;
  2296. for(f = 0; f < nr_frags; f++)
  2297. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2298. max_txd_pwr);
  2299. if(adapter->pcix_82544)
  2300. count += nr_frags;
  2301. #ifdef NETIF_F_TSO
  2302. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2303. * points to just header, pull a few bytes of payload from
  2304. * frags into skb->data */
  2305. if (skb_shinfo(skb)->tso_size) {
  2306. uint8_t hdr_len;
  2307. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2308. if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
  2309. (adapter->hw.mac_type == e1000_82571 ||
  2310. adapter->hw.mac_type == e1000_82572)) {
  2311. unsigned int pull_size;
  2312. pull_size = min((unsigned int)4, skb->data_len);
  2313. if (!__pskb_pull_tail(skb, pull_size)) {
  2314. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2315. dev_kfree_skb_any(skb);
  2316. return -EFAULT;
  2317. }
  2318. }
  2319. }
  2320. #endif
  2321. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2322. e1000_transfer_dhcp_info(adapter, skb);
  2323. local_irq_save(flags);
  2324. if (!spin_trylock(&tx_ring->tx_lock)) {
  2325. /* Collision - tell upper layer to requeue */
  2326. local_irq_restore(flags);
  2327. return NETDEV_TX_LOCKED;
  2328. }
  2329. /* need: count + 2 desc gap to keep tail from touching
  2330. * head, otherwise try next time */
  2331. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2332. netif_stop_queue(netdev);
  2333. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2334. return NETDEV_TX_BUSY;
  2335. }
  2336. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2337. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2338. netif_stop_queue(netdev);
  2339. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2340. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2341. return NETDEV_TX_BUSY;
  2342. }
  2343. }
  2344. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2345. tx_flags |= E1000_TX_FLAGS_VLAN;
  2346. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2347. }
  2348. first = tx_ring->next_to_use;
  2349. tso = e1000_tso(adapter, tx_ring, skb);
  2350. if (tso < 0) {
  2351. dev_kfree_skb_any(skb);
  2352. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2353. return NETDEV_TX_OK;
  2354. }
  2355. if (likely(tso))
  2356. tx_flags |= E1000_TX_FLAGS_TSO;
  2357. else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2358. tx_flags |= E1000_TX_FLAGS_CSUM;
  2359. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2360. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2361. * no longer assume, we must. */
  2362. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2363. tx_flags |= E1000_TX_FLAGS_IPV4;
  2364. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2365. e1000_tx_map(adapter, tx_ring, skb, first,
  2366. max_per_txd, nr_frags, mss));
  2367. netdev->trans_start = jiffies;
  2368. /* Make sure there is space in the ring for the next send. */
  2369. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2370. netif_stop_queue(netdev);
  2371. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2372. return NETDEV_TX_OK;
  2373. }
  2374. /**
  2375. * e1000_tx_timeout - Respond to a Tx Hang
  2376. * @netdev: network interface device structure
  2377. **/
  2378. static void
  2379. e1000_tx_timeout(struct net_device *netdev)
  2380. {
  2381. struct e1000_adapter *adapter = netdev_priv(netdev);
  2382. /* Do the reset outside of interrupt context */
  2383. schedule_work(&adapter->tx_timeout_task);
  2384. }
  2385. static void
  2386. e1000_tx_timeout_task(struct net_device *netdev)
  2387. {
  2388. struct e1000_adapter *adapter = netdev_priv(netdev);
  2389. e1000_down(adapter);
  2390. e1000_up(adapter);
  2391. }
  2392. /**
  2393. * e1000_get_stats - Get System Network Statistics
  2394. * @netdev: network interface device structure
  2395. *
  2396. * Returns the address of the device statistics structure.
  2397. * The statistics are actually updated from the timer callback.
  2398. **/
  2399. static struct net_device_stats *
  2400. e1000_get_stats(struct net_device *netdev)
  2401. {
  2402. struct e1000_adapter *adapter = netdev_priv(netdev);
  2403. e1000_update_stats(adapter);
  2404. return &adapter->net_stats;
  2405. }
  2406. /**
  2407. * e1000_change_mtu - Change the Maximum Transfer Unit
  2408. * @netdev: network interface device structure
  2409. * @new_mtu: new value for maximum frame size
  2410. *
  2411. * Returns 0 on success, negative on failure
  2412. **/
  2413. static int
  2414. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2415. {
  2416. struct e1000_adapter *adapter = netdev_priv(netdev);
  2417. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2418. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2419. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2420. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2421. return -EINVAL;
  2422. }
  2423. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2424. /* might want this to be bigger enum check... */
  2425. /* 82571 controllers limit jumbo frame size to 10500 bytes */
  2426. if ((adapter->hw.mac_type == e1000_82571 ||
  2427. adapter->hw.mac_type == e1000_82572) &&
  2428. max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2429. DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
  2430. "on 82571 and 82572 controllers.\n");
  2431. return -EINVAL;
  2432. }
  2433. if(adapter->hw.mac_type == e1000_82573 &&
  2434. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2435. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2436. "on 82573\n");
  2437. return -EINVAL;
  2438. }
  2439. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2440. adapter->rx_buffer_len = max_frame;
  2441. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2442. } else {
  2443. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2444. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2445. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2446. "on 82542\n");
  2447. return -EINVAL;
  2448. } else {
  2449. if(max_frame <= E1000_RXBUFFER_2048) {
  2450. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2451. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2452. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2453. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2454. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2455. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2456. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2457. }
  2458. }
  2459. }
  2460. netdev->mtu = new_mtu;
  2461. if(netif_running(netdev)) {
  2462. e1000_down(adapter);
  2463. e1000_up(adapter);
  2464. }
  2465. adapter->hw.max_frame_size = max_frame;
  2466. return 0;
  2467. }
  2468. /**
  2469. * e1000_update_stats - Update the board statistics counters
  2470. * @adapter: board private structure
  2471. **/
  2472. void
  2473. e1000_update_stats(struct e1000_adapter *adapter)
  2474. {
  2475. struct e1000_hw *hw = &adapter->hw;
  2476. unsigned long flags;
  2477. uint16_t phy_tmp;
  2478. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2479. spin_lock_irqsave(&adapter->stats_lock, flags);
  2480. /* these counters are modified from e1000_adjust_tbi_stats,
  2481. * called from the interrupt context, so they must only
  2482. * be written while holding adapter->stats_lock
  2483. */
  2484. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2485. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2486. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2487. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2488. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2489. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2490. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2491. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2492. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2493. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2494. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2495. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2496. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2497. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2498. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2499. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2500. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2501. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2502. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2503. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2504. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2505. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2506. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2507. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2508. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2509. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2510. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2511. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2512. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2513. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2514. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2515. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2516. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2517. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2518. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2519. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2520. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2521. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2522. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2523. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2524. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2525. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2526. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2527. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2528. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2529. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2530. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2531. /* used for adaptive IFS */
  2532. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2533. adapter->stats.tpt += hw->tx_packet_delta;
  2534. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2535. adapter->stats.colc += hw->collision_delta;
  2536. if(hw->mac_type >= e1000_82543) {
  2537. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2538. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2539. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2540. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2541. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2542. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2543. }
  2544. if(hw->mac_type > e1000_82547_rev_2) {
  2545. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2546. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2547. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2548. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2549. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2550. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2551. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2552. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2553. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2554. }
  2555. /* Fill out the OS statistics structure */
  2556. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2557. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2558. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2559. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2560. adapter->net_stats.multicast = adapter->stats.mprc;
  2561. adapter->net_stats.collisions = adapter->stats.colc;
  2562. /* Rx Errors */
  2563. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2564. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2565. adapter->stats.rlec + adapter->stats.mpc +
  2566. adapter->stats.cexterr;
  2567. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2568. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2569. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2570. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  2571. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2572. /* Tx Errors */
  2573. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2574. adapter->stats.latecol;
  2575. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2576. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2577. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2578. /* Tx Dropped needs to be maintained elsewhere */
  2579. /* Phy Stats */
  2580. if(hw->media_type == e1000_media_type_copper) {
  2581. if((adapter->link_speed == SPEED_1000) &&
  2582. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2583. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2584. adapter->phy_stats.idle_errors += phy_tmp;
  2585. }
  2586. if((hw->mac_type <= e1000_82546) &&
  2587. (hw->phy_type == e1000_phy_m88) &&
  2588. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2589. adapter->phy_stats.receive_errors += phy_tmp;
  2590. }
  2591. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2592. }
  2593. #ifdef CONFIG_E1000_MQ
  2594. void
  2595. e1000_rx_schedule(void *data)
  2596. {
  2597. struct net_device *poll_dev, *netdev = data;
  2598. struct e1000_adapter *adapter = netdev->priv;
  2599. int this_cpu = get_cpu();
  2600. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2601. if (poll_dev == NULL) {
  2602. put_cpu();
  2603. return;
  2604. }
  2605. if (likely(netif_rx_schedule_prep(poll_dev)))
  2606. __netif_rx_schedule(poll_dev);
  2607. else
  2608. e1000_irq_enable(adapter);
  2609. put_cpu();
  2610. }
  2611. #endif
  2612. /**
  2613. * e1000_intr - Interrupt Handler
  2614. * @irq: interrupt number
  2615. * @data: pointer to a network interface device structure
  2616. * @pt_regs: CPU registers structure
  2617. **/
  2618. static irqreturn_t
  2619. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2620. {
  2621. struct net_device *netdev = data;
  2622. struct e1000_adapter *adapter = netdev_priv(netdev);
  2623. struct e1000_hw *hw = &adapter->hw;
  2624. uint32_t icr = E1000_READ_REG(hw, ICR);
  2625. #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
  2626. int i;
  2627. #endif
  2628. if(unlikely(!icr))
  2629. return IRQ_NONE; /* Not our interrupt */
  2630. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2631. hw->get_link_status = 1;
  2632. mod_timer(&adapter->watchdog_timer, jiffies);
  2633. }
  2634. #ifdef CONFIG_E1000_NAPI
  2635. atomic_inc(&adapter->irq_sem);
  2636. E1000_WRITE_REG(hw, IMC, ~0);
  2637. E1000_WRITE_FLUSH(hw);
  2638. #ifdef CONFIG_E1000_MQ
  2639. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2640. cpu_set(adapter->cpu_for_queue[0],
  2641. adapter->rx_sched_call_data.cpumask);
  2642. for (i = 1; i < adapter->num_queues; i++) {
  2643. cpu_set(adapter->cpu_for_queue[i],
  2644. adapter->rx_sched_call_data.cpumask);
  2645. atomic_inc(&adapter->irq_sem);
  2646. }
  2647. atomic_set(&adapter->rx_sched_call_data.count, i);
  2648. smp_call_async_mask(&adapter->rx_sched_call_data);
  2649. } else {
  2650. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2651. }
  2652. #else /* if !CONFIG_E1000_MQ */
  2653. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2654. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2655. else
  2656. e1000_irq_enable(adapter);
  2657. #endif /* CONFIG_E1000_MQ */
  2658. #else /* if !CONFIG_E1000_NAPI */
  2659. /* Writing IMC and IMS is needed for 82547.
  2660. Due to Hub Link bus being occupied, an interrupt
  2661. de-assertion message is not able to be sent.
  2662. When an interrupt assertion message is generated later,
  2663. two messages are re-ordered and sent out.
  2664. That causes APIC to think 82547 is in de-assertion
  2665. state, while 82547 is in assertion state, resulting
  2666. in dead lock. Writing IMC forces 82547 into
  2667. de-assertion state.
  2668. */
  2669. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2670. atomic_inc(&adapter->irq_sem);
  2671. E1000_WRITE_REG(hw, IMC, ~0);
  2672. }
  2673. for(i = 0; i < E1000_MAX_INTR; i++)
  2674. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2675. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2676. break;
  2677. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2678. e1000_irq_enable(adapter);
  2679. #endif /* CONFIG_E1000_NAPI */
  2680. return IRQ_HANDLED;
  2681. }
  2682. #ifdef CONFIG_E1000_NAPI
  2683. /**
  2684. * e1000_clean - NAPI Rx polling callback
  2685. * @adapter: board private structure
  2686. **/
  2687. static int
  2688. e1000_clean(struct net_device *poll_dev, int *budget)
  2689. {
  2690. struct e1000_adapter *adapter;
  2691. int work_to_do = min(*budget, poll_dev->quota);
  2692. int tx_cleaned, i = 0, work_done = 0;
  2693. /* Must NOT use netdev_priv macro here. */
  2694. adapter = poll_dev->priv;
  2695. /* Keep link state information with original netdev */
  2696. if (!netif_carrier_ok(adapter->netdev))
  2697. goto quit_polling;
  2698. while (poll_dev != &adapter->polling_netdev[i]) {
  2699. i++;
  2700. if (unlikely(i == adapter->num_queues))
  2701. BUG();
  2702. }
  2703. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2704. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2705. &work_done, work_to_do);
  2706. *budget -= work_done;
  2707. poll_dev->quota -= work_done;
  2708. /* If no Tx and not enough Rx work done, exit the polling mode */
  2709. if((!tx_cleaned && (work_done == 0)) ||
  2710. !netif_running(adapter->netdev)) {
  2711. quit_polling:
  2712. netif_rx_complete(poll_dev);
  2713. e1000_irq_enable(adapter);
  2714. return 0;
  2715. }
  2716. return 1;
  2717. }
  2718. #endif
  2719. /**
  2720. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2721. * @adapter: board private structure
  2722. **/
  2723. static boolean_t
  2724. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2725. struct e1000_tx_ring *tx_ring)
  2726. {
  2727. struct net_device *netdev = adapter->netdev;
  2728. struct e1000_tx_desc *tx_desc, *eop_desc;
  2729. struct e1000_buffer *buffer_info;
  2730. unsigned int i, eop;
  2731. boolean_t cleaned = FALSE;
  2732. i = tx_ring->next_to_clean;
  2733. eop = tx_ring->buffer_info[i].next_to_watch;
  2734. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2735. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2736. /* Premature writeback of Tx descriptors clear (free buffers
  2737. * and unmap pci_mapping) previous_buffer_info */
  2738. if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
  2739. e1000_unmap_and_free_tx_resource(adapter,
  2740. &tx_ring->previous_buffer_info);
  2741. }
  2742. for(cleaned = FALSE; !cleaned; ) {
  2743. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2744. buffer_info = &tx_ring->buffer_info[i];
  2745. cleaned = (i == eop);
  2746. #ifdef NETIF_F_TSO
  2747. if (!(netdev->features & NETIF_F_TSO)) {
  2748. #endif
  2749. e1000_unmap_and_free_tx_resource(adapter,
  2750. buffer_info);
  2751. #ifdef NETIF_F_TSO
  2752. } else {
  2753. if (cleaned) {
  2754. memcpy(&tx_ring->previous_buffer_info,
  2755. buffer_info,
  2756. sizeof(struct e1000_buffer));
  2757. memset(buffer_info, 0,
  2758. sizeof(struct e1000_buffer));
  2759. } else {
  2760. e1000_unmap_and_free_tx_resource(
  2761. adapter, buffer_info);
  2762. }
  2763. }
  2764. #endif
  2765. tx_desc->buffer_addr = 0;
  2766. tx_desc->lower.data = 0;
  2767. tx_desc->upper.data = 0;
  2768. if(unlikely(++i == tx_ring->count)) i = 0;
  2769. }
  2770. tx_ring->pkt++;
  2771. eop = tx_ring->buffer_info[i].next_to_watch;
  2772. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2773. }
  2774. tx_ring->next_to_clean = i;
  2775. spin_lock(&tx_ring->tx_lock);
  2776. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2777. netif_carrier_ok(netdev)))
  2778. netif_wake_queue(netdev);
  2779. spin_unlock(&tx_ring->tx_lock);
  2780. if (adapter->detect_tx_hung) {
  2781. /* Detect a transmit hang in hardware, this serializes the
  2782. * check with the clearing of time_stamp and movement of i */
  2783. adapter->detect_tx_hung = FALSE;
  2784. if (tx_ring->buffer_info[i].dma &&
  2785. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2786. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2787. E1000_STATUS_TXOFF)) {
  2788. /* detected Tx unit hang */
  2789. i = tx_ring->next_to_clean;
  2790. eop = tx_ring->buffer_info[i].next_to_watch;
  2791. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2792. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2793. " TDH <%x>\n"
  2794. " TDT <%x>\n"
  2795. " next_to_use <%x>\n"
  2796. " next_to_clean <%x>\n"
  2797. "buffer_info[next_to_clean]\n"
  2798. " dma <%llx>\n"
  2799. " time_stamp <%lx>\n"
  2800. " next_to_watch <%x>\n"
  2801. " jiffies <%lx>\n"
  2802. " next_to_watch.status <%x>\n",
  2803. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2804. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2805. tx_ring->next_to_use,
  2806. i,
  2807. (unsigned long long)tx_ring->buffer_info[i].dma,
  2808. tx_ring->buffer_info[i].time_stamp,
  2809. eop,
  2810. jiffies,
  2811. eop_desc->upper.fields.status);
  2812. netif_stop_queue(netdev);
  2813. }
  2814. }
  2815. #ifdef NETIF_F_TSO
  2816. if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  2817. time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ)))
  2818. e1000_unmap_and_free_tx_resource(
  2819. adapter, &tx_ring->previous_buffer_info);
  2820. #endif
  2821. return cleaned;
  2822. }
  2823. /**
  2824. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2825. * @adapter: board private structure
  2826. * @status_err: receive descriptor status and error fields
  2827. * @csum: receive descriptor csum field
  2828. * @sk_buff: socket buffer with received data
  2829. **/
  2830. static inline void
  2831. e1000_rx_checksum(struct e1000_adapter *adapter,
  2832. uint32_t status_err, uint32_t csum,
  2833. struct sk_buff *skb)
  2834. {
  2835. uint16_t status = (uint16_t)status_err;
  2836. uint8_t errors = (uint8_t)(status_err >> 24);
  2837. skb->ip_summed = CHECKSUM_NONE;
  2838. /* 82543 or newer only */
  2839. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2840. /* Ignore Checksum bit is set */
  2841. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2842. /* TCP/UDP checksum error bit is set */
  2843. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2844. /* let the stack verify checksum errors */
  2845. adapter->hw_csum_err++;
  2846. return;
  2847. }
  2848. /* TCP/UDP Checksum has not been calculated */
  2849. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2850. if(!(status & E1000_RXD_STAT_TCPCS))
  2851. return;
  2852. } else {
  2853. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2854. return;
  2855. }
  2856. /* It must be a TCP or UDP packet with a valid checksum */
  2857. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2858. /* TCP checksum is good */
  2859. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2860. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2861. /* IP fragment with UDP payload */
  2862. /* Hardware complements the payload checksum, so we undo it
  2863. * and then put the value in host order for further stack use.
  2864. */
  2865. csum = ntohl(csum ^ 0xFFFF);
  2866. skb->csum = csum;
  2867. skb->ip_summed = CHECKSUM_HW;
  2868. }
  2869. adapter->hw_csum_good++;
  2870. }
  2871. /**
  2872. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2873. * @adapter: board private structure
  2874. **/
  2875. static boolean_t
  2876. #ifdef CONFIG_E1000_NAPI
  2877. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2878. struct e1000_rx_ring *rx_ring,
  2879. int *work_done, int work_to_do)
  2880. #else
  2881. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2882. struct e1000_rx_ring *rx_ring)
  2883. #endif
  2884. {
  2885. struct net_device *netdev = adapter->netdev;
  2886. struct pci_dev *pdev = adapter->pdev;
  2887. struct e1000_rx_desc *rx_desc;
  2888. struct e1000_buffer *buffer_info;
  2889. struct sk_buff *skb;
  2890. unsigned long flags;
  2891. uint32_t length;
  2892. uint8_t last_byte;
  2893. unsigned int i;
  2894. boolean_t cleaned = FALSE;
  2895. i = rx_ring->next_to_clean;
  2896. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2897. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2898. buffer_info = &rx_ring->buffer_info[i];
  2899. #ifdef CONFIG_E1000_NAPI
  2900. if(*work_done >= work_to_do)
  2901. break;
  2902. (*work_done)++;
  2903. #endif
  2904. cleaned = TRUE;
  2905. pci_unmap_single(pdev,
  2906. buffer_info->dma,
  2907. buffer_info->length,
  2908. PCI_DMA_FROMDEVICE);
  2909. skb = buffer_info->skb;
  2910. length = le16_to_cpu(rx_desc->length);
  2911. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2912. /* All receives must fit into a single buffer */
  2913. E1000_DBG("%s: Receive packet consumed multiple"
  2914. " buffers\n", netdev->name);
  2915. dev_kfree_skb_irq(skb);
  2916. goto next_desc;
  2917. }
  2918. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2919. last_byte = *(skb->data + length - 1);
  2920. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2921. rx_desc->errors, length, last_byte)) {
  2922. spin_lock_irqsave(&adapter->stats_lock, flags);
  2923. e1000_tbi_adjust_stats(&adapter->hw,
  2924. &adapter->stats,
  2925. length, skb->data);
  2926. spin_unlock_irqrestore(&adapter->stats_lock,
  2927. flags);
  2928. length--;
  2929. } else {
  2930. dev_kfree_skb_irq(skb);
  2931. goto next_desc;
  2932. }
  2933. }
  2934. /* Good Receive */
  2935. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2936. /* Receive Checksum Offload */
  2937. e1000_rx_checksum(adapter,
  2938. (uint32_t)(rx_desc->status) |
  2939. ((uint32_t)(rx_desc->errors) << 24),
  2940. rx_desc->csum, skb);
  2941. skb->protocol = eth_type_trans(skb, netdev);
  2942. #ifdef CONFIG_E1000_NAPI
  2943. if(unlikely(adapter->vlgrp &&
  2944. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2945. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2946. le16_to_cpu(rx_desc->special) &
  2947. E1000_RXD_SPC_VLAN_MASK);
  2948. } else {
  2949. netif_receive_skb(skb);
  2950. }
  2951. #else /* CONFIG_E1000_NAPI */
  2952. if(unlikely(adapter->vlgrp &&
  2953. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2954. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2955. le16_to_cpu(rx_desc->special) &
  2956. E1000_RXD_SPC_VLAN_MASK);
  2957. } else {
  2958. netif_rx(skb);
  2959. }
  2960. #endif /* CONFIG_E1000_NAPI */
  2961. netdev->last_rx = jiffies;
  2962. rx_ring->pkt++;
  2963. next_desc:
  2964. rx_desc->status = 0;
  2965. buffer_info->skb = NULL;
  2966. if(unlikely(++i == rx_ring->count)) i = 0;
  2967. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2968. }
  2969. rx_ring->next_to_clean = i;
  2970. adapter->alloc_rx_buf(adapter, rx_ring);
  2971. return cleaned;
  2972. }
  2973. /**
  2974. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  2975. * @adapter: board private structure
  2976. **/
  2977. static boolean_t
  2978. #ifdef CONFIG_E1000_NAPI
  2979. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2980. struct e1000_rx_ring *rx_ring,
  2981. int *work_done, int work_to_do)
  2982. #else
  2983. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2984. struct e1000_rx_ring *rx_ring)
  2985. #endif
  2986. {
  2987. union e1000_rx_desc_packet_split *rx_desc;
  2988. struct net_device *netdev = adapter->netdev;
  2989. struct pci_dev *pdev = adapter->pdev;
  2990. struct e1000_buffer *buffer_info;
  2991. struct e1000_ps_page *ps_page;
  2992. struct e1000_ps_page_dma *ps_page_dma;
  2993. struct sk_buff *skb;
  2994. unsigned int i, j;
  2995. uint32_t length, staterr;
  2996. boolean_t cleaned = FALSE;
  2997. i = rx_ring->next_to_clean;
  2998. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2999. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3000. while(staterr & E1000_RXD_STAT_DD) {
  3001. buffer_info = &rx_ring->buffer_info[i];
  3002. ps_page = &rx_ring->ps_page[i];
  3003. ps_page_dma = &rx_ring->ps_page_dma[i];
  3004. #ifdef CONFIG_E1000_NAPI
  3005. if(unlikely(*work_done >= work_to_do))
  3006. break;
  3007. (*work_done)++;
  3008. #endif
  3009. cleaned = TRUE;
  3010. pci_unmap_single(pdev, buffer_info->dma,
  3011. buffer_info->length,
  3012. PCI_DMA_FROMDEVICE);
  3013. skb = buffer_info->skb;
  3014. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3015. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3016. " the full packet\n", netdev->name);
  3017. dev_kfree_skb_irq(skb);
  3018. goto next_desc;
  3019. }
  3020. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3021. dev_kfree_skb_irq(skb);
  3022. goto next_desc;
  3023. }
  3024. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3025. if(unlikely(!length)) {
  3026. E1000_DBG("%s: Last part of the packet spanning"
  3027. " multiple descriptors\n", netdev->name);
  3028. dev_kfree_skb_irq(skb);
  3029. goto next_desc;
  3030. }
  3031. /* Good Receive */
  3032. skb_put(skb, length);
  3033. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3034. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3035. break;
  3036. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3037. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3038. ps_page_dma->ps_page_dma[j] = 0;
  3039. skb_shinfo(skb)->frags[j].page =
  3040. ps_page->ps_page[j];
  3041. ps_page->ps_page[j] = NULL;
  3042. skb_shinfo(skb)->frags[j].page_offset = 0;
  3043. skb_shinfo(skb)->frags[j].size = length;
  3044. skb_shinfo(skb)->nr_frags++;
  3045. skb->len += length;
  3046. skb->data_len += length;
  3047. }
  3048. e1000_rx_checksum(adapter, staterr,
  3049. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3050. skb->protocol = eth_type_trans(skb, netdev);
  3051. if(likely(rx_desc->wb.upper.header_status &
  3052. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3053. adapter->rx_hdr_split++;
  3054. #ifdef HAVE_RX_ZERO_COPY
  3055. skb_shinfo(skb)->zero_copy = TRUE;
  3056. #endif
  3057. }
  3058. #ifdef CONFIG_E1000_NAPI
  3059. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3060. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3061. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3062. E1000_RXD_SPC_VLAN_MASK);
  3063. } else {
  3064. netif_receive_skb(skb);
  3065. }
  3066. #else /* CONFIG_E1000_NAPI */
  3067. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3068. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3069. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3070. E1000_RXD_SPC_VLAN_MASK);
  3071. } else {
  3072. netif_rx(skb);
  3073. }
  3074. #endif /* CONFIG_E1000_NAPI */
  3075. netdev->last_rx = jiffies;
  3076. rx_ring->pkt++;
  3077. next_desc:
  3078. rx_desc->wb.middle.status_error &= ~0xFF;
  3079. buffer_info->skb = NULL;
  3080. if(unlikely(++i == rx_ring->count)) i = 0;
  3081. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3082. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3083. }
  3084. rx_ring->next_to_clean = i;
  3085. adapter->alloc_rx_buf(adapter, rx_ring);
  3086. return cleaned;
  3087. }
  3088. /**
  3089. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3090. * @adapter: address of board private structure
  3091. **/
  3092. static void
  3093. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3094. struct e1000_rx_ring *rx_ring)
  3095. {
  3096. struct net_device *netdev = adapter->netdev;
  3097. struct pci_dev *pdev = adapter->pdev;
  3098. struct e1000_rx_desc *rx_desc;
  3099. struct e1000_buffer *buffer_info;
  3100. struct sk_buff *skb;
  3101. unsigned int i;
  3102. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3103. i = rx_ring->next_to_use;
  3104. buffer_info = &rx_ring->buffer_info[i];
  3105. while(!buffer_info->skb) {
  3106. skb = dev_alloc_skb(bufsz);
  3107. if(unlikely(!skb)) {
  3108. /* Better luck next round */
  3109. break;
  3110. }
  3111. /* Fix for errata 23, can't cross 64kB boundary */
  3112. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3113. struct sk_buff *oldskb = skb;
  3114. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3115. "at %p\n", bufsz, skb->data);
  3116. /* Try again, without freeing the previous */
  3117. skb = dev_alloc_skb(bufsz);
  3118. /* Failed allocation, critical failure */
  3119. if (!skb) {
  3120. dev_kfree_skb(oldskb);
  3121. break;
  3122. }
  3123. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3124. /* give up */
  3125. dev_kfree_skb(skb);
  3126. dev_kfree_skb(oldskb);
  3127. break; /* while !buffer_info->skb */
  3128. } else {
  3129. /* Use new allocation */
  3130. dev_kfree_skb(oldskb);
  3131. }
  3132. }
  3133. /* Make buffer alignment 2 beyond a 16 byte boundary
  3134. * this will result in a 16 byte aligned IP header after
  3135. * the 14 byte MAC header is removed
  3136. */
  3137. skb_reserve(skb, NET_IP_ALIGN);
  3138. skb->dev = netdev;
  3139. buffer_info->skb = skb;
  3140. buffer_info->length = adapter->rx_buffer_len;
  3141. buffer_info->dma = pci_map_single(pdev,
  3142. skb->data,
  3143. adapter->rx_buffer_len,
  3144. PCI_DMA_FROMDEVICE);
  3145. /* Fix for errata 23, can't cross 64kB boundary */
  3146. if (!e1000_check_64k_bound(adapter,
  3147. (void *)(unsigned long)buffer_info->dma,
  3148. adapter->rx_buffer_len)) {
  3149. DPRINTK(RX_ERR, ERR,
  3150. "dma align check failed: %u bytes at %p\n",
  3151. adapter->rx_buffer_len,
  3152. (void *)(unsigned long)buffer_info->dma);
  3153. dev_kfree_skb(skb);
  3154. buffer_info->skb = NULL;
  3155. pci_unmap_single(pdev, buffer_info->dma,
  3156. adapter->rx_buffer_len,
  3157. PCI_DMA_FROMDEVICE);
  3158. break; /* while !buffer_info->skb */
  3159. }
  3160. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3161. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3162. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3163. /* Force memory writes to complete before letting h/w
  3164. * know there are new descriptors to fetch. (Only
  3165. * applicable for weak-ordered memory model archs,
  3166. * such as IA-64). */
  3167. wmb();
  3168. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3169. }
  3170. if(unlikely(++i == rx_ring->count)) i = 0;
  3171. buffer_info = &rx_ring->buffer_info[i];
  3172. }
  3173. rx_ring->next_to_use = i;
  3174. }
  3175. /**
  3176. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3177. * @adapter: address of board private structure
  3178. **/
  3179. static void
  3180. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3181. struct e1000_rx_ring *rx_ring)
  3182. {
  3183. struct net_device *netdev = adapter->netdev;
  3184. struct pci_dev *pdev = adapter->pdev;
  3185. union e1000_rx_desc_packet_split *rx_desc;
  3186. struct e1000_buffer *buffer_info;
  3187. struct e1000_ps_page *ps_page;
  3188. struct e1000_ps_page_dma *ps_page_dma;
  3189. struct sk_buff *skb;
  3190. unsigned int i, j;
  3191. i = rx_ring->next_to_use;
  3192. buffer_info = &rx_ring->buffer_info[i];
  3193. ps_page = &rx_ring->ps_page[i];
  3194. ps_page_dma = &rx_ring->ps_page_dma[i];
  3195. while(!buffer_info->skb) {
  3196. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3197. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3198. if (j < adapter->rx_ps_pages) {
  3199. if (likely(!ps_page->ps_page[j])) {
  3200. ps_page->ps_page[j] =
  3201. alloc_page(GFP_ATOMIC);
  3202. if (unlikely(!ps_page->ps_page[j]))
  3203. goto no_buffers;
  3204. ps_page_dma->ps_page_dma[j] =
  3205. pci_map_page(pdev,
  3206. ps_page->ps_page[j],
  3207. 0, PAGE_SIZE,
  3208. PCI_DMA_FROMDEVICE);
  3209. }
  3210. /* Refresh the desc even if buffer_addrs didn't
  3211. * change because each write-back erases
  3212. * this info.
  3213. */
  3214. rx_desc->read.buffer_addr[j+1] =
  3215. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3216. } else
  3217. rx_desc->read.buffer_addr[j+1] = ~0;
  3218. }
  3219. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3220. if(unlikely(!skb))
  3221. break;
  3222. /* Make buffer alignment 2 beyond a 16 byte boundary
  3223. * this will result in a 16 byte aligned IP header after
  3224. * the 14 byte MAC header is removed
  3225. */
  3226. skb_reserve(skb, NET_IP_ALIGN);
  3227. skb->dev = netdev;
  3228. buffer_info->skb = skb;
  3229. buffer_info->length = adapter->rx_ps_bsize0;
  3230. buffer_info->dma = pci_map_single(pdev, skb->data,
  3231. adapter->rx_ps_bsize0,
  3232. PCI_DMA_FROMDEVICE);
  3233. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3234. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3235. /* Force memory writes to complete before letting h/w
  3236. * know there are new descriptors to fetch. (Only
  3237. * applicable for weak-ordered memory model archs,
  3238. * such as IA-64). */
  3239. wmb();
  3240. /* Hardware increments by 16 bytes, but packet split
  3241. * descriptors are 32 bytes...so we increment tail
  3242. * twice as much.
  3243. */
  3244. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3245. }
  3246. if(unlikely(++i == rx_ring->count)) i = 0;
  3247. buffer_info = &rx_ring->buffer_info[i];
  3248. ps_page = &rx_ring->ps_page[i];
  3249. ps_page_dma = &rx_ring->ps_page_dma[i];
  3250. }
  3251. no_buffers:
  3252. rx_ring->next_to_use = i;
  3253. }
  3254. /**
  3255. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3256. * @adapter:
  3257. **/
  3258. static void
  3259. e1000_smartspeed(struct e1000_adapter *adapter)
  3260. {
  3261. uint16_t phy_status;
  3262. uint16_t phy_ctrl;
  3263. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3264. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3265. return;
  3266. if(adapter->smartspeed == 0) {
  3267. /* If Master/Slave config fault is asserted twice,
  3268. * we assume back-to-back */
  3269. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3270. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3271. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3272. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3273. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3274. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3275. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3276. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3277. phy_ctrl);
  3278. adapter->smartspeed++;
  3279. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3280. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3281. &phy_ctrl)) {
  3282. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3283. MII_CR_RESTART_AUTO_NEG);
  3284. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3285. phy_ctrl);
  3286. }
  3287. }
  3288. return;
  3289. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3290. /* If still no link, perhaps using 2/3 pair cable */
  3291. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3292. phy_ctrl |= CR_1000T_MS_ENABLE;
  3293. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3294. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3295. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3296. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3297. MII_CR_RESTART_AUTO_NEG);
  3298. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3299. }
  3300. }
  3301. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3302. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3303. adapter->smartspeed = 0;
  3304. }
  3305. /**
  3306. * e1000_ioctl -
  3307. * @netdev:
  3308. * @ifreq:
  3309. * @cmd:
  3310. **/
  3311. static int
  3312. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3313. {
  3314. switch (cmd) {
  3315. case SIOCGMIIPHY:
  3316. case SIOCGMIIREG:
  3317. case SIOCSMIIREG:
  3318. return e1000_mii_ioctl(netdev, ifr, cmd);
  3319. default:
  3320. return -EOPNOTSUPP;
  3321. }
  3322. }
  3323. /**
  3324. * e1000_mii_ioctl -
  3325. * @netdev:
  3326. * @ifreq:
  3327. * @cmd:
  3328. **/
  3329. static int
  3330. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3331. {
  3332. struct e1000_adapter *adapter = netdev_priv(netdev);
  3333. struct mii_ioctl_data *data = if_mii(ifr);
  3334. int retval;
  3335. uint16_t mii_reg;
  3336. uint16_t spddplx;
  3337. unsigned long flags;
  3338. if(adapter->hw.media_type != e1000_media_type_copper)
  3339. return -EOPNOTSUPP;
  3340. switch (cmd) {
  3341. case SIOCGMIIPHY:
  3342. data->phy_id = adapter->hw.phy_addr;
  3343. break;
  3344. case SIOCGMIIREG:
  3345. if(!capable(CAP_NET_ADMIN))
  3346. return -EPERM;
  3347. spin_lock_irqsave(&adapter->stats_lock, flags);
  3348. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3349. &data->val_out)) {
  3350. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3351. return -EIO;
  3352. }
  3353. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3354. break;
  3355. case SIOCSMIIREG:
  3356. if(!capable(CAP_NET_ADMIN))
  3357. return -EPERM;
  3358. if(data->reg_num & ~(0x1F))
  3359. return -EFAULT;
  3360. mii_reg = data->val_in;
  3361. spin_lock_irqsave(&adapter->stats_lock, flags);
  3362. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3363. mii_reg)) {
  3364. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3365. return -EIO;
  3366. }
  3367. if(adapter->hw.phy_type == e1000_phy_m88) {
  3368. switch (data->reg_num) {
  3369. case PHY_CTRL:
  3370. if(mii_reg & MII_CR_POWER_DOWN)
  3371. break;
  3372. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3373. adapter->hw.autoneg = 1;
  3374. adapter->hw.autoneg_advertised = 0x2F;
  3375. } else {
  3376. if (mii_reg & 0x40)
  3377. spddplx = SPEED_1000;
  3378. else if (mii_reg & 0x2000)
  3379. spddplx = SPEED_100;
  3380. else
  3381. spddplx = SPEED_10;
  3382. spddplx += (mii_reg & 0x100)
  3383. ? FULL_DUPLEX :
  3384. HALF_DUPLEX;
  3385. retval = e1000_set_spd_dplx(adapter,
  3386. spddplx);
  3387. if(retval) {
  3388. spin_unlock_irqrestore(
  3389. &adapter->stats_lock,
  3390. flags);
  3391. return retval;
  3392. }
  3393. }
  3394. if(netif_running(adapter->netdev)) {
  3395. e1000_down(adapter);
  3396. e1000_up(adapter);
  3397. } else
  3398. e1000_reset(adapter);
  3399. break;
  3400. case M88E1000_PHY_SPEC_CTRL:
  3401. case M88E1000_EXT_PHY_SPEC_CTRL:
  3402. if(e1000_phy_reset(&adapter->hw)) {
  3403. spin_unlock_irqrestore(
  3404. &adapter->stats_lock, flags);
  3405. return -EIO;
  3406. }
  3407. break;
  3408. }
  3409. } else {
  3410. switch (data->reg_num) {
  3411. case PHY_CTRL:
  3412. if(mii_reg & MII_CR_POWER_DOWN)
  3413. break;
  3414. if(netif_running(adapter->netdev)) {
  3415. e1000_down(adapter);
  3416. e1000_up(adapter);
  3417. } else
  3418. e1000_reset(adapter);
  3419. break;
  3420. }
  3421. }
  3422. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3423. break;
  3424. default:
  3425. return -EOPNOTSUPP;
  3426. }
  3427. return E1000_SUCCESS;
  3428. }
  3429. void
  3430. e1000_pci_set_mwi(struct e1000_hw *hw)
  3431. {
  3432. struct e1000_adapter *adapter = hw->back;
  3433. int ret_val = pci_set_mwi(adapter->pdev);
  3434. if(ret_val)
  3435. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3436. }
  3437. void
  3438. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3439. {
  3440. struct e1000_adapter *adapter = hw->back;
  3441. pci_clear_mwi(adapter->pdev);
  3442. }
  3443. void
  3444. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3445. {
  3446. struct e1000_adapter *adapter = hw->back;
  3447. pci_read_config_word(adapter->pdev, reg, value);
  3448. }
  3449. void
  3450. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3451. {
  3452. struct e1000_adapter *adapter = hw->back;
  3453. pci_write_config_word(adapter->pdev, reg, *value);
  3454. }
  3455. uint32_t
  3456. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3457. {
  3458. return inl(port);
  3459. }
  3460. void
  3461. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3462. {
  3463. outl(value, port);
  3464. }
  3465. static void
  3466. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3467. {
  3468. struct e1000_adapter *adapter = netdev_priv(netdev);
  3469. uint32_t ctrl, rctl;
  3470. e1000_irq_disable(adapter);
  3471. adapter->vlgrp = grp;
  3472. if(grp) {
  3473. /* enable VLAN tag insert/strip */
  3474. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3475. ctrl |= E1000_CTRL_VME;
  3476. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3477. /* enable VLAN receive filtering */
  3478. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3479. rctl |= E1000_RCTL_VFE;
  3480. rctl &= ~E1000_RCTL_CFIEN;
  3481. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3482. e1000_update_mng_vlan(adapter);
  3483. } else {
  3484. /* disable VLAN tag insert/strip */
  3485. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3486. ctrl &= ~E1000_CTRL_VME;
  3487. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3488. /* disable VLAN filtering */
  3489. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3490. rctl &= ~E1000_RCTL_VFE;
  3491. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3492. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3493. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3494. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3495. }
  3496. }
  3497. e1000_irq_enable(adapter);
  3498. }
  3499. static void
  3500. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3501. {
  3502. struct e1000_adapter *adapter = netdev_priv(netdev);
  3503. uint32_t vfta, index;
  3504. if((adapter->hw.mng_cookie.status &
  3505. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3506. (vid == adapter->mng_vlan_id))
  3507. return;
  3508. /* add VID to filter table */
  3509. index = (vid >> 5) & 0x7F;
  3510. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3511. vfta |= (1 << (vid & 0x1F));
  3512. e1000_write_vfta(&adapter->hw, index, vfta);
  3513. }
  3514. static void
  3515. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3516. {
  3517. struct e1000_adapter *adapter = netdev_priv(netdev);
  3518. uint32_t vfta, index;
  3519. e1000_irq_disable(adapter);
  3520. if(adapter->vlgrp)
  3521. adapter->vlgrp->vlan_devices[vid] = NULL;
  3522. e1000_irq_enable(adapter);
  3523. if((adapter->hw.mng_cookie.status &
  3524. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3525. (vid == adapter->mng_vlan_id))
  3526. return;
  3527. /* remove VID from filter table */
  3528. index = (vid >> 5) & 0x7F;
  3529. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3530. vfta &= ~(1 << (vid & 0x1F));
  3531. e1000_write_vfta(&adapter->hw, index, vfta);
  3532. }
  3533. static void
  3534. e1000_restore_vlan(struct e1000_adapter *adapter)
  3535. {
  3536. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3537. if(adapter->vlgrp) {
  3538. uint16_t vid;
  3539. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3540. if(!adapter->vlgrp->vlan_devices[vid])
  3541. continue;
  3542. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3543. }
  3544. }
  3545. }
  3546. int
  3547. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3548. {
  3549. adapter->hw.autoneg = 0;
  3550. /* Fiber NICs only allow 1000 gbps Full duplex */
  3551. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3552. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3553. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3554. return -EINVAL;
  3555. }
  3556. switch(spddplx) {
  3557. case SPEED_10 + DUPLEX_HALF:
  3558. adapter->hw.forced_speed_duplex = e1000_10_half;
  3559. break;
  3560. case SPEED_10 + DUPLEX_FULL:
  3561. adapter->hw.forced_speed_duplex = e1000_10_full;
  3562. break;
  3563. case SPEED_100 + DUPLEX_HALF:
  3564. adapter->hw.forced_speed_duplex = e1000_100_half;
  3565. break;
  3566. case SPEED_100 + DUPLEX_FULL:
  3567. adapter->hw.forced_speed_duplex = e1000_100_full;
  3568. break;
  3569. case SPEED_1000 + DUPLEX_FULL:
  3570. adapter->hw.autoneg = 1;
  3571. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3572. break;
  3573. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3574. default:
  3575. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3576. return -EINVAL;
  3577. }
  3578. return 0;
  3579. }
  3580. static int
  3581. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3582. {
  3583. struct net_device *netdev = pci_get_drvdata(pdev);
  3584. struct e1000_adapter *adapter = netdev_priv(netdev);
  3585. uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
  3586. uint32_t wufc = adapter->wol;
  3587. netif_device_detach(netdev);
  3588. if(netif_running(netdev))
  3589. e1000_down(adapter);
  3590. status = E1000_READ_REG(&adapter->hw, STATUS);
  3591. if(status & E1000_STATUS_LU)
  3592. wufc &= ~E1000_WUFC_LNKC;
  3593. if(wufc) {
  3594. e1000_setup_rctl(adapter);
  3595. e1000_set_multi(netdev);
  3596. /* turn on all-multi mode if wake on multicast is enabled */
  3597. if(adapter->wol & E1000_WUFC_MC) {
  3598. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3599. rctl |= E1000_RCTL_MPE;
  3600. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3601. }
  3602. if(adapter->hw.mac_type >= e1000_82540) {
  3603. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3604. /* advertise wake from D3Cold */
  3605. #define E1000_CTRL_ADVD3WUC 0x00100000
  3606. /* phy power management enable */
  3607. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3608. ctrl |= E1000_CTRL_ADVD3WUC |
  3609. E1000_CTRL_EN_PHY_PWR_MGMT;
  3610. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3611. }
  3612. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3613. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3614. /* keep the laser running in D3 */
  3615. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3616. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3617. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3618. }
  3619. /* Allow time for pending master requests to run */
  3620. e1000_disable_pciex_master(&adapter->hw);
  3621. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3622. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3623. pci_enable_wake(pdev, 3, 1);
  3624. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3625. } else {
  3626. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3627. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3628. pci_enable_wake(pdev, 3, 0);
  3629. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3630. }
  3631. pci_save_state(pdev);
  3632. if(adapter->hw.mac_type >= e1000_82540 &&
  3633. adapter->hw.media_type == e1000_media_type_copper) {
  3634. manc = E1000_READ_REG(&adapter->hw, MANC);
  3635. if(manc & E1000_MANC_SMBUS_EN) {
  3636. manc |= E1000_MANC_ARP_EN;
  3637. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3638. pci_enable_wake(pdev, 3, 1);
  3639. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3640. }
  3641. }
  3642. switch(adapter->hw.mac_type) {
  3643. case e1000_82571:
  3644. case e1000_82572:
  3645. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3646. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3647. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  3648. break;
  3649. case e1000_82573:
  3650. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3651. E1000_WRITE_REG(&adapter->hw, SWSM,
  3652. swsm & ~E1000_SWSM_DRV_LOAD);
  3653. break;
  3654. default:
  3655. break;
  3656. }
  3657. pci_disable_device(pdev);
  3658. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3659. return 0;
  3660. }
  3661. #ifdef CONFIG_PM
  3662. static int
  3663. e1000_resume(struct pci_dev *pdev)
  3664. {
  3665. struct net_device *netdev = pci_get_drvdata(pdev);
  3666. struct e1000_adapter *adapter = netdev_priv(netdev);
  3667. uint32_t manc, ret_val, swsm;
  3668. uint32_t ctrl_ext;
  3669. pci_set_power_state(pdev, PCI_D0);
  3670. pci_restore_state(pdev);
  3671. ret_val = pci_enable_device(pdev);
  3672. pci_set_master(pdev);
  3673. pci_enable_wake(pdev, PCI_D3hot, 0);
  3674. pci_enable_wake(pdev, PCI_D3cold, 0);
  3675. e1000_reset(adapter);
  3676. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3677. if(netif_running(netdev))
  3678. e1000_up(adapter);
  3679. netif_device_attach(netdev);
  3680. if(adapter->hw.mac_type >= e1000_82540 &&
  3681. adapter->hw.media_type == e1000_media_type_copper) {
  3682. manc = E1000_READ_REG(&adapter->hw, MANC);
  3683. manc &= ~(E1000_MANC_ARP_EN);
  3684. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3685. }
  3686. switch(adapter->hw.mac_type) {
  3687. case e1000_82571:
  3688. case e1000_82572:
  3689. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3690. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3691. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  3692. break;
  3693. case e1000_82573:
  3694. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3695. E1000_WRITE_REG(&adapter->hw, SWSM,
  3696. swsm | E1000_SWSM_DRV_LOAD);
  3697. break;
  3698. default:
  3699. break;
  3700. }
  3701. return 0;
  3702. }
  3703. #endif
  3704. #ifdef CONFIG_NET_POLL_CONTROLLER
  3705. /*
  3706. * Polling 'interrupt' - used by things like netconsole to send skbs
  3707. * without having to re-enable interrupts. It's not called while
  3708. * the interrupt routine is executing.
  3709. */
  3710. static void
  3711. e1000_netpoll(struct net_device *netdev)
  3712. {
  3713. struct e1000_adapter *adapter = netdev_priv(netdev);
  3714. disable_irq(adapter->pdev->irq);
  3715. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3716. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3717. enable_irq(adapter->pdev->irq);
  3718. }
  3719. #endif
  3720. /* e1000_main.c */