pasemi_mac.c 31 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
  57. #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
  59. #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
  62. & ((ring)->size - 1))
  63. #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
  64. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  65. MODULE_LICENSE("GPL");
  66. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  67. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  68. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  69. module_param(debug, int, 0);
  70. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  71. static struct pasdma_status *dma_status;
  72. static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
  73. {
  74. return in_le32(mac->iob_regs+reg);
  75. }
  76. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  77. unsigned int val)
  78. {
  79. out_le32(mac->iob_regs+reg, val);
  80. }
  81. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  82. {
  83. return in_le32(mac->regs+reg);
  84. }
  85. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  86. unsigned int val)
  87. {
  88. out_le32(mac->regs+reg, val);
  89. }
  90. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  91. {
  92. return in_le32(mac->dma_regs+reg);
  93. }
  94. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  95. unsigned int val)
  96. {
  97. out_le32(mac->dma_regs+reg, val);
  98. }
  99. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  100. {
  101. struct pci_dev *pdev = mac->pdev;
  102. struct device_node *dn = pci_device_to_OF_node(pdev);
  103. int len;
  104. const u8 *maddr;
  105. u8 addr[6];
  106. if (!dn) {
  107. dev_dbg(&pdev->dev,
  108. "No device node for mac, not configuring\n");
  109. return -ENOENT;
  110. }
  111. maddr = of_get_property(dn, "local-mac-address", &len);
  112. if (maddr && len == 6) {
  113. memcpy(mac->mac_addr, maddr, 6);
  114. return 0;
  115. }
  116. /* Some old versions of firmware mistakenly uses mac-address
  117. * (and as a string) instead of a byte array in local-mac-address.
  118. */
  119. if (maddr == NULL)
  120. maddr = of_get_property(dn, "mac-address", NULL);
  121. if (maddr == NULL) {
  122. dev_warn(&pdev->dev,
  123. "no mac address in device tree, not configuring\n");
  124. return -ENOENT;
  125. }
  126. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  127. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  128. dev_warn(&pdev->dev,
  129. "can't parse mac address, not configuring\n");
  130. return -EINVAL;
  131. }
  132. memcpy(mac->mac_addr, addr, 6);
  133. return 0;
  134. }
  135. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  136. {
  137. struct pasemi_mac_rxring *ring;
  138. struct pasemi_mac *mac = netdev_priv(dev);
  139. int chan_id = mac->dma_rxch;
  140. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  141. if (!ring)
  142. goto out_ring;
  143. spin_lock_init(&ring->lock);
  144. ring->size = RX_RING_SIZE;
  145. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  146. RX_RING_SIZE, GFP_KERNEL);
  147. if (!ring->desc_info)
  148. goto out_desc_info;
  149. /* Allocate descriptors */
  150. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  151. RX_RING_SIZE *
  152. sizeof(struct pas_dma_xct_descr),
  153. &ring->dma, GFP_KERNEL);
  154. if (!ring->desc)
  155. goto out_desc;
  156. memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  157. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  158. RX_RING_SIZE * sizeof(u64),
  159. &ring->buf_dma, GFP_KERNEL);
  160. if (!ring->buffers)
  161. goto out_buffers;
  162. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  163. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  164. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  165. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  166. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
  167. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  168. PAS_DMA_RXCHAN_CFG_HBU(2));
  169. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  170. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  171. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  172. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  173. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  174. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  175. PAS_DMA_RXINT_CFG_DHL(2));
  176. ring->next_to_fill = 0;
  177. ring->next_to_clean = 0;
  178. snprintf(ring->irq_name, sizeof(ring->irq_name),
  179. "%s rx", dev->name);
  180. mac->rx = ring;
  181. return 0;
  182. out_buffers:
  183. dma_free_coherent(&mac->dma_pdev->dev,
  184. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  185. mac->rx->desc, mac->rx->dma);
  186. out_desc:
  187. kfree(ring->desc_info);
  188. out_desc_info:
  189. kfree(ring);
  190. out_ring:
  191. return -ENOMEM;
  192. }
  193. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  194. {
  195. struct pasemi_mac *mac = netdev_priv(dev);
  196. u32 val;
  197. int chan_id = mac->dma_txch;
  198. struct pasemi_mac_txring *ring;
  199. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  200. if (!ring)
  201. goto out_ring;
  202. spin_lock_init(&ring->lock);
  203. ring->size = TX_RING_SIZE;
  204. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  205. TX_RING_SIZE, GFP_KERNEL);
  206. if (!ring->desc_info)
  207. goto out_desc_info;
  208. /* Allocate descriptors */
  209. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  210. TX_RING_SIZE *
  211. sizeof(struct pas_dma_xct_descr),
  212. &ring->dma, GFP_KERNEL);
  213. if (!ring->desc)
  214. goto out_desc;
  215. memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  216. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  217. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  218. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  219. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
  220. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  221. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  222. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  223. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  224. PAS_DMA_TXCHAN_CFG_UP |
  225. PAS_DMA_TXCHAN_CFG_WT(2));
  226. ring->next_to_fill = 0;
  227. ring->next_to_clean = 0;
  228. snprintf(ring->irq_name, sizeof(ring->irq_name),
  229. "%s tx", dev->name);
  230. mac->tx = ring;
  231. return 0;
  232. out_desc:
  233. kfree(ring->desc_info);
  234. out_desc_info:
  235. kfree(ring);
  236. out_ring:
  237. return -ENOMEM;
  238. }
  239. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  240. {
  241. struct pasemi_mac *mac = netdev_priv(dev);
  242. unsigned int i;
  243. struct pasemi_mac_buffer *info;
  244. struct pas_dma_xct_descr *dp;
  245. for (i = 0; i < TX_RING_SIZE; i++) {
  246. info = &TX_DESC_INFO(mac, i);
  247. dp = &TX_DESC(mac, i);
  248. if (info->dma) {
  249. if (info->skb) {
  250. pci_unmap_single(mac->dma_pdev,
  251. info->dma,
  252. info->skb->len,
  253. PCI_DMA_TODEVICE);
  254. dev_kfree_skb_any(info->skb);
  255. }
  256. info->dma = 0;
  257. info->skb = NULL;
  258. dp->mactx = 0;
  259. dp->ptr = 0;
  260. }
  261. }
  262. dma_free_coherent(&mac->dma_pdev->dev,
  263. TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  264. mac->tx->desc, mac->tx->dma);
  265. kfree(mac->tx->desc_info);
  266. kfree(mac->tx);
  267. mac->tx = NULL;
  268. }
  269. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  270. {
  271. struct pasemi_mac *mac = netdev_priv(dev);
  272. unsigned int i;
  273. struct pasemi_mac_buffer *info;
  274. struct pas_dma_xct_descr *dp;
  275. for (i = 0; i < RX_RING_SIZE; i++) {
  276. info = &RX_DESC_INFO(mac, i);
  277. dp = &RX_DESC(mac, i);
  278. if (info->skb) {
  279. if (info->dma) {
  280. pci_unmap_single(mac->dma_pdev,
  281. info->dma,
  282. info->skb->len,
  283. PCI_DMA_FROMDEVICE);
  284. dev_kfree_skb_any(info->skb);
  285. }
  286. info->dma = 0;
  287. info->skb = NULL;
  288. dp->macrx = 0;
  289. dp->ptr = 0;
  290. }
  291. }
  292. dma_free_coherent(&mac->dma_pdev->dev,
  293. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  294. mac->rx->desc, mac->rx->dma);
  295. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  296. mac->rx->buffers, mac->rx->buf_dma);
  297. kfree(mac->rx->desc_info);
  298. kfree(mac->rx);
  299. mac->rx = NULL;
  300. }
  301. static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
  302. {
  303. struct pasemi_mac *mac = netdev_priv(dev);
  304. unsigned int i;
  305. int start = mac->rx->next_to_fill;
  306. unsigned int limit, count;
  307. limit = RING_AVAIL(mac->rx);
  308. /* Check to see if we're doing first-time setup */
  309. if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
  310. limit = RX_RING_SIZE;
  311. if (limit <= 0)
  312. return;
  313. i = start;
  314. for (count = limit; count; count--) {
  315. struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
  316. u64 *buff = &RX_BUFF(mac, i);
  317. struct sk_buff *skb;
  318. dma_addr_t dma;
  319. /* skb might still be in there for recycle on short receives */
  320. if (info->skb)
  321. skb = info->skb;
  322. else
  323. skb = dev_alloc_skb(BUF_SIZE);
  324. if (unlikely(!skb))
  325. break;
  326. dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
  327. PCI_DMA_FROMDEVICE);
  328. if (unlikely(dma_mapping_error(dma))) {
  329. dev_kfree_skb_irq(info->skb);
  330. break;
  331. }
  332. info->skb = skb;
  333. info->dma = dma;
  334. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  335. i++;
  336. }
  337. wmb();
  338. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
  339. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
  340. mac->rx->next_to_fill += limit - count;
  341. }
  342. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  343. {
  344. unsigned int reg, pcnt;
  345. /* Re-enable packet count interrupts: finally
  346. * ack the packet count interrupt we got in rx_intr.
  347. */
  348. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  349. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  350. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  351. }
  352. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  353. {
  354. unsigned int reg, pcnt;
  355. /* Re-enable packet count interrupts */
  356. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  357. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  358. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  359. }
  360. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  361. {
  362. unsigned int n;
  363. int count;
  364. struct pas_dma_xct_descr *dp;
  365. struct pasemi_mac_buffer *info;
  366. struct sk_buff *skb;
  367. unsigned int i, len;
  368. u64 macrx;
  369. dma_addr_t dma;
  370. spin_lock(&mac->rx->lock);
  371. n = mac->rx->next_to_clean;
  372. for (count = limit; count; count--) {
  373. rmb();
  374. dp = &RX_DESC(mac, n);
  375. prefetchw(dp);
  376. macrx = dp->macrx;
  377. if (!(macrx & XCT_MACRX_O))
  378. break;
  379. info = NULL;
  380. /* We have to scan for our skb since there's no way
  381. * to back-map them from the descriptor, and if we
  382. * have several receive channels then they might not
  383. * show up in the same order as they were put on the
  384. * interface ring.
  385. */
  386. dma = (dp->ptr & XCT_PTR_ADDR_M);
  387. for (i = n; i < (n + RX_RING_SIZE); i++) {
  388. info = &RX_DESC_INFO(mac, i);
  389. if (info->dma == dma)
  390. break;
  391. }
  392. prefetchw(info);
  393. skb = info->skb;
  394. prefetchw(skb);
  395. info->dma = 0;
  396. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  397. PCI_DMA_FROMDEVICE);
  398. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  399. if (len < 256) {
  400. struct sk_buff *new_skb =
  401. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  402. if (new_skb) {
  403. skb_reserve(new_skb, NET_IP_ALIGN);
  404. memcpy(new_skb->data, skb->data, len);
  405. /* save the skb in buffer_info as good */
  406. skb = new_skb;
  407. }
  408. /* else just continue with the old one */
  409. } else
  410. info->skb = NULL;
  411. skb_put(skb, len);
  412. if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
  413. skb->ip_summed = CHECKSUM_UNNECESSARY;
  414. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  415. XCT_MACRX_CSUM_S;
  416. } else
  417. skb->ip_summed = CHECKSUM_NONE;
  418. mac->netdev->stats.rx_bytes += len;
  419. mac->netdev->stats.rx_packets++;
  420. skb->protocol = eth_type_trans(skb, mac->netdev);
  421. netif_receive_skb(skb);
  422. dp->ptr = 0;
  423. dp->macrx = 0;
  424. n++;
  425. }
  426. mac->rx->next_to_clean += limit - count;
  427. pasemi_mac_replenish_rx_ring(mac->netdev);
  428. spin_unlock(&mac->rx->lock);
  429. return count;
  430. }
  431. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  432. {
  433. int i;
  434. struct pasemi_mac_buffer *info;
  435. struct pas_dma_xct_descr *dp;
  436. unsigned int start, count, limit;
  437. unsigned int total_count;
  438. int flags;
  439. struct sk_buff *skbs[32];
  440. dma_addr_t dmas[32];
  441. total_count = 0;
  442. restart:
  443. spin_lock_irqsave(&mac->tx->lock, flags);
  444. start = mac->tx->next_to_clean;
  445. limit = min(mac->tx->next_to_fill, start+32);
  446. count = 0;
  447. for (i = start; i < limit; i++) {
  448. dp = &TX_DESC(mac, i);
  449. if (unlikely(dp->mactx & XCT_MACTX_O))
  450. /* Not yet transmitted */
  451. break;
  452. info = &TX_DESC_INFO(mac, i);
  453. skbs[count] = info->skb;
  454. dmas[count] = info->dma;
  455. info->skb = NULL;
  456. info->dma = 0;
  457. dp->mactx = 0;
  458. dp->ptr = 0;
  459. count++;
  460. }
  461. mac->tx->next_to_clean += count;
  462. spin_unlock_irqrestore(&mac->tx->lock, flags);
  463. netif_wake_queue(mac->netdev);
  464. for (i = 0; i < count; i++) {
  465. pci_unmap_single(mac->dma_pdev, dmas[i],
  466. skbs[i]->len, PCI_DMA_TODEVICE);
  467. dev_kfree_skb_irq(skbs[i]);
  468. }
  469. total_count += count;
  470. /* If the batch was full, try to clean more */
  471. if (count == 32)
  472. goto restart;
  473. return total_count;
  474. }
  475. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  476. {
  477. struct net_device *dev = data;
  478. struct pasemi_mac *mac = netdev_priv(dev);
  479. unsigned int reg;
  480. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  481. return IRQ_NONE;
  482. if (*mac->rx_status & PAS_STATUS_ERROR)
  483. printk("rx_status reported error\n");
  484. /* Don't reset packet count so it won't fire again but clear
  485. * all others.
  486. */
  487. reg = 0;
  488. if (*mac->rx_status & PAS_STATUS_SOFT)
  489. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  490. if (*mac->rx_status & PAS_STATUS_ERROR)
  491. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  492. if (*mac->rx_status & PAS_STATUS_TIMER)
  493. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  494. netif_rx_schedule(dev, &mac->napi);
  495. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  496. return IRQ_HANDLED;
  497. }
  498. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  499. {
  500. struct net_device *dev = data;
  501. struct pasemi_mac *mac = netdev_priv(dev);
  502. unsigned int reg, pcnt;
  503. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  504. return IRQ_NONE;
  505. pasemi_mac_clean_tx(mac);
  506. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  507. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  508. if (*mac->tx_status & PAS_STATUS_SOFT)
  509. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  510. if (*mac->tx_status & PAS_STATUS_ERROR)
  511. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  512. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  513. return IRQ_HANDLED;
  514. }
  515. static void pasemi_adjust_link(struct net_device *dev)
  516. {
  517. struct pasemi_mac *mac = netdev_priv(dev);
  518. int msg;
  519. unsigned int flags;
  520. unsigned int new_flags;
  521. if (!mac->phydev->link) {
  522. /* If no link, MAC speed settings don't matter. Just report
  523. * link down and return.
  524. */
  525. if (mac->link && netif_msg_link(mac))
  526. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  527. netif_carrier_off(dev);
  528. mac->link = 0;
  529. return;
  530. } else
  531. netif_carrier_on(dev);
  532. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  533. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  534. PAS_MAC_CFG_PCFG_TSR_M);
  535. if (!mac->phydev->duplex)
  536. new_flags |= PAS_MAC_CFG_PCFG_HD;
  537. switch (mac->phydev->speed) {
  538. case 1000:
  539. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  540. PAS_MAC_CFG_PCFG_TSR_1G;
  541. break;
  542. case 100:
  543. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  544. PAS_MAC_CFG_PCFG_TSR_100M;
  545. break;
  546. case 10:
  547. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  548. PAS_MAC_CFG_PCFG_TSR_10M;
  549. break;
  550. default:
  551. printk("Unsupported speed %d\n", mac->phydev->speed);
  552. }
  553. /* Print on link or speed/duplex change */
  554. msg = mac->link != mac->phydev->link || flags != new_flags;
  555. mac->duplex = mac->phydev->duplex;
  556. mac->speed = mac->phydev->speed;
  557. mac->link = mac->phydev->link;
  558. if (new_flags != flags)
  559. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  560. if (msg && netif_msg_link(mac))
  561. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  562. dev->name, mac->speed, mac->duplex ? "full" : "half");
  563. }
  564. static int pasemi_mac_phy_init(struct net_device *dev)
  565. {
  566. struct pasemi_mac *mac = netdev_priv(dev);
  567. struct device_node *dn, *phy_dn;
  568. struct phy_device *phydev;
  569. unsigned int phy_id;
  570. const phandle *ph;
  571. const unsigned int *prop;
  572. struct resource r;
  573. int ret;
  574. dn = pci_device_to_OF_node(mac->pdev);
  575. ph = of_get_property(dn, "phy-handle", NULL);
  576. if (!ph)
  577. return -ENODEV;
  578. phy_dn = of_find_node_by_phandle(*ph);
  579. prop = of_get_property(phy_dn, "reg", NULL);
  580. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  581. if (ret)
  582. goto err;
  583. phy_id = *prop;
  584. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  585. of_node_put(phy_dn);
  586. mac->link = 0;
  587. mac->speed = 0;
  588. mac->duplex = -1;
  589. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  590. if (IS_ERR(phydev)) {
  591. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  592. return PTR_ERR(phydev);
  593. }
  594. mac->phydev = phydev;
  595. return 0;
  596. err:
  597. of_node_put(phy_dn);
  598. return -ENODEV;
  599. }
  600. static int pasemi_mac_open(struct net_device *dev)
  601. {
  602. struct pasemi_mac *mac = netdev_priv(dev);
  603. int base_irq;
  604. unsigned int flags;
  605. int ret;
  606. /* enable rx section */
  607. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  608. /* enable tx section */
  609. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  610. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  611. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  612. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  613. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  614. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  615. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  616. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  617. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  618. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  619. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  620. PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
  621. /* Clear out any residual packet count state from firmware */
  622. pasemi_mac_restart_rx_intr(mac);
  623. pasemi_mac_restart_tx_intr(mac);
  624. /* 0xffffff is max value, about 16ms */
  625. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  626. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  627. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  628. ret = pasemi_mac_setup_rx_resources(dev);
  629. if (ret)
  630. goto out_rx_resources;
  631. ret = pasemi_mac_setup_tx_resources(dev);
  632. if (ret)
  633. goto out_tx_resources;
  634. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  635. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  636. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  637. /* enable rx if */
  638. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  639. PAS_DMA_RXINT_RCMDSTA_EN);
  640. /* enable rx channel */
  641. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  642. PAS_DMA_RXCHAN_CCMDSTA_EN |
  643. PAS_DMA_RXCHAN_CCMDSTA_DU);
  644. /* enable tx channel */
  645. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  646. PAS_DMA_TXCHAN_TCMDSTA_EN);
  647. pasemi_mac_replenish_rx_ring(dev);
  648. ret = pasemi_mac_phy_init(dev);
  649. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  650. * failed init due to -ENODEV.
  651. */
  652. if (ret && ret != -ENODEV)
  653. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  654. netif_start_queue(dev);
  655. napi_enable(&mac->napi);
  656. /* Interrupts are a bit different for our DMA controller: While
  657. * it's got one a regular PCI device header, the interrupt there
  658. * is really the base of the range it's using. Each tx and rx
  659. * channel has it's own interrupt source.
  660. */
  661. base_irq = virq_to_hw(mac->dma_pdev->irq);
  662. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  663. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  664. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  665. mac->tx->irq_name, dev);
  666. if (ret) {
  667. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  668. base_irq + mac->dma_txch, ret);
  669. goto out_tx_int;
  670. }
  671. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  672. mac->rx->irq_name, dev);
  673. if (ret) {
  674. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  675. base_irq + 20 + mac->dma_rxch, ret);
  676. goto out_rx_int;
  677. }
  678. if (mac->phydev)
  679. phy_start(mac->phydev);
  680. return 0;
  681. out_rx_int:
  682. free_irq(mac->tx_irq, dev);
  683. out_tx_int:
  684. napi_disable(&mac->napi);
  685. netif_stop_queue(dev);
  686. pasemi_mac_free_tx_resources(dev);
  687. out_tx_resources:
  688. pasemi_mac_free_rx_resources(dev);
  689. out_rx_resources:
  690. return ret;
  691. }
  692. #define MAX_RETRIES 5000
  693. static int pasemi_mac_close(struct net_device *dev)
  694. {
  695. struct pasemi_mac *mac = netdev_priv(dev);
  696. unsigned int stat;
  697. int retries;
  698. if (mac->phydev) {
  699. phy_stop(mac->phydev);
  700. phy_disconnect(mac->phydev);
  701. }
  702. netif_stop_queue(dev);
  703. napi_disable(&mac->napi);
  704. /* Clean out any pending buffers */
  705. pasemi_mac_clean_tx(mac);
  706. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  707. /* Disable interface */
  708. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  709. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  710. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  711. for (retries = 0; retries < MAX_RETRIES; retries++) {
  712. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  713. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  714. break;
  715. cond_resched();
  716. }
  717. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  718. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  719. for (retries = 0; retries < MAX_RETRIES; retries++) {
  720. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  721. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  722. break;
  723. cond_resched();
  724. }
  725. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  726. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  727. for (retries = 0; retries < MAX_RETRIES; retries++) {
  728. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  729. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  730. break;
  731. cond_resched();
  732. }
  733. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  734. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  735. /* Then, disable the channel. This must be done separately from
  736. * stopping, since you can't disable when active.
  737. */
  738. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  739. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  740. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  741. free_irq(mac->tx_irq, dev);
  742. free_irq(mac->rx_irq, dev);
  743. /* Free resources */
  744. pasemi_mac_free_rx_resources(dev);
  745. pasemi_mac_free_tx_resources(dev);
  746. return 0;
  747. }
  748. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  749. {
  750. struct pasemi_mac *mac = netdev_priv(dev);
  751. struct pasemi_mac_txring *txring;
  752. struct pasemi_mac_buffer *info;
  753. struct pas_dma_xct_descr *dp;
  754. u64 dflags, mactx, ptr;
  755. dma_addr_t map;
  756. int flags;
  757. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  758. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  759. const unsigned char *nh = skb_network_header(skb);
  760. switch (ip_hdr(skb)->protocol) {
  761. case IPPROTO_TCP:
  762. dflags |= XCT_MACTX_CSUM_TCP;
  763. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  764. dflags |= XCT_MACTX_IPO(nh - skb->data);
  765. break;
  766. case IPPROTO_UDP:
  767. dflags |= XCT_MACTX_CSUM_UDP;
  768. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  769. dflags |= XCT_MACTX_IPO(nh - skb->data);
  770. break;
  771. }
  772. }
  773. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  774. if (dma_mapping_error(map))
  775. return NETDEV_TX_BUSY;
  776. mactx = dflags | XCT_MACTX_LLEN(skb->len);
  777. ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  778. txring = mac->tx;
  779. spin_lock_irqsave(&txring->lock, flags);
  780. if (RING_AVAIL(txring) <= 1) {
  781. spin_unlock_irqrestore(&txring->lock, flags);
  782. pasemi_mac_clean_tx(mac);
  783. pasemi_mac_restart_tx_intr(mac);
  784. spin_lock_irqsave(&txring->lock, flags);
  785. if (RING_AVAIL(txring) <= 1) {
  786. /* Still no room -- stop the queue and wait for tx
  787. * intr when there's room.
  788. */
  789. netif_stop_queue(dev);
  790. goto out_err;
  791. }
  792. }
  793. dp = &TX_DESC(mac, txring->next_to_fill);
  794. info = &TX_DESC_INFO(mac, txring->next_to_fill);
  795. dp->mactx = mactx;
  796. dp->ptr = ptr;
  797. info->dma = map;
  798. info->skb = skb;
  799. txring->next_to_fill++;
  800. dev->stats.tx_packets++;
  801. dev->stats.tx_bytes += skb->len;
  802. spin_unlock_irqrestore(&txring->lock, flags);
  803. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  804. return NETDEV_TX_OK;
  805. out_err:
  806. spin_unlock_irqrestore(&txring->lock, flags);
  807. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  808. return NETDEV_TX_BUSY;
  809. }
  810. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  811. {
  812. struct pasemi_mac *mac = netdev_priv(dev);
  813. unsigned int flags;
  814. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  815. /* Set promiscuous */
  816. if (dev->flags & IFF_PROMISC)
  817. flags |= PAS_MAC_CFG_PCFG_PR;
  818. else
  819. flags &= ~PAS_MAC_CFG_PCFG_PR;
  820. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  821. }
  822. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  823. {
  824. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  825. struct net_device *dev = mac->netdev;
  826. int pkts;
  827. pasemi_mac_clean_tx(mac);
  828. pkts = pasemi_mac_clean_rx(mac, budget);
  829. if (pkts < budget) {
  830. /* all done, no more packets present */
  831. netif_rx_complete(dev, napi);
  832. pasemi_mac_restart_rx_intr(mac);
  833. }
  834. return pkts;
  835. }
  836. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  837. {
  838. struct device_node *dn;
  839. void __iomem *ret;
  840. dn = pci_device_to_OF_node(p);
  841. if (!dn)
  842. goto fallback;
  843. ret = of_iomap(dn, index);
  844. if (!ret)
  845. goto fallback;
  846. return ret;
  847. fallback:
  848. /* This is hardcoded and ugly, but we have some firmware versions
  849. * that don't provide the register space in the device tree. Luckily
  850. * they are at well-known locations so we can just do the math here.
  851. */
  852. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  853. }
  854. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  855. {
  856. struct resource res;
  857. struct device_node *dn;
  858. int err;
  859. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  860. if (!mac->dma_pdev) {
  861. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  862. return -ENODEV;
  863. }
  864. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  865. if (!mac->iob_pdev) {
  866. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  867. return -ENODEV;
  868. }
  869. mac->regs = map_onedev(mac->pdev, 0);
  870. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  871. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  872. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  873. dev_err(&mac->pdev->dev, "Can't map registers\n");
  874. return -ENODEV;
  875. }
  876. /* The dma status structure is located in the I/O bridge, and
  877. * is cache coherent.
  878. */
  879. if (!dma_status) {
  880. dn = pci_device_to_OF_node(mac->iob_pdev);
  881. if (dn)
  882. err = of_address_to_resource(dn, 1, &res);
  883. if (!dn || err) {
  884. /* Fallback for old firmware */
  885. res.start = 0xfd800000;
  886. res.end = res.start + 0x1000;
  887. }
  888. dma_status = __ioremap(res.start, res.end-res.start, 0);
  889. }
  890. return 0;
  891. }
  892. static int __devinit
  893. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  894. {
  895. static int index = 0;
  896. struct net_device *dev;
  897. struct pasemi_mac *mac;
  898. int err;
  899. DECLARE_MAC_BUF(mac_buf);
  900. err = pci_enable_device(pdev);
  901. if (err)
  902. return err;
  903. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  904. if (dev == NULL) {
  905. dev_err(&pdev->dev,
  906. "pasemi_mac: Could not allocate ethernet device.\n");
  907. err = -ENOMEM;
  908. goto out_disable_device;
  909. }
  910. pci_set_drvdata(pdev, dev);
  911. SET_NETDEV_DEV(dev, &pdev->dev);
  912. mac = netdev_priv(dev);
  913. mac->pdev = pdev;
  914. mac->netdev = dev;
  915. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  916. dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
  917. /* These should come out of the device tree eventually */
  918. mac->dma_txch = index;
  919. mac->dma_rxch = index;
  920. /* We probe GMAC before XAUI, but the DMA interfaces are
  921. * in XAUI, GMAC order.
  922. */
  923. if (index < 4)
  924. mac->dma_if = index + 2;
  925. else
  926. mac->dma_if = index - 4;
  927. index++;
  928. switch (pdev->device) {
  929. case 0xa005:
  930. mac->type = MAC_TYPE_GMAC;
  931. break;
  932. case 0xa006:
  933. mac->type = MAC_TYPE_XAUI;
  934. break;
  935. default:
  936. err = -ENODEV;
  937. goto out;
  938. }
  939. /* get mac addr from device tree */
  940. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  941. err = -ENODEV;
  942. goto out;
  943. }
  944. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  945. dev->open = pasemi_mac_open;
  946. dev->stop = pasemi_mac_close;
  947. dev->hard_start_xmit = pasemi_mac_start_tx;
  948. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  949. err = pasemi_mac_map_regs(mac);
  950. if (err)
  951. goto out;
  952. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  953. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  954. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  955. /* Enable most messages by default */
  956. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  957. err = register_netdev(dev);
  958. if (err) {
  959. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  960. err);
  961. goto out;
  962. } else
  963. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  964. "hw addr %s\n",
  965. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  966. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  967. print_mac(mac_buf, dev->dev_addr));
  968. return err;
  969. out:
  970. if (mac->iob_pdev)
  971. pci_dev_put(mac->iob_pdev);
  972. if (mac->dma_pdev)
  973. pci_dev_put(mac->dma_pdev);
  974. if (mac->dma_regs)
  975. iounmap(mac->dma_regs);
  976. if (mac->iob_regs)
  977. iounmap(mac->iob_regs);
  978. if (mac->regs)
  979. iounmap(mac->regs);
  980. free_netdev(dev);
  981. out_disable_device:
  982. pci_disable_device(pdev);
  983. return err;
  984. }
  985. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  986. {
  987. struct net_device *netdev = pci_get_drvdata(pdev);
  988. struct pasemi_mac *mac;
  989. if (!netdev)
  990. return;
  991. mac = netdev_priv(netdev);
  992. unregister_netdev(netdev);
  993. pci_disable_device(pdev);
  994. pci_dev_put(mac->dma_pdev);
  995. pci_dev_put(mac->iob_pdev);
  996. iounmap(mac->regs);
  997. iounmap(mac->dma_regs);
  998. iounmap(mac->iob_regs);
  999. pci_set_drvdata(pdev, NULL);
  1000. free_netdev(netdev);
  1001. }
  1002. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  1003. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  1004. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  1005. { },
  1006. };
  1007. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  1008. static struct pci_driver pasemi_mac_driver = {
  1009. .name = "pasemi_mac",
  1010. .id_table = pasemi_mac_pci_tbl,
  1011. .probe = pasemi_mac_probe,
  1012. .remove = __devexit_p(pasemi_mac_remove),
  1013. };
  1014. static void __exit pasemi_mac_cleanup_module(void)
  1015. {
  1016. pci_unregister_driver(&pasemi_mac_driver);
  1017. __iounmap(dma_status);
  1018. dma_status = NULL;
  1019. }
  1020. int pasemi_mac_init_module(void)
  1021. {
  1022. return pci_register_driver(&pasemi_mac_driver);
  1023. }
  1024. module_init(pasemi_mac_init_module);
  1025. module_exit(pasemi_mac_cleanup_module);