events.c 28 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <asm/desc.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/irq.h>
  33. #include <asm/idle.h>
  34. #include <asm/io_apic.h>
  35. #include <asm/sync_bitops.h>
  36. #include <asm/xen/hypercall.h>
  37. #include <asm/xen/hypervisor.h>
  38. #include <xen/xen.h>
  39. #include <xen/hvm.h>
  40. #include <xen/xen-ops.h>
  41. #include <xen/events.h>
  42. #include <xen/interface/xen.h>
  43. #include <xen/interface/event_channel.h>
  44. #include <xen/interface/hvm/hvm_op.h>
  45. #include <xen/interface/hvm/params.h>
  46. /*
  47. * This lock protects updates to the following mapping and reference-count
  48. * arrays. The lock does not need to be acquired to read the mapping tables.
  49. */
  50. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  51. /* IRQ <-> VIRQ mapping. */
  52. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  53. /* IRQ <-> IPI mapping */
  54. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  55. /* Interrupt types. */
  56. enum xen_irq_type {
  57. IRQT_UNBOUND = 0,
  58. IRQT_PIRQ,
  59. IRQT_VIRQ,
  60. IRQT_IPI,
  61. IRQT_EVTCHN
  62. };
  63. /*
  64. * Packed IRQ information:
  65. * type - enum xen_irq_type
  66. * event channel - irq->event channel mapping
  67. * cpu - cpu this event channel is bound to
  68. * index - type-specific information:
  69. * PIRQ - vector, with MSB being "needs EIO"
  70. * VIRQ - virq number
  71. * IPI - IPI vector
  72. * EVTCHN -
  73. */
  74. struct irq_info
  75. {
  76. enum xen_irq_type type; /* type */
  77. unsigned short evtchn; /* event channel */
  78. unsigned short cpu; /* cpu bound */
  79. union {
  80. unsigned short virq;
  81. enum ipi_vector ipi;
  82. struct {
  83. unsigned short gsi;
  84. unsigned char vector;
  85. unsigned char flags;
  86. } pirq;
  87. } u;
  88. };
  89. #define PIRQ_NEEDS_EOI (1 << 0)
  90. static struct irq_info irq_info[NR_IRQS];
  91. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  92. [0 ... NR_EVENT_CHANNELS-1] = -1
  93. };
  94. struct cpu_evtchn_s {
  95. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  96. };
  97. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  98. static inline unsigned long *cpu_evtchn_mask(int cpu)
  99. {
  100. return cpu_evtchn_mask_p[cpu].bits;
  101. }
  102. /* Xen will never allocate port zero for any purpose. */
  103. #define VALID_EVTCHN(chn) ((chn) != 0)
  104. static struct irq_chip xen_dynamic_chip;
  105. static struct irq_chip xen_percpu_chip;
  106. static struct irq_chip xen_pirq_chip;
  107. /* Constructor for packed IRQ information. */
  108. static struct irq_info mk_unbound_info(void)
  109. {
  110. return (struct irq_info) { .type = IRQT_UNBOUND };
  111. }
  112. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  113. {
  114. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  115. .cpu = 0 };
  116. }
  117. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  118. {
  119. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  120. .cpu = 0, .u.ipi = ipi };
  121. }
  122. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  123. {
  124. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  125. .cpu = 0, .u.virq = virq };
  126. }
  127. static struct irq_info mk_pirq_info(unsigned short evtchn,
  128. unsigned short gsi, unsigned short vector)
  129. {
  130. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  131. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  132. }
  133. /*
  134. * Accessors for packed IRQ information.
  135. */
  136. static struct irq_info *info_for_irq(unsigned irq)
  137. {
  138. return &irq_info[irq];
  139. }
  140. static unsigned int evtchn_from_irq(unsigned irq)
  141. {
  142. return info_for_irq(irq)->evtchn;
  143. }
  144. unsigned irq_from_evtchn(unsigned int evtchn)
  145. {
  146. return evtchn_to_irq[evtchn];
  147. }
  148. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  149. static enum ipi_vector ipi_from_irq(unsigned irq)
  150. {
  151. struct irq_info *info = info_for_irq(irq);
  152. BUG_ON(info == NULL);
  153. BUG_ON(info->type != IRQT_IPI);
  154. return info->u.ipi;
  155. }
  156. static unsigned virq_from_irq(unsigned irq)
  157. {
  158. struct irq_info *info = info_for_irq(irq);
  159. BUG_ON(info == NULL);
  160. BUG_ON(info->type != IRQT_VIRQ);
  161. return info->u.virq;
  162. }
  163. static unsigned gsi_from_irq(unsigned irq)
  164. {
  165. struct irq_info *info = info_for_irq(irq);
  166. BUG_ON(info == NULL);
  167. BUG_ON(info->type != IRQT_PIRQ);
  168. return info->u.pirq.gsi;
  169. }
  170. static unsigned vector_from_irq(unsigned irq)
  171. {
  172. struct irq_info *info = info_for_irq(irq);
  173. BUG_ON(info == NULL);
  174. BUG_ON(info->type != IRQT_PIRQ);
  175. return info->u.pirq.vector;
  176. }
  177. static enum xen_irq_type type_from_irq(unsigned irq)
  178. {
  179. return info_for_irq(irq)->type;
  180. }
  181. static unsigned cpu_from_irq(unsigned irq)
  182. {
  183. return info_for_irq(irq)->cpu;
  184. }
  185. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  186. {
  187. int irq = evtchn_to_irq[evtchn];
  188. unsigned ret = 0;
  189. if (irq != -1)
  190. ret = cpu_from_irq(irq);
  191. return ret;
  192. }
  193. static bool pirq_needs_eoi(unsigned irq)
  194. {
  195. struct irq_info *info = info_for_irq(irq);
  196. BUG_ON(info->type != IRQT_PIRQ);
  197. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  198. }
  199. static inline unsigned long active_evtchns(unsigned int cpu,
  200. struct shared_info *sh,
  201. unsigned int idx)
  202. {
  203. return (sh->evtchn_pending[idx] &
  204. cpu_evtchn_mask(cpu)[idx] &
  205. ~sh->evtchn_mask[idx]);
  206. }
  207. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  208. {
  209. int irq = evtchn_to_irq[chn];
  210. BUG_ON(irq == -1);
  211. #ifdef CONFIG_SMP
  212. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  213. #endif
  214. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  215. __set_bit(chn, cpu_evtchn_mask(cpu));
  216. irq_info[irq].cpu = cpu;
  217. }
  218. static void init_evtchn_cpu_bindings(void)
  219. {
  220. #ifdef CONFIG_SMP
  221. struct irq_desc *desc;
  222. int i;
  223. /* By default all event channels notify CPU#0. */
  224. for_each_irq_desc(i, desc) {
  225. cpumask_copy(desc->affinity, cpumask_of(0));
  226. }
  227. #endif
  228. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  229. }
  230. static inline void clear_evtchn(int port)
  231. {
  232. struct shared_info *s = HYPERVISOR_shared_info;
  233. sync_clear_bit(port, &s->evtchn_pending[0]);
  234. }
  235. static inline void set_evtchn(int port)
  236. {
  237. struct shared_info *s = HYPERVISOR_shared_info;
  238. sync_set_bit(port, &s->evtchn_pending[0]);
  239. }
  240. static inline int test_evtchn(int port)
  241. {
  242. struct shared_info *s = HYPERVISOR_shared_info;
  243. return sync_test_bit(port, &s->evtchn_pending[0]);
  244. }
  245. /**
  246. * notify_remote_via_irq - send event to remote end of event channel via irq
  247. * @irq: irq of event channel to send event to
  248. *
  249. * Unlike notify_remote_via_evtchn(), this is safe to use across
  250. * save/restore. Notifications on a broken connection are silently
  251. * dropped.
  252. */
  253. void notify_remote_via_irq(int irq)
  254. {
  255. int evtchn = evtchn_from_irq(irq);
  256. if (VALID_EVTCHN(evtchn))
  257. notify_remote_via_evtchn(evtchn);
  258. }
  259. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  260. static void mask_evtchn(int port)
  261. {
  262. struct shared_info *s = HYPERVISOR_shared_info;
  263. sync_set_bit(port, &s->evtchn_mask[0]);
  264. }
  265. static void unmask_evtchn(int port)
  266. {
  267. struct shared_info *s = HYPERVISOR_shared_info;
  268. unsigned int cpu = get_cpu();
  269. BUG_ON(!irqs_disabled());
  270. /* Slow path (hypercall) if this is a non-local port. */
  271. if (unlikely(cpu != cpu_from_evtchn(port))) {
  272. struct evtchn_unmask unmask = { .port = port };
  273. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  274. } else {
  275. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  276. sync_clear_bit(port, &s->evtchn_mask[0]);
  277. /*
  278. * The following is basically the equivalent of
  279. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  280. * the interrupt edge' if the channel is masked.
  281. */
  282. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  283. !sync_test_and_set_bit(port / BITS_PER_LONG,
  284. &vcpu_info->evtchn_pending_sel))
  285. vcpu_info->evtchn_upcall_pending = 1;
  286. }
  287. put_cpu();
  288. }
  289. static int get_nr_hw_irqs(void)
  290. {
  291. int ret = 1;
  292. #ifdef CONFIG_X86_IO_APIC
  293. ret = get_nr_irqs_gsi();
  294. #endif
  295. return ret;
  296. }
  297. static int find_unbound_irq(void)
  298. {
  299. struct irq_data *data;
  300. int irq, res;
  301. for (irq = 0; irq < nr_irqs; irq++) {
  302. data = irq_get_irq_data(irq);
  303. /* only 0->15 have init'd desc; handle irq > 16 */
  304. if (!data)
  305. break;
  306. if (data->chip == &no_irq_chip)
  307. break;
  308. if (data->chip != &xen_dynamic_chip)
  309. continue;
  310. if (irq_info[irq].type == IRQT_UNBOUND)
  311. return irq;
  312. }
  313. if (irq == nr_irqs)
  314. panic("No available IRQ to bind to: increase nr_irqs!\n");
  315. res = irq_alloc_desc_at(irq, 0);
  316. if (WARN_ON(res != irq))
  317. return -1;
  318. return irq;
  319. }
  320. static bool identity_mapped_irq(unsigned irq)
  321. {
  322. /* identity map all the hardware irqs */
  323. return irq < get_nr_hw_irqs();
  324. }
  325. static void pirq_unmask_notify(int irq)
  326. {
  327. struct physdev_eoi eoi = { .irq = irq };
  328. if (unlikely(pirq_needs_eoi(irq))) {
  329. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  330. WARN_ON(rc);
  331. }
  332. }
  333. static void pirq_query_unmask(int irq)
  334. {
  335. struct physdev_irq_status_query irq_status;
  336. struct irq_info *info = info_for_irq(irq);
  337. BUG_ON(info->type != IRQT_PIRQ);
  338. irq_status.irq = irq;
  339. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  340. irq_status.flags = 0;
  341. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  342. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  343. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  344. }
  345. static bool probing_irq(int irq)
  346. {
  347. struct irq_desc *desc = irq_to_desc(irq);
  348. return desc && desc->action == NULL;
  349. }
  350. static unsigned int startup_pirq(unsigned int irq)
  351. {
  352. struct evtchn_bind_pirq bind_pirq;
  353. struct irq_info *info = info_for_irq(irq);
  354. int evtchn = evtchn_from_irq(irq);
  355. BUG_ON(info->type != IRQT_PIRQ);
  356. if (VALID_EVTCHN(evtchn))
  357. goto out;
  358. bind_pirq.pirq = irq;
  359. /* NB. We are happy to share unless we are probing. */
  360. bind_pirq.flags = probing_irq(irq) ? 0 : BIND_PIRQ__WILL_SHARE;
  361. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq) != 0) {
  362. if (!probing_irq(irq))
  363. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  364. irq);
  365. return 0;
  366. }
  367. evtchn = bind_pirq.port;
  368. pirq_query_unmask(irq);
  369. evtchn_to_irq[evtchn] = irq;
  370. bind_evtchn_to_cpu(evtchn, 0);
  371. info->evtchn = evtchn;
  372. out:
  373. unmask_evtchn(evtchn);
  374. pirq_unmask_notify(irq);
  375. return 0;
  376. }
  377. static void shutdown_pirq(unsigned int irq)
  378. {
  379. struct evtchn_close close;
  380. struct irq_info *info = info_for_irq(irq);
  381. int evtchn = evtchn_from_irq(irq);
  382. BUG_ON(info->type != IRQT_PIRQ);
  383. if (!VALID_EVTCHN(evtchn))
  384. return;
  385. mask_evtchn(evtchn);
  386. close.port = evtchn;
  387. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  388. BUG();
  389. bind_evtchn_to_cpu(evtchn, 0);
  390. evtchn_to_irq[evtchn] = -1;
  391. info->evtchn = 0;
  392. }
  393. static void enable_pirq(unsigned int irq)
  394. {
  395. startup_pirq(irq);
  396. }
  397. static void disable_pirq(unsigned int irq)
  398. {
  399. }
  400. static void ack_pirq(unsigned int irq)
  401. {
  402. int evtchn = evtchn_from_irq(irq);
  403. move_native_irq(irq);
  404. if (VALID_EVTCHN(evtchn)) {
  405. mask_evtchn(evtchn);
  406. clear_evtchn(evtchn);
  407. }
  408. }
  409. static void end_pirq(unsigned int irq)
  410. {
  411. int evtchn = evtchn_from_irq(irq);
  412. struct irq_desc *desc = irq_to_desc(irq);
  413. if (WARN_ON(!desc))
  414. return;
  415. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  416. (IRQ_DISABLED|IRQ_PENDING)) {
  417. shutdown_pirq(irq);
  418. } else if (VALID_EVTCHN(evtchn)) {
  419. unmask_evtchn(evtchn);
  420. pirq_unmask_notify(irq);
  421. }
  422. }
  423. static int find_irq_by_gsi(unsigned gsi)
  424. {
  425. int irq;
  426. for (irq = 0; irq < NR_IRQS; irq++) {
  427. struct irq_info *info = info_for_irq(irq);
  428. if (info == NULL || info->type != IRQT_PIRQ)
  429. continue;
  430. if (gsi_from_irq(irq) == gsi)
  431. return irq;
  432. }
  433. return -1;
  434. }
  435. /*
  436. * Allocate a physical irq, along with a vector. We don't assign an
  437. * event channel until the irq actually started up. Return an
  438. * existing irq if we've already got one for the gsi.
  439. */
  440. int xen_allocate_pirq(unsigned gsi)
  441. {
  442. int irq;
  443. struct physdev_irq irq_op;
  444. spin_lock(&irq_mapping_update_lock);
  445. irq = find_irq_by_gsi(gsi);
  446. if (irq != -1) {
  447. printk(KERN_INFO "xen_allocate_pirq: returning irq %d for gsi %u\n",
  448. irq, gsi);
  449. goto out; /* XXX need refcount? */
  450. }
  451. if (identity_mapped_irq(gsi)) {
  452. irq = gsi;
  453. irq_to_desc_alloc_node(irq, 0);
  454. dynamic_irq_init(irq);
  455. } else
  456. irq = find_unbound_irq();
  457. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  458. handle_level_irq, "pirq");
  459. irq_op.irq = irq;
  460. if (HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  461. dynamic_irq_cleanup(irq);
  462. irq = -ENOSPC;
  463. goto out;
  464. }
  465. irq_info[irq] = mk_pirq_info(0, gsi, irq_op.vector);
  466. out:
  467. spin_unlock(&irq_mapping_update_lock);
  468. return irq;
  469. }
  470. int xen_vector_from_irq(unsigned irq)
  471. {
  472. return vector_from_irq(irq);
  473. }
  474. int xen_gsi_from_irq(unsigned irq)
  475. {
  476. return gsi_from_irq(irq);
  477. }
  478. int bind_evtchn_to_irq(unsigned int evtchn)
  479. {
  480. int irq;
  481. spin_lock(&irq_mapping_update_lock);
  482. irq = evtchn_to_irq[evtchn];
  483. if (irq == -1) {
  484. irq = find_unbound_irq();
  485. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  486. handle_edge_irq, "event");
  487. evtchn_to_irq[evtchn] = irq;
  488. irq_info[irq] = mk_evtchn_info(evtchn);
  489. }
  490. spin_unlock(&irq_mapping_update_lock);
  491. return irq;
  492. }
  493. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  494. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  495. {
  496. struct evtchn_bind_ipi bind_ipi;
  497. int evtchn, irq;
  498. spin_lock(&irq_mapping_update_lock);
  499. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  500. if (irq == -1) {
  501. irq = find_unbound_irq();
  502. if (irq < 0)
  503. goto out;
  504. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  505. handle_percpu_irq, "ipi");
  506. bind_ipi.vcpu = cpu;
  507. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  508. &bind_ipi) != 0)
  509. BUG();
  510. evtchn = bind_ipi.port;
  511. evtchn_to_irq[evtchn] = irq;
  512. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  513. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  514. bind_evtchn_to_cpu(evtchn, cpu);
  515. }
  516. out:
  517. spin_unlock(&irq_mapping_update_lock);
  518. return irq;
  519. }
  520. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  521. {
  522. struct evtchn_bind_virq bind_virq;
  523. int evtchn, irq;
  524. spin_lock(&irq_mapping_update_lock);
  525. irq = per_cpu(virq_to_irq, cpu)[virq];
  526. if (irq == -1) {
  527. bind_virq.virq = virq;
  528. bind_virq.vcpu = cpu;
  529. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  530. &bind_virq) != 0)
  531. BUG();
  532. evtchn = bind_virq.port;
  533. irq = find_unbound_irq();
  534. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  535. handle_percpu_irq, "virq");
  536. evtchn_to_irq[evtchn] = irq;
  537. irq_info[irq] = mk_virq_info(evtchn, virq);
  538. per_cpu(virq_to_irq, cpu)[virq] = irq;
  539. bind_evtchn_to_cpu(evtchn, cpu);
  540. }
  541. spin_unlock(&irq_mapping_update_lock);
  542. return irq;
  543. }
  544. static void unbind_from_irq(unsigned int irq)
  545. {
  546. struct evtchn_close close;
  547. int evtchn = evtchn_from_irq(irq);
  548. spin_lock(&irq_mapping_update_lock);
  549. if (VALID_EVTCHN(evtchn)) {
  550. close.port = evtchn;
  551. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  552. BUG();
  553. switch (type_from_irq(irq)) {
  554. case IRQT_VIRQ:
  555. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  556. [virq_from_irq(irq)] = -1;
  557. break;
  558. case IRQT_IPI:
  559. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  560. [ipi_from_irq(irq)] = -1;
  561. break;
  562. default:
  563. break;
  564. }
  565. /* Closed ports are implicitly re-bound to VCPU0. */
  566. bind_evtchn_to_cpu(evtchn, 0);
  567. evtchn_to_irq[evtchn] = -1;
  568. }
  569. if (irq_info[irq].type != IRQT_UNBOUND) {
  570. irq_info[irq] = mk_unbound_info();
  571. irq_free_desc(irq);
  572. }
  573. spin_unlock(&irq_mapping_update_lock);
  574. }
  575. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  576. irq_handler_t handler,
  577. unsigned long irqflags,
  578. const char *devname, void *dev_id)
  579. {
  580. unsigned int irq;
  581. int retval;
  582. irq = bind_evtchn_to_irq(evtchn);
  583. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  584. if (retval != 0) {
  585. unbind_from_irq(irq);
  586. return retval;
  587. }
  588. return irq;
  589. }
  590. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  591. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  592. irq_handler_t handler,
  593. unsigned long irqflags, const char *devname, void *dev_id)
  594. {
  595. unsigned int irq;
  596. int retval;
  597. irq = bind_virq_to_irq(virq, cpu);
  598. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  599. if (retval != 0) {
  600. unbind_from_irq(irq);
  601. return retval;
  602. }
  603. return irq;
  604. }
  605. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  606. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  607. unsigned int cpu,
  608. irq_handler_t handler,
  609. unsigned long irqflags,
  610. const char *devname,
  611. void *dev_id)
  612. {
  613. int irq, retval;
  614. irq = bind_ipi_to_irq(ipi, cpu);
  615. if (irq < 0)
  616. return irq;
  617. irqflags |= IRQF_NO_SUSPEND;
  618. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  619. if (retval != 0) {
  620. unbind_from_irq(irq);
  621. return retval;
  622. }
  623. return irq;
  624. }
  625. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  626. {
  627. free_irq(irq, dev_id);
  628. unbind_from_irq(irq);
  629. }
  630. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  631. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  632. {
  633. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  634. BUG_ON(irq < 0);
  635. notify_remote_via_irq(irq);
  636. }
  637. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  638. {
  639. struct shared_info *sh = HYPERVISOR_shared_info;
  640. int cpu = smp_processor_id();
  641. int i;
  642. unsigned long flags;
  643. static DEFINE_SPINLOCK(debug_lock);
  644. spin_lock_irqsave(&debug_lock, flags);
  645. printk("vcpu %d\n ", cpu);
  646. for_each_online_cpu(i) {
  647. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  648. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  649. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  650. v->evtchn_upcall_pending,
  651. v->evtchn_pending_sel);
  652. }
  653. printk("pending:\n ");
  654. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  655. printk("%08lx%s", sh->evtchn_pending[i],
  656. i % 8 == 0 ? "\n " : " ");
  657. printk("\nmasks:\n ");
  658. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  659. printk("%08lx%s", sh->evtchn_mask[i],
  660. i % 8 == 0 ? "\n " : " ");
  661. printk("\nunmasked:\n ");
  662. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  663. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  664. i % 8 == 0 ? "\n " : " ");
  665. printk("\npending list:\n");
  666. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  667. if (sync_test_bit(i, sh->evtchn_pending)) {
  668. printk(" %d: event %d -> irq %d\n",
  669. cpu_from_evtchn(i), i,
  670. evtchn_to_irq[i]);
  671. }
  672. }
  673. spin_unlock_irqrestore(&debug_lock, flags);
  674. return IRQ_HANDLED;
  675. }
  676. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  677. /*
  678. * Search the CPUs pending events bitmasks. For each one found, map
  679. * the event number to an irq, and feed it into do_IRQ() for
  680. * handling.
  681. *
  682. * Xen uses a two-level bitmap to speed searching. The first level is
  683. * a bitset of words which contain pending event bits. The second
  684. * level is a bitset of pending events themselves.
  685. */
  686. static void __xen_evtchn_do_upcall(void)
  687. {
  688. int cpu = get_cpu();
  689. struct shared_info *s = HYPERVISOR_shared_info;
  690. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  691. unsigned count;
  692. do {
  693. unsigned long pending_words;
  694. vcpu_info->evtchn_upcall_pending = 0;
  695. if (__get_cpu_var(xed_nesting_count)++)
  696. goto out;
  697. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  698. /* Clear master flag /before/ clearing selector flag. */
  699. wmb();
  700. #endif
  701. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  702. while (pending_words != 0) {
  703. unsigned long pending_bits;
  704. int word_idx = __ffs(pending_words);
  705. pending_words &= ~(1UL << word_idx);
  706. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  707. int bit_idx = __ffs(pending_bits);
  708. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  709. int irq = evtchn_to_irq[port];
  710. struct irq_desc *desc;
  711. if (irq != -1) {
  712. desc = irq_to_desc(irq);
  713. if (desc)
  714. generic_handle_irq_desc(irq, desc);
  715. }
  716. }
  717. }
  718. BUG_ON(!irqs_disabled());
  719. count = __get_cpu_var(xed_nesting_count);
  720. __get_cpu_var(xed_nesting_count) = 0;
  721. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  722. out:
  723. put_cpu();
  724. }
  725. void xen_evtchn_do_upcall(struct pt_regs *regs)
  726. {
  727. struct pt_regs *old_regs = set_irq_regs(regs);
  728. exit_idle();
  729. irq_enter();
  730. __xen_evtchn_do_upcall();
  731. irq_exit();
  732. set_irq_regs(old_regs);
  733. }
  734. void xen_hvm_evtchn_do_upcall(void)
  735. {
  736. __xen_evtchn_do_upcall();
  737. }
  738. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  739. /* Rebind a new event channel to an existing irq. */
  740. void rebind_evtchn_irq(int evtchn, int irq)
  741. {
  742. struct irq_info *info = info_for_irq(irq);
  743. /* Make sure the irq is masked, since the new event channel
  744. will also be masked. */
  745. disable_irq(irq);
  746. spin_lock(&irq_mapping_update_lock);
  747. /* After resume the irq<->evtchn mappings are all cleared out */
  748. BUG_ON(evtchn_to_irq[evtchn] != -1);
  749. /* Expect irq to have been bound before,
  750. so there should be a proper type */
  751. BUG_ON(info->type == IRQT_UNBOUND);
  752. evtchn_to_irq[evtchn] = irq;
  753. irq_info[irq] = mk_evtchn_info(evtchn);
  754. spin_unlock(&irq_mapping_update_lock);
  755. /* new event channels are always bound to cpu 0 */
  756. irq_set_affinity(irq, cpumask_of(0));
  757. /* Unmask the event channel. */
  758. enable_irq(irq);
  759. }
  760. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  761. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  762. {
  763. struct evtchn_bind_vcpu bind_vcpu;
  764. int evtchn = evtchn_from_irq(irq);
  765. /* events delivered via platform PCI interrupts are always
  766. * routed to vcpu 0 */
  767. if (!VALID_EVTCHN(evtchn) ||
  768. (xen_hvm_domain() && !xen_have_vector_callback))
  769. return -1;
  770. /* Send future instances of this interrupt to other vcpu. */
  771. bind_vcpu.port = evtchn;
  772. bind_vcpu.vcpu = tcpu;
  773. /*
  774. * If this fails, it usually just indicates that we're dealing with a
  775. * virq or IPI channel, which don't actually need to be rebound. Ignore
  776. * it, but don't do the xenlinux-level rebind in that case.
  777. */
  778. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  779. bind_evtchn_to_cpu(evtchn, tcpu);
  780. return 0;
  781. }
  782. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  783. {
  784. unsigned tcpu = cpumask_first(dest);
  785. return rebind_irq_to_cpu(irq, tcpu);
  786. }
  787. int resend_irq_on_evtchn(unsigned int irq)
  788. {
  789. int masked, evtchn = evtchn_from_irq(irq);
  790. struct shared_info *s = HYPERVISOR_shared_info;
  791. if (!VALID_EVTCHN(evtchn))
  792. return 1;
  793. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  794. sync_set_bit(evtchn, s->evtchn_pending);
  795. if (!masked)
  796. unmask_evtchn(evtchn);
  797. return 1;
  798. }
  799. static void enable_dynirq(unsigned int irq)
  800. {
  801. int evtchn = evtchn_from_irq(irq);
  802. if (VALID_EVTCHN(evtchn))
  803. unmask_evtchn(evtchn);
  804. }
  805. static void disable_dynirq(unsigned int irq)
  806. {
  807. int evtchn = evtchn_from_irq(irq);
  808. if (VALID_EVTCHN(evtchn))
  809. mask_evtchn(evtchn);
  810. }
  811. static void ack_dynirq(unsigned int irq)
  812. {
  813. int evtchn = evtchn_from_irq(irq);
  814. move_native_irq(irq);
  815. if (VALID_EVTCHN(evtchn))
  816. clear_evtchn(evtchn);
  817. }
  818. static int retrigger_dynirq(unsigned int irq)
  819. {
  820. int evtchn = evtchn_from_irq(irq);
  821. struct shared_info *sh = HYPERVISOR_shared_info;
  822. int ret = 0;
  823. if (VALID_EVTCHN(evtchn)) {
  824. int masked;
  825. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  826. sync_set_bit(evtchn, sh->evtchn_pending);
  827. if (!masked)
  828. unmask_evtchn(evtchn);
  829. ret = 1;
  830. }
  831. return ret;
  832. }
  833. static void restore_cpu_virqs(unsigned int cpu)
  834. {
  835. struct evtchn_bind_virq bind_virq;
  836. int virq, irq, evtchn;
  837. for (virq = 0; virq < NR_VIRQS; virq++) {
  838. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  839. continue;
  840. BUG_ON(virq_from_irq(irq) != virq);
  841. /* Get a new binding from Xen. */
  842. bind_virq.virq = virq;
  843. bind_virq.vcpu = cpu;
  844. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  845. &bind_virq) != 0)
  846. BUG();
  847. evtchn = bind_virq.port;
  848. /* Record the new mapping. */
  849. evtchn_to_irq[evtchn] = irq;
  850. irq_info[irq] = mk_virq_info(evtchn, virq);
  851. bind_evtchn_to_cpu(evtchn, cpu);
  852. /* Ready for use. */
  853. unmask_evtchn(evtchn);
  854. }
  855. }
  856. static void restore_cpu_ipis(unsigned int cpu)
  857. {
  858. struct evtchn_bind_ipi bind_ipi;
  859. int ipi, irq, evtchn;
  860. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  861. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  862. continue;
  863. BUG_ON(ipi_from_irq(irq) != ipi);
  864. /* Get a new binding from Xen. */
  865. bind_ipi.vcpu = cpu;
  866. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  867. &bind_ipi) != 0)
  868. BUG();
  869. evtchn = bind_ipi.port;
  870. /* Record the new mapping. */
  871. evtchn_to_irq[evtchn] = irq;
  872. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  873. bind_evtchn_to_cpu(evtchn, cpu);
  874. /* Ready for use. */
  875. unmask_evtchn(evtchn);
  876. }
  877. }
  878. /* Clear an irq's pending state, in preparation for polling on it */
  879. void xen_clear_irq_pending(int irq)
  880. {
  881. int evtchn = evtchn_from_irq(irq);
  882. if (VALID_EVTCHN(evtchn))
  883. clear_evtchn(evtchn);
  884. }
  885. void xen_set_irq_pending(int irq)
  886. {
  887. int evtchn = evtchn_from_irq(irq);
  888. if (VALID_EVTCHN(evtchn))
  889. set_evtchn(evtchn);
  890. }
  891. bool xen_test_irq_pending(int irq)
  892. {
  893. int evtchn = evtchn_from_irq(irq);
  894. bool ret = false;
  895. if (VALID_EVTCHN(evtchn))
  896. ret = test_evtchn(evtchn);
  897. return ret;
  898. }
  899. /* Poll waiting for an irq to become pending. In the usual case, the
  900. irq will be disabled so it won't deliver an interrupt. */
  901. void xen_poll_irq(int irq)
  902. {
  903. evtchn_port_t evtchn = evtchn_from_irq(irq);
  904. if (VALID_EVTCHN(evtchn)) {
  905. struct sched_poll poll;
  906. poll.nr_ports = 1;
  907. poll.timeout = 0;
  908. set_xen_guest_handle(poll.ports, &evtchn);
  909. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  910. BUG();
  911. }
  912. }
  913. void xen_irq_resume(void)
  914. {
  915. unsigned int cpu, irq, evtchn;
  916. init_evtchn_cpu_bindings();
  917. /* New event-channel space is not 'live' yet. */
  918. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  919. mask_evtchn(evtchn);
  920. /* No IRQ <-> event-channel mappings. */
  921. for (irq = 0; irq < nr_irqs; irq++)
  922. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  923. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  924. evtchn_to_irq[evtchn] = -1;
  925. for_each_possible_cpu(cpu) {
  926. restore_cpu_virqs(cpu);
  927. restore_cpu_ipis(cpu);
  928. }
  929. }
  930. static struct irq_chip xen_dynamic_chip __read_mostly = {
  931. .name = "xen-dyn",
  932. .disable = disable_dynirq,
  933. .mask = disable_dynirq,
  934. .unmask = enable_dynirq,
  935. .ack = ack_dynirq,
  936. .set_affinity = set_affinity_irq,
  937. .retrigger = retrigger_dynirq,
  938. };
  939. static struct irq_chip xen_pirq_chip __read_mostly = {
  940. .name = "xen-pirq",
  941. .startup = startup_pirq,
  942. .shutdown = shutdown_pirq,
  943. .enable = enable_pirq,
  944. .unmask = enable_pirq,
  945. .disable = disable_pirq,
  946. .mask = disable_pirq,
  947. .ack = ack_pirq,
  948. .end = end_pirq,
  949. .set_affinity = set_affinity_irq,
  950. .retrigger = retrigger_dynirq,
  951. };
  952. static struct irq_chip xen_percpu_chip __read_mostly = {
  953. .name = "xen-percpu",
  954. .disable = disable_dynirq,
  955. .mask = disable_dynirq,
  956. .unmask = enable_dynirq,
  957. .ack = ack_dynirq,
  958. };
  959. int xen_set_callback_via(uint64_t via)
  960. {
  961. struct xen_hvm_param a;
  962. a.domid = DOMID_SELF;
  963. a.index = HVM_PARAM_CALLBACK_IRQ;
  964. a.value = via;
  965. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  966. }
  967. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  968. #ifdef CONFIG_XEN_PVHVM
  969. /* Vector callbacks are better than PCI interrupts to receive event
  970. * channel notifications because we can receive vector callbacks on any
  971. * vcpu and we don't need PCI support or APIC interactions. */
  972. void xen_callback_vector(void)
  973. {
  974. int rc;
  975. uint64_t callback_via;
  976. if (xen_have_vector_callback) {
  977. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  978. rc = xen_set_callback_via(callback_via);
  979. if (rc) {
  980. printk(KERN_ERR "Request for Xen HVM callback vector"
  981. " failed.\n");
  982. xen_have_vector_callback = 0;
  983. return;
  984. }
  985. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  986. "enabled\n");
  987. /* in the restore case the vector has already been allocated */
  988. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  989. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  990. }
  991. }
  992. #else
  993. void xen_callback_vector(void) {}
  994. #endif
  995. void __init xen_init_IRQ(void)
  996. {
  997. int i;
  998. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  999. GFP_KERNEL);
  1000. BUG_ON(cpu_evtchn_mask_p == NULL);
  1001. init_evtchn_cpu_bindings();
  1002. /* No event channels are 'live' right now. */
  1003. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1004. mask_evtchn(i);
  1005. if (xen_hvm_domain()) {
  1006. xen_callback_vector();
  1007. native_init_IRQ();
  1008. } else {
  1009. irq_ctx_init(smp_processor_id());
  1010. }
  1011. }