mcam-core.c 46 KB

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  1. /*
  2. * The Marvell camera core. This device appears in a number of settings,
  3. * so it needs platform-specific support outside of the core.
  4. *
  5. * Copyright 2011 Jonathan Corbet corbet@lwn.net
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/fs.h>
  10. #include <linux/mm.h>
  11. #include <linux/i2c.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/slab.h>
  15. #include <linux/device.h>
  16. #include <linux/wait.h>
  17. #include <linux/list.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/delay.h>
  20. #include <linux/vmalloc.h>
  21. #include <linux/io.h>
  22. #include <linux/videodev2.h>
  23. #include <media/v4l2-device.h>
  24. #include <media/v4l2-ioctl.h>
  25. #include <media/v4l2-chip-ident.h>
  26. #include <media/ov7670.h>
  27. #include <media/videobuf2-vmalloc.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <media/videobuf2-dma-sg.h>
  30. #include "mcam-core.h"
  31. /*
  32. * Basic frame stats - to be deleted shortly
  33. */
  34. static int frames;
  35. static int singles;
  36. static int delivered;
  37. #ifdef MCAM_MODE_VMALLOC
  38. /*
  39. * Internal DMA buffer management. Since the controller cannot do S/G I/O,
  40. * we must have physically contiguous buffers to bring frames into.
  41. * These parameters control how many buffers we use, whether we
  42. * allocate them at load time (better chance of success, but nails down
  43. * memory) or when somebody tries to use the camera (riskier), and,
  44. * for load-time allocation, how big they should be.
  45. *
  46. * The controller can cycle through three buffers. We could use
  47. * more by flipping pointers around, but it probably makes little
  48. * sense.
  49. */
  50. static bool alloc_bufs_at_read;
  51. module_param(alloc_bufs_at_read, bool, 0444);
  52. MODULE_PARM_DESC(alloc_bufs_at_read,
  53. "Non-zero value causes DMA buffers to be allocated when the "
  54. "video capture device is read, rather than at module load "
  55. "time. This saves memory, but decreases the chances of "
  56. "successfully getting those buffers. This parameter is "
  57. "only used in the vmalloc buffer mode");
  58. static int n_dma_bufs = 3;
  59. module_param(n_dma_bufs, uint, 0644);
  60. MODULE_PARM_DESC(n_dma_bufs,
  61. "The number of DMA buffers to allocate. Can be either two "
  62. "(saves memory, makes timing tighter) or three.");
  63. static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
  64. module_param(dma_buf_size, uint, 0444);
  65. MODULE_PARM_DESC(dma_buf_size,
  66. "The size of the allocated DMA buffers. If actual operating "
  67. "parameters require larger buffers, an attempt to reallocate "
  68. "will be made.");
  69. #else /* MCAM_MODE_VMALLOC */
  70. static const bool alloc_bufs_at_read = 0;
  71. static const int n_dma_bufs = 3; /* Used by S/G_PARM */
  72. #endif /* MCAM_MODE_VMALLOC */
  73. static bool flip;
  74. module_param(flip, bool, 0444);
  75. MODULE_PARM_DESC(flip,
  76. "If set, the sensor will be instructed to flip the image "
  77. "vertically.");
  78. static int buffer_mode = -1;
  79. module_param(buffer_mode, int, 0444);
  80. MODULE_PARM_DESC(buffer_mode,
  81. "Set the buffer mode to be used; default is to go with what "
  82. "the platform driver asks for. Set to 0 for vmalloc, 1 for "
  83. "DMA contiguous.");
  84. /*
  85. * Status flags. Always manipulated with bit operations.
  86. */
  87. #define CF_BUF0_VALID 0 /* Buffers valid - first three */
  88. #define CF_BUF1_VALID 1
  89. #define CF_BUF2_VALID 2
  90. #define CF_DMA_ACTIVE 3 /* A frame is incoming */
  91. #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
  92. #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
  93. #define CF_SG_RESTART 6 /* SG restart needed */
  94. #define sensor_call(cam, o, f, args...) \
  95. v4l2_subdev_call(cam->sensor, o, f, ##args)
  96. static struct mcam_format_struct {
  97. __u8 *desc;
  98. __u32 pixelformat;
  99. int bpp; /* Bytes per pixel */
  100. enum v4l2_mbus_pixelcode mbus_code;
  101. } mcam_formats[] = {
  102. {
  103. .desc = "YUYV 4:2:2",
  104. .pixelformat = V4L2_PIX_FMT_YUYV,
  105. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  106. .bpp = 2,
  107. },
  108. {
  109. .desc = "RGB 444",
  110. .pixelformat = V4L2_PIX_FMT_RGB444,
  111. .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
  112. .bpp = 2,
  113. },
  114. {
  115. .desc = "RGB 565",
  116. .pixelformat = V4L2_PIX_FMT_RGB565,
  117. .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
  118. .bpp = 2,
  119. },
  120. {
  121. .desc = "Raw RGB Bayer",
  122. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  123. .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
  124. .bpp = 1
  125. },
  126. };
  127. #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
  128. static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
  129. {
  130. unsigned i;
  131. for (i = 0; i < N_MCAM_FMTS; i++)
  132. if (mcam_formats[i].pixelformat == pixelformat)
  133. return mcam_formats + i;
  134. /* Not found? Then return the first format. */
  135. return mcam_formats;
  136. }
  137. /*
  138. * The default format we use until somebody says otherwise.
  139. */
  140. static const struct v4l2_pix_format mcam_def_pix_format = {
  141. .width = VGA_WIDTH,
  142. .height = VGA_HEIGHT,
  143. .pixelformat = V4L2_PIX_FMT_YUYV,
  144. .field = V4L2_FIELD_NONE,
  145. .bytesperline = VGA_WIDTH*2,
  146. .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
  147. };
  148. static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
  149. V4L2_MBUS_FMT_YUYV8_2X8;
  150. /*
  151. * The two-word DMA descriptor format used by the Armada 610 and like. There
  152. * Is a three-word format as well (set C1_DESC_3WORD) where the third
  153. * word is a pointer to the next descriptor, but we don't use it. Two-word
  154. * descriptors have to be contiguous in memory.
  155. */
  156. struct mcam_dma_desc {
  157. u32 dma_addr;
  158. u32 segment_len;
  159. };
  160. /*
  161. * Our buffer type for working with videobuf2. Note that the vb2
  162. * developers have decreed that struct vb2_buffer must be at the
  163. * beginning of this structure.
  164. */
  165. struct mcam_vb_buffer {
  166. struct vb2_buffer vb_buf;
  167. struct list_head queue;
  168. struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
  169. dma_addr_t dma_desc_pa; /* Descriptor physical address */
  170. int dma_desc_nent; /* Number of mapped descriptors */
  171. };
  172. static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
  173. {
  174. return container_of(vb, struct mcam_vb_buffer, vb_buf);
  175. }
  176. /*
  177. * Hand a completed buffer back to user space.
  178. */
  179. static void mcam_buffer_done(struct mcam_camera *cam, int frame,
  180. struct vb2_buffer *vbuf)
  181. {
  182. vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
  183. vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
  184. vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
  185. vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
  186. }
  187. /*
  188. * Debugging and related.
  189. */
  190. #define cam_err(cam, fmt, arg...) \
  191. dev_err((cam)->dev, fmt, ##arg);
  192. #define cam_warn(cam, fmt, arg...) \
  193. dev_warn((cam)->dev, fmt, ##arg);
  194. #define cam_dbg(cam, fmt, arg...) \
  195. dev_dbg((cam)->dev, fmt, ##arg);
  196. /*
  197. * Flag manipulation helpers
  198. */
  199. static void mcam_reset_buffers(struct mcam_camera *cam)
  200. {
  201. int i;
  202. cam->next_buf = -1;
  203. for (i = 0; i < cam->nbufs; i++)
  204. clear_bit(i, &cam->flags);
  205. }
  206. static inline int mcam_needs_config(struct mcam_camera *cam)
  207. {
  208. return test_bit(CF_CONFIG_NEEDED, &cam->flags);
  209. }
  210. static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
  211. {
  212. if (needed)
  213. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  214. else
  215. clear_bit(CF_CONFIG_NEEDED, &cam->flags);
  216. }
  217. /* ------------------------------------------------------------------- */
  218. /*
  219. * Make the controller start grabbing images. Everything must
  220. * be set up before doing this.
  221. */
  222. static void mcam_ctlr_start(struct mcam_camera *cam)
  223. {
  224. /* set_bit performs a read, so no other barrier should be
  225. needed here */
  226. mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
  227. }
  228. static void mcam_ctlr_stop(struct mcam_camera *cam)
  229. {
  230. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  231. }
  232. /* ------------------------------------------------------------------- */
  233. #ifdef MCAM_MODE_VMALLOC
  234. /*
  235. * Code specific to the vmalloc buffer mode.
  236. */
  237. /*
  238. * Allocate in-kernel DMA buffers for vmalloc mode.
  239. */
  240. static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  241. {
  242. int i;
  243. mcam_set_config_needed(cam, 1);
  244. if (loadtime)
  245. cam->dma_buf_size = dma_buf_size;
  246. else
  247. cam->dma_buf_size = cam->pix_format.sizeimage;
  248. if (n_dma_bufs > 3)
  249. n_dma_bufs = 3;
  250. cam->nbufs = 0;
  251. for (i = 0; i < n_dma_bufs; i++) {
  252. cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
  253. cam->dma_buf_size, cam->dma_handles + i,
  254. GFP_KERNEL);
  255. if (cam->dma_bufs[i] == NULL) {
  256. cam_warn(cam, "Failed to allocate DMA buffer\n");
  257. break;
  258. }
  259. (cam->nbufs)++;
  260. }
  261. switch (cam->nbufs) {
  262. case 1:
  263. dma_free_coherent(cam->dev, cam->dma_buf_size,
  264. cam->dma_bufs[0], cam->dma_handles[0]);
  265. cam->nbufs = 0;
  266. case 0:
  267. cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
  268. return -ENOMEM;
  269. case 2:
  270. if (n_dma_bufs > 2)
  271. cam_warn(cam, "Will limp along with only 2 buffers\n");
  272. break;
  273. }
  274. return 0;
  275. }
  276. static void mcam_free_dma_bufs(struct mcam_camera *cam)
  277. {
  278. int i;
  279. for (i = 0; i < cam->nbufs; i++) {
  280. dma_free_coherent(cam->dev, cam->dma_buf_size,
  281. cam->dma_bufs[i], cam->dma_handles[i]);
  282. cam->dma_bufs[i] = NULL;
  283. }
  284. cam->nbufs = 0;
  285. }
  286. /*
  287. * Set up DMA buffers when operating in vmalloc mode
  288. */
  289. static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
  290. {
  291. /*
  292. * Store the first two Y buffers (we aren't supporting
  293. * planar formats for now, so no UV bufs). Then either
  294. * set the third if it exists, or tell the controller
  295. * to just use two.
  296. */
  297. mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
  298. mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
  299. if (cam->nbufs > 2) {
  300. mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
  301. mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
  302. } else
  303. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  304. if (cam->chip_id == V4L2_IDENT_CAFE)
  305. mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
  306. }
  307. /*
  308. * Copy data out to user space in the vmalloc case
  309. */
  310. static void mcam_frame_tasklet(unsigned long data)
  311. {
  312. struct mcam_camera *cam = (struct mcam_camera *) data;
  313. int i;
  314. unsigned long flags;
  315. struct mcam_vb_buffer *buf;
  316. spin_lock_irqsave(&cam->dev_lock, flags);
  317. for (i = 0; i < cam->nbufs; i++) {
  318. int bufno = cam->next_buf;
  319. if (cam->state != S_STREAMING || bufno < 0)
  320. break; /* I/O got stopped */
  321. if (++(cam->next_buf) >= cam->nbufs)
  322. cam->next_buf = 0;
  323. if (!test_bit(bufno, &cam->flags))
  324. continue;
  325. if (list_empty(&cam->buffers)) {
  326. singles++;
  327. break; /* Leave it valid, hope for better later */
  328. }
  329. delivered++;
  330. clear_bit(bufno, &cam->flags);
  331. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
  332. queue);
  333. list_del_init(&buf->queue);
  334. /*
  335. * Drop the lock during the big copy. This *should* be safe...
  336. */
  337. spin_unlock_irqrestore(&cam->dev_lock, flags);
  338. memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
  339. cam->pix_format.sizeimage);
  340. mcam_buffer_done(cam, bufno, &buf->vb_buf);
  341. spin_lock_irqsave(&cam->dev_lock, flags);
  342. }
  343. spin_unlock_irqrestore(&cam->dev_lock, flags);
  344. }
  345. /*
  346. * Make sure our allocated buffers are up to the task.
  347. */
  348. static int mcam_check_dma_buffers(struct mcam_camera *cam)
  349. {
  350. if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
  351. mcam_free_dma_bufs(cam);
  352. if (cam->nbufs == 0)
  353. return mcam_alloc_dma_bufs(cam, 0);
  354. return 0;
  355. }
  356. static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
  357. {
  358. tasklet_schedule(&cam->s_tasklet);
  359. }
  360. #else /* MCAM_MODE_VMALLOC */
  361. static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  362. {
  363. return 0;
  364. }
  365. static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
  366. {
  367. return;
  368. }
  369. static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
  370. {
  371. return 0;
  372. }
  373. #endif /* MCAM_MODE_VMALLOC */
  374. #ifdef MCAM_MODE_DMA_CONTIG
  375. /* ---------------------------------------------------------------------- */
  376. /*
  377. * DMA-contiguous code.
  378. */
  379. /*
  380. * Set up a contiguous buffer for the given frame. Here also is where
  381. * the underrun strategy is set: if there is no buffer available, reuse
  382. * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
  383. * keep the interrupt handler from giving that buffer back to user
  384. * space. In this way, we always have a buffer to DMA to and don't
  385. * have to try to play games stopping and restarting the controller.
  386. */
  387. static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
  388. {
  389. struct mcam_vb_buffer *buf;
  390. /*
  391. * If there are no available buffers, go into single mode
  392. */
  393. if (list_empty(&cam->buffers)) {
  394. buf = cam->vb_bufs[frame ^ 0x1];
  395. cam->vb_bufs[frame] = buf;
  396. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  397. vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
  398. set_bit(CF_SINGLE_BUFFER, &cam->flags);
  399. singles++;
  400. return;
  401. }
  402. /*
  403. * OK, we have a buffer we can use.
  404. */
  405. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  406. list_del_init(&buf->queue);
  407. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  408. vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
  409. cam->vb_bufs[frame] = buf;
  410. clear_bit(CF_SINGLE_BUFFER, &cam->flags);
  411. }
  412. /*
  413. * Initial B_DMA_contig setup.
  414. */
  415. static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
  416. {
  417. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  418. cam->nbufs = 2;
  419. mcam_set_contig_buffer(cam, 0);
  420. mcam_set_contig_buffer(cam, 1);
  421. }
  422. /*
  423. * Frame completion handling.
  424. */
  425. static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
  426. {
  427. struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
  428. if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
  429. delivered++;
  430. mcam_buffer_done(cam, frame, &buf->vb_buf);
  431. }
  432. mcam_set_contig_buffer(cam, frame);
  433. }
  434. #endif /* MCAM_MODE_DMA_CONTIG */
  435. #ifdef MCAM_MODE_DMA_SG
  436. /* ---------------------------------------------------------------------- */
  437. /*
  438. * Scatter/gather-specific code.
  439. */
  440. /*
  441. * Set up the next buffer for S/G I/O; caller should be sure that
  442. * the controller is stopped and a buffer is available.
  443. */
  444. static void mcam_sg_next_buffer(struct mcam_camera *cam)
  445. {
  446. struct mcam_vb_buffer *buf;
  447. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  448. list_del_init(&buf->queue);
  449. mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
  450. mcam_reg_write(cam, REG_DESC_LEN_Y,
  451. buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
  452. mcam_reg_write(cam, REG_DESC_LEN_U, 0);
  453. mcam_reg_write(cam, REG_DESC_LEN_V, 0);
  454. cam->vb_bufs[0] = buf;
  455. }
  456. /*
  457. * Initial B_DMA_sg setup
  458. */
  459. static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
  460. {
  461. /*
  462. * The list-empty condition can hit us at resume time
  463. * if the buffer list was empty when the system was suspended.
  464. */
  465. if (list_empty(&cam->buffers)) {
  466. set_bit(CF_SG_RESTART, &cam->flags);
  467. return;
  468. }
  469. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
  470. mcam_sg_next_buffer(cam);
  471. mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
  472. cam->nbufs = 3;
  473. }
  474. /*
  475. * Frame completion with S/G is trickier. We can't muck with
  476. * a descriptor chain on the fly, since the controller buffers it
  477. * internally. So we have to actually stop and restart; Marvell
  478. * says this is the way to do it.
  479. *
  480. * Of course, stopping is easier said than done; experience shows
  481. * that the controller can start a frame *after* C0_ENABLE has been
  482. * cleared. So when running in S/G mode, the controller is "stopped"
  483. * on receipt of the start-of-frame interrupt. That means we can
  484. * safely change the DMA descriptor array here and restart things
  485. * (assuming there's another buffer waiting to go).
  486. */
  487. static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
  488. {
  489. struct mcam_vb_buffer *buf = cam->vb_bufs[0];
  490. /*
  491. * If we're no longer supposed to be streaming, don't do anything.
  492. */
  493. if (cam->state != S_STREAMING)
  494. return;
  495. /*
  496. * Very Bad Not Good Things happen if you don't clear
  497. * C1_DESC_ENA before making any descriptor changes.
  498. */
  499. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
  500. /*
  501. * If we have another buffer available, put it in and
  502. * restart the engine.
  503. */
  504. if (!list_empty(&cam->buffers)) {
  505. mcam_sg_next_buffer(cam);
  506. mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
  507. mcam_ctlr_start(cam);
  508. /*
  509. * Otherwise set CF_SG_RESTART and the controller will
  510. * be restarted once another buffer shows up.
  511. */
  512. } else {
  513. set_bit(CF_SG_RESTART, &cam->flags);
  514. singles++;
  515. cam->vb_bufs[0] = NULL;
  516. }
  517. /*
  518. * Now we can give the completed frame back to user space.
  519. */
  520. delivered++;
  521. mcam_buffer_done(cam, frame, &buf->vb_buf);
  522. }
  523. /*
  524. * Scatter/gather mode requires stopping the controller between
  525. * frames so we can put in a new DMA descriptor array. If no new
  526. * buffer exists at frame completion, the controller is left stopped;
  527. * this function is charged with gettig things going again.
  528. */
  529. static void mcam_sg_restart(struct mcam_camera *cam)
  530. {
  531. mcam_ctlr_dma_sg(cam);
  532. mcam_ctlr_start(cam);
  533. clear_bit(CF_SG_RESTART, &cam->flags);
  534. }
  535. #else /* MCAM_MODE_DMA_SG */
  536. static inline void mcam_sg_restart(struct mcam_camera *cam)
  537. {
  538. return;
  539. }
  540. #endif /* MCAM_MODE_DMA_SG */
  541. /* ---------------------------------------------------------------------- */
  542. /*
  543. * Buffer-mode-independent controller code.
  544. */
  545. /*
  546. * Image format setup
  547. */
  548. static void mcam_ctlr_image(struct mcam_camera *cam)
  549. {
  550. int imgsz;
  551. struct v4l2_pix_format *fmt = &cam->pix_format;
  552. imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
  553. (fmt->bytesperline & IMGSZ_H_MASK);
  554. mcam_reg_write(cam, REG_IMGSIZE, imgsz);
  555. mcam_reg_write(cam, REG_IMGOFFSET, 0);
  556. /* YPITCH just drops the last two bits */
  557. mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
  558. IMGP_YP_MASK);
  559. /*
  560. * Tell the controller about the image format we are using.
  561. */
  562. switch (cam->pix_format.pixelformat) {
  563. case V4L2_PIX_FMT_YUYV:
  564. mcam_reg_write_mask(cam, REG_CTRL0,
  565. C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
  566. C0_DF_MASK);
  567. break;
  568. case V4L2_PIX_FMT_RGB444:
  569. mcam_reg_write_mask(cam, REG_CTRL0,
  570. C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
  571. C0_DF_MASK);
  572. /* Alpha value? */
  573. break;
  574. case V4L2_PIX_FMT_RGB565:
  575. mcam_reg_write_mask(cam, REG_CTRL0,
  576. C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
  577. C0_DF_MASK);
  578. break;
  579. default:
  580. cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
  581. break;
  582. }
  583. /*
  584. * Make sure it knows we want to use hsync/vsync.
  585. */
  586. mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
  587. C0_SIFM_MASK);
  588. }
  589. /*
  590. * Configure the controller for operation; caller holds the
  591. * device mutex.
  592. */
  593. static int mcam_ctlr_configure(struct mcam_camera *cam)
  594. {
  595. unsigned long flags;
  596. spin_lock_irqsave(&cam->dev_lock, flags);
  597. clear_bit(CF_SG_RESTART, &cam->flags);
  598. cam->dma_setup(cam);
  599. mcam_ctlr_image(cam);
  600. mcam_set_config_needed(cam, 0);
  601. spin_unlock_irqrestore(&cam->dev_lock, flags);
  602. return 0;
  603. }
  604. static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
  605. {
  606. /*
  607. * Clear any pending interrupts, since we do not
  608. * expect to have I/O active prior to enabling.
  609. */
  610. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
  611. mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
  612. }
  613. static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
  614. {
  615. mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
  616. }
  617. static void mcam_ctlr_init(struct mcam_camera *cam)
  618. {
  619. unsigned long flags;
  620. spin_lock_irqsave(&cam->dev_lock, flags);
  621. /*
  622. * Make sure it's not powered down.
  623. */
  624. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  625. /*
  626. * Turn off the enable bit. It sure should be off anyway,
  627. * but it's good to be sure.
  628. */
  629. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  630. /*
  631. * Clock the sensor appropriately. Controller clock should
  632. * be 48MHz, sensor "typical" value is half that.
  633. */
  634. mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
  635. spin_unlock_irqrestore(&cam->dev_lock, flags);
  636. }
  637. /*
  638. * Stop the controller, and don't return until we're really sure that no
  639. * further DMA is going on.
  640. */
  641. static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
  642. {
  643. unsigned long flags;
  644. /*
  645. * Theory: stop the camera controller (whether it is operating
  646. * or not). Delay briefly just in case we race with the SOF
  647. * interrupt, then wait until no DMA is active.
  648. */
  649. spin_lock_irqsave(&cam->dev_lock, flags);
  650. clear_bit(CF_SG_RESTART, &cam->flags);
  651. mcam_ctlr_stop(cam);
  652. cam->state = S_IDLE;
  653. spin_unlock_irqrestore(&cam->dev_lock, flags);
  654. msleep(40);
  655. if (test_bit(CF_DMA_ACTIVE, &cam->flags))
  656. cam_err(cam, "Timeout waiting for DMA to end\n");
  657. /* This would be bad news - what now? */
  658. spin_lock_irqsave(&cam->dev_lock, flags);
  659. mcam_ctlr_irq_disable(cam);
  660. spin_unlock_irqrestore(&cam->dev_lock, flags);
  661. }
  662. /*
  663. * Power up and down.
  664. */
  665. static void mcam_ctlr_power_up(struct mcam_camera *cam)
  666. {
  667. unsigned long flags;
  668. spin_lock_irqsave(&cam->dev_lock, flags);
  669. cam->plat_power_up(cam);
  670. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  671. spin_unlock_irqrestore(&cam->dev_lock, flags);
  672. msleep(5); /* Just to be sure */
  673. }
  674. static void mcam_ctlr_power_down(struct mcam_camera *cam)
  675. {
  676. unsigned long flags;
  677. spin_lock_irqsave(&cam->dev_lock, flags);
  678. /*
  679. * School of hard knocks department: be sure we do any register
  680. * twiddling on the controller *before* calling the platform
  681. * power down routine.
  682. */
  683. mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
  684. cam->plat_power_down(cam);
  685. spin_unlock_irqrestore(&cam->dev_lock, flags);
  686. }
  687. /* -------------------------------------------------------------------- */
  688. /*
  689. * Communications with the sensor.
  690. */
  691. static int __mcam_cam_reset(struct mcam_camera *cam)
  692. {
  693. return sensor_call(cam, core, reset, 0);
  694. }
  695. /*
  696. * We have found the sensor on the i2c. Let's try to have a
  697. * conversation.
  698. */
  699. static int mcam_cam_init(struct mcam_camera *cam)
  700. {
  701. struct v4l2_dbg_chip_ident chip;
  702. int ret;
  703. mutex_lock(&cam->s_mutex);
  704. if (cam->state != S_NOTREADY)
  705. cam_warn(cam, "Cam init with device in funky state %d",
  706. cam->state);
  707. ret = __mcam_cam_reset(cam);
  708. if (ret)
  709. goto out;
  710. chip.ident = V4L2_IDENT_NONE;
  711. chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
  712. chip.match.addr = cam->sensor_addr;
  713. ret = sensor_call(cam, core, g_chip_ident, &chip);
  714. if (ret)
  715. goto out;
  716. cam->sensor_type = chip.ident;
  717. if (cam->sensor_type != V4L2_IDENT_OV7670) {
  718. cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
  719. ret = -EINVAL;
  720. goto out;
  721. }
  722. /* Get/set parameters? */
  723. ret = 0;
  724. cam->state = S_IDLE;
  725. out:
  726. mcam_ctlr_power_down(cam);
  727. mutex_unlock(&cam->s_mutex);
  728. return ret;
  729. }
  730. /*
  731. * Configure the sensor to match the parameters we have. Caller should
  732. * hold s_mutex
  733. */
  734. static int mcam_cam_set_flip(struct mcam_camera *cam)
  735. {
  736. struct v4l2_control ctrl;
  737. memset(&ctrl, 0, sizeof(ctrl));
  738. ctrl.id = V4L2_CID_VFLIP;
  739. ctrl.value = flip;
  740. return sensor_call(cam, core, s_ctrl, &ctrl);
  741. }
  742. static int mcam_cam_configure(struct mcam_camera *cam)
  743. {
  744. struct v4l2_mbus_framefmt mbus_fmt;
  745. int ret;
  746. v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
  747. ret = sensor_call(cam, core, init, 0);
  748. if (ret == 0)
  749. ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
  750. /*
  751. * OV7670 does weird things if flip is set *before* format...
  752. */
  753. ret += mcam_cam_set_flip(cam);
  754. return ret;
  755. }
  756. /*
  757. * Get everything ready, and start grabbing frames.
  758. */
  759. static int mcam_read_setup(struct mcam_camera *cam)
  760. {
  761. int ret;
  762. unsigned long flags;
  763. /*
  764. * Configuration. If we still don't have DMA buffers,
  765. * make one last, desperate attempt.
  766. */
  767. if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
  768. mcam_alloc_dma_bufs(cam, 0))
  769. return -ENOMEM;
  770. if (mcam_needs_config(cam)) {
  771. mcam_cam_configure(cam);
  772. ret = mcam_ctlr_configure(cam);
  773. if (ret)
  774. return ret;
  775. }
  776. /*
  777. * Turn it loose.
  778. */
  779. spin_lock_irqsave(&cam->dev_lock, flags);
  780. mcam_reset_buffers(cam);
  781. mcam_ctlr_irq_enable(cam);
  782. cam->state = S_STREAMING;
  783. if (!test_bit(CF_SG_RESTART, &cam->flags))
  784. mcam_ctlr_start(cam);
  785. spin_unlock_irqrestore(&cam->dev_lock, flags);
  786. return 0;
  787. }
  788. /* ----------------------------------------------------------------------- */
  789. /*
  790. * Videobuf2 interface code.
  791. */
  792. static int mcam_vb_queue_setup(struct vb2_queue *vq,
  793. const struct v4l2_format *fmt, unsigned int *nbufs,
  794. unsigned int *num_planes, unsigned int sizes[],
  795. void *alloc_ctxs[])
  796. {
  797. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  798. int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
  799. sizes[0] = cam->pix_format.sizeimage;
  800. *num_planes = 1; /* Someday we have to support planar formats... */
  801. if (*nbufs < minbufs)
  802. *nbufs = minbufs;
  803. if (cam->buffer_mode == B_DMA_contig)
  804. alloc_ctxs[0] = cam->vb_alloc_ctx;
  805. return 0;
  806. }
  807. static void mcam_vb_buf_queue(struct vb2_buffer *vb)
  808. {
  809. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  810. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  811. unsigned long flags;
  812. int start;
  813. spin_lock_irqsave(&cam->dev_lock, flags);
  814. start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
  815. list_add(&mvb->queue, &cam->buffers);
  816. if (cam->state == S_STREAMING && test_bit(CF_SG_RESTART, &cam->flags))
  817. mcam_sg_restart(cam);
  818. spin_unlock_irqrestore(&cam->dev_lock, flags);
  819. if (start)
  820. mcam_read_setup(cam);
  821. }
  822. /*
  823. * vb2 uses these to release the mutex when waiting in dqbuf. I'm
  824. * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
  825. * to be called with the mutex held), but better safe than sorry.
  826. */
  827. static void mcam_vb_wait_prepare(struct vb2_queue *vq)
  828. {
  829. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  830. mutex_unlock(&cam->s_mutex);
  831. }
  832. static void mcam_vb_wait_finish(struct vb2_queue *vq)
  833. {
  834. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  835. mutex_lock(&cam->s_mutex);
  836. }
  837. /*
  838. * These need to be called with the mutex held from vb2
  839. */
  840. static int mcam_vb_start_streaming(struct vb2_queue *vq, unsigned int count)
  841. {
  842. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  843. if (cam->state != S_IDLE) {
  844. INIT_LIST_HEAD(&cam->buffers);
  845. return -EINVAL;
  846. }
  847. cam->sequence = 0;
  848. /*
  849. * Videobuf2 sneakily hoards all the buffers and won't
  850. * give them to us until *after* streaming starts. But
  851. * we can't actually start streaming until we have a
  852. * destination. So go into a wait state and hope they
  853. * give us buffers soon.
  854. */
  855. if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
  856. cam->state = S_BUFWAIT;
  857. return 0;
  858. }
  859. return mcam_read_setup(cam);
  860. }
  861. static int mcam_vb_stop_streaming(struct vb2_queue *vq)
  862. {
  863. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  864. unsigned long flags;
  865. if (cam->state == S_BUFWAIT) {
  866. /* They never gave us buffers */
  867. cam->state = S_IDLE;
  868. return 0;
  869. }
  870. if (cam->state != S_STREAMING)
  871. return -EINVAL;
  872. mcam_ctlr_stop_dma(cam);
  873. /*
  874. * VB2 reclaims the buffers, so we need to forget
  875. * about them.
  876. */
  877. spin_lock_irqsave(&cam->dev_lock, flags);
  878. INIT_LIST_HEAD(&cam->buffers);
  879. spin_unlock_irqrestore(&cam->dev_lock, flags);
  880. return 0;
  881. }
  882. static const struct vb2_ops mcam_vb2_ops = {
  883. .queue_setup = mcam_vb_queue_setup,
  884. .buf_queue = mcam_vb_buf_queue,
  885. .start_streaming = mcam_vb_start_streaming,
  886. .stop_streaming = mcam_vb_stop_streaming,
  887. .wait_prepare = mcam_vb_wait_prepare,
  888. .wait_finish = mcam_vb_wait_finish,
  889. };
  890. #ifdef MCAM_MODE_DMA_SG
  891. /*
  892. * Scatter/gather mode uses all of the above functions plus a
  893. * few extras to deal with DMA mapping.
  894. */
  895. static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
  896. {
  897. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  898. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  899. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  900. mvb->dma_desc = dma_alloc_coherent(cam->dev,
  901. ndesc * sizeof(struct mcam_dma_desc),
  902. &mvb->dma_desc_pa, GFP_KERNEL);
  903. if (mvb->dma_desc == NULL) {
  904. cam_err(cam, "Unable to get DMA descriptor array\n");
  905. return -ENOMEM;
  906. }
  907. return 0;
  908. }
  909. static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
  910. {
  911. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  912. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  913. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  914. struct mcam_dma_desc *desc = mvb->dma_desc;
  915. struct scatterlist *sg;
  916. int i;
  917. mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
  918. DMA_FROM_DEVICE);
  919. if (mvb->dma_desc_nent <= 0)
  920. return -EIO; /* Not sure what's right here */
  921. for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
  922. desc->dma_addr = sg_dma_address(sg);
  923. desc->segment_len = sg_dma_len(sg);
  924. desc++;
  925. }
  926. return 0;
  927. }
  928. static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
  929. {
  930. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  931. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  932. dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
  933. return 0;
  934. }
  935. static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
  936. {
  937. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  938. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  939. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  940. dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
  941. mvb->dma_desc, mvb->dma_desc_pa);
  942. }
  943. static const struct vb2_ops mcam_vb2_sg_ops = {
  944. .queue_setup = mcam_vb_queue_setup,
  945. .buf_init = mcam_vb_sg_buf_init,
  946. .buf_prepare = mcam_vb_sg_buf_prepare,
  947. .buf_queue = mcam_vb_buf_queue,
  948. .buf_finish = mcam_vb_sg_buf_finish,
  949. .buf_cleanup = mcam_vb_sg_buf_cleanup,
  950. .start_streaming = mcam_vb_start_streaming,
  951. .stop_streaming = mcam_vb_stop_streaming,
  952. .wait_prepare = mcam_vb_wait_prepare,
  953. .wait_finish = mcam_vb_wait_finish,
  954. };
  955. #endif /* MCAM_MODE_DMA_SG */
  956. static int mcam_setup_vb2(struct mcam_camera *cam)
  957. {
  958. struct vb2_queue *vq = &cam->vb_queue;
  959. memset(vq, 0, sizeof(*vq));
  960. vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  961. vq->drv_priv = cam;
  962. INIT_LIST_HEAD(&cam->buffers);
  963. switch (cam->buffer_mode) {
  964. case B_DMA_contig:
  965. #ifdef MCAM_MODE_DMA_CONTIG
  966. vq->ops = &mcam_vb2_ops;
  967. vq->mem_ops = &vb2_dma_contig_memops;
  968. cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
  969. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  970. cam->dma_setup = mcam_ctlr_dma_contig;
  971. cam->frame_complete = mcam_dma_contig_done;
  972. #endif
  973. break;
  974. case B_DMA_sg:
  975. #ifdef MCAM_MODE_DMA_SG
  976. vq->ops = &mcam_vb2_sg_ops;
  977. vq->mem_ops = &vb2_dma_sg_memops;
  978. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  979. cam->dma_setup = mcam_ctlr_dma_sg;
  980. cam->frame_complete = mcam_dma_sg_done;
  981. #endif
  982. break;
  983. case B_vmalloc:
  984. #ifdef MCAM_MODE_VMALLOC
  985. tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
  986. (unsigned long) cam);
  987. vq->ops = &mcam_vb2_ops;
  988. vq->mem_ops = &vb2_vmalloc_memops;
  989. vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
  990. vq->io_modes = VB2_MMAP;
  991. cam->dma_setup = mcam_ctlr_dma_vmalloc;
  992. cam->frame_complete = mcam_vmalloc_done;
  993. #endif
  994. break;
  995. }
  996. return vb2_queue_init(vq);
  997. }
  998. static void mcam_cleanup_vb2(struct mcam_camera *cam)
  999. {
  1000. vb2_queue_release(&cam->vb_queue);
  1001. #ifdef MCAM_MODE_DMA_CONTIG
  1002. if (cam->buffer_mode == B_DMA_contig)
  1003. vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
  1004. #endif
  1005. }
  1006. /* ---------------------------------------------------------------------- */
  1007. /*
  1008. * The long list of V4L2 ioctl() operations.
  1009. */
  1010. static int mcam_vidioc_streamon(struct file *filp, void *priv,
  1011. enum v4l2_buf_type type)
  1012. {
  1013. struct mcam_camera *cam = filp->private_data;
  1014. int ret;
  1015. mutex_lock(&cam->s_mutex);
  1016. ret = vb2_streamon(&cam->vb_queue, type);
  1017. mutex_unlock(&cam->s_mutex);
  1018. return ret;
  1019. }
  1020. static int mcam_vidioc_streamoff(struct file *filp, void *priv,
  1021. enum v4l2_buf_type type)
  1022. {
  1023. struct mcam_camera *cam = filp->private_data;
  1024. int ret;
  1025. mutex_lock(&cam->s_mutex);
  1026. ret = vb2_streamoff(&cam->vb_queue, type);
  1027. mutex_unlock(&cam->s_mutex);
  1028. return ret;
  1029. }
  1030. static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
  1031. struct v4l2_requestbuffers *req)
  1032. {
  1033. struct mcam_camera *cam = filp->private_data;
  1034. int ret;
  1035. mutex_lock(&cam->s_mutex);
  1036. ret = vb2_reqbufs(&cam->vb_queue, req);
  1037. mutex_unlock(&cam->s_mutex);
  1038. return ret;
  1039. }
  1040. static int mcam_vidioc_querybuf(struct file *filp, void *priv,
  1041. struct v4l2_buffer *buf)
  1042. {
  1043. struct mcam_camera *cam = filp->private_data;
  1044. int ret;
  1045. mutex_lock(&cam->s_mutex);
  1046. ret = vb2_querybuf(&cam->vb_queue, buf);
  1047. mutex_unlock(&cam->s_mutex);
  1048. return ret;
  1049. }
  1050. static int mcam_vidioc_qbuf(struct file *filp, void *priv,
  1051. struct v4l2_buffer *buf)
  1052. {
  1053. struct mcam_camera *cam = filp->private_data;
  1054. int ret;
  1055. mutex_lock(&cam->s_mutex);
  1056. ret = vb2_qbuf(&cam->vb_queue, buf);
  1057. mutex_unlock(&cam->s_mutex);
  1058. return ret;
  1059. }
  1060. static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
  1061. struct v4l2_buffer *buf)
  1062. {
  1063. struct mcam_camera *cam = filp->private_data;
  1064. int ret;
  1065. mutex_lock(&cam->s_mutex);
  1066. ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
  1067. mutex_unlock(&cam->s_mutex);
  1068. return ret;
  1069. }
  1070. static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
  1071. struct v4l2_queryctrl *qc)
  1072. {
  1073. struct mcam_camera *cam = priv;
  1074. int ret;
  1075. mutex_lock(&cam->s_mutex);
  1076. ret = sensor_call(cam, core, queryctrl, qc);
  1077. mutex_unlock(&cam->s_mutex);
  1078. return ret;
  1079. }
  1080. static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
  1081. struct v4l2_control *ctrl)
  1082. {
  1083. struct mcam_camera *cam = priv;
  1084. int ret;
  1085. mutex_lock(&cam->s_mutex);
  1086. ret = sensor_call(cam, core, g_ctrl, ctrl);
  1087. mutex_unlock(&cam->s_mutex);
  1088. return ret;
  1089. }
  1090. static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
  1091. struct v4l2_control *ctrl)
  1092. {
  1093. struct mcam_camera *cam = priv;
  1094. int ret;
  1095. mutex_lock(&cam->s_mutex);
  1096. ret = sensor_call(cam, core, s_ctrl, ctrl);
  1097. mutex_unlock(&cam->s_mutex);
  1098. return ret;
  1099. }
  1100. static int mcam_vidioc_querycap(struct file *file, void *priv,
  1101. struct v4l2_capability *cap)
  1102. {
  1103. strcpy(cap->driver, "marvell_ccic");
  1104. strcpy(cap->card, "marvell_ccic");
  1105. cap->version = 1;
  1106. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
  1107. V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  1108. return 0;
  1109. }
  1110. static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
  1111. void *priv, struct v4l2_fmtdesc *fmt)
  1112. {
  1113. if (fmt->index >= N_MCAM_FMTS)
  1114. return -EINVAL;
  1115. strlcpy(fmt->description, mcam_formats[fmt->index].desc,
  1116. sizeof(fmt->description));
  1117. fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
  1118. return 0;
  1119. }
  1120. static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
  1121. struct v4l2_format *fmt)
  1122. {
  1123. struct mcam_camera *cam = priv;
  1124. struct mcam_format_struct *f;
  1125. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  1126. struct v4l2_mbus_framefmt mbus_fmt;
  1127. int ret;
  1128. f = mcam_find_format(pix->pixelformat);
  1129. pix->pixelformat = f->pixelformat;
  1130. v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
  1131. mutex_lock(&cam->s_mutex);
  1132. ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
  1133. mutex_unlock(&cam->s_mutex);
  1134. v4l2_fill_pix_format(pix, &mbus_fmt);
  1135. pix->bytesperline = pix->width * f->bpp;
  1136. pix->sizeimage = pix->height * pix->bytesperline;
  1137. return ret;
  1138. }
  1139. static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
  1140. struct v4l2_format *fmt)
  1141. {
  1142. struct mcam_camera *cam = priv;
  1143. struct mcam_format_struct *f;
  1144. int ret;
  1145. /*
  1146. * Can't do anything if the device is not idle
  1147. * Also can't if there are streaming buffers in place.
  1148. */
  1149. if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
  1150. return -EBUSY;
  1151. f = mcam_find_format(fmt->fmt.pix.pixelformat);
  1152. /*
  1153. * See if the formatting works in principle.
  1154. */
  1155. ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
  1156. if (ret)
  1157. return ret;
  1158. /*
  1159. * Now we start to change things for real, so let's do it
  1160. * under lock.
  1161. */
  1162. mutex_lock(&cam->s_mutex);
  1163. cam->pix_format = fmt->fmt.pix;
  1164. cam->mbus_code = f->mbus_code;
  1165. /*
  1166. * Make sure we have appropriate DMA buffers.
  1167. */
  1168. if (cam->buffer_mode == B_vmalloc) {
  1169. ret = mcam_check_dma_buffers(cam);
  1170. if (ret)
  1171. goto out;
  1172. }
  1173. mcam_set_config_needed(cam, 1);
  1174. ret = 0;
  1175. out:
  1176. mutex_unlock(&cam->s_mutex);
  1177. return ret;
  1178. }
  1179. /*
  1180. * Return our stored notion of how the camera is/should be configured.
  1181. * The V4l2 spec wants us to be smarter, and actually get this from
  1182. * the camera (and not mess with it at open time). Someday.
  1183. */
  1184. static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
  1185. struct v4l2_format *f)
  1186. {
  1187. struct mcam_camera *cam = priv;
  1188. f->fmt.pix = cam->pix_format;
  1189. return 0;
  1190. }
  1191. /*
  1192. * We only have one input - the sensor - so minimize the nonsense here.
  1193. */
  1194. static int mcam_vidioc_enum_input(struct file *filp, void *priv,
  1195. struct v4l2_input *input)
  1196. {
  1197. if (input->index != 0)
  1198. return -EINVAL;
  1199. input->type = V4L2_INPUT_TYPE_CAMERA;
  1200. input->std = V4L2_STD_ALL; /* Not sure what should go here */
  1201. strcpy(input->name, "Camera");
  1202. return 0;
  1203. }
  1204. static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
  1205. {
  1206. *i = 0;
  1207. return 0;
  1208. }
  1209. static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
  1210. {
  1211. if (i != 0)
  1212. return -EINVAL;
  1213. return 0;
  1214. }
  1215. /* from vivi.c */
  1216. static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
  1217. {
  1218. return 0;
  1219. }
  1220. /*
  1221. * G/S_PARM. Most of this is done by the sensor, but we are
  1222. * the level which controls the number of read buffers.
  1223. */
  1224. static int mcam_vidioc_g_parm(struct file *filp, void *priv,
  1225. struct v4l2_streamparm *parms)
  1226. {
  1227. struct mcam_camera *cam = priv;
  1228. int ret;
  1229. mutex_lock(&cam->s_mutex);
  1230. ret = sensor_call(cam, video, g_parm, parms);
  1231. mutex_unlock(&cam->s_mutex);
  1232. parms->parm.capture.readbuffers = n_dma_bufs;
  1233. return ret;
  1234. }
  1235. static int mcam_vidioc_s_parm(struct file *filp, void *priv,
  1236. struct v4l2_streamparm *parms)
  1237. {
  1238. struct mcam_camera *cam = priv;
  1239. int ret;
  1240. mutex_lock(&cam->s_mutex);
  1241. ret = sensor_call(cam, video, s_parm, parms);
  1242. mutex_unlock(&cam->s_mutex);
  1243. parms->parm.capture.readbuffers = n_dma_bufs;
  1244. return ret;
  1245. }
  1246. static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
  1247. struct v4l2_dbg_chip_ident *chip)
  1248. {
  1249. struct mcam_camera *cam = priv;
  1250. chip->ident = V4L2_IDENT_NONE;
  1251. chip->revision = 0;
  1252. if (v4l2_chip_match_host(&chip->match)) {
  1253. chip->ident = cam->chip_id;
  1254. return 0;
  1255. }
  1256. return sensor_call(cam, core, g_chip_ident, chip);
  1257. }
  1258. static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
  1259. struct v4l2_frmsizeenum *sizes)
  1260. {
  1261. struct mcam_camera *cam = priv;
  1262. int ret;
  1263. mutex_lock(&cam->s_mutex);
  1264. ret = sensor_call(cam, video, enum_framesizes, sizes);
  1265. mutex_unlock(&cam->s_mutex);
  1266. return ret;
  1267. }
  1268. static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
  1269. struct v4l2_frmivalenum *interval)
  1270. {
  1271. struct mcam_camera *cam = priv;
  1272. int ret;
  1273. mutex_lock(&cam->s_mutex);
  1274. ret = sensor_call(cam, video, enum_frameintervals, interval);
  1275. mutex_unlock(&cam->s_mutex);
  1276. return ret;
  1277. }
  1278. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1279. static int mcam_vidioc_g_register(struct file *file, void *priv,
  1280. struct v4l2_dbg_register *reg)
  1281. {
  1282. struct mcam_camera *cam = priv;
  1283. if (v4l2_chip_match_host(&reg->match)) {
  1284. reg->val = mcam_reg_read(cam, reg->reg);
  1285. reg->size = 4;
  1286. return 0;
  1287. }
  1288. return sensor_call(cam, core, g_register, reg);
  1289. }
  1290. static int mcam_vidioc_s_register(struct file *file, void *priv,
  1291. struct v4l2_dbg_register *reg)
  1292. {
  1293. struct mcam_camera *cam = priv;
  1294. if (v4l2_chip_match_host(&reg->match)) {
  1295. mcam_reg_write(cam, reg->reg, reg->val);
  1296. return 0;
  1297. }
  1298. return sensor_call(cam, core, s_register, reg);
  1299. }
  1300. #endif
  1301. static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
  1302. .vidioc_querycap = mcam_vidioc_querycap,
  1303. .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
  1304. .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
  1305. .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
  1306. .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
  1307. .vidioc_enum_input = mcam_vidioc_enum_input,
  1308. .vidioc_g_input = mcam_vidioc_g_input,
  1309. .vidioc_s_input = mcam_vidioc_s_input,
  1310. .vidioc_s_std = mcam_vidioc_s_std,
  1311. .vidioc_reqbufs = mcam_vidioc_reqbufs,
  1312. .vidioc_querybuf = mcam_vidioc_querybuf,
  1313. .vidioc_qbuf = mcam_vidioc_qbuf,
  1314. .vidioc_dqbuf = mcam_vidioc_dqbuf,
  1315. .vidioc_streamon = mcam_vidioc_streamon,
  1316. .vidioc_streamoff = mcam_vidioc_streamoff,
  1317. .vidioc_queryctrl = mcam_vidioc_queryctrl,
  1318. .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
  1319. .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
  1320. .vidioc_g_parm = mcam_vidioc_g_parm,
  1321. .vidioc_s_parm = mcam_vidioc_s_parm,
  1322. .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
  1323. .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
  1324. .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
  1325. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1326. .vidioc_g_register = mcam_vidioc_g_register,
  1327. .vidioc_s_register = mcam_vidioc_s_register,
  1328. #endif
  1329. };
  1330. /* ---------------------------------------------------------------------- */
  1331. /*
  1332. * Our various file operations.
  1333. */
  1334. static int mcam_v4l_open(struct file *filp)
  1335. {
  1336. struct mcam_camera *cam = video_drvdata(filp);
  1337. int ret = 0;
  1338. filp->private_data = cam;
  1339. frames = singles = delivered = 0;
  1340. mutex_lock(&cam->s_mutex);
  1341. if (cam->users == 0) {
  1342. ret = mcam_setup_vb2(cam);
  1343. if (ret)
  1344. goto out;
  1345. mcam_ctlr_power_up(cam);
  1346. __mcam_cam_reset(cam);
  1347. mcam_set_config_needed(cam, 1);
  1348. }
  1349. (cam->users)++;
  1350. out:
  1351. mutex_unlock(&cam->s_mutex);
  1352. return ret;
  1353. }
  1354. static int mcam_v4l_release(struct file *filp)
  1355. {
  1356. struct mcam_camera *cam = filp->private_data;
  1357. cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
  1358. singles, delivered);
  1359. mutex_lock(&cam->s_mutex);
  1360. (cam->users)--;
  1361. if (cam->users == 0) {
  1362. mcam_ctlr_stop_dma(cam);
  1363. mcam_cleanup_vb2(cam);
  1364. mcam_ctlr_power_down(cam);
  1365. if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
  1366. mcam_free_dma_bufs(cam);
  1367. }
  1368. mutex_unlock(&cam->s_mutex);
  1369. return 0;
  1370. }
  1371. static ssize_t mcam_v4l_read(struct file *filp,
  1372. char __user *buffer, size_t len, loff_t *pos)
  1373. {
  1374. struct mcam_camera *cam = filp->private_data;
  1375. int ret;
  1376. mutex_lock(&cam->s_mutex);
  1377. ret = vb2_read(&cam->vb_queue, buffer, len, pos,
  1378. filp->f_flags & O_NONBLOCK);
  1379. mutex_unlock(&cam->s_mutex);
  1380. return ret;
  1381. }
  1382. static unsigned int mcam_v4l_poll(struct file *filp,
  1383. struct poll_table_struct *pt)
  1384. {
  1385. struct mcam_camera *cam = filp->private_data;
  1386. int ret;
  1387. mutex_lock(&cam->s_mutex);
  1388. ret = vb2_poll(&cam->vb_queue, filp, pt);
  1389. mutex_unlock(&cam->s_mutex);
  1390. return ret;
  1391. }
  1392. static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
  1393. {
  1394. struct mcam_camera *cam = filp->private_data;
  1395. int ret;
  1396. mutex_lock(&cam->s_mutex);
  1397. ret = vb2_mmap(&cam->vb_queue, vma);
  1398. mutex_unlock(&cam->s_mutex);
  1399. return ret;
  1400. }
  1401. static const struct v4l2_file_operations mcam_v4l_fops = {
  1402. .owner = THIS_MODULE,
  1403. .open = mcam_v4l_open,
  1404. .release = mcam_v4l_release,
  1405. .read = mcam_v4l_read,
  1406. .poll = mcam_v4l_poll,
  1407. .mmap = mcam_v4l_mmap,
  1408. .unlocked_ioctl = video_ioctl2,
  1409. };
  1410. /*
  1411. * This template device holds all of those v4l2 methods; we
  1412. * clone it for specific real devices.
  1413. */
  1414. static struct video_device mcam_v4l_template = {
  1415. .name = "mcam",
  1416. .tvnorms = V4L2_STD_NTSC_M,
  1417. .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
  1418. .fops = &mcam_v4l_fops,
  1419. .ioctl_ops = &mcam_v4l_ioctl_ops,
  1420. .release = video_device_release_empty,
  1421. };
  1422. /* ---------------------------------------------------------------------- */
  1423. /*
  1424. * Interrupt handler stuff
  1425. */
  1426. static void mcam_frame_complete(struct mcam_camera *cam, int frame)
  1427. {
  1428. /*
  1429. * Basic frame housekeeping.
  1430. */
  1431. set_bit(frame, &cam->flags);
  1432. clear_bit(CF_DMA_ACTIVE, &cam->flags);
  1433. cam->next_buf = frame;
  1434. cam->buf_seq[frame] = ++(cam->sequence);
  1435. frames++;
  1436. /*
  1437. * "This should never happen"
  1438. */
  1439. if (cam->state != S_STREAMING)
  1440. return;
  1441. /*
  1442. * Process the frame and set up the next one.
  1443. */
  1444. cam->frame_complete(cam, frame);
  1445. }
  1446. /*
  1447. * The interrupt handler; this needs to be called from the
  1448. * platform irq handler with the lock held.
  1449. */
  1450. int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
  1451. {
  1452. unsigned int frame, handled = 0;
  1453. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
  1454. /*
  1455. * Handle any frame completions. There really should
  1456. * not be more than one of these, or we have fallen
  1457. * far behind.
  1458. *
  1459. * When running in S/G mode, the frame number lacks any
  1460. * real meaning - there's only one descriptor array - but
  1461. * the controller still picks a different one to signal
  1462. * each time.
  1463. */
  1464. for (frame = 0; frame < cam->nbufs; frame++)
  1465. if (irqs & (IRQ_EOF0 << frame)) {
  1466. mcam_frame_complete(cam, frame);
  1467. handled = 1;
  1468. }
  1469. /*
  1470. * If a frame starts, note that we have DMA active. This
  1471. * code assumes that we won't get multiple frame interrupts
  1472. * at once; may want to rethink that.
  1473. */
  1474. if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
  1475. set_bit(CF_DMA_ACTIVE, &cam->flags);
  1476. handled = 1;
  1477. if (cam->buffer_mode == B_DMA_sg)
  1478. mcam_ctlr_stop(cam);
  1479. }
  1480. return handled;
  1481. }
  1482. /* ---------------------------------------------------------------------- */
  1483. /*
  1484. * Registration and such.
  1485. */
  1486. static struct ov7670_config sensor_cfg = {
  1487. /*
  1488. * Exclude QCIF mode, because it only captures a tiny portion
  1489. * of the sensor FOV
  1490. */
  1491. .min_width = 320,
  1492. .min_height = 240,
  1493. };
  1494. int mccic_register(struct mcam_camera *cam)
  1495. {
  1496. struct i2c_board_info ov7670_info = {
  1497. .type = "ov7670",
  1498. .addr = 0x42 >> 1,
  1499. .platform_data = &sensor_cfg,
  1500. };
  1501. int ret;
  1502. /*
  1503. * Validate the requested buffer mode.
  1504. */
  1505. if (buffer_mode >= 0)
  1506. cam->buffer_mode = buffer_mode;
  1507. if (cam->buffer_mode == B_DMA_sg &&
  1508. cam->chip_id == V4L2_IDENT_CAFE) {
  1509. printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
  1510. "attempting vmalloc mode instead\n");
  1511. cam->buffer_mode = B_vmalloc;
  1512. }
  1513. if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
  1514. printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
  1515. cam->buffer_mode);
  1516. return -EINVAL;
  1517. }
  1518. /*
  1519. * Register with V4L
  1520. */
  1521. ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
  1522. if (ret)
  1523. return ret;
  1524. mutex_init(&cam->s_mutex);
  1525. cam->state = S_NOTREADY;
  1526. mcam_set_config_needed(cam, 1);
  1527. cam->pix_format = mcam_def_pix_format;
  1528. cam->mbus_code = mcam_def_mbus_code;
  1529. INIT_LIST_HEAD(&cam->buffers);
  1530. mcam_ctlr_init(cam);
  1531. /*
  1532. * Try to find the sensor.
  1533. */
  1534. sensor_cfg.clock_speed = cam->clock_speed;
  1535. sensor_cfg.use_smbus = cam->use_smbus;
  1536. cam->sensor_addr = ov7670_info.addr;
  1537. cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
  1538. cam->i2c_adapter, &ov7670_info, NULL);
  1539. if (cam->sensor == NULL) {
  1540. ret = -ENODEV;
  1541. goto out_unregister;
  1542. }
  1543. ret = mcam_cam_init(cam);
  1544. if (ret)
  1545. goto out_unregister;
  1546. /*
  1547. * Get the v4l2 setup done.
  1548. */
  1549. mutex_lock(&cam->s_mutex);
  1550. cam->vdev = mcam_v4l_template;
  1551. cam->vdev.debug = 0;
  1552. cam->vdev.v4l2_dev = &cam->v4l2_dev;
  1553. ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
  1554. if (ret)
  1555. goto out;
  1556. video_set_drvdata(&cam->vdev, cam);
  1557. /*
  1558. * If so requested, try to get our DMA buffers now.
  1559. */
  1560. if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
  1561. if (mcam_alloc_dma_bufs(cam, 1))
  1562. cam_warn(cam, "Unable to alloc DMA buffers at load"
  1563. " will try again later.");
  1564. }
  1565. out:
  1566. mutex_unlock(&cam->s_mutex);
  1567. return ret;
  1568. out_unregister:
  1569. v4l2_device_unregister(&cam->v4l2_dev);
  1570. return ret;
  1571. }
  1572. void mccic_shutdown(struct mcam_camera *cam)
  1573. {
  1574. /*
  1575. * If we have no users (and we really, really should have no
  1576. * users) the device will already be powered down. Trying to
  1577. * take it down again will wedge the machine, which is frowned
  1578. * upon.
  1579. */
  1580. if (cam->users > 0) {
  1581. cam_warn(cam, "Removing a device with users!\n");
  1582. mcam_ctlr_power_down(cam);
  1583. }
  1584. vb2_queue_release(&cam->vb_queue);
  1585. if (cam->buffer_mode == B_vmalloc)
  1586. mcam_free_dma_bufs(cam);
  1587. video_unregister_device(&cam->vdev);
  1588. v4l2_device_unregister(&cam->v4l2_dev);
  1589. }
  1590. /*
  1591. * Power management
  1592. */
  1593. #ifdef CONFIG_PM
  1594. void mccic_suspend(struct mcam_camera *cam)
  1595. {
  1596. mutex_lock(&cam->s_mutex);
  1597. if (cam->users > 0) {
  1598. enum mcam_state cstate = cam->state;
  1599. mcam_ctlr_stop_dma(cam);
  1600. mcam_ctlr_power_down(cam);
  1601. cam->state = cstate;
  1602. }
  1603. mutex_unlock(&cam->s_mutex);
  1604. }
  1605. int mccic_resume(struct mcam_camera *cam)
  1606. {
  1607. int ret = 0;
  1608. mutex_lock(&cam->s_mutex);
  1609. if (cam->users > 0) {
  1610. mcam_ctlr_power_up(cam);
  1611. __mcam_cam_reset(cam);
  1612. } else {
  1613. mcam_ctlr_power_down(cam);
  1614. }
  1615. mutex_unlock(&cam->s_mutex);
  1616. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  1617. if (cam->state == S_STREAMING) {
  1618. /*
  1619. * If there was a buffer in the DMA engine at suspend
  1620. * time, put it back on the queue or we'll forget about it.
  1621. */
  1622. if (cam->buffer_mode == B_DMA_sg && cam->vb_bufs[0])
  1623. list_add(&cam->vb_bufs[0]->queue, &cam->buffers);
  1624. ret = mcam_read_setup(cam);
  1625. }
  1626. return ret;
  1627. }
  1628. #endif /* CONFIG_PM */