ipath_rc.c 50 KB

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  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include "ipath_verbs.h"
  34. #include "ipath_kernel.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  38. u32 psn, u32 pmtu)
  39. {
  40. u32 len;
  41. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  42. ss->sge = wqe->sg_list[0];
  43. ss->sg_list = wqe->sg_list + 1;
  44. ss->num_sge = wqe->wr.num_sge;
  45. ipath_skip_sge(ss, len);
  46. return wqe->length - len;
  47. }
  48. /**
  49. * ipath_init_restart- initialize the qp->s_sge after a restart
  50. * @qp: the QP who's SGE we're restarting
  51. * @wqe: the work queue to initialize the QP's SGE from
  52. *
  53. * The QP s_lock should be held and interrupts disabled.
  54. */
  55. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  56. {
  57. struct ipath_ibdev *dev;
  58. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  59. ib_mtu_enum_to_int(qp->path_mtu));
  60. dev = to_idev(qp->ibqp.device);
  61. spin_lock(&dev->pending_lock);
  62. if (list_empty(&qp->timerwait))
  63. list_add_tail(&qp->timerwait,
  64. &dev->pending[dev->pending_index]);
  65. spin_unlock(&dev->pending_lock);
  66. }
  67. /**
  68. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  69. * @qp: a pointer to the QP
  70. * @ohdr: a pointer to the IB header being constructed
  71. * @pmtu: the path MTU
  72. *
  73. * Return 1 if constructed; otherwise, return 0.
  74. * Note that we are in the responder's side of the QP context.
  75. * Note the QP s_lock must be held.
  76. */
  77. static int ipath_make_rc_ack(struct ipath_qp *qp,
  78. struct ipath_other_headers *ohdr,
  79. u32 pmtu, u32 *bth0p, u32 *bth2p)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  87. hwords = 5;
  88. switch (qp->s_ack_state) {
  89. case OP(RDMA_READ_RESPONSE_LAST):
  90. case OP(RDMA_READ_RESPONSE_ONLY):
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. /*
  93. * We can increment the tail pointer now that the last
  94. * response has been sent instead of only being
  95. * constructed.
  96. */
  97. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  98. qp->s_tail_ack_queue = 0;
  99. /* FALLTHROUGH */
  100. case OP(SEND_ONLY):
  101. case OP(ACKNOWLEDGE):
  102. /* Check for no next entry in the queue. */
  103. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  104. if (qp->s_flags & IPATH_S_ACK_PENDING)
  105. goto normal;
  106. qp->s_ack_state = OP(ACKNOWLEDGE);
  107. goto bail;
  108. }
  109. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  110. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  111. /* Copy SGE state in case we need to resend */
  112. qp->s_ack_rdma_sge = e->rdma_sge;
  113. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  114. len = e->rdma_sge.sge.sge_length;
  115. if (len > pmtu) {
  116. len = pmtu;
  117. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  118. } else
  119. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  120. ohdr->u.aeth = ipath_compute_aeth(qp);
  121. hwords++;
  122. qp->s_ack_rdma_psn = e->psn;
  123. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  124. } else {
  125. /* COMPARE_SWAP or FETCH_ADD */
  126. qp->s_cur_sge = NULL;
  127. len = 0;
  128. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  129. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  130. ohdr->u.at.atomic_ack_eth[0] =
  131. cpu_to_be32(e->atomic_data >> 32);
  132. ohdr->u.at.atomic_ack_eth[1] =
  133. cpu_to_be32(e->atomic_data);
  134. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  135. bth2 = e->psn;
  136. }
  137. bth0 = qp->s_ack_state << 24;
  138. break;
  139. case OP(RDMA_READ_RESPONSE_FIRST):
  140. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  141. /* FALLTHROUGH */
  142. case OP(RDMA_READ_RESPONSE_MIDDLE):
  143. len = qp->s_ack_rdma_sge.sge.sge_length;
  144. if (len > pmtu)
  145. len = pmtu;
  146. else {
  147. ohdr->u.aeth = ipath_compute_aeth(qp);
  148. hwords++;
  149. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  150. }
  151. bth0 = qp->s_ack_state << 24;
  152. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  153. break;
  154. default:
  155. normal:
  156. /*
  157. * Send a regular ACK.
  158. * Set the s_ack_state so we wait until after sending
  159. * the ACK before setting s_ack_state to ACKNOWLEDGE
  160. * (see above).
  161. */
  162. qp->s_ack_state = OP(SEND_ONLY);
  163. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  164. qp->s_cur_sge = NULL;
  165. if (qp->s_nak_state)
  166. ohdr->u.aeth =
  167. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  168. (qp->s_nak_state <<
  169. IPATH_AETH_CREDIT_SHIFT));
  170. else
  171. ohdr->u.aeth = ipath_compute_aeth(qp);
  172. hwords++;
  173. len = 0;
  174. bth0 = OP(ACKNOWLEDGE) << 24;
  175. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  176. }
  177. qp->s_hdrwords = hwords;
  178. qp->s_cur_size = len;
  179. *bth0p = bth0 | (1 << 22); /* Set M bit */
  180. *bth2p = bth2;
  181. return 1;
  182. bail:
  183. return 0;
  184. }
  185. /**
  186. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  187. * @qp: a pointer to the QP
  188. * @ohdr: a pointer to the IB header being constructed
  189. * @pmtu: the path MTU
  190. * @bth0p: pointer to the BTH opcode word
  191. * @bth2p: pointer to the BTH PSN word
  192. *
  193. * Return 1 if constructed; otherwise, return 0.
  194. * Note the QP s_lock must be held and interrupts disabled.
  195. */
  196. int ipath_make_rc_req(struct ipath_qp *qp,
  197. struct ipath_other_headers *ohdr,
  198. u32 pmtu, u32 *bth0p, u32 *bth2p)
  199. {
  200. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  201. struct ipath_sge_state *ss;
  202. struct ipath_swqe *wqe;
  203. u32 hwords;
  204. u32 len;
  205. u32 bth0;
  206. u32 bth2;
  207. char newreq;
  208. /* Sending responses has higher priority over sending requests. */
  209. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  210. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  211. qp->s_ack_state != OP(ACKNOWLEDGE)) &&
  212. ipath_make_rc_ack(qp, ohdr, pmtu, bth0p, bth2p))
  213. goto done;
  214. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  215. qp->s_rnr_timeout || qp->s_wait_credit)
  216. goto bail;
  217. /* Limit the number of packets sent without an ACK. */
  218. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
  219. qp->s_wait_credit = 1;
  220. dev->n_rc_stalls++;
  221. goto bail;
  222. }
  223. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  224. hwords = 5;
  225. bth0 = 1 << 22; /* Set M bit */
  226. /* Send a request. */
  227. wqe = get_swqe_ptr(qp, qp->s_cur);
  228. switch (qp->s_state) {
  229. default:
  230. /*
  231. * Resend an old request or start a new one.
  232. *
  233. * We keep track of the current SWQE so that
  234. * we don't reset the "furthest progress" state
  235. * if we need to back up.
  236. */
  237. newreq = 0;
  238. if (qp->s_cur == qp->s_tail) {
  239. /* Check if send work queue is empty. */
  240. if (qp->s_tail == qp->s_head)
  241. goto bail;
  242. /*
  243. * If a fence is requested, wait for previous
  244. * RDMA read and atomic operations to finish.
  245. */
  246. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  247. qp->s_num_rd_atomic) {
  248. qp->s_flags |= IPATH_S_FENCE_PENDING;
  249. goto bail;
  250. }
  251. wqe->psn = qp->s_next_psn;
  252. newreq = 1;
  253. }
  254. /*
  255. * Note that we have to be careful not to modify the
  256. * original work request since we may need to resend
  257. * it.
  258. */
  259. len = wqe->length;
  260. ss = &qp->s_sge;
  261. bth2 = 0;
  262. switch (wqe->wr.opcode) {
  263. case IB_WR_SEND:
  264. case IB_WR_SEND_WITH_IMM:
  265. /* If no credit, return. */
  266. if (qp->s_lsn != (u32) -1 &&
  267. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  268. goto bail;
  269. wqe->lpsn = wqe->psn;
  270. if (len > pmtu) {
  271. wqe->lpsn += (len - 1) / pmtu;
  272. qp->s_state = OP(SEND_FIRST);
  273. len = pmtu;
  274. break;
  275. }
  276. if (wqe->wr.opcode == IB_WR_SEND)
  277. qp->s_state = OP(SEND_ONLY);
  278. else {
  279. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  280. /* Immediate data comes after the BTH */
  281. ohdr->u.imm_data = wqe->wr.imm_data;
  282. hwords += 1;
  283. }
  284. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  285. bth0 |= 1 << 23;
  286. bth2 = 1 << 31; /* Request ACK. */
  287. if (++qp->s_cur == qp->s_size)
  288. qp->s_cur = 0;
  289. break;
  290. case IB_WR_RDMA_WRITE:
  291. if (newreq && qp->s_lsn != (u32) -1)
  292. qp->s_lsn++;
  293. /* FALLTHROUGH */
  294. case IB_WR_RDMA_WRITE_WITH_IMM:
  295. /* If no credit, return. */
  296. if (qp->s_lsn != (u32) -1 &&
  297. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  298. goto bail;
  299. ohdr->u.rc.reth.vaddr =
  300. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  301. ohdr->u.rc.reth.rkey =
  302. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  303. ohdr->u.rc.reth.length = cpu_to_be32(len);
  304. hwords += sizeof(struct ib_reth) / sizeof(u32);
  305. wqe->lpsn = wqe->psn;
  306. if (len > pmtu) {
  307. wqe->lpsn += (len - 1) / pmtu;
  308. qp->s_state = OP(RDMA_WRITE_FIRST);
  309. len = pmtu;
  310. break;
  311. }
  312. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  313. qp->s_state = OP(RDMA_WRITE_ONLY);
  314. else {
  315. qp->s_state =
  316. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  317. /* Immediate data comes after RETH */
  318. ohdr->u.rc.imm_data = wqe->wr.imm_data;
  319. hwords += 1;
  320. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  321. bth0 |= 1 << 23;
  322. }
  323. bth2 = 1 << 31; /* Request ACK. */
  324. if (++qp->s_cur == qp->s_size)
  325. qp->s_cur = 0;
  326. break;
  327. case IB_WR_RDMA_READ:
  328. /*
  329. * Don't allow more operations to be started
  330. * than the QP limits allow.
  331. */
  332. if (newreq) {
  333. if (qp->s_num_rd_atomic >=
  334. qp->s_max_rd_atomic) {
  335. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  336. goto bail;
  337. }
  338. qp->s_num_rd_atomic++;
  339. if (qp->s_lsn != (u32) -1)
  340. qp->s_lsn++;
  341. /*
  342. * Adjust s_next_psn to count the
  343. * expected number of responses.
  344. */
  345. if (len > pmtu)
  346. qp->s_next_psn += (len - 1) / pmtu;
  347. wqe->lpsn = qp->s_next_psn++;
  348. }
  349. ohdr->u.rc.reth.vaddr =
  350. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  351. ohdr->u.rc.reth.rkey =
  352. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  353. ohdr->u.rc.reth.length = cpu_to_be32(len);
  354. qp->s_state = OP(RDMA_READ_REQUEST);
  355. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  356. ss = NULL;
  357. len = 0;
  358. if (++qp->s_cur == qp->s_size)
  359. qp->s_cur = 0;
  360. break;
  361. case IB_WR_ATOMIC_CMP_AND_SWP:
  362. case IB_WR_ATOMIC_FETCH_AND_ADD:
  363. /*
  364. * Don't allow more operations to be started
  365. * than the QP limits allow.
  366. */
  367. if (newreq) {
  368. if (qp->s_num_rd_atomic >=
  369. qp->s_max_rd_atomic) {
  370. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  371. goto bail;
  372. }
  373. qp->s_num_rd_atomic++;
  374. if (qp->s_lsn != (u32) -1)
  375. qp->s_lsn++;
  376. wqe->lpsn = wqe->psn;
  377. }
  378. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  379. qp->s_state = OP(COMPARE_SWAP);
  380. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  381. wqe->wr.wr.atomic.swap);
  382. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  383. wqe->wr.wr.atomic.compare_add);
  384. } else {
  385. qp->s_state = OP(FETCH_ADD);
  386. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  387. wqe->wr.wr.atomic.compare_add);
  388. ohdr->u.atomic_eth.compare_data = 0;
  389. }
  390. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  391. wqe->wr.wr.atomic.remote_addr >> 32);
  392. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  393. wqe->wr.wr.atomic.remote_addr);
  394. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  395. wqe->wr.wr.atomic.rkey);
  396. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  397. ss = NULL;
  398. len = 0;
  399. if (++qp->s_cur == qp->s_size)
  400. qp->s_cur = 0;
  401. break;
  402. default:
  403. goto bail;
  404. }
  405. qp->s_sge.sge = wqe->sg_list[0];
  406. qp->s_sge.sg_list = wqe->sg_list + 1;
  407. qp->s_sge.num_sge = wqe->wr.num_sge;
  408. qp->s_len = wqe->length;
  409. if (newreq) {
  410. qp->s_tail++;
  411. if (qp->s_tail >= qp->s_size)
  412. qp->s_tail = 0;
  413. }
  414. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  415. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  416. qp->s_psn = wqe->lpsn + 1;
  417. else {
  418. qp->s_psn++;
  419. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  420. qp->s_next_psn = qp->s_psn;
  421. }
  422. /*
  423. * Put the QP on the pending list so lost ACKs will cause
  424. * a retry. More than one request can be pending so the
  425. * QP may already be on the dev->pending list.
  426. */
  427. spin_lock(&dev->pending_lock);
  428. if (list_empty(&qp->timerwait))
  429. list_add_tail(&qp->timerwait,
  430. &dev->pending[dev->pending_index]);
  431. spin_unlock(&dev->pending_lock);
  432. break;
  433. case OP(RDMA_READ_RESPONSE_FIRST):
  434. /*
  435. * This case can only happen if a send is restarted.
  436. * See ipath_restart_rc().
  437. */
  438. ipath_init_restart(qp, wqe);
  439. /* FALLTHROUGH */
  440. case OP(SEND_FIRST):
  441. qp->s_state = OP(SEND_MIDDLE);
  442. /* FALLTHROUGH */
  443. case OP(SEND_MIDDLE):
  444. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  445. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  446. qp->s_next_psn = qp->s_psn;
  447. ss = &qp->s_sge;
  448. len = qp->s_len;
  449. if (len > pmtu) {
  450. len = pmtu;
  451. break;
  452. }
  453. if (wqe->wr.opcode == IB_WR_SEND)
  454. qp->s_state = OP(SEND_LAST);
  455. else {
  456. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  457. /* Immediate data comes after the BTH */
  458. ohdr->u.imm_data = wqe->wr.imm_data;
  459. hwords += 1;
  460. }
  461. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  462. bth0 |= 1 << 23;
  463. bth2 |= 1 << 31; /* Request ACK. */
  464. qp->s_cur++;
  465. if (qp->s_cur >= qp->s_size)
  466. qp->s_cur = 0;
  467. break;
  468. case OP(RDMA_READ_RESPONSE_LAST):
  469. /*
  470. * This case can only happen if a RDMA write is restarted.
  471. * See ipath_restart_rc().
  472. */
  473. ipath_init_restart(qp, wqe);
  474. /* FALLTHROUGH */
  475. case OP(RDMA_WRITE_FIRST):
  476. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  477. /* FALLTHROUGH */
  478. case OP(RDMA_WRITE_MIDDLE):
  479. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  480. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  481. qp->s_next_psn = qp->s_psn;
  482. ss = &qp->s_sge;
  483. len = qp->s_len;
  484. if (len > pmtu) {
  485. len = pmtu;
  486. break;
  487. }
  488. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  489. qp->s_state = OP(RDMA_WRITE_LAST);
  490. else {
  491. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  492. /* Immediate data comes after the BTH */
  493. ohdr->u.imm_data = wqe->wr.imm_data;
  494. hwords += 1;
  495. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  496. bth0 |= 1 << 23;
  497. }
  498. bth2 |= 1 << 31; /* Request ACK. */
  499. qp->s_cur++;
  500. if (qp->s_cur >= qp->s_size)
  501. qp->s_cur = 0;
  502. break;
  503. case OP(RDMA_READ_RESPONSE_MIDDLE):
  504. /*
  505. * This case can only happen if a RDMA read is restarted.
  506. * See ipath_restart_rc().
  507. */
  508. ipath_init_restart(qp, wqe);
  509. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  510. ohdr->u.rc.reth.vaddr =
  511. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  512. ohdr->u.rc.reth.rkey =
  513. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  514. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  515. qp->s_state = OP(RDMA_READ_REQUEST);
  516. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  517. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  518. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  519. qp->s_next_psn = qp->s_psn;
  520. ss = NULL;
  521. len = 0;
  522. qp->s_cur++;
  523. if (qp->s_cur == qp->s_size)
  524. qp->s_cur = 0;
  525. break;
  526. }
  527. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  528. bth2 |= 1 << 31; /* Request ACK. */
  529. qp->s_len -= len;
  530. qp->s_hdrwords = hwords;
  531. qp->s_cur_sge = ss;
  532. qp->s_cur_size = len;
  533. *bth0p = bth0 | (qp->s_state << 24);
  534. *bth2p = bth2;
  535. done:
  536. return 1;
  537. bail:
  538. return 0;
  539. }
  540. /**
  541. * send_rc_ack - Construct an ACK packet and send it
  542. * @qp: a pointer to the QP
  543. *
  544. * This is called from ipath_rc_rcv() and only uses the receive
  545. * side QP state.
  546. * Note that RDMA reads and atomics are handled in the
  547. * send side QP state and tasklet.
  548. */
  549. static void send_rc_ack(struct ipath_qp *qp)
  550. {
  551. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  552. u16 lrh0;
  553. u32 bth0;
  554. u32 hwords;
  555. struct ipath_ib_header hdr;
  556. struct ipath_other_headers *ohdr;
  557. unsigned long flags;
  558. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  559. if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  560. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  561. qp->s_ack_state != OP(ACKNOWLEDGE))
  562. goto queue_ack;
  563. /* Construct the header. */
  564. ohdr = &hdr.u.oth;
  565. lrh0 = IPATH_LRH_BTH;
  566. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  567. hwords = 6;
  568. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  569. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  570. &qp->remote_ah_attr.grh,
  571. hwords, 0);
  572. ohdr = &hdr.u.l.oth;
  573. lrh0 = IPATH_LRH_GRH;
  574. }
  575. /* read pkey_index w/o lock (its atomic) */
  576. bth0 = ipath_get_pkey(dev->dd, qp->s_pkey_index) |
  577. (OP(ACKNOWLEDGE) << 24) | (1 << 22);
  578. if (qp->r_nak_state)
  579. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  580. (qp->r_nak_state <<
  581. IPATH_AETH_CREDIT_SHIFT));
  582. else
  583. ohdr->u.aeth = ipath_compute_aeth(qp);
  584. lrh0 |= qp->remote_ah_attr.sl << 4;
  585. hdr.lrh[0] = cpu_to_be16(lrh0);
  586. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  587. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  588. hdr.lrh[3] = cpu_to_be16(dev->dd->ipath_lid);
  589. ohdr->bth[0] = cpu_to_be32(bth0);
  590. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  591. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  592. /*
  593. * If we can send the ACK, clear the ACK state.
  594. */
  595. if (ipath_verbs_send(dev->dd, hwords, (u32 *) &hdr, 0, NULL) == 0) {
  596. dev->n_unicast_xmit++;
  597. goto done;
  598. }
  599. /*
  600. * We are out of PIO buffers at the moment.
  601. * Pass responsibility for sending the ACK to the
  602. * send tasklet so that when a PIO buffer becomes
  603. * available, the ACK is sent ahead of other outgoing
  604. * packets.
  605. */
  606. dev->n_rc_qacks++;
  607. queue_ack:
  608. spin_lock_irqsave(&qp->s_lock, flags);
  609. qp->s_flags |= IPATH_S_ACK_PENDING;
  610. qp->s_nak_state = qp->r_nak_state;
  611. qp->s_ack_psn = qp->r_ack_psn;
  612. spin_unlock_irqrestore(&qp->s_lock, flags);
  613. /* Call ipath_do_rc_send() in another thread. */
  614. tasklet_hi_schedule(&qp->s_task);
  615. done:
  616. return;
  617. }
  618. /**
  619. * reset_psn - reset the QP state to send starting from PSN
  620. * @qp: the QP
  621. * @psn: the packet sequence number to restart at
  622. *
  623. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  624. * for the given QP.
  625. * Called at interrupt level with the QP s_lock held.
  626. */
  627. static void reset_psn(struct ipath_qp *qp, u32 psn)
  628. {
  629. u32 n = qp->s_last;
  630. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  631. u32 opcode;
  632. qp->s_cur = n;
  633. /*
  634. * If we are starting the request from the beginning,
  635. * let the normal send code handle initialization.
  636. */
  637. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  638. qp->s_state = OP(SEND_LAST);
  639. goto done;
  640. }
  641. /* Find the work request opcode corresponding to the given PSN. */
  642. opcode = wqe->wr.opcode;
  643. for (;;) {
  644. int diff;
  645. if (++n == qp->s_size)
  646. n = 0;
  647. if (n == qp->s_tail)
  648. break;
  649. wqe = get_swqe_ptr(qp, n);
  650. diff = ipath_cmp24(psn, wqe->psn);
  651. if (diff < 0)
  652. break;
  653. qp->s_cur = n;
  654. /*
  655. * If we are starting the request from the beginning,
  656. * let the normal send code handle initialization.
  657. */
  658. if (diff == 0) {
  659. qp->s_state = OP(SEND_LAST);
  660. goto done;
  661. }
  662. opcode = wqe->wr.opcode;
  663. }
  664. /*
  665. * Set the state to restart in the middle of a request.
  666. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  667. * See ipath_do_rc_send().
  668. */
  669. switch (opcode) {
  670. case IB_WR_SEND:
  671. case IB_WR_SEND_WITH_IMM:
  672. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  673. break;
  674. case IB_WR_RDMA_WRITE:
  675. case IB_WR_RDMA_WRITE_WITH_IMM:
  676. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  677. break;
  678. case IB_WR_RDMA_READ:
  679. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  680. break;
  681. default:
  682. /*
  683. * This case shouldn't happen since its only
  684. * one PSN per req.
  685. */
  686. qp->s_state = OP(SEND_LAST);
  687. }
  688. done:
  689. qp->s_psn = psn;
  690. }
  691. /**
  692. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  693. * @qp: the QP to restart
  694. * @psn: packet sequence number for the request
  695. * @wc: the work completion request
  696. *
  697. * The QP s_lock should be held and interrupts disabled.
  698. */
  699. void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
  700. {
  701. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  702. struct ipath_ibdev *dev;
  703. if (qp->s_retry == 0) {
  704. wc->wr_id = wqe->wr.wr_id;
  705. wc->status = IB_WC_RETRY_EXC_ERR;
  706. wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  707. wc->vendor_err = 0;
  708. wc->byte_len = 0;
  709. wc->qp = &qp->ibqp;
  710. wc->src_qp = qp->remote_qpn;
  711. wc->pkey_index = 0;
  712. wc->slid = qp->remote_ah_attr.dlid;
  713. wc->sl = qp->remote_ah_attr.sl;
  714. wc->dlid_path_bits = 0;
  715. wc->port_num = 0;
  716. ipath_sqerror_qp(qp, wc);
  717. goto bail;
  718. }
  719. qp->s_retry--;
  720. /*
  721. * Remove the QP from the timeout queue.
  722. * Note: it may already have been removed by ipath_ib_timer().
  723. */
  724. dev = to_idev(qp->ibqp.device);
  725. spin_lock(&dev->pending_lock);
  726. if (!list_empty(&qp->timerwait))
  727. list_del_init(&qp->timerwait);
  728. spin_unlock(&dev->pending_lock);
  729. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  730. dev->n_rc_resends++;
  731. else
  732. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  733. reset_psn(qp, psn);
  734. tasklet_hi_schedule(&qp->s_task);
  735. bail:
  736. return;
  737. }
  738. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  739. {
  740. if (qp->s_wait_credit) {
  741. qp->s_wait_credit = 0;
  742. tasklet_hi_schedule(&qp->s_task);
  743. }
  744. qp->s_last_psn = psn;
  745. }
  746. /**
  747. * do_rc_ack - process an incoming RC ACK
  748. * @qp: the QP the ACK came in on
  749. * @psn: the packet sequence number of the ACK
  750. * @opcode: the opcode of the request that resulted in the ACK
  751. *
  752. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  753. * for the given QP.
  754. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  755. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  756. */
  757. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
  758. u64 val)
  759. {
  760. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  761. struct ib_wc wc;
  762. struct ipath_swqe *wqe;
  763. int ret = 0;
  764. u32 ack_psn;
  765. int diff;
  766. /*
  767. * Remove the QP from the timeout queue (or RNR timeout queue).
  768. * If ipath_ib_timer() has already removed it,
  769. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  770. * just won't find anything to restart if we ACK everything.
  771. */
  772. spin_lock(&dev->pending_lock);
  773. if (!list_empty(&qp->timerwait))
  774. list_del_init(&qp->timerwait);
  775. spin_unlock(&dev->pending_lock);
  776. /*
  777. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  778. * requests and implicitly NAK RDMA read and atomic requests issued
  779. * before the NAK'ed request. The MSN won't include the NAK'ed
  780. * request but will include an ACK'ed request(s).
  781. */
  782. ack_psn = psn;
  783. if (aeth >> 29)
  784. ack_psn--;
  785. wqe = get_swqe_ptr(qp, qp->s_last);
  786. /*
  787. * The MSN might be for a later WQE than the PSN indicates so
  788. * only complete WQEs that the PSN finishes.
  789. */
  790. while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  791. /*
  792. * RDMA_READ_RESPONSE_ONLY is a special case since
  793. * we want to generate completion events for everything
  794. * before the RDMA read, copy the data, then generate
  795. * the completion for the read.
  796. */
  797. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  798. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  799. diff == 0) {
  800. ret = 1;
  801. goto bail;
  802. }
  803. /*
  804. * If this request is a RDMA read or atomic, and the ACK is
  805. * for a later operation, this ACK NAKs the RDMA read or
  806. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  807. * can ACK a RDMA read and likewise for atomic ops. Note
  808. * that the NAK case can only happen if relaxed ordering is
  809. * used and requests are sent after an RDMA read or atomic
  810. * is sent but before the response is received.
  811. */
  812. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  813. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  814. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  815. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  816. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  817. /*
  818. * The last valid PSN seen is the previous
  819. * request's.
  820. */
  821. update_last_psn(qp, wqe->psn - 1);
  822. /* Retry this request. */
  823. ipath_restart_rc(qp, wqe->psn, &wc);
  824. /*
  825. * No need to process the ACK/NAK since we are
  826. * restarting an earlier request.
  827. */
  828. goto bail;
  829. }
  830. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  831. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  832. *(u64 *) wqe->sg_list[0].vaddr = val;
  833. if (qp->s_num_rd_atomic &&
  834. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  835. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  836. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  837. qp->s_num_rd_atomic--;
  838. /* Restart sending task if fence is complete */
  839. if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  840. !qp->s_num_rd_atomic) {
  841. qp->s_flags &= ~IPATH_S_FENCE_PENDING;
  842. tasklet_hi_schedule(&qp->s_task);
  843. } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
  844. qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
  845. tasklet_hi_schedule(&qp->s_task);
  846. }
  847. }
  848. /* Post a send completion queue entry if requested. */
  849. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  850. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  851. wc.wr_id = wqe->wr.wr_id;
  852. wc.status = IB_WC_SUCCESS;
  853. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  854. wc.vendor_err = 0;
  855. wc.byte_len = wqe->length;
  856. wc.imm_data = 0;
  857. wc.qp = &qp->ibqp;
  858. wc.src_qp = qp->remote_qpn;
  859. wc.wc_flags = 0;
  860. wc.pkey_index = 0;
  861. wc.slid = qp->remote_ah_attr.dlid;
  862. wc.sl = qp->remote_ah_attr.sl;
  863. wc.dlid_path_bits = 0;
  864. wc.port_num = 0;
  865. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  866. }
  867. qp->s_retry = qp->s_retry_cnt;
  868. /*
  869. * If we are completing a request which is in the process of
  870. * being resent, we can stop resending it since we know the
  871. * responder has already seen it.
  872. */
  873. if (qp->s_last == qp->s_cur) {
  874. if (++qp->s_cur >= qp->s_size)
  875. qp->s_cur = 0;
  876. qp->s_last = qp->s_cur;
  877. if (qp->s_last == qp->s_tail)
  878. break;
  879. wqe = get_swqe_ptr(qp, qp->s_cur);
  880. qp->s_state = OP(SEND_LAST);
  881. qp->s_psn = wqe->psn;
  882. } else {
  883. if (++qp->s_last >= qp->s_size)
  884. qp->s_last = 0;
  885. if (qp->s_last == qp->s_tail)
  886. break;
  887. wqe = get_swqe_ptr(qp, qp->s_last);
  888. }
  889. }
  890. switch (aeth >> 29) {
  891. case 0: /* ACK */
  892. dev->n_rc_acks++;
  893. /* If this is a partial ACK, reset the retransmit timer. */
  894. if (qp->s_last != qp->s_tail) {
  895. spin_lock(&dev->pending_lock);
  896. list_add_tail(&qp->timerwait,
  897. &dev->pending[dev->pending_index]);
  898. spin_unlock(&dev->pending_lock);
  899. /*
  900. * If we get a partial ACK for a resent operation,
  901. * we can stop resending the earlier packets and
  902. * continue with the next packet the receiver wants.
  903. */
  904. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  905. reset_psn(qp, psn + 1);
  906. tasklet_hi_schedule(&qp->s_task);
  907. }
  908. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  909. qp->s_state = OP(SEND_LAST);
  910. qp->s_psn = psn + 1;
  911. }
  912. ipath_get_credit(qp, aeth);
  913. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  914. qp->s_retry = qp->s_retry_cnt;
  915. update_last_psn(qp, psn);
  916. ret = 1;
  917. goto bail;
  918. case 1: /* RNR NAK */
  919. dev->n_rnr_naks++;
  920. if (qp->s_last == qp->s_tail)
  921. goto bail;
  922. if (qp->s_rnr_retry == 0) {
  923. wc.status = IB_WC_RNR_RETRY_EXC_ERR;
  924. goto class_b;
  925. }
  926. if (qp->s_rnr_retry_cnt < 7)
  927. qp->s_rnr_retry--;
  928. /* The last valid PSN is the previous PSN. */
  929. update_last_psn(qp, psn - 1);
  930. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  931. dev->n_rc_resends++;
  932. else
  933. dev->n_rc_resends +=
  934. (qp->s_psn - psn) & IPATH_PSN_MASK;
  935. reset_psn(qp, psn);
  936. qp->s_rnr_timeout =
  937. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  938. IPATH_AETH_CREDIT_MASK];
  939. ipath_insert_rnr_queue(qp);
  940. goto bail;
  941. case 3: /* NAK */
  942. if (qp->s_last == qp->s_tail)
  943. goto bail;
  944. /* The last valid PSN is the previous PSN. */
  945. update_last_psn(qp, psn - 1);
  946. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  947. IPATH_AETH_CREDIT_MASK) {
  948. case 0: /* PSN sequence error */
  949. dev->n_seq_naks++;
  950. /*
  951. * Back up to the responder's expected PSN.
  952. * Note that we might get a NAK in the middle of an
  953. * RDMA READ response which terminates the RDMA
  954. * READ.
  955. */
  956. ipath_restart_rc(qp, psn, &wc);
  957. break;
  958. case 1: /* Invalid Request */
  959. wc.status = IB_WC_REM_INV_REQ_ERR;
  960. dev->n_other_naks++;
  961. goto class_b;
  962. case 2: /* Remote Access Error */
  963. wc.status = IB_WC_REM_ACCESS_ERR;
  964. dev->n_other_naks++;
  965. goto class_b;
  966. case 3: /* Remote Operation Error */
  967. wc.status = IB_WC_REM_OP_ERR;
  968. dev->n_other_naks++;
  969. class_b:
  970. wc.wr_id = wqe->wr.wr_id;
  971. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  972. wc.vendor_err = 0;
  973. wc.byte_len = 0;
  974. wc.qp = &qp->ibqp;
  975. wc.src_qp = qp->remote_qpn;
  976. wc.pkey_index = 0;
  977. wc.slid = qp->remote_ah_attr.dlid;
  978. wc.sl = qp->remote_ah_attr.sl;
  979. wc.dlid_path_bits = 0;
  980. wc.port_num = 0;
  981. ipath_sqerror_qp(qp, &wc);
  982. break;
  983. default:
  984. /* Ignore other reserved NAK error codes */
  985. goto reserved;
  986. }
  987. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  988. goto bail;
  989. default: /* 2: reserved */
  990. reserved:
  991. /* Ignore reserved NAK codes. */
  992. goto bail;
  993. }
  994. bail:
  995. return ret;
  996. }
  997. /**
  998. * ipath_rc_rcv_resp - process an incoming RC response packet
  999. * @dev: the device this packet came in on
  1000. * @ohdr: the other headers for this packet
  1001. * @data: the packet data
  1002. * @tlen: the packet length
  1003. * @qp: the QP for this packet
  1004. * @opcode: the opcode for this packet
  1005. * @psn: the packet sequence number for this packet
  1006. * @hdrsize: the header length
  1007. * @pmtu: the path MTU
  1008. * @header_in_data: true if part of the header data is in the data buffer
  1009. *
  1010. * This is called from ipath_rc_rcv() to process an incoming RC response
  1011. * packet for the given QP.
  1012. * Called at interrupt level.
  1013. */
  1014. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  1015. struct ipath_other_headers *ohdr,
  1016. void *data, u32 tlen,
  1017. struct ipath_qp *qp,
  1018. u32 opcode,
  1019. u32 psn, u32 hdrsize, u32 pmtu,
  1020. int header_in_data)
  1021. {
  1022. struct ipath_swqe *wqe;
  1023. unsigned long flags;
  1024. struct ib_wc wc;
  1025. int diff;
  1026. u32 pad;
  1027. u32 aeth;
  1028. u64 val;
  1029. spin_lock_irqsave(&qp->s_lock, flags);
  1030. /* Ignore invalid responses. */
  1031. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1032. goto ack_done;
  1033. /* Ignore duplicate responses. */
  1034. diff = ipath_cmp24(psn, qp->s_last_psn);
  1035. if (unlikely(diff <= 0)) {
  1036. /* Update credits for "ghost" ACKs */
  1037. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1038. if (!header_in_data)
  1039. aeth = be32_to_cpu(ohdr->u.aeth);
  1040. else {
  1041. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1042. data += sizeof(__be32);
  1043. }
  1044. if ((aeth >> 29) == 0)
  1045. ipath_get_credit(qp, aeth);
  1046. }
  1047. goto ack_done;
  1048. }
  1049. if (unlikely(qp->s_last == qp->s_tail))
  1050. goto ack_done;
  1051. wqe = get_swqe_ptr(qp, qp->s_last);
  1052. switch (opcode) {
  1053. case OP(ACKNOWLEDGE):
  1054. case OP(ATOMIC_ACKNOWLEDGE):
  1055. case OP(RDMA_READ_RESPONSE_FIRST):
  1056. if (!header_in_data)
  1057. aeth = be32_to_cpu(ohdr->u.aeth);
  1058. else {
  1059. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1060. data += sizeof(__be32);
  1061. }
  1062. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1063. if (!header_in_data) {
  1064. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1065. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1066. be32_to_cpu(p[1]);
  1067. } else
  1068. val = be64_to_cpu(((__be64 *) data)[0]);
  1069. } else
  1070. val = 0;
  1071. if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
  1072. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1073. goto ack_done;
  1074. hdrsize += 4;
  1075. wqe = get_swqe_ptr(qp, qp->s_last);
  1076. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1077. goto ack_op_err;
  1078. /*
  1079. * If this is a response to a resent RDMA read, we
  1080. * have to be careful to copy the data to the right
  1081. * location.
  1082. */
  1083. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1084. wqe, psn, pmtu);
  1085. goto read_middle;
  1086. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1087. /* no AETH, no ACK */
  1088. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1089. dev->n_rdma_seq++;
  1090. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1091. goto ack_done;
  1092. }
  1093. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1094. goto ack_op_err;
  1095. read_middle:
  1096. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1097. goto ack_len_err;
  1098. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1099. goto ack_len_err;
  1100. /* We got a response so update the timeout. */
  1101. spin_lock(&dev->pending_lock);
  1102. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1103. list_move_tail(&qp->timerwait,
  1104. &dev->pending[dev->pending_index]);
  1105. spin_unlock(&dev->pending_lock);
  1106. /*
  1107. * Update the RDMA receive state but do the copy w/o
  1108. * holding the locks and blocking interrupts.
  1109. */
  1110. qp->s_rdma_read_len -= pmtu;
  1111. update_last_psn(qp, psn);
  1112. spin_unlock_irqrestore(&qp->s_lock, flags);
  1113. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1114. goto bail;
  1115. case OP(RDMA_READ_RESPONSE_ONLY):
  1116. if (!header_in_data)
  1117. aeth = be32_to_cpu(ohdr->u.aeth);
  1118. else
  1119. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1120. if (!do_rc_ack(qp, aeth, psn, opcode, 0))
  1121. goto ack_done;
  1122. /* Get the number of bytes the message was padded by. */
  1123. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1124. /*
  1125. * Check that the data size is >= 0 && <= pmtu.
  1126. * Remember to account for the AETH header (4) and
  1127. * ICRC (4).
  1128. */
  1129. if (unlikely(tlen < (hdrsize + pad + 8)))
  1130. goto ack_len_err;
  1131. /*
  1132. * If this is a response to a resent RDMA read, we
  1133. * have to be careful to copy the data to the right
  1134. * location.
  1135. */
  1136. wqe = get_swqe_ptr(qp, qp->s_last);
  1137. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1138. wqe, psn, pmtu);
  1139. goto read_last;
  1140. case OP(RDMA_READ_RESPONSE_LAST):
  1141. /* ACKs READ req. */
  1142. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1143. dev->n_rdma_seq++;
  1144. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1145. goto ack_done;
  1146. }
  1147. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1148. goto ack_op_err;
  1149. /* Get the number of bytes the message was padded by. */
  1150. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1151. /*
  1152. * Check that the data size is >= 1 && <= pmtu.
  1153. * Remember to account for the AETH header (4) and
  1154. * ICRC (4).
  1155. */
  1156. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1157. goto ack_len_err;
  1158. read_last:
  1159. tlen -= hdrsize + pad + 8;
  1160. if (unlikely(tlen != qp->s_rdma_read_len))
  1161. goto ack_len_err;
  1162. if (!header_in_data)
  1163. aeth = be32_to_cpu(ohdr->u.aeth);
  1164. else {
  1165. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1166. data += sizeof(__be32);
  1167. }
  1168. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1169. (void) do_rc_ack(qp, aeth, psn,
  1170. OP(RDMA_READ_RESPONSE_LAST), 0);
  1171. goto ack_done;
  1172. }
  1173. ack_done:
  1174. spin_unlock_irqrestore(&qp->s_lock, flags);
  1175. goto bail;
  1176. ack_op_err:
  1177. wc.status = IB_WC_LOC_QP_OP_ERR;
  1178. goto ack_err;
  1179. ack_len_err:
  1180. wc.status = IB_WC_LOC_LEN_ERR;
  1181. ack_err:
  1182. wc.wr_id = wqe->wr.wr_id;
  1183. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  1184. wc.vendor_err = 0;
  1185. wc.byte_len = 0;
  1186. wc.imm_data = 0;
  1187. wc.qp = &qp->ibqp;
  1188. wc.src_qp = qp->remote_qpn;
  1189. wc.wc_flags = 0;
  1190. wc.pkey_index = 0;
  1191. wc.slid = qp->remote_ah_attr.dlid;
  1192. wc.sl = qp->remote_ah_attr.sl;
  1193. wc.dlid_path_bits = 0;
  1194. wc.port_num = 0;
  1195. ipath_sqerror_qp(qp, &wc);
  1196. spin_unlock_irqrestore(&qp->s_lock, flags);
  1197. bail:
  1198. return;
  1199. }
  1200. /**
  1201. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1202. * @dev: the device this packet came in on
  1203. * @ohdr: the other headers for this packet
  1204. * @data: the packet data
  1205. * @qp: the QP for this packet
  1206. * @opcode: the opcode for this packet
  1207. * @psn: the packet sequence number for this packet
  1208. * @diff: the difference between the PSN and the expected PSN
  1209. * @header_in_data: true if part of the header data is in the data buffer
  1210. *
  1211. * This is called from ipath_rc_rcv() to process an unexpected
  1212. * incoming RC packet for the given QP.
  1213. * Called at interrupt level.
  1214. * Return 1 if no more processing is needed; otherwise return 0 to
  1215. * schedule a response to be sent.
  1216. */
  1217. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1218. struct ipath_other_headers *ohdr,
  1219. void *data,
  1220. struct ipath_qp *qp,
  1221. u32 opcode,
  1222. u32 psn,
  1223. int diff,
  1224. int header_in_data)
  1225. {
  1226. struct ipath_ack_entry *e;
  1227. u8 i, prev;
  1228. int old_req;
  1229. unsigned long flags;
  1230. if (diff > 0) {
  1231. /*
  1232. * Packet sequence error.
  1233. * A NAK will ACK earlier sends and RDMA writes.
  1234. * Don't queue the NAK if we already sent one.
  1235. */
  1236. if (!qp->r_nak_state) {
  1237. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1238. /* Use the expected PSN. */
  1239. qp->r_ack_psn = qp->r_psn;
  1240. goto send_ack;
  1241. }
  1242. goto done;
  1243. }
  1244. /*
  1245. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1246. * write or atomic op. Don't NAK errors, just silently drop
  1247. * the duplicate request. Note that r_sge, r_len, and
  1248. * r_rcv_len may be in use so don't modify them.
  1249. *
  1250. * We are supposed to ACK the earliest duplicate PSN but we
  1251. * can coalesce an outstanding duplicate ACK. We have to
  1252. * send the earliest so that RDMA reads can be restarted at
  1253. * the requester's expected PSN.
  1254. *
  1255. * First, find where this duplicate PSN falls within the
  1256. * ACKs previously sent.
  1257. */
  1258. psn &= IPATH_PSN_MASK;
  1259. e = NULL;
  1260. old_req = 1;
  1261. spin_lock_irqsave(&qp->s_lock, flags);
  1262. for (i = qp->r_head_ack_queue; ; i = prev) {
  1263. if (i == qp->s_tail_ack_queue)
  1264. old_req = 0;
  1265. if (i)
  1266. prev = i - 1;
  1267. else
  1268. prev = IPATH_MAX_RDMA_ATOMIC;
  1269. if (prev == qp->r_head_ack_queue) {
  1270. e = NULL;
  1271. break;
  1272. }
  1273. e = &qp->s_ack_queue[prev];
  1274. if (!e->opcode) {
  1275. e = NULL;
  1276. break;
  1277. }
  1278. if (ipath_cmp24(psn, e->psn) >= 0) {
  1279. if (prev == qp->s_tail_ack_queue)
  1280. old_req = 0;
  1281. break;
  1282. }
  1283. }
  1284. switch (opcode) {
  1285. case OP(RDMA_READ_REQUEST): {
  1286. struct ib_reth *reth;
  1287. u32 offset;
  1288. u32 len;
  1289. /*
  1290. * If we didn't find the RDMA read request in the ack queue,
  1291. * or the send tasklet is already backed up to send an
  1292. * earlier entry, we can ignore this request.
  1293. */
  1294. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1295. goto unlock_done;
  1296. /* RETH comes after BTH */
  1297. if (!header_in_data)
  1298. reth = &ohdr->u.rc.reth;
  1299. else {
  1300. reth = (struct ib_reth *)data;
  1301. data += sizeof(*reth);
  1302. }
  1303. /*
  1304. * Address range must be a subset of the original
  1305. * request and start on pmtu boundaries.
  1306. * We reuse the old ack_queue slot since the requester
  1307. * should not back up and request an earlier PSN for the
  1308. * same request.
  1309. */
  1310. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1311. ib_mtu_enum_to_int(qp->path_mtu);
  1312. len = be32_to_cpu(reth->length);
  1313. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1314. goto unlock_done;
  1315. if (len != 0) {
  1316. u32 rkey = be32_to_cpu(reth->rkey);
  1317. u64 vaddr = be64_to_cpu(reth->vaddr);
  1318. int ok;
  1319. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1320. len, vaddr, rkey,
  1321. IB_ACCESS_REMOTE_READ);
  1322. if (unlikely(!ok))
  1323. goto unlock_done;
  1324. } else {
  1325. e->rdma_sge.sg_list = NULL;
  1326. e->rdma_sge.num_sge = 0;
  1327. e->rdma_sge.sge.mr = NULL;
  1328. e->rdma_sge.sge.vaddr = NULL;
  1329. e->rdma_sge.sge.length = 0;
  1330. e->rdma_sge.sge.sge_length = 0;
  1331. }
  1332. e->psn = psn;
  1333. qp->s_ack_state = OP(ACKNOWLEDGE);
  1334. qp->s_tail_ack_queue = prev;
  1335. break;
  1336. }
  1337. case OP(COMPARE_SWAP):
  1338. case OP(FETCH_ADD): {
  1339. /*
  1340. * If we didn't find the atomic request in the ack queue
  1341. * or the send tasklet is already backed up to send an
  1342. * earlier entry, we can ignore this request.
  1343. */
  1344. if (!e || e->opcode != (u8) opcode || old_req)
  1345. goto unlock_done;
  1346. qp->s_ack_state = OP(ACKNOWLEDGE);
  1347. qp->s_tail_ack_queue = prev;
  1348. break;
  1349. }
  1350. default:
  1351. if (old_req)
  1352. goto unlock_done;
  1353. /*
  1354. * Resend the most recent ACK if this request is
  1355. * after all the previous RDMA reads and atomics.
  1356. */
  1357. if (i == qp->r_head_ack_queue) {
  1358. spin_unlock_irqrestore(&qp->s_lock, flags);
  1359. qp->r_nak_state = 0;
  1360. qp->r_ack_psn = qp->r_psn - 1;
  1361. goto send_ack;
  1362. }
  1363. /*
  1364. * Resend the RDMA read or atomic op which
  1365. * ACKs this duplicate request.
  1366. */
  1367. qp->s_ack_state = OP(ACKNOWLEDGE);
  1368. qp->s_tail_ack_queue = i;
  1369. break;
  1370. }
  1371. qp->r_nak_state = 0;
  1372. tasklet_hi_schedule(&qp->s_task);
  1373. unlock_done:
  1374. spin_unlock_irqrestore(&qp->s_lock, flags);
  1375. done:
  1376. return 1;
  1377. send_ack:
  1378. return 0;
  1379. }
  1380. static void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1381. {
  1382. unsigned long flags;
  1383. spin_lock_irqsave(&qp->s_lock, flags);
  1384. qp->state = IB_QPS_ERR;
  1385. ipath_error_qp(qp, err);
  1386. spin_unlock_irqrestore(&qp->s_lock, flags);
  1387. }
  1388. /**
  1389. * ipath_rc_rcv - process an incoming RC packet
  1390. * @dev: the device this packet came in on
  1391. * @hdr: the header of this packet
  1392. * @has_grh: true if the header has a GRH
  1393. * @data: the packet data
  1394. * @tlen: the packet length
  1395. * @qp: the QP for this packet
  1396. *
  1397. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1398. * for the given QP.
  1399. * Called at interrupt level.
  1400. */
  1401. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1402. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1403. {
  1404. struct ipath_other_headers *ohdr;
  1405. u32 opcode;
  1406. u32 hdrsize;
  1407. u32 psn;
  1408. u32 pad;
  1409. struct ib_wc wc;
  1410. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1411. int diff;
  1412. struct ib_reth *reth;
  1413. int header_in_data;
  1414. /* Validate the SLID. See Ch. 9.6.1.5 */
  1415. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1416. goto done;
  1417. /* Check for GRH */
  1418. if (!has_grh) {
  1419. ohdr = &hdr->u.oth;
  1420. hdrsize = 8 + 12; /* LRH + BTH */
  1421. psn = be32_to_cpu(ohdr->bth[2]);
  1422. header_in_data = 0;
  1423. } else {
  1424. ohdr = &hdr->u.l.oth;
  1425. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1426. /*
  1427. * The header with GRH is 60 bytes and the core driver sets
  1428. * the eager header buffer size to 56 bytes so the last 4
  1429. * bytes of the BTH header (PSN) is in the data buffer.
  1430. */
  1431. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1432. if (header_in_data) {
  1433. psn = be32_to_cpu(((__be32 *) data)[0]);
  1434. data += sizeof(__be32);
  1435. } else
  1436. psn = be32_to_cpu(ohdr->bth[2]);
  1437. }
  1438. /*
  1439. * Process responses (ACKs) before anything else. Note that the
  1440. * packet sequence number will be for something in the send work
  1441. * queue rather than the expected receive packet sequence number.
  1442. * In other words, this QP is the requester.
  1443. */
  1444. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1445. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1446. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1447. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1448. hdrsize, pmtu, header_in_data);
  1449. goto done;
  1450. }
  1451. /* Compute 24 bits worth of difference. */
  1452. diff = ipath_cmp24(psn, qp->r_psn);
  1453. if (unlikely(diff)) {
  1454. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1455. psn, diff, header_in_data))
  1456. goto done;
  1457. goto send_ack;
  1458. }
  1459. /* Check for opcode sequence errors. */
  1460. switch (qp->r_state) {
  1461. case OP(SEND_FIRST):
  1462. case OP(SEND_MIDDLE):
  1463. if (opcode == OP(SEND_MIDDLE) ||
  1464. opcode == OP(SEND_LAST) ||
  1465. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1466. break;
  1467. nack_inv:
  1468. ipath_rc_error(qp, IB_WC_REM_INV_REQ_ERR);
  1469. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1470. qp->r_ack_psn = qp->r_psn;
  1471. goto send_ack;
  1472. case OP(RDMA_WRITE_FIRST):
  1473. case OP(RDMA_WRITE_MIDDLE):
  1474. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1475. opcode == OP(RDMA_WRITE_LAST) ||
  1476. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1477. break;
  1478. goto nack_inv;
  1479. default:
  1480. if (opcode == OP(SEND_MIDDLE) ||
  1481. opcode == OP(SEND_LAST) ||
  1482. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1483. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1484. opcode == OP(RDMA_WRITE_LAST) ||
  1485. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1486. goto nack_inv;
  1487. /*
  1488. * Note that it is up to the requester to not send a new
  1489. * RDMA read or atomic operation before receiving an ACK
  1490. * for the previous operation.
  1491. */
  1492. break;
  1493. }
  1494. wc.imm_data = 0;
  1495. wc.wc_flags = 0;
  1496. /* OK, process the packet. */
  1497. switch (opcode) {
  1498. case OP(SEND_FIRST):
  1499. if (!ipath_get_rwqe(qp, 0)) {
  1500. rnr_nak:
  1501. /*
  1502. * A RNR NAK will ACK earlier sends and RDMA writes.
  1503. * Don't queue the NAK if a RDMA read or atomic
  1504. * is pending though.
  1505. */
  1506. if (qp->r_nak_state)
  1507. goto done;
  1508. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1509. qp->r_ack_psn = qp->r_psn;
  1510. goto send_ack;
  1511. }
  1512. qp->r_rcv_len = 0;
  1513. /* FALLTHROUGH */
  1514. case OP(SEND_MIDDLE):
  1515. case OP(RDMA_WRITE_MIDDLE):
  1516. send_middle:
  1517. /* Check for invalid length PMTU or posted rwqe len. */
  1518. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1519. goto nack_inv;
  1520. qp->r_rcv_len += pmtu;
  1521. if (unlikely(qp->r_rcv_len > qp->r_len))
  1522. goto nack_inv;
  1523. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1524. break;
  1525. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1526. /* consume RWQE */
  1527. if (!ipath_get_rwqe(qp, 1))
  1528. goto rnr_nak;
  1529. goto send_last_imm;
  1530. case OP(SEND_ONLY):
  1531. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1532. if (!ipath_get_rwqe(qp, 0))
  1533. goto rnr_nak;
  1534. qp->r_rcv_len = 0;
  1535. if (opcode == OP(SEND_ONLY))
  1536. goto send_last;
  1537. /* FALLTHROUGH */
  1538. case OP(SEND_LAST_WITH_IMMEDIATE):
  1539. send_last_imm:
  1540. if (header_in_data) {
  1541. wc.imm_data = *(__be32 *) data;
  1542. data += sizeof(__be32);
  1543. } else {
  1544. /* Immediate data comes after BTH */
  1545. wc.imm_data = ohdr->u.imm_data;
  1546. }
  1547. hdrsize += 4;
  1548. wc.wc_flags = IB_WC_WITH_IMM;
  1549. /* FALLTHROUGH */
  1550. case OP(SEND_LAST):
  1551. case OP(RDMA_WRITE_LAST):
  1552. send_last:
  1553. /* Get the number of bytes the message was padded by. */
  1554. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1555. /* Check for invalid length. */
  1556. /* XXX LAST len should be >= 1 */
  1557. if (unlikely(tlen < (hdrsize + pad + 4)))
  1558. goto nack_inv;
  1559. /* Don't count the CRC. */
  1560. tlen -= (hdrsize + pad + 4);
  1561. wc.byte_len = tlen + qp->r_rcv_len;
  1562. if (unlikely(wc.byte_len > qp->r_len))
  1563. goto nack_inv;
  1564. ipath_copy_sge(&qp->r_sge, data, tlen);
  1565. qp->r_msn++;
  1566. if (!qp->r_wrid_valid)
  1567. break;
  1568. qp->r_wrid_valid = 0;
  1569. wc.wr_id = qp->r_wr_id;
  1570. wc.status = IB_WC_SUCCESS;
  1571. wc.opcode = IB_WC_RECV;
  1572. wc.vendor_err = 0;
  1573. wc.qp = &qp->ibqp;
  1574. wc.src_qp = qp->remote_qpn;
  1575. wc.pkey_index = 0;
  1576. wc.slid = qp->remote_ah_attr.dlid;
  1577. wc.sl = qp->remote_ah_attr.sl;
  1578. wc.dlid_path_bits = 0;
  1579. wc.port_num = 0;
  1580. /* Signal completion event if the solicited bit is set. */
  1581. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1582. (ohdr->bth[0] &
  1583. __constant_cpu_to_be32(1 << 23)) != 0);
  1584. break;
  1585. case OP(RDMA_WRITE_FIRST):
  1586. case OP(RDMA_WRITE_ONLY):
  1587. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1588. /* consume RWQE */
  1589. /* RETH comes after BTH */
  1590. if (!header_in_data)
  1591. reth = &ohdr->u.rc.reth;
  1592. else {
  1593. reth = (struct ib_reth *)data;
  1594. data += sizeof(*reth);
  1595. }
  1596. hdrsize += sizeof(*reth);
  1597. qp->r_len = be32_to_cpu(reth->length);
  1598. qp->r_rcv_len = 0;
  1599. if (qp->r_len != 0) {
  1600. u32 rkey = be32_to_cpu(reth->rkey);
  1601. u64 vaddr = be64_to_cpu(reth->vaddr);
  1602. int ok;
  1603. /* Check rkey & NAK */
  1604. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1605. qp->r_len, vaddr, rkey,
  1606. IB_ACCESS_REMOTE_WRITE);
  1607. if (unlikely(!ok))
  1608. goto nack_acc;
  1609. } else {
  1610. qp->r_sge.sg_list = NULL;
  1611. qp->r_sge.sge.mr = NULL;
  1612. qp->r_sge.sge.vaddr = NULL;
  1613. qp->r_sge.sge.length = 0;
  1614. qp->r_sge.sge.sge_length = 0;
  1615. }
  1616. if (unlikely(!(qp->qp_access_flags &
  1617. IB_ACCESS_REMOTE_WRITE)))
  1618. goto nack_acc;
  1619. if (opcode == OP(RDMA_WRITE_FIRST))
  1620. goto send_middle;
  1621. else if (opcode == OP(RDMA_WRITE_ONLY))
  1622. goto send_last;
  1623. if (!ipath_get_rwqe(qp, 1))
  1624. goto rnr_nak;
  1625. goto send_last_imm;
  1626. case OP(RDMA_READ_REQUEST): {
  1627. struct ipath_ack_entry *e;
  1628. u32 len;
  1629. u8 next;
  1630. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1631. goto nack_acc;
  1632. next = qp->r_head_ack_queue + 1;
  1633. if (next > IPATH_MAX_RDMA_ATOMIC)
  1634. next = 0;
  1635. if (unlikely(next == qp->s_tail_ack_queue))
  1636. goto nack_inv;
  1637. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1638. /* RETH comes after BTH */
  1639. if (!header_in_data)
  1640. reth = &ohdr->u.rc.reth;
  1641. else {
  1642. reth = (struct ib_reth *)data;
  1643. data += sizeof(*reth);
  1644. }
  1645. len = be32_to_cpu(reth->length);
  1646. if (len) {
  1647. u32 rkey = be32_to_cpu(reth->rkey);
  1648. u64 vaddr = be64_to_cpu(reth->vaddr);
  1649. int ok;
  1650. /* Check rkey & NAK */
  1651. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1652. rkey, IB_ACCESS_REMOTE_READ);
  1653. if (unlikely(!ok))
  1654. goto nack_acc;
  1655. /*
  1656. * Update the next expected PSN. We add 1 later
  1657. * below, so only add the remainder here.
  1658. */
  1659. if (len > pmtu)
  1660. qp->r_psn += (len - 1) / pmtu;
  1661. } else {
  1662. e->rdma_sge.sg_list = NULL;
  1663. e->rdma_sge.num_sge = 0;
  1664. e->rdma_sge.sge.mr = NULL;
  1665. e->rdma_sge.sge.vaddr = NULL;
  1666. e->rdma_sge.sge.length = 0;
  1667. e->rdma_sge.sge.sge_length = 0;
  1668. }
  1669. e->opcode = opcode;
  1670. e->psn = psn;
  1671. /*
  1672. * We need to increment the MSN here instead of when we
  1673. * finish sending the result since a duplicate request would
  1674. * increment it more than once.
  1675. */
  1676. qp->r_msn++;
  1677. qp->r_psn++;
  1678. qp->r_state = opcode;
  1679. qp->r_nak_state = 0;
  1680. barrier();
  1681. qp->r_head_ack_queue = next;
  1682. /* Call ipath_do_rc_send() in another thread. */
  1683. tasklet_hi_schedule(&qp->s_task);
  1684. goto done;
  1685. }
  1686. case OP(COMPARE_SWAP):
  1687. case OP(FETCH_ADD): {
  1688. struct ib_atomic_eth *ateth;
  1689. struct ipath_ack_entry *e;
  1690. u64 vaddr;
  1691. atomic64_t *maddr;
  1692. u64 sdata;
  1693. u32 rkey;
  1694. u8 next;
  1695. if (unlikely(!(qp->qp_access_flags &
  1696. IB_ACCESS_REMOTE_ATOMIC)))
  1697. goto nack_acc;
  1698. next = qp->r_head_ack_queue + 1;
  1699. if (next > IPATH_MAX_RDMA_ATOMIC)
  1700. next = 0;
  1701. if (unlikely(next == qp->s_tail_ack_queue))
  1702. goto nack_inv;
  1703. if (!header_in_data)
  1704. ateth = &ohdr->u.atomic_eth;
  1705. else
  1706. ateth = (struct ib_atomic_eth *)data;
  1707. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1708. be32_to_cpu(ateth->vaddr[1]);
  1709. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1710. goto nack_inv;
  1711. rkey = be32_to_cpu(ateth->rkey);
  1712. /* Check rkey & NAK */
  1713. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1714. sizeof(u64), vaddr, rkey,
  1715. IB_ACCESS_REMOTE_ATOMIC)))
  1716. goto nack_acc;
  1717. /* Perform atomic OP and save result. */
  1718. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1719. sdata = be64_to_cpu(ateth->swap_data);
  1720. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1721. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1722. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1723. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1724. be64_to_cpu(ateth->compare_data),
  1725. sdata);
  1726. e->opcode = opcode;
  1727. e->psn = psn & IPATH_PSN_MASK;
  1728. qp->r_msn++;
  1729. qp->r_psn++;
  1730. qp->r_state = opcode;
  1731. qp->r_nak_state = 0;
  1732. barrier();
  1733. qp->r_head_ack_queue = next;
  1734. /* Call ipath_do_rc_send() in another thread. */
  1735. tasklet_hi_schedule(&qp->s_task);
  1736. goto done;
  1737. }
  1738. default:
  1739. /* NAK unknown opcodes. */
  1740. goto nack_inv;
  1741. }
  1742. qp->r_psn++;
  1743. qp->r_state = opcode;
  1744. qp->r_ack_psn = psn;
  1745. qp->r_nak_state = 0;
  1746. /* Send an ACK if requested or required. */
  1747. if (psn & (1 << 31))
  1748. goto send_ack;
  1749. goto done;
  1750. nack_acc:
  1751. ipath_rc_error(qp, IB_WC_REM_ACCESS_ERR);
  1752. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1753. qp->r_ack_psn = qp->r_psn;
  1754. send_ack:
  1755. send_rc_ack(qp);
  1756. done:
  1757. return;
  1758. }