ab8500-core.c 35 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6. * Author: Rabin Vincent <rabin.vincent@stericsson.com>
  7. * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/init.h>
  12. #include <linux/irq.h>
  13. #include <linux/irqdomain.h>
  14. #include <linux/delay.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/module.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/mfd/core.h>
  19. #include <linux/mfd/abx500.h>
  20. #include <linux/mfd/abx500/ab8500.h>
  21. #include <linux/mfd/dbx500-prcmu.h>
  22. #include <linux/regulator/ab8500.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. /*
  26. * Interrupt register offsets
  27. * Bank : 0x0E
  28. */
  29. #define AB8500_IT_SOURCE1_REG 0x00
  30. #define AB8500_IT_SOURCE2_REG 0x01
  31. #define AB8500_IT_SOURCE3_REG 0x02
  32. #define AB8500_IT_SOURCE4_REG 0x03
  33. #define AB8500_IT_SOURCE5_REG 0x04
  34. #define AB8500_IT_SOURCE6_REG 0x05
  35. #define AB8500_IT_SOURCE7_REG 0x06
  36. #define AB8500_IT_SOURCE8_REG 0x07
  37. #define AB9540_IT_SOURCE13_REG 0x0C
  38. #define AB8500_IT_SOURCE19_REG 0x12
  39. #define AB8500_IT_SOURCE20_REG 0x13
  40. #define AB8500_IT_SOURCE21_REG 0x14
  41. #define AB8500_IT_SOURCE22_REG 0x15
  42. #define AB8500_IT_SOURCE23_REG 0x16
  43. #define AB8500_IT_SOURCE24_REG 0x17
  44. /*
  45. * latch registers
  46. */
  47. #define AB8500_IT_LATCH1_REG 0x20
  48. #define AB8500_IT_LATCH2_REG 0x21
  49. #define AB8500_IT_LATCH3_REG 0x22
  50. #define AB8500_IT_LATCH4_REG 0x23
  51. #define AB8500_IT_LATCH5_REG 0x24
  52. #define AB8500_IT_LATCH6_REG 0x25
  53. #define AB8500_IT_LATCH7_REG 0x26
  54. #define AB8500_IT_LATCH8_REG 0x27
  55. #define AB8500_IT_LATCH9_REG 0x28
  56. #define AB8500_IT_LATCH10_REG 0x29
  57. #define AB8500_IT_LATCH12_REG 0x2B
  58. #define AB9540_IT_LATCH13_REG 0x2C
  59. #define AB8500_IT_LATCH19_REG 0x32
  60. #define AB8500_IT_LATCH20_REG 0x33
  61. #define AB8500_IT_LATCH21_REG 0x34
  62. #define AB8500_IT_LATCH22_REG 0x35
  63. #define AB8500_IT_LATCH23_REG 0x36
  64. #define AB8500_IT_LATCH24_REG 0x37
  65. /*
  66. * mask registers
  67. */
  68. #define AB8500_IT_MASK1_REG 0x40
  69. #define AB8500_IT_MASK2_REG 0x41
  70. #define AB8500_IT_MASK3_REG 0x42
  71. #define AB8500_IT_MASK4_REG 0x43
  72. #define AB8500_IT_MASK5_REG 0x44
  73. #define AB8500_IT_MASK6_REG 0x45
  74. #define AB8500_IT_MASK7_REG 0x46
  75. #define AB8500_IT_MASK8_REG 0x47
  76. #define AB8500_IT_MASK9_REG 0x48
  77. #define AB8500_IT_MASK10_REG 0x49
  78. #define AB8500_IT_MASK11_REG 0x4A
  79. #define AB8500_IT_MASK12_REG 0x4B
  80. #define AB8500_IT_MASK13_REG 0x4C
  81. #define AB8500_IT_MASK14_REG 0x4D
  82. #define AB8500_IT_MASK15_REG 0x4E
  83. #define AB8500_IT_MASK16_REG 0x4F
  84. #define AB8500_IT_MASK17_REG 0x50
  85. #define AB8500_IT_MASK18_REG 0x51
  86. #define AB8500_IT_MASK19_REG 0x52
  87. #define AB8500_IT_MASK20_REG 0x53
  88. #define AB8500_IT_MASK21_REG 0x54
  89. #define AB8500_IT_MASK22_REG 0x55
  90. #define AB8500_IT_MASK23_REG 0x56
  91. #define AB8500_IT_MASK24_REG 0x57
  92. /*
  93. * latch hierarchy registers
  94. */
  95. #define AB8500_IT_LATCHHIER1_REG 0x60
  96. #define AB8500_IT_LATCHHIER2_REG 0x61
  97. #define AB8500_IT_LATCHHIER3_REG 0x62
  98. #define AB8500_IT_LATCHHIER_NUM 3
  99. #define AB8500_REV_REG 0x80
  100. #define AB8500_IC_NAME_REG 0x82
  101. #define AB8500_SWITCH_OFF_STATUS 0x00
  102. #define AB8500_TURN_ON_STATUS 0x00
  103. static bool no_bm; /* No battery management */
  104. module_param(no_bm, bool, S_IRUGO);
  105. #define AB9540_MODEM_CTRL2_REG 0x23
  106. #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
  107. /*
  108. * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
  109. * numbers are indexed into this array with (num / 8). The interupts are
  110. * defined in linux/mfd/ab8500.h
  111. *
  112. * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
  113. * offset 0.
  114. */
  115. /* AB8500 support */
  116. static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
  117. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
  118. };
  119. /* AB9540 support */
  120. static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
  121. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
  122. };
  123. static const char ab8500_version_str[][7] = {
  124. [AB8500_VERSION_AB8500] = "AB8500",
  125. [AB8500_VERSION_AB8505] = "AB8505",
  126. [AB8500_VERSION_AB9540] = "AB9540",
  127. [AB8500_VERSION_AB8540] = "AB8540",
  128. };
  129. static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data)
  130. {
  131. int ret;
  132. ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
  133. if (ret < 0)
  134. dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
  135. return ret;
  136. }
  137. static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
  138. u8 data)
  139. {
  140. int ret;
  141. ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
  142. &mask, 1);
  143. if (ret < 0)
  144. dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
  145. return ret;
  146. }
  147. static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr)
  148. {
  149. int ret;
  150. u8 data;
  151. ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
  152. if (ret < 0) {
  153. dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
  154. return ret;
  155. }
  156. return (int)data;
  157. }
  158. static int ab8500_get_chip_id(struct device *dev)
  159. {
  160. struct ab8500 *ab8500;
  161. if (!dev)
  162. return -EINVAL;
  163. ab8500 = dev_get_drvdata(dev->parent);
  164. return ab8500 ? (int)ab8500->chip_id : -EINVAL;
  165. }
  166. static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  167. u8 reg, u8 data)
  168. {
  169. int ret;
  170. /*
  171. * Put the u8 bank and u8 register together into a an u16.
  172. * The bank on higher 8 bits and register in lower 8 bits.
  173. * */
  174. u16 addr = ((u16)bank) << 8 | reg;
  175. dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
  176. mutex_lock(&ab8500->lock);
  177. ret = ab8500->write(ab8500, addr, data);
  178. if (ret < 0)
  179. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  180. addr, ret);
  181. mutex_unlock(&ab8500->lock);
  182. return ret;
  183. }
  184. static int ab8500_set_register(struct device *dev, u8 bank,
  185. u8 reg, u8 value)
  186. {
  187. int ret;
  188. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  189. atomic_inc(&ab8500->transfer_ongoing);
  190. ret = set_register_interruptible(ab8500, bank, reg, value);
  191. atomic_dec(&ab8500->transfer_ongoing);
  192. return ret;
  193. }
  194. static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
  195. u8 reg, u8 *value)
  196. {
  197. int ret;
  198. /* put the u8 bank and u8 reg together into a an u16.
  199. * bank on higher 8 bits and reg in lower */
  200. u16 addr = ((u16)bank) << 8 | reg;
  201. mutex_lock(&ab8500->lock);
  202. ret = ab8500->read(ab8500, addr);
  203. if (ret < 0)
  204. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  205. addr, ret);
  206. else
  207. *value = ret;
  208. mutex_unlock(&ab8500->lock);
  209. dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
  210. return ret;
  211. }
  212. static int ab8500_get_register(struct device *dev, u8 bank,
  213. u8 reg, u8 *value)
  214. {
  215. int ret;
  216. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  217. atomic_inc(&ab8500->transfer_ongoing);
  218. ret = get_register_interruptible(ab8500, bank, reg, value);
  219. atomic_dec(&ab8500->transfer_ongoing);
  220. return ret;
  221. }
  222. static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  223. u8 reg, u8 bitmask, u8 bitvalues)
  224. {
  225. int ret;
  226. /* put the u8 bank and u8 reg together into a an u16.
  227. * bank on higher 8 bits and reg in lower */
  228. u16 addr = ((u16)bank) << 8 | reg;
  229. mutex_lock(&ab8500->lock);
  230. if (ab8500->write_masked == NULL) {
  231. u8 data;
  232. ret = ab8500->read(ab8500, addr);
  233. if (ret < 0) {
  234. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  235. addr, ret);
  236. goto out;
  237. }
  238. data = (u8)ret;
  239. data = (~bitmask & data) | (bitmask & bitvalues);
  240. ret = ab8500->write(ab8500, addr, data);
  241. if (ret < 0)
  242. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  243. addr, ret);
  244. dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
  245. data);
  246. goto out;
  247. }
  248. ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
  249. if (ret < 0)
  250. dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
  251. ret);
  252. out:
  253. mutex_unlock(&ab8500->lock);
  254. return ret;
  255. }
  256. static int ab8500_mask_and_set_register(struct device *dev,
  257. u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
  258. {
  259. int ret;
  260. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  261. atomic_inc(&ab8500->transfer_ongoing);
  262. ret= mask_and_set_register_interruptible(ab8500, bank, reg,
  263. bitmask, bitvalues);
  264. atomic_dec(&ab8500->transfer_ongoing);
  265. return ret;
  266. }
  267. static struct abx500_ops ab8500_ops = {
  268. .get_chip_id = ab8500_get_chip_id,
  269. .get_register = ab8500_get_register,
  270. .set_register = ab8500_set_register,
  271. .get_register_page = NULL,
  272. .set_register_page = NULL,
  273. .mask_and_set_register = ab8500_mask_and_set_register,
  274. .event_registers_startup_state_get = NULL,
  275. .startup_irq_enabled = NULL,
  276. };
  277. static void ab8500_irq_lock(struct irq_data *data)
  278. {
  279. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  280. mutex_lock(&ab8500->irq_lock);
  281. atomic_inc(&ab8500->transfer_ongoing);
  282. }
  283. static void ab8500_irq_sync_unlock(struct irq_data *data)
  284. {
  285. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  286. int i;
  287. for (i = 0; i < ab8500->mask_size; i++) {
  288. u8 old = ab8500->oldmask[i];
  289. u8 new = ab8500->mask[i];
  290. int reg;
  291. if (new == old)
  292. continue;
  293. /*
  294. * Interrupt register 12 doesn't exist prior to AB8500 version
  295. * 2.0
  296. */
  297. if (ab8500->irq_reg_offset[i] == 11 &&
  298. is_ab8500_1p1_or_earlier(ab8500))
  299. continue;
  300. ab8500->oldmask[i] = new;
  301. reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
  302. set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
  303. }
  304. atomic_dec(&ab8500->transfer_ongoing);
  305. mutex_unlock(&ab8500->irq_lock);
  306. }
  307. static void ab8500_irq_mask(struct irq_data *data)
  308. {
  309. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  310. int offset = data->hwirq;
  311. int index = offset / 8;
  312. int mask = 1 << (offset % 8);
  313. ab8500->mask[index] |= mask;
  314. }
  315. static void ab8500_irq_unmask(struct irq_data *data)
  316. {
  317. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  318. int offset = data->hwirq;
  319. int index = offset / 8;
  320. int mask = 1 << (offset % 8);
  321. ab8500->mask[index] &= ~mask;
  322. }
  323. static struct irq_chip ab8500_irq_chip = {
  324. .name = "ab8500",
  325. .irq_bus_lock = ab8500_irq_lock,
  326. .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
  327. .irq_mask = ab8500_irq_mask,
  328. .irq_disable = ab8500_irq_mask,
  329. .irq_unmask = ab8500_irq_unmask,
  330. };
  331. static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
  332. int latch_offset, u8 latch_val)
  333. {
  334. int int_bit = __ffs(latch_val);
  335. int line, i;
  336. do {
  337. int_bit = __ffs(latch_val);
  338. for (i = 0; i < ab8500->mask_size; i++)
  339. if (ab8500->irq_reg_offset[i] == latch_offset)
  340. break;
  341. if (i >= ab8500->mask_size) {
  342. dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
  343. latch_offset);
  344. return -ENXIO;
  345. }
  346. line = (i << 3) + int_bit;
  347. latch_val &= ~(1 << int_bit);
  348. handle_nested_irq(ab8500->irq_base + line);
  349. } while (latch_val);
  350. return 0;
  351. }
  352. static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
  353. int hier_offset, u8 hier_val)
  354. {
  355. int latch_bit, status;
  356. u8 latch_offset, latch_val;
  357. do {
  358. latch_bit = __ffs(hier_val);
  359. latch_offset = (hier_offset << 3) + latch_bit;
  360. /* Fix inconsistent ITFromLatch25 bit mapping... */
  361. if (unlikely(latch_offset == 17))
  362. latch_offset = 24;
  363. status = get_register_interruptible(ab8500,
  364. AB8500_INTERRUPT,
  365. AB8500_IT_LATCH1_REG + latch_offset,
  366. &latch_val);
  367. if (status < 0 || latch_val == 0)
  368. goto discard;
  369. status = ab8500_handle_hierarchical_line(ab8500,
  370. latch_offset, latch_val);
  371. if (status < 0)
  372. return status;
  373. discard:
  374. hier_val &= ~(1 << latch_bit);
  375. } while (hier_val);
  376. return 0;
  377. }
  378. static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
  379. {
  380. struct ab8500 *ab8500 = dev;
  381. u8 i;
  382. dev_vdbg(ab8500->dev, "interrupt\n");
  383. /* Hierarchical interrupt version */
  384. for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
  385. int status;
  386. u8 hier_val;
  387. status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
  388. AB8500_IT_LATCHHIER1_REG + i, &hier_val);
  389. if (status < 0 || hier_val == 0)
  390. continue;
  391. status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
  392. if (status < 0)
  393. break;
  394. }
  395. return IRQ_HANDLED;
  396. }
  397. static irqreturn_t ab8500_irq(int irq, void *dev)
  398. {
  399. struct ab8500 *ab8500 = dev;
  400. int i;
  401. dev_vdbg(ab8500->dev, "interrupt\n");
  402. atomic_inc(&ab8500->transfer_ongoing);
  403. for (i = 0; i < ab8500->mask_size; i++) {
  404. int regoffset = ab8500->irq_reg_offset[i];
  405. int status;
  406. u8 value;
  407. /*
  408. * Interrupt register 12 doesn't exist prior to AB8500 version
  409. * 2.0
  410. */
  411. if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
  412. continue;
  413. status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
  414. AB8500_IT_LATCH1_REG + regoffset, &value);
  415. if (status < 0 || value == 0)
  416. continue;
  417. do {
  418. int bit = __ffs(value);
  419. int line = i * 8 + bit;
  420. handle_nested_irq(ab8500->irq_base + line);
  421. value &= ~(1 << bit);
  422. } while (value);
  423. }
  424. atomic_dec(&ab8500->transfer_ongoing);
  425. return IRQ_HANDLED;
  426. }
  427. /**
  428. * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
  429. *
  430. * @ab8500: ab8500_irq controller to operate on.
  431. * @irq: index of the interrupt requested in the chip IRQs
  432. *
  433. * Useful for drivers to request their own IRQs.
  434. */
  435. int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
  436. {
  437. if (!ab8500)
  438. return -EINVAL;
  439. return irq_create_mapping(ab8500->domain, irq);
  440. }
  441. EXPORT_SYMBOL_GPL(ab8500_irq_get_virq);
  442. static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
  443. irq_hw_number_t hwirq)
  444. {
  445. struct ab8500 *ab8500 = d->host_data;
  446. if (!ab8500)
  447. return -EINVAL;
  448. irq_set_chip_data(virq, ab8500);
  449. irq_set_chip_and_handler(virq, &ab8500_irq_chip,
  450. handle_simple_irq);
  451. irq_set_nested_thread(virq, 1);
  452. #ifdef CONFIG_ARM
  453. set_irq_flags(virq, IRQF_VALID);
  454. #else
  455. irq_set_noprobe(virq);
  456. #endif
  457. return 0;
  458. }
  459. static struct irq_domain_ops ab8500_irq_ops = {
  460. .map = ab8500_irq_map,
  461. .xlate = irq_domain_xlate_twocell,
  462. };
  463. static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
  464. {
  465. int num_irqs;
  466. if (is_ab9540(ab8500))
  467. num_irqs = AB9540_NR_IRQS;
  468. else if (is_ab8505(ab8500))
  469. num_irqs = AB8505_NR_IRQS;
  470. else
  471. num_irqs = AB8500_NR_IRQS;
  472. if (ab8500->irq_base) {
  473. ab8500->domain = irq_domain_add_legacy(
  474. NULL, num_irqs, ab8500->irq_base,
  475. 0, &ab8500_irq_ops, ab8500);
  476. }
  477. else {
  478. ab8500->domain = irq_domain_add_linear(
  479. np, num_irqs, &ab8500_irq_ops, ab8500);
  480. }
  481. if (!ab8500->domain) {
  482. dev_err(ab8500->dev, "Failed to create irqdomain\n");
  483. return -ENOSYS;
  484. }
  485. return 0;
  486. }
  487. int ab8500_suspend(struct ab8500 *ab8500)
  488. {
  489. if (atomic_read(&ab8500->transfer_ongoing))
  490. return -EINVAL;
  491. else
  492. return 0;
  493. }
  494. /* AB8500 GPIO Resources */
  495. static struct resource __devinitdata ab8500_gpio_resources[] = {
  496. {
  497. .name = "GPIO_INT6",
  498. .start = AB8500_INT_GPIO6R,
  499. .end = AB8500_INT_GPIO41F,
  500. .flags = IORESOURCE_IRQ,
  501. }
  502. };
  503. /* AB9540 GPIO Resources */
  504. static struct resource __devinitdata ab9540_gpio_resources[] = {
  505. {
  506. .name = "GPIO_INT6",
  507. .start = AB8500_INT_GPIO6R,
  508. .end = AB8500_INT_GPIO41F,
  509. .flags = IORESOURCE_IRQ,
  510. },
  511. {
  512. .name = "GPIO_INT14",
  513. .start = AB9540_INT_GPIO50R,
  514. .end = AB9540_INT_GPIO54R,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. {
  518. .name = "GPIO_INT15",
  519. .start = AB9540_INT_GPIO50F,
  520. .end = AB9540_INT_GPIO54F,
  521. .flags = IORESOURCE_IRQ,
  522. }
  523. };
  524. static struct resource __devinitdata ab8500_gpadc_resources[] = {
  525. {
  526. .name = "HW_CONV_END",
  527. .start = AB8500_INT_GP_HW_ADC_CONV_END,
  528. .end = AB8500_INT_GP_HW_ADC_CONV_END,
  529. .flags = IORESOURCE_IRQ,
  530. },
  531. {
  532. .name = "SW_CONV_END",
  533. .start = AB8500_INT_GP_SW_ADC_CONV_END,
  534. .end = AB8500_INT_GP_SW_ADC_CONV_END,
  535. .flags = IORESOURCE_IRQ,
  536. },
  537. };
  538. static struct resource __devinitdata ab8500_rtc_resources[] = {
  539. {
  540. .name = "60S",
  541. .start = AB8500_INT_RTC_60S,
  542. .end = AB8500_INT_RTC_60S,
  543. .flags = IORESOURCE_IRQ,
  544. },
  545. {
  546. .name = "ALARM",
  547. .start = AB8500_INT_RTC_ALARM,
  548. .end = AB8500_INT_RTC_ALARM,
  549. .flags = IORESOURCE_IRQ,
  550. },
  551. };
  552. static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
  553. {
  554. .name = "ONKEY_DBF",
  555. .start = AB8500_INT_PON_KEY1DB_F,
  556. .end = AB8500_INT_PON_KEY1DB_F,
  557. .flags = IORESOURCE_IRQ,
  558. },
  559. {
  560. .name = "ONKEY_DBR",
  561. .start = AB8500_INT_PON_KEY1DB_R,
  562. .end = AB8500_INT_PON_KEY1DB_R,
  563. .flags = IORESOURCE_IRQ,
  564. },
  565. };
  566. static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
  567. {
  568. .name = "ACC_DETECT_1DB_F",
  569. .start = AB8500_INT_ACC_DETECT_1DB_F,
  570. .end = AB8500_INT_ACC_DETECT_1DB_F,
  571. .flags = IORESOURCE_IRQ,
  572. },
  573. {
  574. .name = "ACC_DETECT_1DB_R",
  575. .start = AB8500_INT_ACC_DETECT_1DB_R,
  576. .end = AB8500_INT_ACC_DETECT_1DB_R,
  577. .flags = IORESOURCE_IRQ,
  578. },
  579. {
  580. .name = "ACC_DETECT_21DB_F",
  581. .start = AB8500_INT_ACC_DETECT_21DB_F,
  582. .end = AB8500_INT_ACC_DETECT_21DB_F,
  583. .flags = IORESOURCE_IRQ,
  584. },
  585. {
  586. .name = "ACC_DETECT_21DB_R",
  587. .start = AB8500_INT_ACC_DETECT_21DB_R,
  588. .end = AB8500_INT_ACC_DETECT_21DB_R,
  589. .flags = IORESOURCE_IRQ,
  590. },
  591. {
  592. .name = "ACC_DETECT_22DB_F",
  593. .start = AB8500_INT_ACC_DETECT_22DB_F,
  594. .end = AB8500_INT_ACC_DETECT_22DB_F,
  595. .flags = IORESOURCE_IRQ,
  596. },
  597. {
  598. .name = "ACC_DETECT_22DB_R",
  599. .start = AB8500_INT_ACC_DETECT_22DB_R,
  600. .end = AB8500_INT_ACC_DETECT_22DB_R,
  601. .flags = IORESOURCE_IRQ,
  602. },
  603. };
  604. static struct resource __devinitdata ab8500_charger_resources[] = {
  605. {
  606. .name = "MAIN_CH_UNPLUG_DET",
  607. .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
  608. .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
  609. .flags = IORESOURCE_IRQ,
  610. },
  611. {
  612. .name = "MAIN_CHARGE_PLUG_DET",
  613. .start = AB8500_INT_MAIN_CH_PLUG_DET,
  614. .end = AB8500_INT_MAIN_CH_PLUG_DET,
  615. .flags = IORESOURCE_IRQ,
  616. },
  617. {
  618. .name = "VBUS_DET_R",
  619. .start = AB8500_INT_VBUS_DET_R,
  620. .end = AB8500_INT_VBUS_DET_R,
  621. .flags = IORESOURCE_IRQ,
  622. },
  623. {
  624. .name = "VBUS_DET_F",
  625. .start = AB8500_INT_VBUS_DET_F,
  626. .end = AB8500_INT_VBUS_DET_F,
  627. .flags = IORESOURCE_IRQ,
  628. },
  629. {
  630. .name = "USB_LINK_STATUS",
  631. .start = AB8500_INT_USB_LINK_STATUS,
  632. .end = AB8500_INT_USB_LINK_STATUS,
  633. .flags = IORESOURCE_IRQ,
  634. },
  635. {
  636. .name = "VBUS_OVV",
  637. .start = AB8500_INT_VBUS_OVV,
  638. .end = AB8500_INT_VBUS_OVV,
  639. .flags = IORESOURCE_IRQ,
  640. },
  641. {
  642. .name = "USB_CH_TH_PROT_R",
  643. .start = AB8500_INT_USB_CH_TH_PROT_R,
  644. .end = AB8500_INT_USB_CH_TH_PROT_R,
  645. .flags = IORESOURCE_IRQ,
  646. },
  647. {
  648. .name = "USB_CH_TH_PROT_F",
  649. .start = AB8500_INT_USB_CH_TH_PROT_F,
  650. .end = AB8500_INT_USB_CH_TH_PROT_F,
  651. .flags = IORESOURCE_IRQ,
  652. },
  653. {
  654. .name = "MAIN_EXT_CH_NOT_OK",
  655. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  656. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  657. .flags = IORESOURCE_IRQ,
  658. },
  659. {
  660. .name = "MAIN_CH_TH_PROT_R",
  661. .start = AB8500_INT_MAIN_CH_TH_PROT_R,
  662. .end = AB8500_INT_MAIN_CH_TH_PROT_R,
  663. .flags = IORESOURCE_IRQ,
  664. },
  665. {
  666. .name = "MAIN_CH_TH_PROT_F",
  667. .start = AB8500_INT_MAIN_CH_TH_PROT_F,
  668. .end = AB8500_INT_MAIN_CH_TH_PROT_F,
  669. .flags = IORESOURCE_IRQ,
  670. },
  671. {
  672. .name = "USB_CHARGER_NOT_OKR",
  673. .start = AB8500_INT_USB_CHARGER_NOT_OKR,
  674. .end = AB8500_INT_USB_CHARGER_NOT_OKR,
  675. .flags = IORESOURCE_IRQ,
  676. },
  677. {
  678. .name = "CH_WD_EXP",
  679. .start = AB8500_INT_CH_WD_EXP,
  680. .end = AB8500_INT_CH_WD_EXP,
  681. .flags = IORESOURCE_IRQ,
  682. },
  683. };
  684. static struct resource __devinitdata ab8500_btemp_resources[] = {
  685. {
  686. .name = "BAT_CTRL_INDB",
  687. .start = AB8500_INT_BAT_CTRL_INDB,
  688. .end = AB8500_INT_BAT_CTRL_INDB,
  689. .flags = IORESOURCE_IRQ,
  690. },
  691. {
  692. .name = "BTEMP_LOW",
  693. .start = AB8500_INT_BTEMP_LOW,
  694. .end = AB8500_INT_BTEMP_LOW,
  695. .flags = IORESOURCE_IRQ,
  696. },
  697. {
  698. .name = "BTEMP_HIGH",
  699. .start = AB8500_INT_BTEMP_HIGH,
  700. .end = AB8500_INT_BTEMP_HIGH,
  701. .flags = IORESOURCE_IRQ,
  702. },
  703. {
  704. .name = "BTEMP_LOW_MEDIUM",
  705. .start = AB8500_INT_BTEMP_LOW_MEDIUM,
  706. .end = AB8500_INT_BTEMP_LOW_MEDIUM,
  707. .flags = IORESOURCE_IRQ,
  708. },
  709. {
  710. .name = "BTEMP_MEDIUM_HIGH",
  711. .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
  712. .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
  713. .flags = IORESOURCE_IRQ,
  714. },
  715. };
  716. static struct resource __devinitdata ab8500_fg_resources[] = {
  717. {
  718. .name = "NCONV_ACCU",
  719. .start = AB8500_INT_CCN_CONV_ACC,
  720. .end = AB8500_INT_CCN_CONV_ACC,
  721. .flags = IORESOURCE_IRQ,
  722. },
  723. {
  724. .name = "BATT_OVV",
  725. .start = AB8500_INT_BATT_OVV,
  726. .end = AB8500_INT_BATT_OVV,
  727. .flags = IORESOURCE_IRQ,
  728. },
  729. {
  730. .name = "LOW_BAT_F",
  731. .start = AB8500_INT_LOW_BAT_F,
  732. .end = AB8500_INT_LOW_BAT_F,
  733. .flags = IORESOURCE_IRQ,
  734. },
  735. {
  736. .name = "LOW_BAT_R",
  737. .start = AB8500_INT_LOW_BAT_R,
  738. .end = AB8500_INT_LOW_BAT_R,
  739. .flags = IORESOURCE_IRQ,
  740. },
  741. {
  742. .name = "CC_INT_CALIB",
  743. .start = AB8500_INT_CC_INT_CALIB,
  744. .end = AB8500_INT_CC_INT_CALIB,
  745. .flags = IORESOURCE_IRQ,
  746. },
  747. {
  748. .name = "CCEOC",
  749. .start = AB8500_INT_CCEOC,
  750. .end = AB8500_INT_CCEOC,
  751. .flags = IORESOURCE_IRQ,
  752. },
  753. };
  754. static struct resource __devinitdata ab8500_chargalg_resources[] = {};
  755. #ifdef CONFIG_DEBUG_FS
  756. static struct resource __devinitdata ab8500_debug_resources[] = {
  757. {
  758. .name = "IRQ_FIRST",
  759. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  760. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  761. .flags = IORESOURCE_IRQ,
  762. },
  763. {
  764. .name = "IRQ_LAST",
  765. .start = AB8500_INT_XTAL32K_KO,
  766. .end = AB8500_INT_XTAL32K_KO,
  767. .flags = IORESOURCE_IRQ,
  768. },
  769. };
  770. #endif
  771. static struct resource __devinitdata ab8500_usb_resources[] = {
  772. {
  773. .name = "ID_WAKEUP_R",
  774. .start = AB8500_INT_ID_WAKEUP_R,
  775. .end = AB8500_INT_ID_WAKEUP_R,
  776. .flags = IORESOURCE_IRQ,
  777. },
  778. {
  779. .name = "ID_WAKEUP_F",
  780. .start = AB8500_INT_ID_WAKEUP_F,
  781. .end = AB8500_INT_ID_WAKEUP_F,
  782. .flags = IORESOURCE_IRQ,
  783. },
  784. {
  785. .name = "VBUS_DET_F",
  786. .start = AB8500_INT_VBUS_DET_F,
  787. .end = AB8500_INT_VBUS_DET_F,
  788. .flags = IORESOURCE_IRQ,
  789. },
  790. {
  791. .name = "VBUS_DET_R",
  792. .start = AB8500_INT_VBUS_DET_R,
  793. .end = AB8500_INT_VBUS_DET_R,
  794. .flags = IORESOURCE_IRQ,
  795. },
  796. {
  797. .name = "USB_LINK_STATUS",
  798. .start = AB8500_INT_USB_LINK_STATUS,
  799. .end = AB8500_INT_USB_LINK_STATUS,
  800. .flags = IORESOURCE_IRQ,
  801. },
  802. {
  803. .name = "USB_ADP_PROBE_PLUG",
  804. .start = AB8500_INT_ADP_PROBE_PLUG,
  805. .end = AB8500_INT_ADP_PROBE_PLUG,
  806. .flags = IORESOURCE_IRQ,
  807. },
  808. {
  809. .name = "USB_ADP_PROBE_UNPLUG",
  810. .start = AB8500_INT_ADP_PROBE_UNPLUG,
  811. .end = AB8500_INT_ADP_PROBE_UNPLUG,
  812. .flags = IORESOURCE_IRQ,
  813. },
  814. };
  815. static struct resource __devinitdata ab8505_iddet_resources[] = {
  816. {
  817. .name = "KeyDeglitch",
  818. .start = AB8505_INT_KEYDEGLITCH,
  819. .end = AB8505_INT_KEYDEGLITCH,
  820. .flags = IORESOURCE_IRQ,
  821. },
  822. {
  823. .name = "KP",
  824. .start = AB8505_INT_KP,
  825. .end = AB8505_INT_KP,
  826. .flags = IORESOURCE_IRQ,
  827. },
  828. {
  829. .name = "IKP",
  830. .start = AB8505_INT_IKP,
  831. .end = AB8505_INT_IKP,
  832. .flags = IORESOURCE_IRQ,
  833. },
  834. {
  835. .name = "IKR",
  836. .start = AB8505_INT_IKR,
  837. .end = AB8505_INT_IKR,
  838. .flags = IORESOURCE_IRQ,
  839. },
  840. {
  841. .name = "KeyStuck",
  842. .start = AB8505_INT_KEYSTUCK,
  843. .end = AB8505_INT_KEYSTUCK,
  844. .flags = IORESOURCE_IRQ,
  845. },
  846. };
  847. static struct resource __devinitdata ab8500_temp_resources[] = {
  848. {
  849. .name = "AB8500_TEMP_WARM",
  850. .start = AB8500_INT_TEMP_WARM,
  851. .end = AB8500_INT_TEMP_WARM,
  852. .flags = IORESOURCE_IRQ,
  853. },
  854. };
  855. static struct mfd_cell __devinitdata abx500_common_devs[] = {
  856. #ifdef CONFIG_DEBUG_FS
  857. {
  858. .name = "ab8500-debug",
  859. .num_resources = ARRAY_SIZE(ab8500_debug_resources),
  860. .resources = ab8500_debug_resources,
  861. },
  862. #endif
  863. {
  864. .name = "ab8500-sysctrl",
  865. },
  866. {
  867. .name = "ab8500-regulator",
  868. },
  869. {
  870. .name = "ab8500-gpadc",
  871. .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
  872. .resources = ab8500_gpadc_resources,
  873. },
  874. {
  875. .name = "ab8500-rtc",
  876. .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
  877. .resources = ab8500_rtc_resources,
  878. },
  879. {
  880. .name = "ab8500-acc-det",
  881. .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
  882. .resources = ab8500_av_acc_detect_resources,
  883. },
  884. {
  885. .name = "ab8500-poweron-key",
  886. .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
  887. .resources = ab8500_poweronkey_db_resources,
  888. },
  889. {
  890. .name = "ab8500-pwm",
  891. .id = 1,
  892. },
  893. {
  894. .name = "ab8500-pwm",
  895. .id = 2,
  896. },
  897. {
  898. .name = "ab8500-pwm",
  899. .id = 3,
  900. },
  901. { .name = "ab8500-leds", },
  902. {
  903. .name = "ab8500-denc",
  904. },
  905. {
  906. .name = "ab8500-temp",
  907. .num_resources = ARRAY_SIZE(ab8500_temp_resources),
  908. .resources = ab8500_temp_resources,
  909. },
  910. };
  911. static struct mfd_cell __devinitdata ab8500_bm_devs[] = {
  912. {
  913. .name = "ab8500-charger",
  914. .num_resources = ARRAY_SIZE(ab8500_charger_resources),
  915. .resources = ab8500_charger_resources,
  916. },
  917. {
  918. .name = "ab8500-btemp",
  919. .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
  920. .resources = ab8500_btemp_resources,
  921. },
  922. {
  923. .name = "ab8500-fg",
  924. .num_resources = ARRAY_SIZE(ab8500_fg_resources),
  925. .resources = ab8500_fg_resources,
  926. },
  927. {
  928. .name = "ab8500-chargalg",
  929. .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
  930. .resources = ab8500_chargalg_resources,
  931. },
  932. };
  933. static struct mfd_cell __devinitdata ab8500_devs[] = {
  934. {
  935. .name = "ab8500-gpio",
  936. .num_resources = ARRAY_SIZE(ab8500_gpio_resources),
  937. .resources = ab8500_gpio_resources,
  938. },
  939. {
  940. .name = "ab8500-usb",
  941. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  942. .resources = ab8500_usb_resources,
  943. },
  944. {
  945. .name = "ab8500-codec",
  946. },
  947. };
  948. static struct mfd_cell __devinitdata ab9540_devs[] = {
  949. {
  950. .name = "ab8500-gpio",
  951. .num_resources = ARRAY_SIZE(ab9540_gpio_resources),
  952. .resources = ab9540_gpio_resources,
  953. },
  954. {
  955. .name = "ab9540-usb",
  956. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  957. .resources = ab8500_usb_resources,
  958. },
  959. {
  960. .name = "ab9540-codec",
  961. },
  962. };
  963. /* Device list common to ab9540 and ab8505 */
  964. static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = {
  965. {
  966. .name = "ab-iddet",
  967. .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
  968. .resources = ab8505_iddet_resources,
  969. },
  970. };
  971. static ssize_t show_chip_id(struct device *dev,
  972. struct device_attribute *attr, char *buf)
  973. {
  974. struct ab8500 *ab8500;
  975. ab8500 = dev_get_drvdata(dev);
  976. return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
  977. }
  978. /*
  979. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  980. * 0x01 Swoff bit programming
  981. * 0x02 Thermal protection activation
  982. * 0x04 Vbat lower then BattOk falling threshold
  983. * 0x08 Watchdog expired
  984. * 0x10 Non presence of 32kHz clock
  985. * 0x20 Battery level lower than power on reset threshold
  986. * 0x40 Power on key 1 pressed longer than 10 seconds
  987. * 0x80 DB8500 thermal shutdown
  988. */
  989. static ssize_t show_switch_off_status(struct device *dev,
  990. struct device_attribute *attr, char *buf)
  991. {
  992. int ret;
  993. u8 value;
  994. struct ab8500 *ab8500;
  995. ab8500 = dev_get_drvdata(dev);
  996. ret = get_register_interruptible(ab8500, AB8500_RTC,
  997. AB8500_SWITCH_OFF_STATUS, &value);
  998. if (ret < 0)
  999. return ret;
  1000. return sprintf(buf, "%#x\n", value);
  1001. }
  1002. /*
  1003. * ab8500 has turned on due to (TURN_ON_STATUS):
  1004. * 0x01 PORnVbat
  1005. * 0x02 PonKey1dbF
  1006. * 0x04 PonKey2dbF
  1007. * 0x08 RTCAlarm
  1008. * 0x10 MainChDet
  1009. * 0x20 VbusDet
  1010. * 0x40 UsbIDDetect
  1011. * 0x80 Reserved
  1012. */
  1013. static ssize_t show_turn_on_status(struct device *dev,
  1014. struct device_attribute *attr, char *buf)
  1015. {
  1016. int ret;
  1017. u8 value;
  1018. struct ab8500 *ab8500;
  1019. ab8500 = dev_get_drvdata(dev);
  1020. ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
  1021. AB8500_TURN_ON_STATUS, &value);
  1022. if (ret < 0)
  1023. return ret;
  1024. return sprintf(buf, "%#x\n", value);
  1025. }
  1026. static ssize_t show_ab9540_dbbrstn(struct device *dev,
  1027. struct device_attribute *attr, char *buf)
  1028. {
  1029. struct ab8500 *ab8500;
  1030. int ret;
  1031. u8 value;
  1032. ab8500 = dev_get_drvdata(dev);
  1033. ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
  1034. AB9540_MODEM_CTRL2_REG, &value);
  1035. if (ret < 0)
  1036. return ret;
  1037. return sprintf(buf, "%d\n",
  1038. (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
  1039. }
  1040. static ssize_t store_ab9540_dbbrstn(struct device *dev,
  1041. struct device_attribute *attr, const char *buf, size_t count)
  1042. {
  1043. struct ab8500 *ab8500;
  1044. int ret = count;
  1045. int err;
  1046. u8 bitvalues;
  1047. ab8500 = dev_get_drvdata(dev);
  1048. if (count > 0) {
  1049. switch (buf[0]) {
  1050. case '0':
  1051. bitvalues = 0;
  1052. break;
  1053. case '1':
  1054. bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
  1055. break;
  1056. default:
  1057. goto exit;
  1058. }
  1059. err = mask_and_set_register_interruptible(ab8500,
  1060. AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
  1061. AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
  1062. if (err)
  1063. dev_info(ab8500->dev,
  1064. "Failed to set DBBRSTN %c, err %#x\n",
  1065. buf[0], err);
  1066. }
  1067. exit:
  1068. return ret;
  1069. }
  1070. static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
  1071. static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
  1072. static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
  1073. static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
  1074. show_ab9540_dbbrstn, store_ab9540_dbbrstn);
  1075. static struct attribute *ab8500_sysfs_entries[] = {
  1076. &dev_attr_chip_id.attr,
  1077. &dev_attr_switch_off_status.attr,
  1078. &dev_attr_turn_on_status.attr,
  1079. NULL,
  1080. };
  1081. static struct attribute *ab9540_sysfs_entries[] = {
  1082. &dev_attr_chip_id.attr,
  1083. &dev_attr_switch_off_status.attr,
  1084. &dev_attr_turn_on_status.attr,
  1085. &dev_attr_dbbrstn.attr,
  1086. NULL,
  1087. };
  1088. static struct attribute_group ab8500_attr_group = {
  1089. .attrs = ab8500_sysfs_entries,
  1090. };
  1091. static struct attribute_group ab9540_attr_group = {
  1092. .attrs = ab9540_sysfs_entries,
  1093. };
  1094. static const struct of_device_id ab8500_match[] = {
  1095. {
  1096. .compatible = "stericsson,ab8500",
  1097. .data = (void *)AB8500_VERSION_AB8500,
  1098. },
  1099. {},
  1100. };
  1101. static int __devinit ab8500_probe(struct platform_device *pdev)
  1102. {
  1103. struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
  1104. const struct platform_device_id *platid = platform_get_device_id(pdev);
  1105. enum ab8500_version version = AB8500_VERSION_UNDEFINED;
  1106. struct device_node *np = pdev->dev.of_node;
  1107. struct ab8500 *ab8500;
  1108. struct resource *resource;
  1109. int ret;
  1110. int i;
  1111. u8 value;
  1112. ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);
  1113. if (!ab8500)
  1114. return -ENOMEM;
  1115. if (plat)
  1116. ab8500->irq_base = plat->irq_base;
  1117. ab8500->dev = &pdev->dev;
  1118. resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1119. if (!resource) {
  1120. ret = -ENODEV;
  1121. goto out_free_ab8500;
  1122. }
  1123. ab8500->irq = resource->start;
  1124. ab8500->read = ab8500_i2c_read;
  1125. ab8500->write = ab8500_i2c_write;
  1126. ab8500->write_masked = ab8500_i2c_write_masked;
  1127. mutex_init(&ab8500->lock);
  1128. mutex_init(&ab8500->irq_lock);
  1129. atomic_set(&ab8500->transfer_ongoing, 0);
  1130. platform_set_drvdata(pdev, ab8500);
  1131. if (platid)
  1132. version = platid->driver_data;
  1133. else if (np)
  1134. version = (unsigned int)
  1135. of_match_device(ab8500_match, &pdev->dev)->data;
  1136. if (version != AB8500_VERSION_UNDEFINED)
  1137. ab8500->version = version;
  1138. else {
  1139. ret = get_register_interruptible(ab8500, AB8500_MISC,
  1140. AB8500_IC_NAME_REG, &value);
  1141. if (ret < 0)
  1142. goto out_free_ab8500;
  1143. ab8500->version = value;
  1144. }
  1145. ret = get_register_interruptible(ab8500, AB8500_MISC,
  1146. AB8500_REV_REG, &value);
  1147. if (ret < 0)
  1148. goto out_free_ab8500;
  1149. ab8500->chip_id = value;
  1150. dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
  1151. ab8500_version_str[ab8500->version],
  1152. ab8500->chip_id >> 4,
  1153. ab8500->chip_id & 0x0F);
  1154. /* Configure AB8500 or AB9540 IRQ */
  1155. if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
  1156. ab8500->mask_size = AB9540_NUM_IRQ_REGS;
  1157. ab8500->irq_reg_offset = ab9540_irq_regoffset;
  1158. } else {
  1159. ab8500->mask_size = AB8500_NUM_IRQ_REGS;
  1160. ab8500->irq_reg_offset = ab8500_irq_regoffset;
  1161. }
  1162. ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1163. if (!ab8500->mask)
  1164. return -ENOMEM;
  1165. ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1166. if (!ab8500->oldmask) {
  1167. ret = -ENOMEM;
  1168. goto out_freemask;
  1169. }
  1170. /*
  1171. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  1172. * 0x01 Swoff bit programming
  1173. * 0x02 Thermal protection activation
  1174. * 0x04 Vbat lower then BattOk falling threshold
  1175. * 0x08 Watchdog expired
  1176. * 0x10 Non presence of 32kHz clock
  1177. * 0x20 Battery level lower than power on reset threshold
  1178. * 0x40 Power on key 1 pressed longer than 10 seconds
  1179. * 0x80 DB8500 thermal shutdown
  1180. */
  1181. ret = get_register_interruptible(ab8500, AB8500_RTC,
  1182. AB8500_SWITCH_OFF_STATUS, &value);
  1183. if (ret < 0)
  1184. return ret;
  1185. dev_info(ab8500->dev, "switch off status: %#x\n", value);
  1186. if (plat && plat->init)
  1187. plat->init(ab8500);
  1188. /* Clear and mask all interrupts */
  1189. for (i = 0; i < ab8500->mask_size; i++) {
  1190. /*
  1191. * Interrupt register 12 doesn't exist prior to AB8500 version
  1192. * 2.0
  1193. */
  1194. if (ab8500->irq_reg_offset[i] == 11 &&
  1195. is_ab8500_1p1_or_earlier(ab8500))
  1196. continue;
  1197. get_register_interruptible(ab8500, AB8500_INTERRUPT,
  1198. AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
  1199. &value);
  1200. set_register_interruptible(ab8500, AB8500_INTERRUPT,
  1201. AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
  1202. }
  1203. ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
  1204. if (ret)
  1205. goto out_freeoldmask;
  1206. for (i = 0; i < ab8500->mask_size; i++)
  1207. ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
  1208. ret = ab8500_irq_init(ab8500, np);
  1209. if (ret)
  1210. goto out_freeoldmask;
  1211. /* Activate this feature only in ab9540 */
  1212. /* till tests are done on ab8500 1p2 or later*/
  1213. if (is_ab9540(ab8500)) {
  1214. ret = request_threaded_irq(ab8500->irq, NULL,
  1215. ab8500_hierarchical_irq,
  1216. IRQF_ONESHOT | IRQF_NO_SUSPEND,
  1217. "ab8500", ab8500);
  1218. }
  1219. else {
  1220. ret = request_threaded_irq(ab8500->irq, NULL,
  1221. ab8500_irq,
  1222. IRQF_ONESHOT | IRQF_NO_SUSPEND,
  1223. "ab8500", ab8500);
  1224. if (ret)
  1225. goto out_freeoldmask;
  1226. }
  1227. if (!np) {
  1228. ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
  1229. ARRAY_SIZE(abx500_common_devs), NULL,
  1230. ab8500->irq_base);
  1231. if (ret)
  1232. goto out_freeirq;
  1233. if (is_ab9540(ab8500))
  1234. ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
  1235. ARRAY_SIZE(ab9540_devs), NULL,
  1236. ab8500->irq_base);
  1237. else
  1238. ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
  1239. ARRAY_SIZE(ab8500_devs), NULL,
  1240. ab8500->irq_base);
  1241. if (ret)
  1242. goto out_freeirq;
  1243. if (is_ab9540(ab8500) || is_ab8505(ab8500))
  1244. ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
  1245. ARRAY_SIZE(ab9540_ab8505_devs), NULL,
  1246. ab8500->irq_base);
  1247. if (ret)
  1248. goto out_freeirq;
  1249. }
  1250. if (!no_bm) {
  1251. /* Add battery management devices */
  1252. ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
  1253. ARRAY_SIZE(ab8500_bm_devs), NULL,
  1254. ab8500->irq_base);
  1255. if (ret)
  1256. dev_err(ab8500->dev, "error adding bm devices\n");
  1257. }
  1258. if (is_ab9540(ab8500))
  1259. ret = sysfs_create_group(&ab8500->dev->kobj,
  1260. &ab9540_attr_group);
  1261. else
  1262. ret = sysfs_create_group(&ab8500->dev->kobj,
  1263. &ab8500_attr_group);
  1264. if (ret)
  1265. dev_err(ab8500->dev, "error creating sysfs entries\n");
  1266. return ret;
  1267. out_freeirq:
  1268. free_irq(ab8500->irq, ab8500);
  1269. out_freeoldmask:
  1270. kfree(ab8500->oldmask);
  1271. out_freemask:
  1272. kfree(ab8500->mask);
  1273. out_free_ab8500:
  1274. kfree(ab8500);
  1275. return ret;
  1276. }
  1277. static int __devexit ab8500_remove(struct platform_device *pdev)
  1278. {
  1279. struct ab8500 *ab8500 = platform_get_drvdata(pdev);
  1280. if (is_ab9540(ab8500))
  1281. sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
  1282. else
  1283. sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
  1284. mfd_remove_devices(ab8500->dev);
  1285. free_irq(ab8500->irq, ab8500);
  1286. kfree(ab8500->oldmask);
  1287. kfree(ab8500->mask);
  1288. kfree(ab8500);
  1289. return 0;
  1290. }
  1291. static const struct platform_device_id ab8500_id[] = {
  1292. { "ab8500-core", AB8500_VERSION_AB8500 },
  1293. { "ab8505-i2c", AB8500_VERSION_AB8505 },
  1294. { "ab9540-i2c", AB8500_VERSION_AB9540 },
  1295. { "ab8540-i2c", AB8500_VERSION_AB8540 },
  1296. { }
  1297. };
  1298. static struct platform_driver ab8500_core_driver = {
  1299. .driver = {
  1300. .name = "ab8500-core",
  1301. .owner = THIS_MODULE,
  1302. .of_match_table = ab8500_match,
  1303. },
  1304. .probe = ab8500_probe,
  1305. .remove = __devexit_p(ab8500_remove),
  1306. .id_table = ab8500_id,
  1307. };
  1308. static int __init ab8500_core_init(void)
  1309. {
  1310. return platform_driver_register(&ab8500_core_driver);
  1311. }
  1312. static void __exit ab8500_core_exit(void)
  1313. {
  1314. platform_driver_unregister(&ab8500_core_driver);
  1315. }
  1316. arch_initcall(ab8500_core_init);
  1317. module_exit(ab8500_core_exit);
  1318. MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
  1319. MODULE_DESCRIPTION("AB8500 MFD core");
  1320. MODULE_LICENSE("GPL v2");