ssb.h 19 KB

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  1. #ifndef LINUX_SSB_H_
  2. #define LINUX_SSB_H_
  3. #include <linux/device.h>
  4. #include <linux/list.h>
  5. #include <linux/types.h>
  6. #include <linux/spinlock.h>
  7. #include <linux/pci.h>
  8. #include <linux/mod_devicetable.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/ssb/ssb_regs.h>
  11. struct pcmcia_device;
  12. struct ssb_bus;
  13. struct ssb_driver;
  14. struct ssb_sprom {
  15. u8 revision;
  16. u8 il0mac[6]; /* MAC address for 802.11b/g */
  17. u8 et0mac[6]; /* MAC address for Ethernet */
  18. u8 et1mac[6]; /* MAC address for 802.11a */
  19. u8 et0phyaddr; /* MII address for enet0 */
  20. u8 et1phyaddr; /* MII address for enet1 */
  21. u8 et0mdcport; /* MDIO for enet0 */
  22. u8 et1mdcport; /* MDIO for enet1 */
  23. u8 board_rev; /* Board revision number from SPROM. */
  24. u8 country_code; /* Country Code */
  25. u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
  26. u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
  27. u16 pa0b0;
  28. u16 pa0b1;
  29. u16 pa0b2;
  30. u16 pa1b0;
  31. u16 pa1b1;
  32. u16 pa1b2;
  33. u16 pa1lob0;
  34. u16 pa1lob1;
  35. u16 pa1lob2;
  36. u16 pa1hib0;
  37. u16 pa1hib1;
  38. u16 pa1hib2;
  39. u8 gpio0; /* GPIO pin 0 */
  40. u8 gpio1; /* GPIO pin 1 */
  41. u8 gpio2; /* GPIO pin 2 */
  42. u8 gpio3; /* GPIO pin 3 */
  43. u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  44. u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  45. u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  46. u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  47. u8 itssi_a; /* Idle TSSI Target for A-PHY */
  48. u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
  49. u8 tri2g; /* 2.4GHz TX isolation */
  50. u8 tri5gl; /* 5.2GHz TX isolation */
  51. u8 tri5g; /* 5.3GHz TX isolation */
  52. u8 tri5gh; /* 5.8GHz TX isolation */
  53. u8 rxpo2g; /* 2GHz RX power offset */
  54. u8 rxpo5g; /* 5GHz RX power offset */
  55. u8 rssisav2g; /* 2GHz RSSI params */
  56. u8 rssismc2g;
  57. u8 rssismf2g;
  58. u8 bxa2g; /* 2GHz BX arch */
  59. u8 rssisav5g; /* 5GHz RSSI params */
  60. u8 rssismc5g;
  61. u8 rssismf5g;
  62. u8 bxa5g; /* 5GHz BX arch */
  63. u16 cck2gpo; /* CCK power offset */
  64. u32 ofdm2gpo; /* 2.4GHz OFDM power offset */
  65. u32 ofdm5glpo; /* 5.2GHz OFDM power offset */
  66. u32 ofdm5gpo; /* 5.3GHz OFDM power offset */
  67. u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */
  68. u16 boardflags_lo; /* Board flags (bits 0-15) */
  69. u16 boardflags_hi; /* Board flags (bits 16-31) */
  70. u16 boardflags2_lo; /* Board flags (bits 32-47) */
  71. u16 boardflags2_hi; /* Board flags (bits 48-63) */
  72. /* TODO store board flags in a single u64 */
  73. /* Antenna gain values for up to 4 antennas
  74. * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  75. * loss in the connectors is bigger than the gain. */
  76. struct {
  77. struct {
  78. s8 a0, a1, a2, a3;
  79. } ghz24; /* 2.4GHz band */
  80. struct {
  81. s8 a0, a1, a2, a3;
  82. } ghz5; /* 5GHz band */
  83. } antenna_gain;
  84. /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
  85. };
  86. /* Information about the PCB the circuitry is soldered on. */
  87. struct ssb_boardinfo {
  88. u16 vendor;
  89. u16 type;
  90. u16 rev;
  91. };
  92. struct ssb_device;
  93. /* Lowlevel read/write operations on the device MMIO.
  94. * Internal, don't use that outside of ssb. */
  95. struct ssb_bus_ops {
  96. u8 (*read8)(struct ssb_device *dev, u16 offset);
  97. u16 (*read16)(struct ssb_device *dev, u16 offset);
  98. u32 (*read32)(struct ssb_device *dev, u16 offset);
  99. void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
  100. void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
  101. void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
  102. #ifdef CONFIG_SSB_BLOCKIO
  103. void (*block_read)(struct ssb_device *dev, void *buffer,
  104. size_t count, u16 offset, u8 reg_width);
  105. void (*block_write)(struct ssb_device *dev, const void *buffer,
  106. size_t count, u16 offset, u8 reg_width);
  107. #endif
  108. };
  109. /* Core-ID values. */
  110. #define SSB_DEV_CHIPCOMMON 0x800
  111. #define SSB_DEV_ILINE20 0x801
  112. #define SSB_DEV_SDRAM 0x803
  113. #define SSB_DEV_PCI 0x804
  114. #define SSB_DEV_MIPS 0x805
  115. #define SSB_DEV_ETHERNET 0x806
  116. #define SSB_DEV_V90 0x807
  117. #define SSB_DEV_USB11_HOSTDEV 0x808
  118. #define SSB_DEV_ADSL 0x809
  119. #define SSB_DEV_ILINE100 0x80A
  120. #define SSB_DEV_IPSEC 0x80B
  121. #define SSB_DEV_PCMCIA 0x80D
  122. #define SSB_DEV_INTERNAL_MEM 0x80E
  123. #define SSB_DEV_MEMC_SDRAM 0x80F
  124. #define SSB_DEV_EXTIF 0x811
  125. #define SSB_DEV_80211 0x812
  126. #define SSB_DEV_MIPS_3302 0x816
  127. #define SSB_DEV_USB11_HOST 0x817
  128. #define SSB_DEV_USB11_DEV 0x818
  129. #define SSB_DEV_USB20_HOST 0x819
  130. #define SSB_DEV_USB20_DEV 0x81A
  131. #define SSB_DEV_SDIO_HOST 0x81B
  132. #define SSB_DEV_ROBOSWITCH 0x81C
  133. #define SSB_DEV_PARA_ATA 0x81D
  134. #define SSB_DEV_SATA_XORDMA 0x81E
  135. #define SSB_DEV_ETHERNET_GBIT 0x81F
  136. #define SSB_DEV_PCIE 0x820
  137. #define SSB_DEV_MIMO_PHY 0x821
  138. #define SSB_DEV_SRAM_CTRLR 0x822
  139. #define SSB_DEV_MINI_MACPHY 0x823
  140. #define SSB_DEV_ARM_1176 0x824
  141. #define SSB_DEV_ARM_7TDMI 0x825
  142. /* Vendor-ID values */
  143. #define SSB_VENDOR_BROADCOM 0x4243
  144. /* Some kernel subsystems poke with dev->drvdata, so we must use the
  145. * following ugly workaround to get from struct device to struct ssb_device */
  146. struct __ssb_dev_wrapper {
  147. struct device dev;
  148. struct ssb_device *sdev;
  149. };
  150. struct ssb_device {
  151. /* Having a copy of the ops pointer in each dev struct
  152. * is an optimization. */
  153. const struct ssb_bus_ops *ops;
  154. struct device *dev;
  155. struct ssb_bus *bus;
  156. struct ssb_device_id id;
  157. u8 core_index;
  158. unsigned int irq;
  159. /* Internal-only stuff follows. */
  160. void *drvdata; /* Per-device data */
  161. void *devtypedata; /* Per-devicetype (eg 802.11) data */
  162. };
  163. /* Go from struct device to struct ssb_device. */
  164. static inline
  165. struct ssb_device * dev_to_ssb_dev(struct device *dev)
  166. {
  167. struct __ssb_dev_wrapper *wrap;
  168. wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
  169. return wrap->sdev;
  170. }
  171. /* Device specific user data */
  172. static inline
  173. void ssb_set_drvdata(struct ssb_device *dev, void *data)
  174. {
  175. dev->drvdata = data;
  176. }
  177. static inline
  178. void * ssb_get_drvdata(struct ssb_device *dev)
  179. {
  180. return dev->drvdata;
  181. }
  182. /* Devicetype specific user data. This is per device-type (not per device) */
  183. void ssb_set_devtypedata(struct ssb_device *dev, void *data);
  184. static inline
  185. void * ssb_get_devtypedata(struct ssb_device *dev)
  186. {
  187. return dev->devtypedata;
  188. }
  189. struct ssb_driver {
  190. const char *name;
  191. const struct ssb_device_id *id_table;
  192. int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
  193. void (*remove)(struct ssb_device *dev);
  194. int (*suspend)(struct ssb_device *dev, pm_message_t state);
  195. int (*resume)(struct ssb_device *dev);
  196. void (*shutdown)(struct ssb_device *dev);
  197. struct device_driver drv;
  198. };
  199. #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
  200. extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
  201. static inline int ssb_driver_register(struct ssb_driver *drv)
  202. {
  203. return __ssb_driver_register(drv, THIS_MODULE);
  204. }
  205. extern void ssb_driver_unregister(struct ssb_driver *drv);
  206. enum ssb_bustype {
  207. SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
  208. SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
  209. SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
  210. };
  211. /* board_vendor */
  212. #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
  213. #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
  214. #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
  215. /* board_type */
  216. #define SSB_BOARD_BCM94306MP 0x0418
  217. #define SSB_BOARD_BCM4309G 0x0421
  218. #define SSB_BOARD_BCM4306CB 0x0417
  219. #define SSB_BOARD_BCM4309MP 0x040C
  220. #define SSB_BOARD_MP4318 0x044A
  221. #define SSB_BOARD_BU4306 0x0416
  222. #define SSB_BOARD_BU4309 0x040A
  223. /* chip_package */
  224. #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
  225. #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
  226. #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
  227. #include <linux/ssb/ssb_driver_chipcommon.h>
  228. #include <linux/ssb/ssb_driver_mips.h>
  229. #include <linux/ssb/ssb_driver_extif.h>
  230. #include <linux/ssb/ssb_driver_pci.h>
  231. struct ssb_bus {
  232. /* The MMIO area. */
  233. void __iomem *mmio;
  234. const struct ssb_bus_ops *ops;
  235. /* The core in the basic address register window. (PCI bus only) */
  236. struct ssb_device *mapped_device;
  237. /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
  238. u8 mapped_pcmcia_seg;
  239. /* Lock for core and segment switching.
  240. * On PCMCIA-host busses this is used to protect the whole MMIO access. */
  241. spinlock_t bar_lock;
  242. /* The bus this backplane is running on. */
  243. enum ssb_bustype bustype;
  244. /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
  245. struct pci_dev *host_pci;
  246. /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
  247. struct pcmcia_device *host_pcmcia;
  248. #ifdef CONFIG_SSB_SPROM
  249. /* Mutex to protect the SPROM writing. */
  250. struct mutex sprom_mutex;
  251. #endif
  252. /* ID information about the Chip. */
  253. u16 chip_id;
  254. u16 chip_rev;
  255. u16 sprom_size; /* number of words in sprom */
  256. u8 chip_package;
  257. /* List of devices (cores) on the backplane. */
  258. struct ssb_device devices[SSB_MAX_NR_CORES];
  259. u8 nr_devices;
  260. /* Software ID number for this bus. */
  261. unsigned int busnumber;
  262. /* The ChipCommon device (if available). */
  263. struct ssb_chipcommon chipco;
  264. /* The PCI-core device (if available). */
  265. struct ssb_pcicore pcicore;
  266. /* The MIPS-core device (if available). */
  267. struct ssb_mipscore mipscore;
  268. /* The EXTif-core device (if available). */
  269. struct ssb_extif extif;
  270. /* The following structure elements are not available in early
  271. * SSB initialization. Though, they are available for regular
  272. * registered drivers at any stage. So be careful when
  273. * using them in the ssb core code. */
  274. /* ID information about the PCB. */
  275. struct ssb_boardinfo boardinfo;
  276. /* Contents of the SPROM. */
  277. struct ssb_sprom sprom;
  278. /* If the board has a cardbus slot, this is set to true. */
  279. bool has_cardbus_slot;
  280. #ifdef CONFIG_SSB_EMBEDDED
  281. /* Lock for GPIO register access. */
  282. spinlock_t gpio_lock;
  283. #endif /* EMBEDDED */
  284. /* Internal-only stuff follows. Do not touch. */
  285. struct list_head list;
  286. #ifdef CONFIG_SSB_DEBUG
  287. /* Is the bus already powered up? */
  288. bool powered_up;
  289. int power_warn_count;
  290. #endif /* DEBUG */
  291. };
  292. /* The initialization-invariants. */
  293. struct ssb_init_invariants {
  294. /* Versioning information about the PCB. */
  295. struct ssb_boardinfo boardinfo;
  296. /* The SPROM information. That's either stored in an
  297. * EEPROM or NVRAM on the board. */
  298. struct ssb_sprom sprom;
  299. /* If the board has a cardbus slot, this is set to true. */
  300. bool has_cardbus_slot;
  301. };
  302. /* Type of function to fetch the invariants. */
  303. typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
  304. struct ssb_init_invariants *iv);
  305. /* Register a SSB system bus. get_invariants() is called after the
  306. * basic system devices are initialized.
  307. * The invariants are usually fetched from some NVRAM.
  308. * Put the invariants into the struct pointed to by iv. */
  309. extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
  310. unsigned long baseaddr,
  311. ssb_invariants_func_t get_invariants);
  312. #ifdef CONFIG_SSB_PCIHOST
  313. extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
  314. struct pci_dev *host_pci);
  315. #endif /* CONFIG_SSB_PCIHOST */
  316. #ifdef CONFIG_SSB_PCMCIAHOST
  317. extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
  318. struct pcmcia_device *pcmcia_dev,
  319. unsigned long baseaddr);
  320. #endif /* CONFIG_SSB_PCMCIAHOST */
  321. extern void ssb_bus_unregister(struct ssb_bus *bus);
  322. /* Set a fallback SPROM.
  323. * See kdoc at the function definition for complete documentation. */
  324. extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
  325. /* Suspend a SSB bus.
  326. * Call this from the parent bus suspend routine. */
  327. extern int ssb_bus_suspend(struct ssb_bus *bus);
  328. /* Resume a SSB bus.
  329. * Call this from the parent bus resume routine. */
  330. extern int ssb_bus_resume(struct ssb_bus *bus);
  331. extern u32 ssb_clockspeed(struct ssb_bus *bus);
  332. /* Is the device enabled in hardware? */
  333. int ssb_device_is_enabled(struct ssb_device *dev);
  334. /* Enable a device and pass device-specific SSB_TMSLOW flags.
  335. * If no device-specific flags are available, use 0. */
  336. void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
  337. /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
  338. void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
  339. /* Device MMIO register read/write functions. */
  340. static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
  341. {
  342. return dev->ops->read8(dev, offset);
  343. }
  344. static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
  345. {
  346. return dev->ops->read16(dev, offset);
  347. }
  348. static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
  349. {
  350. return dev->ops->read32(dev, offset);
  351. }
  352. static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
  353. {
  354. dev->ops->write8(dev, offset, value);
  355. }
  356. static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
  357. {
  358. dev->ops->write16(dev, offset, value);
  359. }
  360. static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
  361. {
  362. dev->ops->write32(dev, offset, value);
  363. }
  364. #ifdef CONFIG_SSB_BLOCKIO
  365. static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
  366. size_t count, u16 offset, u8 reg_width)
  367. {
  368. dev->ops->block_read(dev, buffer, count, offset, reg_width);
  369. }
  370. static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
  371. size_t count, u16 offset, u8 reg_width)
  372. {
  373. dev->ops->block_write(dev, buffer, count, offset, reg_width);
  374. }
  375. #endif /* CONFIG_SSB_BLOCKIO */
  376. /* The SSB DMA API. Use this API for any DMA operation on the device.
  377. * This API basically is a wrapper that calls the correct DMA API for
  378. * the host device type the SSB device is attached to. */
  379. /* Translation (routing) bits that need to be ORed to DMA
  380. * addresses before they are given to a device. */
  381. extern u32 ssb_dma_translation(struct ssb_device *dev);
  382. #define SSB_DMA_TRANSLATION_MASK 0xC0000000
  383. #define SSB_DMA_TRANSLATION_SHIFT 30
  384. extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
  385. extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
  386. dma_addr_t *dma_handle, gfp_t gfp_flags);
  387. extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
  388. void *vaddr, dma_addr_t dma_handle,
  389. gfp_t gfp_flags);
  390. static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
  391. {
  392. #ifdef CONFIG_SSB_DEBUG
  393. printk(KERN_ERR "SSB: BUG! Calling DMA API for "
  394. "unsupported bustype %d\n", dev->bus->bustype);
  395. #endif /* DEBUG */
  396. }
  397. static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
  398. {
  399. switch (dev->bus->bustype) {
  400. case SSB_BUSTYPE_PCI:
  401. #ifdef CONFIG_SSB_PCIHOST
  402. return pci_dma_mapping_error(dev->bus->host_pci, addr);
  403. #endif
  404. break;
  405. case SSB_BUSTYPE_SSB:
  406. return dma_mapping_error(dev->dev, addr);
  407. default:
  408. break;
  409. }
  410. __ssb_dma_not_implemented(dev);
  411. return -ENOSYS;
  412. }
  413. static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
  414. size_t size, enum dma_data_direction dir)
  415. {
  416. switch (dev->bus->bustype) {
  417. case SSB_BUSTYPE_PCI:
  418. #ifdef CONFIG_SSB_PCIHOST
  419. return pci_map_single(dev->bus->host_pci, p, size, dir);
  420. #endif
  421. break;
  422. case SSB_BUSTYPE_SSB:
  423. return dma_map_single(dev->dev, p, size, dir);
  424. default:
  425. break;
  426. }
  427. __ssb_dma_not_implemented(dev);
  428. return 0;
  429. }
  430. static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
  431. size_t size, enum dma_data_direction dir)
  432. {
  433. switch (dev->bus->bustype) {
  434. case SSB_BUSTYPE_PCI:
  435. #ifdef CONFIG_SSB_PCIHOST
  436. pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
  437. return;
  438. #endif
  439. break;
  440. case SSB_BUSTYPE_SSB:
  441. dma_unmap_single(dev->dev, dma_addr, size, dir);
  442. return;
  443. default:
  444. break;
  445. }
  446. __ssb_dma_not_implemented(dev);
  447. }
  448. static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
  449. dma_addr_t dma_addr,
  450. size_t size,
  451. enum dma_data_direction dir)
  452. {
  453. switch (dev->bus->bustype) {
  454. case SSB_BUSTYPE_PCI:
  455. #ifdef CONFIG_SSB_PCIHOST
  456. pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
  457. size, dir);
  458. return;
  459. #endif
  460. break;
  461. case SSB_BUSTYPE_SSB:
  462. dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
  463. return;
  464. default:
  465. break;
  466. }
  467. __ssb_dma_not_implemented(dev);
  468. }
  469. static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
  470. dma_addr_t dma_addr,
  471. size_t size,
  472. enum dma_data_direction dir)
  473. {
  474. switch (dev->bus->bustype) {
  475. case SSB_BUSTYPE_PCI:
  476. #ifdef CONFIG_SSB_PCIHOST
  477. pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
  478. size, dir);
  479. return;
  480. #endif
  481. break;
  482. case SSB_BUSTYPE_SSB:
  483. dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
  484. return;
  485. default:
  486. break;
  487. }
  488. __ssb_dma_not_implemented(dev);
  489. }
  490. static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
  491. dma_addr_t dma_addr,
  492. unsigned long offset,
  493. size_t size,
  494. enum dma_data_direction dir)
  495. {
  496. switch (dev->bus->bustype) {
  497. case SSB_BUSTYPE_PCI:
  498. #ifdef CONFIG_SSB_PCIHOST
  499. /* Just sync everything. That's all the PCI API can do. */
  500. pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
  501. offset + size, dir);
  502. return;
  503. #endif
  504. break;
  505. case SSB_BUSTYPE_SSB:
  506. dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
  507. size, dir);
  508. return;
  509. default:
  510. break;
  511. }
  512. __ssb_dma_not_implemented(dev);
  513. }
  514. static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
  515. dma_addr_t dma_addr,
  516. unsigned long offset,
  517. size_t size,
  518. enum dma_data_direction dir)
  519. {
  520. switch (dev->bus->bustype) {
  521. case SSB_BUSTYPE_PCI:
  522. #ifdef CONFIG_SSB_PCIHOST
  523. /* Just sync everything. That's all the PCI API can do. */
  524. pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
  525. offset + size, dir);
  526. return;
  527. #endif
  528. break;
  529. case SSB_BUSTYPE_SSB:
  530. dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
  531. size, dir);
  532. return;
  533. default:
  534. break;
  535. }
  536. __ssb_dma_not_implemented(dev);
  537. }
  538. #ifdef CONFIG_SSB_PCIHOST
  539. /* PCI-host wrapper driver */
  540. extern int ssb_pcihost_register(struct pci_driver *driver);
  541. static inline void ssb_pcihost_unregister(struct pci_driver *driver)
  542. {
  543. pci_unregister_driver(driver);
  544. }
  545. static inline
  546. void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
  547. {
  548. if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
  549. pci_set_power_state(sdev->bus->host_pci, state);
  550. }
  551. #else
  552. static inline void ssb_pcihost_unregister(struct pci_driver *driver)
  553. {
  554. }
  555. static inline
  556. void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
  557. {
  558. }
  559. #endif /* CONFIG_SSB_PCIHOST */
  560. /* If a driver is shutdown or suspended, call this to signal
  561. * that the bus may be completely powered down. SSB will decide,
  562. * if it's really time to power down the bus, based on if there
  563. * are other devices that want to run. */
  564. extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
  565. /* Before initializing and enabling a device, call this to power-up the bus.
  566. * If you want to allow use of dynamic-power-control, pass the flag.
  567. * Otherwise static always-on powercontrol will be used. */
  568. extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
  569. /* Various helper functions */
  570. extern u32 ssb_admatch_base(u32 adm);
  571. extern u32 ssb_admatch_size(u32 adm);
  572. /* PCI device mapping and fixup routines.
  573. * Called from the architecture pcibios init code.
  574. * These are only available on SSB_EMBEDDED configurations. */
  575. #ifdef CONFIG_SSB_EMBEDDED
  576. int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
  577. int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  578. #endif /* CONFIG_SSB_EMBEDDED */
  579. #endif /* LINUX_SSB_H_ */