rrunner.c 43 KB

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  1. /*
  2. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  3. *
  4. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  5. *
  6. * Thanks to Essential Communication for providing us with hardware
  7. * and very comprehensive documentation without which I would not have
  8. * been able to write this driver. A special thank you to John Gibbon
  9. * for sorting out the legal issues, with the NDA, allowing the code to
  10. * be released under the GPL.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  18. * stupid bugs in my code.
  19. *
  20. * Softnet support and various other patches from Val Henson of
  21. * ODS/Essential.
  22. *
  23. * PCI DMA mapping code partly based on work by Francois Romieu.
  24. */
  25. #define DEBUG 1
  26. #define RX_DMA_SKBUFF 1
  27. #define PKT_COPY_THRESHOLD 512
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/errno.h>
  31. #include <linux/ioport.h>
  32. #include <linux/pci.h>
  33. #include <linux/kernel.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/hippidevice.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/mm.h>
  40. #include <net/sock.h>
  41. #include <asm/system.h>
  42. #include <asm/cache.h>
  43. #include <asm/byteorder.h>
  44. #include <asm/io.h>
  45. #include <asm/irq.h>
  46. #include <asm/uaccess.h>
  47. #define rr_if_busy(dev) netif_queue_stopped(dev)
  48. #define rr_if_running(dev) netif_running(dev)
  49. #include "rrunner.h"
  50. #define RUN_AT(x) (jiffies + (x))
  51. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  52. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  53. MODULE_LICENSE("GPL");
  54. static char version[] __devinitdata = "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  55. /*
  56. * Implementation notes:
  57. *
  58. * The DMA engine only allows for DMA within physical 64KB chunks of
  59. * memory. The current approach of the driver (and stack) is to use
  60. * linear blocks of memory for the skbuffs. However, as the data block
  61. * is always the first part of the skb and skbs are 2^n aligned so we
  62. * are guarantted to get the whole block within one 64KB align 64KB
  63. * chunk.
  64. *
  65. * On the long term, relying on being able to allocate 64KB linear
  66. * chunks of memory is not feasible and the skb handling code and the
  67. * stack will need to know about I/O vectors or something similar.
  68. */
  69. /*
  70. * sysctl_[wr]mem_max are checked at init time to see if they are at
  71. * least 256KB and increased to 256KB if they are not. This is done to
  72. * avoid ending up with socket buffers smaller than the MTU size,
  73. */
  74. static int __devinit rr_init_one(struct pci_dev *pdev,
  75. const struct pci_device_id *ent)
  76. {
  77. struct net_device *dev;
  78. static int version_disp;
  79. u8 pci_latency;
  80. struct rr_private *rrpriv;
  81. void *tmpptr;
  82. dma_addr_t ring_dma;
  83. int ret = -ENOMEM;
  84. dev = alloc_hippi_dev(sizeof(struct rr_private));
  85. if (!dev)
  86. goto out3;
  87. ret = pci_enable_device(pdev);
  88. if (ret) {
  89. ret = -ENODEV;
  90. goto out2;
  91. }
  92. rrpriv = netdev_priv(dev);
  93. SET_NETDEV_DEV(dev, &pdev->dev);
  94. if (pci_request_regions(pdev, "rrunner")) {
  95. ret = -EIO;
  96. goto out;
  97. }
  98. pci_set_drvdata(pdev, dev);
  99. rrpriv->pci_dev = pdev;
  100. spin_lock_init(&rrpriv->lock);
  101. dev->irq = pdev->irq;
  102. dev->open = &rr_open;
  103. dev->hard_start_xmit = &rr_start_xmit;
  104. dev->stop = &rr_close;
  105. dev->do_ioctl = &rr_ioctl;
  106. dev->base_addr = pci_resource_start(pdev, 0);
  107. /* display version info if adapter is found */
  108. if (!version_disp) {
  109. /* set display flag to TRUE so that */
  110. /* we only display this string ONCE */
  111. version_disp = 1;
  112. printk(version);
  113. }
  114. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  115. if (pci_latency <= 0x58){
  116. pci_latency = 0x58;
  117. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  118. }
  119. pci_set_master(pdev);
  120. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  121. "at 0x%08lx, irq %i, PCI latency %i\n", dev->name,
  122. dev->base_addr, dev->irq, pci_latency);
  123. /*
  124. * Remap the regs into kernel space.
  125. */
  126. rrpriv->regs = ioremap(dev->base_addr, 0x1000);
  127. if (!rrpriv->regs){
  128. printk(KERN_ERR "%s: Unable to map I/O register, "
  129. "RoadRunner will be disabled.\n", dev->name);
  130. ret = -EIO;
  131. goto out;
  132. }
  133. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  134. rrpriv->tx_ring = tmpptr;
  135. rrpriv->tx_ring_dma = ring_dma;
  136. if (!tmpptr) {
  137. ret = -ENOMEM;
  138. goto out;
  139. }
  140. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  141. rrpriv->rx_ring = tmpptr;
  142. rrpriv->rx_ring_dma = ring_dma;
  143. if (!tmpptr) {
  144. ret = -ENOMEM;
  145. goto out;
  146. }
  147. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  148. rrpriv->evt_ring = tmpptr;
  149. rrpriv->evt_ring_dma = ring_dma;
  150. if (!tmpptr) {
  151. ret = -ENOMEM;
  152. goto out;
  153. }
  154. /*
  155. * Don't access any register before this point!
  156. */
  157. #ifdef __BIG_ENDIAN
  158. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  159. &rrpriv->regs->HostCtrl);
  160. #endif
  161. /*
  162. * Need to add a case for little-endian 64-bit hosts here.
  163. */
  164. rr_init(dev);
  165. dev->base_addr = 0;
  166. ret = register_netdev(dev);
  167. if (ret)
  168. goto out;
  169. return 0;
  170. out:
  171. if (rrpriv->rx_ring)
  172. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  173. rrpriv->rx_ring_dma);
  174. if (rrpriv->tx_ring)
  175. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  176. rrpriv->tx_ring_dma);
  177. if (rrpriv->regs)
  178. iounmap(rrpriv->regs);
  179. if (pdev) {
  180. pci_release_regions(pdev);
  181. pci_set_drvdata(pdev, NULL);
  182. }
  183. out2:
  184. free_netdev(dev);
  185. out3:
  186. return ret;
  187. }
  188. static void __devexit rr_remove_one (struct pci_dev *pdev)
  189. {
  190. struct net_device *dev = pci_get_drvdata(pdev);
  191. if (dev) {
  192. struct rr_private *rr = netdev_priv(dev);
  193. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)){
  194. printk(KERN_ERR "%s: trying to unload running NIC\n",
  195. dev->name);
  196. writel(HALT_NIC, &rr->regs->HostCtrl);
  197. }
  198. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  199. rr->evt_ring_dma);
  200. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  201. rr->rx_ring_dma);
  202. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  203. rr->tx_ring_dma);
  204. unregister_netdev(dev);
  205. iounmap(rr->regs);
  206. free_netdev(dev);
  207. pci_release_regions(pdev);
  208. pci_disable_device(pdev);
  209. pci_set_drvdata(pdev, NULL);
  210. }
  211. }
  212. /*
  213. * Commands are considered to be slow, thus there is no reason to
  214. * inline this.
  215. */
  216. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  217. {
  218. struct rr_regs __iomem *regs;
  219. u32 idx;
  220. regs = rrpriv->regs;
  221. /*
  222. * This is temporary - it will go away in the final version.
  223. * We probably also want to make this function inline.
  224. */
  225. if (readl(&regs->HostCtrl) & NIC_HALTED){
  226. printk("issuing command for halted NIC, code 0x%x, "
  227. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  228. if (readl(&regs->Mode) & FATAL_ERR)
  229. printk("error codes Fail1 %02x, Fail2 %02x\n",
  230. readl(&regs->Fail1), readl(&regs->Fail2));
  231. }
  232. idx = rrpriv->info->cmd_ctrl.pi;
  233. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  234. wmb();
  235. idx = (idx - 1) % CMD_RING_ENTRIES;
  236. rrpriv->info->cmd_ctrl.pi = idx;
  237. wmb();
  238. if (readl(&regs->Mode) & FATAL_ERR)
  239. printk("error code %02x\n", readl(&regs->Fail1));
  240. }
  241. /*
  242. * Reset the board in a sensible manner. The NIC is already halted
  243. * when we get here and a spin-lock is held.
  244. */
  245. static int rr_reset(struct net_device *dev)
  246. {
  247. struct rr_private *rrpriv;
  248. struct rr_regs __iomem *regs;
  249. struct eeprom *hw = NULL;
  250. u32 start_pc;
  251. int i;
  252. rrpriv = netdev_priv(dev);
  253. regs = rrpriv->regs;
  254. rr_load_firmware(dev);
  255. writel(0x01000000, &regs->TX_state);
  256. writel(0xff800000, &regs->RX_state);
  257. writel(0, &regs->AssistState);
  258. writel(CLEAR_INTA, &regs->LocalCtrl);
  259. writel(0x01, &regs->BrkPt);
  260. writel(0, &regs->Timer);
  261. writel(0, &regs->TimerRef);
  262. writel(RESET_DMA, &regs->DmaReadState);
  263. writel(RESET_DMA, &regs->DmaWriteState);
  264. writel(0, &regs->DmaWriteHostHi);
  265. writel(0, &regs->DmaWriteHostLo);
  266. writel(0, &regs->DmaReadHostHi);
  267. writel(0, &regs->DmaReadHostLo);
  268. writel(0, &regs->DmaReadLen);
  269. writel(0, &regs->DmaWriteLen);
  270. writel(0, &regs->DmaWriteLcl);
  271. writel(0, &regs->DmaWriteIPchecksum);
  272. writel(0, &regs->DmaReadLcl);
  273. writel(0, &regs->DmaReadIPchecksum);
  274. writel(0, &regs->PciState);
  275. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  276. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  277. #elif (BITS_PER_LONG == 64)
  278. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  279. #else
  280. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  281. #endif
  282. #if 0
  283. /*
  284. * Don't worry, this is just black magic.
  285. */
  286. writel(0xdf000, &regs->RxBase);
  287. writel(0xdf000, &regs->RxPrd);
  288. writel(0xdf000, &regs->RxCon);
  289. writel(0xce000, &regs->TxBase);
  290. writel(0xce000, &regs->TxPrd);
  291. writel(0xce000, &regs->TxCon);
  292. writel(0, &regs->RxIndPro);
  293. writel(0, &regs->RxIndCon);
  294. writel(0, &regs->RxIndRef);
  295. writel(0, &regs->TxIndPro);
  296. writel(0, &regs->TxIndCon);
  297. writel(0, &regs->TxIndRef);
  298. writel(0xcc000, &regs->pad10[0]);
  299. writel(0, &regs->DrCmndPro);
  300. writel(0, &regs->DrCmndCon);
  301. writel(0, &regs->DwCmndPro);
  302. writel(0, &regs->DwCmndCon);
  303. writel(0, &regs->DwCmndRef);
  304. writel(0, &regs->DrDataPro);
  305. writel(0, &regs->DrDataCon);
  306. writel(0, &regs->DrDataRef);
  307. writel(0, &regs->DwDataPro);
  308. writel(0, &regs->DwDataCon);
  309. writel(0, &regs->DwDataRef);
  310. #endif
  311. writel(0xffffffff, &regs->MbEvent);
  312. writel(0, &regs->Event);
  313. writel(0, &regs->TxPi);
  314. writel(0, &regs->IpRxPi);
  315. writel(0, &regs->EvtCon);
  316. writel(0, &regs->EvtPrd);
  317. rrpriv->info->evt_ctrl.pi = 0;
  318. for (i = 0; i < CMD_RING_ENTRIES; i++)
  319. writel(0, &regs->CmdRing[i]);
  320. /*
  321. * Why 32 ? is this not cache line size dependent?
  322. */
  323. writel(RBURST_64|WBURST_64, &regs->PciState);
  324. wmb();
  325. start_pc = rr_read_eeprom_word(rrpriv, &hw->rncd_info.FwStart);
  326. #if (DEBUG > 1)
  327. printk("%s: Executing firmware at address 0x%06x\n",
  328. dev->name, start_pc);
  329. #endif
  330. writel(start_pc + 0x800, &regs->Pc);
  331. wmb();
  332. udelay(5);
  333. writel(start_pc, &regs->Pc);
  334. wmb();
  335. return 0;
  336. }
  337. /*
  338. * Read a string from the EEPROM.
  339. */
  340. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  341. unsigned long offset,
  342. unsigned char *buf,
  343. unsigned long length)
  344. {
  345. struct rr_regs __iomem *regs = rrpriv->regs;
  346. u32 misc, io, host, i;
  347. io = readl(&regs->ExtIo);
  348. writel(0, &regs->ExtIo);
  349. misc = readl(&regs->LocalCtrl);
  350. writel(0, &regs->LocalCtrl);
  351. host = readl(&regs->HostCtrl);
  352. writel(host | HALT_NIC, &regs->HostCtrl);
  353. mb();
  354. for (i = 0; i < length; i++){
  355. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  356. mb();
  357. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  358. mb();
  359. }
  360. writel(host, &regs->HostCtrl);
  361. writel(misc, &regs->LocalCtrl);
  362. writel(io, &regs->ExtIo);
  363. mb();
  364. return i;
  365. }
  366. /*
  367. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  368. * it to our CPU byte-order.
  369. */
  370. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  371. void * offset)
  372. {
  373. u32 word;
  374. if ((rr_read_eeprom(rrpriv, (unsigned long)offset,
  375. (char *)&word, 4) == 4))
  376. return be32_to_cpu(word);
  377. return 0;
  378. }
  379. /*
  380. * Write a string to the EEPROM.
  381. *
  382. * This is only called when the firmware is not running.
  383. */
  384. static unsigned int write_eeprom(struct rr_private *rrpriv,
  385. unsigned long offset,
  386. unsigned char *buf,
  387. unsigned long length)
  388. {
  389. struct rr_regs __iomem *regs = rrpriv->regs;
  390. u32 misc, io, data, i, j, ready, error = 0;
  391. io = readl(&regs->ExtIo);
  392. writel(0, &regs->ExtIo);
  393. misc = readl(&regs->LocalCtrl);
  394. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  395. mb();
  396. for (i = 0; i < length; i++){
  397. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  398. mb();
  399. data = buf[i] << 24;
  400. /*
  401. * Only try to write the data if it is not the same
  402. * value already.
  403. */
  404. if ((readl(&regs->WinData) & 0xff000000) != data){
  405. writel(data, &regs->WinData);
  406. ready = 0;
  407. j = 0;
  408. mb();
  409. while(!ready){
  410. udelay(20);
  411. if ((readl(&regs->WinData) & 0xff000000) ==
  412. data)
  413. ready = 1;
  414. mb();
  415. if (j++ > 5000){
  416. printk("data mismatch: %08x, "
  417. "WinData %08x\n", data,
  418. readl(&regs->WinData));
  419. ready = 1;
  420. error = 1;
  421. }
  422. }
  423. }
  424. }
  425. writel(misc, &regs->LocalCtrl);
  426. writel(io, &regs->ExtIo);
  427. mb();
  428. return error;
  429. }
  430. static int __devinit rr_init(struct net_device *dev)
  431. {
  432. struct rr_private *rrpriv;
  433. struct rr_regs __iomem *regs;
  434. struct eeprom *hw = NULL;
  435. u32 sram_size, rev;
  436. DECLARE_MAC_BUF(mac);
  437. rrpriv = netdev_priv(dev);
  438. regs = rrpriv->regs;
  439. rev = readl(&regs->FwRev);
  440. rrpriv->fw_rev = rev;
  441. if (rev > 0x00020024)
  442. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  443. ((rev >> 8) & 0xff), (rev & 0xff));
  444. else if (rev >= 0x00020000) {
  445. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  446. "later is recommended)\n", (rev >> 16),
  447. ((rev >> 8) & 0xff), (rev & 0xff));
  448. }else{
  449. printk(" Firmware revision too old: %i.%i.%i, please "
  450. "upgrade to 2.0.37 or later.\n",
  451. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  452. }
  453. #if (DEBUG > 2)
  454. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  455. #endif
  456. /*
  457. * Read the hardware address from the eeprom. The HW address
  458. * is not really necessary for HIPPI but awfully convenient.
  459. * The pointer arithmetic to put it in dev_addr is ugly, but
  460. * Donald Becker does it this way for the GigE version of this
  461. * card and it's shorter and more portable than any
  462. * other method I've seen. -VAL
  463. */
  464. *(u16 *)(dev->dev_addr) =
  465. htons(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA));
  466. *(u32 *)(dev->dev_addr+2) =
  467. htonl(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA[4]));
  468. printk(" MAC: %s\n", print_mac(mac, dev->dev_addr));
  469. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  470. printk(" SRAM size 0x%06x\n", sram_size);
  471. if (sysctl_rmem_max < 262144){
  472. printk(" Receive socket buffer limit too low (%i), "
  473. "setting to 262144\n", sysctl_rmem_max);
  474. sysctl_rmem_max = 262144;
  475. }
  476. if (sysctl_wmem_max < 262144){
  477. printk(" Transmit socket buffer limit too low (%i), "
  478. "setting to 262144\n", sysctl_wmem_max);
  479. sysctl_wmem_max = 262144;
  480. }
  481. return 0;
  482. }
  483. static int rr_init1(struct net_device *dev)
  484. {
  485. struct rr_private *rrpriv;
  486. struct rr_regs __iomem *regs;
  487. unsigned long myjif, flags;
  488. struct cmd cmd;
  489. u32 hostctrl;
  490. int ecode = 0;
  491. short i;
  492. rrpriv = netdev_priv(dev);
  493. regs = rrpriv->regs;
  494. spin_lock_irqsave(&rrpriv->lock, flags);
  495. hostctrl = readl(&regs->HostCtrl);
  496. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  497. wmb();
  498. if (hostctrl & PARITY_ERR){
  499. printk("%s: Parity error halting NIC - this is serious!\n",
  500. dev->name);
  501. spin_unlock_irqrestore(&rrpriv->lock, flags);
  502. ecode = -EFAULT;
  503. goto error;
  504. }
  505. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  506. set_infoaddr(regs, rrpriv->info_dma);
  507. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  508. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  509. rrpriv->info->evt_ctrl.mode = 0;
  510. rrpriv->info->evt_ctrl.pi = 0;
  511. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  512. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  513. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  514. rrpriv->info->cmd_ctrl.mode = 0;
  515. rrpriv->info->cmd_ctrl.pi = 15;
  516. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  517. writel(0, &regs->CmdRing[i]);
  518. }
  519. for (i = 0; i < TX_RING_ENTRIES; i++) {
  520. rrpriv->tx_ring[i].size = 0;
  521. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  522. rrpriv->tx_skbuff[i] = NULL;
  523. }
  524. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  525. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  526. rrpriv->info->tx_ctrl.mode = 0;
  527. rrpriv->info->tx_ctrl.pi = 0;
  528. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  529. /*
  530. * Set dirty_tx before we start receiving interrupts, otherwise
  531. * the interrupt handler might think it is supposed to process
  532. * tx ints before we are up and running, which may cause a null
  533. * pointer access in the int handler.
  534. */
  535. rrpriv->tx_full = 0;
  536. rrpriv->cur_rx = 0;
  537. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  538. rr_reset(dev);
  539. /* Tuning values */
  540. writel(0x5000, &regs->ConRetry);
  541. writel(0x100, &regs->ConRetryTmr);
  542. writel(0x500000, &regs->ConTmout);
  543. writel(0x60, &regs->IntrTmr);
  544. writel(0x500000, &regs->TxDataMvTimeout);
  545. writel(0x200000, &regs->RxDataMvTimeout);
  546. writel(0x80, &regs->WriteDmaThresh);
  547. writel(0x80, &regs->ReadDmaThresh);
  548. rrpriv->fw_running = 0;
  549. wmb();
  550. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  551. writel(hostctrl, &regs->HostCtrl);
  552. wmb();
  553. spin_unlock_irqrestore(&rrpriv->lock, flags);
  554. for (i = 0; i < RX_RING_ENTRIES; i++) {
  555. struct sk_buff *skb;
  556. dma_addr_t addr;
  557. rrpriv->rx_ring[i].mode = 0;
  558. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  559. if (!skb) {
  560. printk(KERN_WARNING "%s: Unable to allocate memory "
  561. "for receive ring - halting NIC\n", dev->name);
  562. ecode = -ENOMEM;
  563. goto error;
  564. }
  565. rrpriv->rx_skbuff[i] = skb;
  566. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  567. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  568. /*
  569. * Sanity test to see if we conflict with the DMA
  570. * limitations of the Roadrunner.
  571. */
  572. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  573. printk("skb alloc error\n");
  574. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  575. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  576. }
  577. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  578. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  579. rrpriv->rx_ctrl[4].mode = 8;
  580. rrpriv->rx_ctrl[4].pi = 0;
  581. wmb();
  582. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  583. udelay(1000);
  584. /*
  585. * Now start the FirmWare.
  586. */
  587. cmd.code = C_START_FW;
  588. cmd.ring = 0;
  589. cmd.index = 0;
  590. rr_issue_cmd(rrpriv, &cmd);
  591. /*
  592. * Give the FirmWare time to chew on the `get running' command.
  593. */
  594. myjif = jiffies + 5 * HZ;
  595. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  596. cpu_relax();
  597. netif_start_queue(dev);
  598. return ecode;
  599. error:
  600. /*
  601. * We might have gotten here because we are out of memory,
  602. * make sure we release everything we allocated before failing
  603. */
  604. for (i = 0; i < RX_RING_ENTRIES; i++) {
  605. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  606. if (skb) {
  607. pci_unmap_single(rrpriv->pci_dev,
  608. rrpriv->rx_ring[i].addr.addrlo,
  609. dev->mtu + HIPPI_HLEN,
  610. PCI_DMA_FROMDEVICE);
  611. rrpriv->rx_ring[i].size = 0;
  612. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  613. dev_kfree_skb(skb);
  614. rrpriv->rx_skbuff[i] = NULL;
  615. }
  616. }
  617. return ecode;
  618. }
  619. /*
  620. * All events are considered to be slow (RX/TX ints do not generate
  621. * events) and are handled here, outside the main interrupt handler,
  622. * to reduce the size of the handler.
  623. */
  624. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  625. {
  626. struct rr_private *rrpriv;
  627. struct rr_regs __iomem *regs;
  628. u32 tmp;
  629. rrpriv = netdev_priv(dev);
  630. regs = rrpriv->regs;
  631. while (prodidx != eidx){
  632. switch (rrpriv->evt_ring[eidx].code){
  633. case E_NIC_UP:
  634. tmp = readl(&regs->FwRev);
  635. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  636. "up and running\n", dev->name,
  637. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  638. rrpriv->fw_running = 1;
  639. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  640. wmb();
  641. break;
  642. case E_LINK_ON:
  643. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  644. break;
  645. case E_LINK_OFF:
  646. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  647. break;
  648. case E_RX_IDLE:
  649. printk(KERN_WARNING "%s: RX data not moving\n",
  650. dev->name);
  651. goto drop;
  652. case E_WATCHDOG:
  653. printk(KERN_INFO "%s: The watchdog is here to see "
  654. "us\n", dev->name);
  655. break;
  656. case E_INTERN_ERR:
  657. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  658. dev->name);
  659. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  660. &regs->HostCtrl);
  661. wmb();
  662. break;
  663. case E_HOST_ERR:
  664. printk(KERN_ERR "%s: Host software error\n",
  665. dev->name);
  666. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  667. &regs->HostCtrl);
  668. wmb();
  669. break;
  670. /*
  671. * TX events.
  672. */
  673. case E_CON_REJ:
  674. printk(KERN_WARNING "%s: Connection rejected\n",
  675. dev->name);
  676. dev->stats.tx_aborted_errors++;
  677. break;
  678. case E_CON_TMOUT:
  679. printk(KERN_WARNING "%s: Connection timeout\n",
  680. dev->name);
  681. break;
  682. case E_DISC_ERR:
  683. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  684. dev->name);
  685. dev->stats.tx_aborted_errors++;
  686. break;
  687. case E_INT_PRTY:
  688. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  689. dev->name);
  690. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  691. &regs->HostCtrl);
  692. wmb();
  693. break;
  694. case E_TX_IDLE:
  695. printk(KERN_WARNING "%s: Transmitter idle\n",
  696. dev->name);
  697. break;
  698. case E_TX_LINK_DROP:
  699. printk(KERN_WARNING "%s: Link lost during transmit\n",
  700. dev->name);
  701. dev->stats.tx_aborted_errors++;
  702. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  703. &regs->HostCtrl);
  704. wmb();
  705. break;
  706. case E_TX_INV_RNG:
  707. printk(KERN_ERR "%s: Invalid send ring block\n",
  708. dev->name);
  709. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  710. &regs->HostCtrl);
  711. wmb();
  712. break;
  713. case E_TX_INV_BUF:
  714. printk(KERN_ERR "%s: Invalid send buffer address\n",
  715. dev->name);
  716. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  717. &regs->HostCtrl);
  718. wmb();
  719. break;
  720. case E_TX_INV_DSC:
  721. printk(KERN_ERR "%s: Invalid descriptor address\n",
  722. dev->name);
  723. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  724. &regs->HostCtrl);
  725. wmb();
  726. break;
  727. /*
  728. * RX events.
  729. */
  730. case E_RX_RNG_OUT:
  731. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  732. break;
  733. case E_RX_PAR_ERR:
  734. printk(KERN_WARNING "%s: Receive parity error\n",
  735. dev->name);
  736. goto drop;
  737. case E_RX_LLRC_ERR:
  738. printk(KERN_WARNING "%s: Receive LLRC error\n",
  739. dev->name);
  740. goto drop;
  741. case E_PKT_LN_ERR:
  742. printk(KERN_WARNING "%s: Receive packet length "
  743. "error\n", dev->name);
  744. goto drop;
  745. case E_DTA_CKSM_ERR:
  746. printk(KERN_WARNING "%s: Data checksum error\n",
  747. dev->name);
  748. goto drop;
  749. case E_SHT_BST:
  750. printk(KERN_WARNING "%s: Unexpected short burst "
  751. "error\n", dev->name);
  752. goto drop;
  753. case E_STATE_ERR:
  754. printk(KERN_WARNING "%s: Recv. state transition"
  755. " error\n", dev->name);
  756. goto drop;
  757. case E_UNEXP_DATA:
  758. printk(KERN_WARNING "%s: Unexpected data error\n",
  759. dev->name);
  760. goto drop;
  761. case E_LST_LNK_ERR:
  762. printk(KERN_WARNING "%s: Link lost error\n",
  763. dev->name);
  764. goto drop;
  765. case E_FRM_ERR:
  766. printk(KERN_WARNING "%s: Framming Error\n",
  767. dev->name);
  768. goto drop;
  769. case E_FLG_SYN_ERR:
  770. printk(KERN_WARNING "%s: Flag sync. lost during"
  771. "packet\n", dev->name);
  772. goto drop;
  773. case E_RX_INV_BUF:
  774. printk(KERN_ERR "%s: Invalid receive buffer "
  775. "address\n", dev->name);
  776. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  777. &regs->HostCtrl);
  778. wmb();
  779. break;
  780. case E_RX_INV_DSC:
  781. printk(KERN_ERR "%s: Invalid receive descriptor "
  782. "address\n", dev->name);
  783. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  784. &regs->HostCtrl);
  785. wmb();
  786. break;
  787. case E_RNG_BLK:
  788. printk(KERN_ERR "%s: Invalid ring block\n",
  789. dev->name);
  790. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  791. &regs->HostCtrl);
  792. wmb();
  793. break;
  794. drop:
  795. /* Label packet to be dropped.
  796. * Actual dropping occurs in rx
  797. * handling.
  798. *
  799. * The index of packet we get to drop is
  800. * the index of the packet following
  801. * the bad packet. -kbf
  802. */
  803. {
  804. u16 index = rrpriv->evt_ring[eidx].index;
  805. index = (index + (RX_RING_ENTRIES - 1)) %
  806. RX_RING_ENTRIES;
  807. rrpriv->rx_ring[index].mode |=
  808. (PACKET_BAD | PACKET_END);
  809. }
  810. break;
  811. default:
  812. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  813. dev->name, rrpriv->evt_ring[eidx].code);
  814. }
  815. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  816. }
  817. rrpriv->info->evt_ctrl.pi = eidx;
  818. wmb();
  819. return eidx;
  820. }
  821. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  822. {
  823. struct rr_private *rrpriv = netdev_priv(dev);
  824. struct rr_regs __iomem *regs = rrpriv->regs;
  825. do {
  826. struct rx_desc *desc;
  827. u32 pkt_len;
  828. desc = &(rrpriv->rx_ring[index]);
  829. pkt_len = desc->size;
  830. #if (DEBUG > 2)
  831. printk("index %i, rxlimit %i\n", index, rxlimit);
  832. printk("len %x, mode %x\n", pkt_len, desc->mode);
  833. #endif
  834. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  835. dev->stats.rx_dropped++;
  836. goto defer;
  837. }
  838. if (pkt_len > 0){
  839. struct sk_buff *skb, *rx_skb;
  840. rx_skb = rrpriv->rx_skbuff[index];
  841. if (pkt_len < PKT_COPY_THRESHOLD) {
  842. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  843. if (skb == NULL){
  844. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  845. dev->stats.rx_dropped++;
  846. goto defer;
  847. } else {
  848. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  849. desc->addr.addrlo,
  850. pkt_len,
  851. PCI_DMA_FROMDEVICE);
  852. memcpy(skb_put(skb, pkt_len),
  853. rx_skb->data, pkt_len);
  854. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  855. desc->addr.addrlo,
  856. pkt_len,
  857. PCI_DMA_FROMDEVICE);
  858. }
  859. }else{
  860. struct sk_buff *newskb;
  861. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  862. GFP_ATOMIC);
  863. if (newskb){
  864. dma_addr_t addr;
  865. pci_unmap_single(rrpriv->pci_dev,
  866. desc->addr.addrlo, dev->mtu +
  867. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  868. skb = rx_skb;
  869. skb_put(skb, pkt_len);
  870. rrpriv->rx_skbuff[index] = newskb;
  871. addr = pci_map_single(rrpriv->pci_dev,
  872. newskb->data,
  873. dev->mtu + HIPPI_HLEN,
  874. PCI_DMA_FROMDEVICE);
  875. set_rraddr(&desc->addr, addr);
  876. } else {
  877. printk("%s: Out of memory, deferring "
  878. "packet\n", dev->name);
  879. dev->stats.rx_dropped++;
  880. goto defer;
  881. }
  882. }
  883. skb->protocol = hippi_type_trans(skb, dev);
  884. netif_rx(skb); /* send it up */
  885. dev->last_rx = jiffies;
  886. dev->stats.rx_packets++;
  887. dev->stats.rx_bytes += pkt_len;
  888. }
  889. defer:
  890. desc->mode = 0;
  891. desc->size = dev->mtu + HIPPI_HLEN;
  892. if ((index & 7) == 7)
  893. writel(index, &regs->IpRxPi);
  894. index = (index + 1) % RX_RING_ENTRIES;
  895. } while(index != rxlimit);
  896. rrpriv->cur_rx = index;
  897. wmb();
  898. }
  899. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  900. {
  901. struct rr_private *rrpriv;
  902. struct rr_regs __iomem *regs;
  903. struct net_device *dev = (struct net_device *)dev_id;
  904. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  905. rrpriv = netdev_priv(dev);
  906. regs = rrpriv->regs;
  907. if (!(readl(&regs->HostCtrl) & RR_INT))
  908. return IRQ_NONE;
  909. spin_lock(&rrpriv->lock);
  910. prodidx = readl(&regs->EvtPrd);
  911. txcsmr = (prodidx >> 8) & 0xff;
  912. rxlimit = (prodidx >> 16) & 0xff;
  913. prodidx &= 0xff;
  914. #if (DEBUG > 2)
  915. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  916. prodidx, rrpriv->info->evt_ctrl.pi);
  917. #endif
  918. /*
  919. * Order here is important. We must handle events
  920. * before doing anything else in order to catch
  921. * such things as LLRC errors, etc -kbf
  922. */
  923. eidx = rrpriv->info->evt_ctrl.pi;
  924. if (prodidx != eidx)
  925. eidx = rr_handle_event(dev, prodidx, eidx);
  926. rxindex = rrpriv->cur_rx;
  927. if (rxindex != rxlimit)
  928. rx_int(dev, rxlimit, rxindex);
  929. txcon = rrpriv->dirty_tx;
  930. if (txcsmr != txcon) {
  931. do {
  932. /* Due to occational firmware TX producer/consumer out
  933. * of sync. error need to check entry in ring -kbf
  934. */
  935. if(rrpriv->tx_skbuff[txcon]){
  936. struct tx_desc *desc;
  937. struct sk_buff *skb;
  938. desc = &(rrpriv->tx_ring[txcon]);
  939. skb = rrpriv->tx_skbuff[txcon];
  940. dev->stats.tx_packets++;
  941. dev->stats.tx_bytes += skb->len;
  942. pci_unmap_single(rrpriv->pci_dev,
  943. desc->addr.addrlo, skb->len,
  944. PCI_DMA_TODEVICE);
  945. dev_kfree_skb_irq(skb);
  946. rrpriv->tx_skbuff[txcon] = NULL;
  947. desc->size = 0;
  948. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  949. desc->mode = 0;
  950. }
  951. txcon = (txcon + 1) % TX_RING_ENTRIES;
  952. } while (txcsmr != txcon);
  953. wmb();
  954. rrpriv->dirty_tx = txcon;
  955. if (rrpriv->tx_full && rr_if_busy(dev) &&
  956. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  957. != rrpriv->dirty_tx)){
  958. rrpriv->tx_full = 0;
  959. netif_wake_queue(dev);
  960. }
  961. }
  962. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  963. writel(eidx, &regs->EvtCon);
  964. wmb();
  965. spin_unlock(&rrpriv->lock);
  966. return IRQ_HANDLED;
  967. }
  968. static inline void rr_raz_tx(struct rr_private *rrpriv,
  969. struct net_device *dev)
  970. {
  971. int i;
  972. for (i = 0; i < TX_RING_ENTRIES; i++) {
  973. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  974. if (skb) {
  975. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  976. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  977. skb->len, PCI_DMA_TODEVICE);
  978. desc->size = 0;
  979. set_rraddr(&desc->addr, 0);
  980. dev_kfree_skb(skb);
  981. rrpriv->tx_skbuff[i] = NULL;
  982. }
  983. }
  984. }
  985. static inline void rr_raz_rx(struct rr_private *rrpriv,
  986. struct net_device *dev)
  987. {
  988. int i;
  989. for (i = 0; i < RX_RING_ENTRIES; i++) {
  990. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  991. if (skb) {
  992. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  993. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  994. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  995. desc->size = 0;
  996. set_rraddr(&desc->addr, 0);
  997. dev_kfree_skb(skb);
  998. rrpriv->rx_skbuff[i] = NULL;
  999. }
  1000. }
  1001. }
  1002. static void rr_timer(unsigned long data)
  1003. {
  1004. struct net_device *dev = (struct net_device *)data;
  1005. struct rr_private *rrpriv = netdev_priv(dev);
  1006. struct rr_regs __iomem *regs = rrpriv->regs;
  1007. unsigned long flags;
  1008. if (readl(&regs->HostCtrl) & NIC_HALTED){
  1009. printk("%s: Restarting nic\n", dev->name);
  1010. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  1011. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1012. wmb();
  1013. rr_raz_tx(rrpriv, dev);
  1014. rr_raz_rx(rrpriv, dev);
  1015. if (rr_init1(dev)) {
  1016. spin_lock_irqsave(&rrpriv->lock, flags);
  1017. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1018. &regs->HostCtrl);
  1019. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1020. }
  1021. }
  1022. rrpriv->timer.expires = RUN_AT(5*HZ);
  1023. add_timer(&rrpriv->timer);
  1024. }
  1025. static int rr_open(struct net_device *dev)
  1026. {
  1027. struct rr_private *rrpriv = netdev_priv(dev);
  1028. struct pci_dev *pdev = rrpriv->pci_dev;
  1029. struct rr_regs __iomem *regs;
  1030. int ecode = 0;
  1031. unsigned long flags;
  1032. dma_addr_t dma_addr;
  1033. regs = rrpriv->regs;
  1034. if (rrpriv->fw_rev < 0x00020000) {
  1035. printk(KERN_WARNING "%s: trying to configure device with "
  1036. "obsolete firmware\n", dev->name);
  1037. ecode = -EBUSY;
  1038. goto error;
  1039. }
  1040. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1041. 256 * sizeof(struct ring_ctrl),
  1042. &dma_addr);
  1043. if (!rrpriv->rx_ctrl) {
  1044. ecode = -ENOMEM;
  1045. goto error;
  1046. }
  1047. rrpriv->rx_ctrl_dma = dma_addr;
  1048. memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
  1049. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1050. &dma_addr);
  1051. if (!rrpriv->info) {
  1052. ecode = -ENOMEM;
  1053. goto error;
  1054. }
  1055. rrpriv->info_dma = dma_addr;
  1056. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1057. wmb();
  1058. spin_lock_irqsave(&rrpriv->lock, flags);
  1059. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1060. readl(&regs->HostCtrl);
  1061. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1062. if (request_irq(dev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1063. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1064. dev->name, dev->irq);
  1065. ecode = -EAGAIN;
  1066. goto error;
  1067. }
  1068. if ((ecode = rr_init1(dev)))
  1069. goto error;
  1070. /* Set the timer to switch to check for link beat and perhaps switch
  1071. to an alternate media type. */
  1072. init_timer(&rrpriv->timer);
  1073. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1074. rrpriv->timer.data = (unsigned long)dev;
  1075. rrpriv->timer.function = &rr_timer; /* timer handler */
  1076. add_timer(&rrpriv->timer);
  1077. netif_start_queue(dev);
  1078. return ecode;
  1079. error:
  1080. spin_lock_irqsave(&rrpriv->lock, flags);
  1081. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1082. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1083. if (rrpriv->info) {
  1084. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1085. rrpriv->info_dma);
  1086. rrpriv->info = NULL;
  1087. }
  1088. if (rrpriv->rx_ctrl) {
  1089. pci_free_consistent(pdev, sizeof(struct ring_ctrl),
  1090. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1091. rrpriv->rx_ctrl = NULL;
  1092. }
  1093. netif_stop_queue(dev);
  1094. return ecode;
  1095. }
  1096. static void rr_dump(struct net_device *dev)
  1097. {
  1098. struct rr_private *rrpriv;
  1099. struct rr_regs __iomem *regs;
  1100. u32 index, cons;
  1101. short i;
  1102. int len;
  1103. rrpriv = netdev_priv(dev);
  1104. regs = rrpriv->regs;
  1105. printk("%s: dumping NIC TX rings\n", dev->name);
  1106. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1107. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1108. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1109. rrpriv->info->tx_ctrl.pi);
  1110. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1111. index = (((readl(&regs->EvtPrd) >> 8) & 0xff ) - 1) % EVT_RING_ENTRIES;
  1112. cons = rrpriv->dirty_tx;
  1113. printk("TX ring index %i, TX consumer %i\n",
  1114. index, cons);
  1115. if (rrpriv->tx_skbuff[index]){
  1116. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1117. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1118. for (i = 0; i < len; i++){
  1119. if (!(i & 7))
  1120. printk("\n");
  1121. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1122. }
  1123. printk("\n");
  1124. }
  1125. if (rrpriv->tx_skbuff[cons]){
  1126. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1127. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1128. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
  1129. rrpriv->tx_ring[cons].mode,
  1130. rrpriv->tx_ring[cons].size,
  1131. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1132. (unsigned long)rrpriv->tx_skbuff[cons]->data,
  1133. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1134. for (i = 0; i < len; i++){
  1135. if (!(i & 7))
  1136. printk("\n");
  1137. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1138. }
  1139. printk("\n");
  1140. }
  1141. printk("dumping TX ring info:\n");
  1142. for (i = 0; i < TX_RING_ENTRIES; i++)
  1143. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1144. rrpriv->tx_ring[i].mode,
  1145. rrpriv->tx_ring[i].size,
  1146. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1147. }
  1148. static int rr_close(struct net_device *dev)
  1149. {
  1150. struct rr_private *rrpriv;
  1151. struct rr_regs __iomem *regs;
  1152. unsigned long flags;
  1153. u32 tmp;
  1154. short i;
  1155. netif_stop_queue(dev);
  1156. rrpriv = netdev_priv(dev);
  1157. regs = rrpriv->regs;
  1158. /*
  1159. * Lock to make sure we are not cleaning up while another CPU
  1160. * is handling interrupts.
  1161. */
  1162. spin_lock_irqsave(&rrpriv->lock, flags);
  1163. tmp = readl(&regs->HostCtrl);
  1164. if (tmp & NIC_HALTED){
  1165. printk("%s: NIC already halted\n", dev->name);
  1166. rr_dump(dev);
  1167. }else{
  1168. tmp |= HALT_NIC | RR_CLEAR_INT;
  1169. writel(tmp, &regs->HostCtrl);
  1170. readl(&regs->HostCtrl);
  1171. }
  1172. rrpriv->fw_running = 0;
  1173. del_timer_sync(&rrpriv->timer);
  1174. writel(0, &regs->TxPi);
  1175. writel(0, &regs->IpRxPi);
  1176. writel(0, &regs->EvtCon);
  1177. writel(0, &regs->EvtPrd);
  1178. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1179. writel(0, &regs->CmdRing[i]);
  1180. rrpriv->info->tx_ctrl.entries = 0;
  1181. rrpriv->info->cmd_ctrl.pi = 0;
  1182. rrpriv->info->evt_ctrl.pi = 0;
  1183. rrpriv->rx_ctrl[4].entries = 0;
  1184. rr_raz_tx(rrpriv, dev);
  1185. rr_raz_rx(rrpriv, dev);
  1186. pci_free_consistent(rrpriv->pci_dev, 256 * sizeof(struct ring_ctrl),
  1187. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1188. rrpriv->rx_ctrl = NULL;
  1189. pci_free_consistent(rrpriv->pci_dev, sizeof(struct rr_info),
  1190. rrpriv->info, rrpriv->info_dma);
  1191. rrpriv->info = NULL;
  1192. free_irq(dev->irq, dev);
  1193. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1194. return 0;
  1195. }
  1196. static int rr_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1197. {
  1198. struct rr_private *rrpriv = netdev_priv(dev);
  1199. struct rr_regs __iomem *regs = rrpriv->regs;
  1200. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1201. struct ring_ctrl *txctrl;
  1202. unsigned long flags;
  1203. u32 index, len = skb->len;
  1204. u32 *ifield;
  1205. struct sk_buff *new_skb;
  1206. if (readl(&regs->Mode) & FATAL_ERR)
  1207. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1208. readl(&regs->Fail1), readl(&regs->Fail2));
  1209. /*
  1210. * We probably need to deal with tbusy here to prevent overruns.
  1211. */
  1212. if (skb_headroom(skb) < 8){
  1213. printk("incoming skb too small - reallocating\n");
  1214. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1215. dev_kfree_skb(skb);
  1216. netif_wake_queue(dev);
  1217. return -EBUSY;
  1218. }
  1219. skb_reserve(new_skb, 8);
  1220. skb_put(new_skb, len);
  1221. skb_copy_from_linear_data(skb, new_skb->data, len);
  1222. dev_kfree_skb(skb);
  1223. skb = new_skb;
  1224. }
  1225. ifield = (u32 *)skb_push(skb, 8);
  1226. ifield[0] = 0;
  1227. ifield[1] = hcb->ifield;
  1228. /*
  1229. * We don't need the lock before we are actually going to start
  1230. * fiddling with the control blocks.
  1231. */
  1232. spin_lock_irqsave(&rrpriv->lock, flags);
  1233. txctrl = &rrpriv->info->tx_ctrl;
  1234. index = txctrl->pi;
  1235. rrpriv->tx_skbuff[index] = skb;
  1236. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1237. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1238. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1239. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1240. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1241. wmb();
  1242. writel(txctrl->pi, &regs->TxPi);
  1243. if (txctrl->pi == rrpriv->dirty_tx){
  1244. rrpriv->tx_full = 1;
  1245. netif_stop_queue(dev);
  1246. }
  1247. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1248. dev->trans_start = jiffies;
  1249. return 0;
  1250. }
  1251. /*
  1252. * Read the firmware out of the EEPROM and put it into the SRAM
  1253. * (or from user space - later)
  1254. *
  1255. * This operation requires the NIC to be halted and is performed with
  1256. * interrupts disabled and with the spinlock hold.
  1257. */
  1258. static int rr_load_firmware(struct net_device *dev)
  1259. {
  1260. struct rr_private *rrpriv;
  1261. struct rr_regs __iomem *regs;
  1262. unsigned long eptr, segptr;
  1263. int i, j;
  1264. u32 localctrl, sptr, len, tmp;
  1265. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1266. struct eeprom *hw = NULL;
  1267. rrpriv = netdev_priv(dev);
  1268. regs = rrpriv->regs;
  1269. if (dev->flags & IFF_UP)
  1270. return -EBUSY;
  1271. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1272. printk("%s: Trying to load firmware to a running NIC.\n",
  1273. dev->name);
  1274. return -EBUSY;
  1275. }
  1276. localctrl = readl(&regs->LocalCtrl);
  1277. writel(0, &regs->LocalCtrl);
  1278. writel(0, &regs->EvtPrd);
  1279. writel(0, &regs->RxPrd);
  1280. writel(0, &regs->TxPrd);
  1281. /*
  1282. * First wipe the entire SRAM, otherwise we might run into all
  1283. * kinds of trouble ... sigh, this took almost all afternoon
  1284. * to track down ;-(
  1285. */
  1286. io = readl(&regs->ExtIo);
  1287. writel(0, &regs->ExtIo);
  1288. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  1289. for (i = 200; i < sram_size / 4; i++){
  1290. writel(i * 4, &regs->WinBase);
  1291. mb();
  1292. writel(0, &regs->WinData);
  1293. mb();
  1294. }
  1295. writel(io, &regs->ExtIo);
  1296. mb();
  1297. eptr = (unsigned long)rr_read_eeprom_word(rrpriv,
  1298. &hw->rncd_info.AddrRunCodeSegs);
  1299. eptr = ((eptr & 0x1fffff) >> 3);
  1300. p2len = rr_read_eeprom_word(rrpriv, (void *)(0x83*4));
  1301. p2len = (p2len << 2);
  1302. p2size = rr_read_eeprom_word(rrpriv, (void *)(0x84*4));
  1303. p2size = ((p2size & 0x1fffff) >> 3);
  1304. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1305. printk("%s: eptr is invalid\n", dev->name);
  1306. goto out;
  1307. }
  1308. revision = rr_read_eeprom_word(rrpriv, &hw->manf.HeaderFmt);
  1309. if (revision != 1){
  1310. printk("%s: invalid firmware format (%i)\n",
  1311. dev->name, revision);
  1312. goto out;
  1313. }
  1314. nr_seg = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1315. eptr +=4;
  1316. #if (DEBUG > 1)
  1317. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1318. #endif
  1319. for (i = 0; i < nr_seg; i++){
  1320. sptr = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1321. eptr += 4;
  1322. len = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1323. eptr += 4;
  1324. segptr = (unsigned long)rr_read_eeprom_word(rrpriv, (void *)eptr);
  1325. segptr = ((segptr & 0x1fffff) >> 3);
  1326. eptr += 4;
  1327. #if (DEBUG > 1)
  1328. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1329. dev->name, i, sptr, len, segptr);
  1330. #endif
  1331. for (j = 0; j < len; j++){
  1332. tmp = rr_read_eeprom_word(rrpriv, (void *)segptr);
  1333. writel(sptr, &regs->WinBase);
  1334. mb();
  1335. writel(tmp, &regs->WinData);
  1336. mb();
  1337. segptr += 4;
  1338. sptr += 4;
  1339. }
  1340. }
  1341. out:
  1342. writel(localctrl, &regs->LocalCtrl);
  1343. mb();
  1344. return 0;
  1345. }
  1346. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1347. {
  1348. struct rr_private *rrpriv;
  1349. unsigned char *image, *oldimage;
  1350. unsigned long flags;
  1351. unsigned int i;
  1352. int error = -EOPNOTSUPP;
  1353. rrpriv = netdev_priv(dev);
  1354. switch(cmd){
  1355. case SIOCRRGFW:
  1356. if (!capable(CAP_SYS_RAWIO)){
  1357. return -EPERM;
  1358. }
  1359. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1360. if (!image){
  1361. printk(KERN_ERR "%s: Unable to allocate memory "
  1362. "for EEPROM image\n", dev->name);
  1363. return -ENOMEM;
  1364. }
  1365. if (rrpriv->fw_running){
  1366. printk("%s: Firmware already running\n", dev->name);
  1367. error = -EPERM;
  1368. goto gf_out;
  1369. }
  1370. spin_lock_irqsave(&rrpriv->lock, flags);
  1371. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1372. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1373. if (i != EEPROM_BYTES){
  1374. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1375. dev->name);
  1376. error = -EFAULT;
  1377. goto gf_out;
  1378. }
  1379. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1380. if (error)
  1381. error = -EFAULT;
  1382. gf_out:
  1383. kfree(image);
  1384. return error;
  1385. case SIOCRRPFW:
  1386. if (!capable(CAP_SYS_RAWIO)){
  1387. return -EPERM;
  1388. }
  1389. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1390. oldimage = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1391. if (!image || !oldimage) {
  1392. printk(KERN_ERR "%s: Unable to allocate memory "
  1393. "for EEPROM image\n", dev->name);
  1394. error = -ENOMEM;
  1395. goto wf_out;
  1396. }
  1397. error = copy_from_user(image, rq->ifr_data, EEPROM_BYTES);
  1398. if (error) {
  1399. error = -EFAULT;
  1400. goto wf_out;
  1401. }
  1402. if (rrpriv->fw_running){
  1403. printk("%s: Firmware already running\n", dev->name);
  1404. error = -EPERM;
  1405. goto wf_out;
  1406. }
  1407. printk("%s: Updating EEPROM firmware\n", dev->name);
  1408. spin_lock_irqsave(&rrpriv->lock, flags);
  1409. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1410. if (error)
  1411. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1412. dev->name);
  1413. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1414. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1415. if (i != EEPROM_BYTES)
  1416. printk(KERN_ERR "%s: Error reading back EEPROM "
  1417. "image\n", dev->name);
  1418. error = memcmp(image, oldimage, EEPROM_BYTES);
  1419. if (error){
  1420. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1421. dev->name);
  1422. error = -EFAULT;
  1423. }
  1424. wf_out:
  1425. kfree(oldimage);
  1426. kfree(image);
  1427. return error;
  1428. case SIOCRRID:
  1429. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1430. default:
  1431. return error;
  1432. }
  1433. }
  1434. static struct pci_device_id rr_pci_tbl[] = {
  1435. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1436. PCI_ANY_ID, PCI_ANY_ID, },
  1437. { 0,}
  1438. };
  1439. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1440. static struct pci_driver rr_driver = {
  1441. .name = "rrunner",
  1442. .id_table = rr_pci_tbl,
  1443. .probe = rr_init_one,
  1444. .remove = __devexit_p(rr_remove_one),
  1445. };
  1446. static int __init rr_init_module(void)
  1447. {
  1448. return pci_register_driver(&rr_driver);
  1449. }
  1450. static void __exit rr_cleanup_module(void)
  1451. {
  1452. pci_unregister_driver(&rr_driver);
  1453. }
  1454. module_init(rr_init_module);
  1455. module_exit(rr_cleanup_module);
  1456. /*
  1457. * Local variables:
  1458. * compile-command: "gcc -D__KERNEL__ -I../../include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -DMODULE -DMODVERSIONS -include ../../include/linux/modversions.h -c rrunner.c"
  1459. * End:
  1460. */