book3s_hv_rm_mmu.c 13 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
  7. */
  8. #include <linux/types.h>
  9. #include <linux/string.h>
  10. #include <linux/kvm.h>
  11. #include <linux/kvm_host.h>
  12. #include <linux/hugetlb.h>
  13. #include <linux/module.h>
  14. #include <asm/tlbflush.h>
  15. #include <asm/kvm_ppc.h>
  16. #include <asm/kvm_book3s.h>
  17. #include <asm/mmu-hash64.h>
  18. #include <asm/hvcall.h>
  19. #include <asm/synch.h>
  20. #include <asm/ppc-opcode.h>
  21. /*
  22. * Since this file is built in even if KVM is a module, we need
  23. * a local copy of this function for the case where kvm_main.c is
  24. * modular.
  25. */
  26. static struct kvm_memory_slot *builtin_gfn_to_memslot(struct kvm *kvm,
  27. gfn_t gfn)
  28. {
  29. struct kvm_memslots *slots;
  30. struct kvm_memory_slot *memslot;
  31. slots = kvm_memslots(kvm);
  32. kvm_for_each_memslot(memslot, slots)
  33. if (gfn >= memslot->base_gfn &&
  34. gfn < memslot->base_gfn + memslot->npages)
  35. return memslot;
  36. return NULL;
  37. }
  38. /* Translate address of a vmalloc'd thing to a linear map address */
  39. static void *real_vmalloc_addr(void *x)
  40. {
  41. unsigned long addr = (unsigned long) x;
  42. pte_t *p;
  43. p = find_linux_pte(swapper_pg_dir, addr);
  44. if (!p || !pte_present(*p))
  45. return NULL;
  46. /* assume we don't have huge pages in vmalloc space... */
  47. addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK);
  48. return __va(addr);
  49. }
  50. /*
  51. * Add this HPTE into the chain for the real page.
  52. * Must be called with the chain locked; it unlocks the chain.
  53. */
  54. static void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev,
  55. unsigned long *rmap, long pte_index, int realmode)
  56. {
  57. struct revmap_entry *head, *tail;
  58. unsigned long i;
  59. if (*rmap & KVMPPC_RMAP_PRESENT) {
  60. i = *rmap & KVMPPC_RMAP_INDEX;
  61. head = &kvm->arch.revmap[i];
  62. if (realmode)
  63. head = real_vmalloc_addr(head);
  64. tail = &kvm->arch.revmap[head->back];
  65. if (realmode)
  66. tail = real_vmalloc_addr(tail);
  67. rev->forw = i;
  68. rev->back = head->back;
  69. tail->forw = pte_index;
  70. head->back = pte_index;
  71. } else {
  72. rev->forw = rev->back = pte_index;
  73. i = pte_index;
  74. }
  75. smp_wmb();
  76. *rmap = i | KVMPPC_RMAP_REFERENCED | KVMPPC_RMAP_PRESENT; /* unlock */
  77. }
  78. /* Remove this HPTE from the chain for a real page */
  79. static void remove_revmap_chain(struct kvm *kvm, long pte_index,
  80. unsigned long hpte_v)
  81. {
  82. struct revmap_entry *rev, *next, *prev;
  83. unsigned long gfn, ptel, head;
  84. struct kvm_memory_slot *memslot;
  85. unsigned long *rmap;
  86. rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
  87. ptel = rev->guest_rpte;
  88. gfn = hpte_rpn(ptel, hpte_page_size(hpte_v, ptel));
  89. memslot = builtin_gfn_to_memslot(kvm, gfn);
  90. if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
  91. return;
  92. rmap = real_vmalloc_addr(&memslot->rmap[gfn - memslot->base_gfn]);
  93. lock_rmap(rmap);
  94. head = *rmap & KVMPPC_RMAP_INDEX;
  95. next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]);
  96. prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]);
  97. next->back = rev->back;
  98. prev->forw = rev->forw;
  99. if (head == pte_index) {
  100. head = rev->forw;
  101. if (head == pte_index)
  102. *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
  103. else
  104. *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head;
  105. }
  106. unlock_rmap(rmap);
  107. }
  108. long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
  109. long pte_index, unsigned long pteh, unsigned long ptel)
  110. {
  111. struct kvm *kvm = vcpu->kvm;
  112. unsigned long i, pa, gpa, gfn, psize;
  113. unsigned long slot_fn;
  114. unsigned long *hpte;
  115. struct revmap_entry *rev;
  116. unsigned long g_ptel = ptel;
  117. struct kvm_memory_slot *memslot;
  118. unsigned long *physp, pte_size;
  119. unsigned long is_io;
  120. unsigned long *rmap;
  121. bool realmode = vcpu->arch.vcore->vcore_state == VCORE_RUNNING;
  122. psize = hpte_page_size(pteh, ptel);
  123. if (!psize)
  124. return H_PARAMETER;
  125. /* Find the memslot (if any) for this address */
  126. gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
  127. gfn = gpa >> PAGE_SHIFT;
  128. memslot = builtin_gfn_to_memslot(kvm, gfn);
  129. if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)))
  130. return H_PARAMETER;
  131. /* Check if the requested page fits entirely in the memslot. */
  132. if (!slot_is_aligned(memslot, psize))
  133. return H_PARAMETER;
  134. slot_fn = gfn - memslot->base_gfn;
  135. rmap = &memslot->rmap[slot_fn];
  136. physp = kvm->arch.slot_phys[memslot->id];
  137. if (!physp)
  138. return H_PARAMETER;
  139. physp += slot_fn;
  140. if (realmode)
  141. physp = real_vmalloc_addr(physp);
  142. pa = *physp;
  143. if (!pa)
  144. return H_TOO_HARD;
  145. is_io = pa & (HPTE_R_I | HPTE_R_W);
  146. pte_size = PAGE_SIZE << (pa & KVMPPC_PAGE_ORDER_MASK);
  147. pa &= PAGE_MASK;
  148. if (pte_size < psize)
  149. return H_PARAMETER;
  150. if (pa && pte_size > psize)
  151. pa |= gpa & (pte_size - 1);
  152. ptel &= ~(HPTE_R_PP0 - psize);
  153. ptel |= pa;
  154. /* Check WIMG */
  155. if (!hpte_cache_flags_ok(ptel, is_io)) {
  156. if (is_io)
  157. return H_PARAMETER;
  158. /*
  159. * Allow guest to map emulated device memory as
  160. * uncacheable, but actually make it cacheable.
  161. */
  162. ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G);
  163. ptel |= HPTE_R_M;
  164. }
  165. pteh &= ~0x60UL;
  166. pteh |= HPTE_V_VALID;
  167. if (pte_index >= HPT_NPTE)
  168. return H_PARAMETER;
  169. if (likely((flags & H_EXACT) == 0)) {
  170. pte_index &= ~7UL;
  171. hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  172. for (i = 0; i < 8; ++i) {
  173. if ((*hpte & HPTE_V_VALID) == 0 &&
  174. try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID))
  175. break;
  176. hpte += 2;
  177. }
  178. if (i == 8) {
  179. /*
  180. * Since try_lock_hpte doesn't retry (not even stdcx.
  181. * failures), it could be that there is a free slot
  182. * but we transiently failed to lock it. Try again,
  183. * actually locking each slot and checking it.
  184. */
  185. hpte -= 16;
  186. for (i = 0; i < 8; ++i) {
  187. while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
  188. cpu_relax();
  189. if ((*hpte & HPTE_V_VALID) == 0)
  190. break;
  191. *hpte &= ~HPTE_V_HVLOCK;
  192. hpte += 2;
  193. }
  194. if (i == 8)
  195. return H_PTEG_FULL;
  196. }
  197. pte_index += i;
  198. } else {
  199. hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  200. if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID)) {
  201. /* Lock the slot and check again */
  202. while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
  203. cpu_relax();
  204. if (*hpte & HPTE_V_VALID) {
  205. *hpte &= ~HPTE_V_HVLOCK;
  206. return H_PTEG_FULL;
  207. }
  208. }
  209. }
  210. /* Save away the guest's idea of the second HPTE dword */
  211. rev = &kvm->arch.revmap[pte_index];
  212. if (realmode)
  213. rev = real_vmalloc_addr(rev);
  214. if (rev)
  215. rev->guest_rpte = g_ptel;
  216. /* Link HPTE into reverse-map chain */
  217. if (realmode)
  218. rmap = real_vmalloc_addr(rmap);
  219. lock_rmap(rmap);
  220. kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index, realmode);
  221. hpte[1] = ptel;
  222. /* Write the first HPTE dword, unlocking the HPTE and making it valid */
  223. eieio();
  224. hpte[0] = pteh;
  225. asm volatile("ptesync" : : : "memory");
  226. vcpu->arch.gpr[4] = pte_index;
  227. return H_SUCCESS;
  228. }
  229. EXPORT_SYMBOL_GPL(kvmppc_h_enter);
  230. #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
  231. static inline int try_lock_tlbie(unsigned int *lock)
  232. {
  233. unsigned int tmp, old;
  234. unsigned int token = LOCK_TOKEN;
  235. asm volatile("1:lwarx %1,0,%2\n"
  236. " cmpwi cr0,%1,0\n"
  237. " bne 2f\n"
  238. " stwcx. %3,0,%2\n"
  239. " bne- 1b\n"
  240. " isync\n"
  241. "2:"
  242. : "=&r" (tmp), "=&r" (old)
  243. : "r" (lock), "r" (token)
  244. : "cc", "memory");
  245. return old == 0;
  246. }
  247. long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,
  248. unsigned long pte_index, unsigned long avpn,
  249. unsigned long va)
  250. {
  251. struct kvm *kvm = vcpu->kvm;
  252. unsigned long *hpte;
  253. unsigned long v, r, rb;
  254. if (pte_index >= HPT_NPTE)
  255. return H_PARAMETER;
  256. hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  257. while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
  258. cpu_relax();
  259. if ((hpte[0] & HPTE_V_VALID) == 0 ||
  260. ((flags & H_AVPN) && (hpte[0] & ~0x7fUL) != avpn) ||
  261. ((flags & H_ANDCOND) && (hpte[0] & avpn) != 0)) {
  262. hpte[0] &= ~HPTE_V_HVLOCK;
  263. return H_NOT_FOUND;
  264. }
  265. if (atomic_read(&kvm->online_vcpus) == 1)
  266. flags |= H_LOCAL;
  267. vcpu->arch.gpr[4] = v = hpte[0] & ~HPTE_V_HVLOCK;
  268. vcpu->arch.gpr[5] = r = hpte[1];
  269. rb = compute_tlbie_rb(v, r, pte_index);
  270. remove_revmap_chain(kvm, pte_index, v);
  271. smp_wmb();
  272. hpte[0] = 0;
  273. if (!(flags & H_LOCAL)) {
  274. while(!try_lock_tlbie(&kvm->arch.tlbie_lock))
  275. cpu_relax();
  276. asm volatile("ptesync" : : : "memory");
  277. asm volatile(PPC_TLBIE(%1,%0)"; eieio; tlbsync"
  278. : : "r" (rb), "r" (kvm->arch.lpid));
  279. asm volatile("ptesync" : : : "memory");
  280. kvm->arch.tlbie_lock = 0;
  281. } else {
  282. asm volatile("ptesync" : : : "memory");
  283. asm volatile("tlbiel %0" : : "r" (rb));
  284. asm volatile("ptesync" : : : "memory");
  285. }
  286. return H_SUCCESS;
  287. }
  288. long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
  289. {
  290. struct kvm *kvm = vcpu->kvm;
  291. unsigned long *args = &vcpu->arch.gpr[4];
  292. unsigned long *hp, tlbrb[4];
  293. long int i, found;
  294. long int n_inval = 0;
  295. unsigned long flags, req, pte_index;
  296. long int local = 0;
  297. long int ret = H_SUCCESS;
  298. if (atomic_read(&kvm->online_vcpus) == 1)
  299. local = 1;
  300. for (i = 0; i < 4; ++i) {
  301. pte_index = args[i * 2];
  302. flags = pte_index >> 56;
  303. pte_index &= ((1ul << 56) - 1);
  304. req = flags >> 6;
  305. flags &= 3;
  306. if (req == 3)
  307. break;
  308. if (req != 1 || flags == 3 ||
  309. pte_index >= HPT_NPTE) {
  310. /* parameter error */
  311. args[i * 2] = ((0xa0 | flags) << 56) + pte_index;
  312. ret = H_PARAMETER;
  313. break;
  314. }
  315. hp = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  316. while (!try_lock_hpte(hp, HPTE_V_HVLOCK))
  317. cpu_relax();
  318. found = 0;
  319. if (hp[0] & HPTE_V_VALID) {
  320. switch (flags & 3) {
  321. case 0: /* absolute */
  322. found = 1;
  323. break;
  324. case 1: /* andcond */
  325. if (!(hp[0] & args[i * 2 + 1]))
  326. found = 1;
  327. break;
  328. case 2: /* AVPN */
  329. if ((hp[0] & ~0x7fUL) == args[i * 2 + 1])
  330. found = 1;
  331. break;
  332. }
  333. }
  334. if (!found) {
  335. hp[0] &= ~HPTE_V_HVLOCK;
  336. args[i * 2] = ((0x90 | flags) << 56) + pte_index;
  337. continue;
  338. }
  339. /* insert R and C bits from PTE */
  340. flags |= (hp[1] >> 5) & 0x0c;
  341. args[i * 2] = ((0x80 | flags) << 56) + pte_index;
  342. tlbrb[n_inval++] = compute_tlbie_rb(hp[0], hp[1], pte_index);
  343. remove_revmap_chain(kvm, pte_index, hp[0]);
  344. smp_wmb();
  345. hp[0] = 0;
  346. }
  347. if (n_inval == 0)
  348. return ret;
  349. if (!local) {
  350. while(!try_lock_tlbie(&kvm->arch.tlbie_lock))
  351. cpu_relax();
  352. asm volatile("ptesync" : : : "memory");
  353. for (i = 0; i < n_inval; ++i)
  354. asm volatile(PPC_TLBIE(%1,%0)
  355. : : "r" (tlbrb[i]), "r" (kvm->arch.lpid));
  356. asm volatile("eieio; tlbsync; ptesync" : : : "memory");
  357. kvm->arch.tlbie_lock = 0;
  358. } else {
  359. asm volatile("ptesync" : : : "memory");
  360. for (i = 0; i < n_inval; ++i)
  361. asm volatile("tlbiel %0" : : "r" (tlbrb[i]));
  362. asm volatile("ptesync" : : : "memory");
  363. }
  364. return ret;
  365. }
  366. long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,
  367. unsigned long pte_index, unsigned long avpn,
  368. unsigned long va)
  369. {
  370. struct kvm *kvm = vcpu->kvm;
  371. unsigned long *hpte;
  372. struct revmap_entry *rev;
  373. unsigned long v, r, rb, mask, bits;
  374. if (pte_index >= HPT_NPTE)
  375. return H_PARAMETER;
  376. hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  377. while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
  378. cpu_relax();
  379. if ((hpte[0] & HPTE_V_VALID) == 0 ||
  380. ((flags & H_AVPN) && (hpte[0] & ~0x7fUL) != avpn)) {
  381. hpte[0] &= ~HPTE_V_HVLOCK;
  382. return H_NOT_FOUND;
  383. }
  384. if (atomic_read(&kvm->online_vcpus) == 1)
  385. flags |= H_LOCAL;
  386. v = hpte[0];
  387. bits = (flags << 55) & HPTE_R_PP0;
  388. bits |= (flags << 48) & HPTE_R_KEY_HI;
  389. bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
  390. /* Update guest view of 2nd HPTE dword */
  391. mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N |
  392. HPTE_R_KEY_HI | HPTE_R_KEY_LO;
  393. rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
  394. if (rev) {
  395. r = (rev->guest_rpte & ~mask) | bits;
  396. rev->guest_rpte = r;
  397. }
  398. r = (hpte[1] & ~mask) | bits;
  399. /* Update HPTE */
  400. rb = compute_tlbie_rb(v, r, pte_index);
  401. hpte[0] = v & ~HPTE_V_VALID;
  402. if (!(flags & H_LOCAL)) {
  403. while(!try_lock_tlbie(&kvm->arch.tlbie_lock))
  404. cpu_relax();
  405. asm volatile("ptesync" : : : "memory");
  406. asm volatile(PPC_TLBIE(%1,%0)"; eieio; tlbsync"
  407. : : "r" (rb), "r" (kvm->arch.lpid));
  408. asm volatile("ptesync" : : : "memory");
  409. kvm->arch.tlbie_lock = 0;
  410. } else {
  411. asm volatile("ptesync" : : : "memory");
  412. asm volatile("tlbiel %0" : : "r" (rb));
  413. asm volatile("ptesync" : : : "memory");
  414. }
  415. hpte[1] = r;
  416. eieio();
  417. hpte[0] = v & ~HPTE_V_HVLOCK;
  418. asm volatile("ptesync" : : : "memory");
  419. return H_SUCCESS;
  420. }
  421. long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags,
  422. unsigned long pte_index)
  423. {
  424. struct kvm *kvm = vcpu->kvm;
  425. unsigned long *hpte, r;
  426. int i, n = 1;
  427. struct revmap_entry *rev = NULL;
  428. if (pte_index >= HPT_NPTE)
  429. return H_PARAMETER;
  430. if (flags & H_READ_4) {
  431. pte_index &= ~3;
  432. n = 4;
  433. }
  434. if (flags & H_R_XLATE)
  435. rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
  436. for (i = 0; i < n; ++i, ++pte_index) {
  437. hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
  438. r = hpte[1];
  439. if (hpte[0] & HPTE_V_VALID) {
  440. if (rev)
  441. r = rev[i].guest_rpte;
  442. else
  443. r = hpte[1] | HPTE_R_RPN;
  444. }
  445. vcpu->arch.gpr[4 + i * 2] = hpte[0];
  446. vcpu->arch.gpr[5 + i * 2] = r;
  447. }
  448. return H_SUCCESS;
  449. }