patch_sigmatel.c 110 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/slab.h>
  30. #include <linux/pci.h>
  31. #include <sound/core.h>
  32. #include <sound/asoundef.h>
  33. #include "hda_codec.h"
  34. #include "hda_local.h"
  35. #define NUM_CONTROL_ALLOC 32
  36. #define STAC_HP_EVENT 0x37
  37. enum {
  38. STAC_REF,
  39. STAC_9200_DELL_D21,
  40. STAC_9200_DELL_D22,
  41. STAC_9200_DELL_D23,
  42. STAC_9200_DELL_M21,
  43. STAC_9200_DELL_M22,
  44. STAC_9200_DELL_M23,
  45. STAC_9200_DELL_M24,
  46. STAC_9200_DELL_M25,
  47. STAC_9200_DELL_M26,
  48. STAC_9200_DELL_M27,
  49. STAC_9200_GATEWAY,
  50. STAC_9200_MODELS
  51. };
  52. enum {
  53. STAC_9205_REF,
  54. STAC_9205_DELL_M42,
  55. STAC_9205_DELL_M43,
  56. STAC_9205_DELL_M44,
  57. STAC_9205_MODELS
  58. };
  59. enum {
  60. STAC_92HD73XX_REF,
  61. STAC_92HD73XX_MODELS
  62. };
  63. enum {
  64. STAC_92HD71BXX_REF,
  65. STAC_92HD71BXX_MODELS
  66. };
  67. enum {
  68. STAC_925x_REF,
  69. STAC_M2_2,
  70. STAC_MA6,
  71. STAC_PA6,
  72. STAC_925x_MODELS
  73. };
  74. enum {
  75. STAC_D945_REF,
  76. STAC_D945GTP3,
  77. STAC_D945GTP5,
  78. STAC_INTEL_MAC_V1,
  79. STAC_INTEL_MAC_V2,
  80. STAC_INTEL_MAC_V3,
  81. STAC_INTEL_MAC_V4,
  82. STAC_INTEL_MAC_V5,
  83. /* for backward compatibility */
  84. STAC_MACMINI,
  85. STAC_MACBOOK,
  86. STAC_MACBOOK_PRO_V1,
  87. STAC_MACBOOK_PRO_V2,
  88. STAC_IMAC_INTEL,
  89. STAC_IMAC_INTEL_20,
  90. STAC_922X_DELL_D81,
  91. STAC_922X_DELL_D82,
  92. STAC_922X_DELL_M81,
  93. STAC_922X_DELL_M82,
  94. STAC_922X_MODELS
  95. };
  96. enum {
  97. STAC_D965_REF,
  98. STAC_D965_3ST,
  99. STAC_D965_5ST,
  100. STAC_DELL_3ST,
  101. STAC_DELL_BIOS,
  102. STAC_927X_MODELS
  103. };
  104. struct sigmatel_spec {
  105. struct snd_kcontrol_new *mixers[4];
  106. unsigned int num_mixers;
  107. int board_config;
  108. unsigned int surr_switch: 1;
  109. unsigned int line_switch: 1;
  110. unsigned int mic_switch: 1;
  111. unsigned int alt_switch: 1;
  112. unsigned int hp_detect: 1;
  113. unsigned int gpio_mute: 1;
  114. unsigned int gpio_mask, gpio_data;
  115. unsigned char aloopback_mask;
  116. unsigned char aloopback_shift;
  117. /* playback */
  118. struct hda_multi_out multiout;
  119. hda_nid_t dac_nids[5];
  120. /* capture */
  121. hda_nid_t *adc_nids;
  122. unsigned int num_adcs;
  123. hda_nid_t *mux_nids;
  124. unsigned int num_muxes;
  125. hda_nid_t *dmic_nids;
  126. unsigned int num_dmics;
  127. hda_nid_t *dmux_nids;
  128. unsigned int num_dmuxes;
  129. hda_nid_t dig_in_nid;
  130. /* pin widgets */
  131. hda_nid_t *pin_nids;
  132. unsigned int num_pins;
  133. unsigned int *pin_configs;
  134. unsigned int *bios_pin_configs;
  135. /* codec specific stuff */
  136. struct hda_verb *init;
  137. struct snd_kcontrol_new *mixer;
  138. /* capture source */
  139. struct hda_input_mux *dinput_mux;
  140. unsigned int cur_dmux[2];
  141. struct hda_input_mux *input_mux;
  142. unsigned int cur_mux[3];
  143. /* i/o switches */
  144. unsigned int io_switch[2];
  145. unsigned int clfe_swap;
  146. unsigned int aloopback;
  147. struct hda_pcm pcm_rec[2]; /* PCM information */
  148. /* dynamic controls and input_mux */
  149. struct auto_pin_cfg autocfg;
  150. unsigned int num_kctl_alloc, num_kctl_used;
  151. struct snd_kcontrol_new *kctl_alloc;
  152. struct hda_input_mux private_dimux;
  153. struct hda_input_mux private_imux;
  154. };
  155. static hda_nid_t stac9200_adc_nids[1] = {
  156. 0x03,
  157. };
  158. static hda_nid_t stac9200_mux_nids[1] = {
  159. 0x0c,
  160. };
  161. static hda_nid_t stac9200_dac_nids[1] = {
  162. 0x02,
  163. };
  164. static hda_nid_t stac92hd73xx_adc_nids[2] = {
  165. 0x1a, 0x1b
  166. };
  167. #define STAC92HD73XX_NUM_DMICS 2
  168. static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
  169. 0x13, 0x14, 0
  170. };
  171. #define STAC92HD73_DAC_COUNT 5
  172. static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
  173. 0x15, 0x16, 0x17, 0x18, 0x19,
  174. };
  175. static hda_nid_t stac92hd73xx_mux_nids[4] = {
  176. 0x28, 0x29, 0x2a, 0x2b,
  177. };
  178. static hda_nid_t stac92hd73xx_dmux_nids[2] = {
  179. 0x20, 0x21,
  180. };
  181. static hda_nid_t stac92hd71bxx_adc_nids[2] = {
  182. 0x12, 0x13,
  183. };
  184. static hda_nid_t stac92hd71bxx_mux_nids[2] = {
  185. 0x1a, 0x1b
  186. };
  187. static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
  188. 0x1c,
  189. };
  190. static hda_nid_t stac92hd71bxx_dac_nids[2] = {
  191. 0x10, /*0x11, */
  192. };
  193. #define STAC92HD71BXX_NUM_DMICS 2
  194. static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
  195. 0x18, 0x19, 0
  196. };
  197. static hda_nid_t stac925x_adc_nids[1] = {
  198. 0x03,
  199. };
  200. static hda_nid_t stac925x_mux_nids[1] = {
  201. 0x0f,
  202. };
  203. static hda_nid_t stac925x_dac_nids[1] = {
  204. 0x02,
  205. };
  206. #define STAC925X_NUM_DMICS 1
  207. static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
  208. 0x15, 0
  209. };
  210. static hda_nid_t stac925x_dmux_nids[1] = {
  211. 0x14,
  212. };
  213. static hda_nid_t stac922x_adc_nids[2] = {
  214. 0x06, 0x07,
  215. };
  216. static hda_nid_t stac922x_mux_nids[2] = {
  217. 0x12, 0x13,
  218. };
  219. static hda_nid_t stac927x_adc_nids[3] = {
  220. 0x07, 0x08, 0x09
  221. };
  222. static hda_nid_t stac927x_mux_nids[3] = {
  223. 0x15, 0x16, 0x17
  224. };
  225. static hda_nid_t stac927x_dmux_nids[1] = {
  226. 0x1b,
  227. };
  228. #define STAC927X_NUM_DMICS 2
  229. static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
  230. 0x13, 0x14, 0
  231. };
  232. static hda_nid_t stac9205_adc_nids[2] = {
  233. 0x12, 0x13
  234. };
  235. static hda_nid_t stac9205_mux_nids[2] = {
  236. 0x19, 0x1a
  237. };
  238. static hda_nid_t stac9205_dmux_nids[1] = {
  239. 0x1d,
  240. };
  241. #define STAC9205_NUM_DMICS 2
  242. static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
  243. 0x17, 0x18, 0
  244. };
  245. static hda_nid_t stac9200_pin_nids[8] = {
  246. 0x08, 0x09, 0x0d, 0x0e,
  247. 0x0f, 0x10, 0x11, 0x12,
  248. };
  249. static hda_nid_t stac925x_pin_nids[8] = {
  250. 0x07, 0x08, 0x0a, 0x0b,
  251. 0x0c, 0x0d, 0x10, 0x11,
  252. };
  253. static hda_nid_t stac922x_pin_nids[10] = {
  254. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  255. 0x0f, 0x10, 0x11, 0x15, 0x1b,
  256. };
  257. static hda_nid_t stac92hd73xx_pin_nids[12] = {
  258. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  259. 0x0f, 0x10, 0x11, 0x12, 0x13,
  260. 0x14, 0x22
  261. };
  262. static hda_nid_t stac92hd71bxx_pin_nids[10] = {
  263. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  264. 0x0f, 0x14, 0x18, 0x19, 0x1e,
  265. };
  266. static hda_nid_t stac927x_pin_nids[14] = {
  267. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  268. 0x0f, 0x10, 0x11, 0x12, 0x13,
  269. 0x14, 0x21, 0x22, 0x23,
  270. };
  271. static hda_nid_t stac9205_pin_nids[12] = {
  272. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  273. 0x0f, 0x14, 0x16, 0x17, 0x18,
  274. 0x21, 0x22,
  275. };
  276. static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
  277. struct snd_ctl_elem_info *uinfo)
  278. {
  279. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  280. struct sigmatel_spec *spec = codec->spec;
  281. return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
  282. }
  283. static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
  284. struct snd_ctl_elem_value *ucontrol)
  285. {
  286. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  287. struct sigmatel_spec *spec = codec->spec;
  288. unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  289. ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
  290. return 0;
  291. }
  292. static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
  293. struct snd_ctl_elem_value *ucontrol)
  294. {
  295. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  296. struct sigmatel_spec *spec = codec->spec;
  297. unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  298. return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
  299. spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
  300. }
  301. static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  302. {
  303. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  304. struct sigmatel_spec *spec = codec->spec;
  305. return snd_hda_input_mux_info(spec->input_mux, uinfo);
  306. }
  307. static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  308. {
  309. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct sigmatel_spec *spec = codec->spec;
  311. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  312. ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
  313. return 0;
  314. }
  315. static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  316. {
  317. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  318. struct sigmatel_spec *spec = codec->spec;
  319. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  320. return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
  321. spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
  322. }
  323. #define stac92xx_aloopback_info snd_ctl_boolean_mono_info
  324. static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_value *ucontrol)
  326. {
  327. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  328. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  329. struct sigmatel_spec *spec = codec->spec;
  330. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  331. (spec->aloopback_mask << idx));
  332. return 0;
  333. }
  334. static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
  335. struct snd_ctl_elem_value *ucontrol)
  336. {
  337. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  338. struct sigmatel_spec *spec = codec->spec;
  339. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  340. unsigned int dac_mode;
  341. unsigned int val, idx_val;
  342. idx_val = spec->aloopback_mask << idx;
  343. if (ucontrol->value.integer.value[0])
  344. val = spec->aloopback | idx_val;
  345. else
  346. val = spec->aloopback & ~idx_val;
  347. if (spec->aloopback == val)
  348. return 0;
  349. spec->aloopback = val;
  350. /* Only return the bits defined by the shift value of the
  351. * first two bytes of the mask
  352. */
  353. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  354. kcontrol->private_value & 0xFFFF, 0x0);
  355. dac_mode >>= spec->aloopback_shift;
  356. if (spec->aloopback & idx_val) {
  357. snd_hda_power_up(codec);
  358. dac_mode |= idx_val;
  359. } else {
  360. snd_hda_power_down(codec);
  361. dac_mode &= ~idx_val;
  362. }
  363. snd_hda_codec_write_cache(codec, codec->afg, 0,
  364. kcontrol->private_value >> 16, dac_mode);
  365. return 1;
  366. }
  367. static struct hda_verb stac9200_core_init[] = {
  368. /* set dac0mux for dac converter */
  369. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  370. {}
  371. };
  372. static struct hda_verb stac9200_eapd_init[] = {
  373. /* set dac0mux for dac converter */
  374. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  375. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  376. {}
  377. };
  378. static struct hda_verb stac92hd73xx_6ch_core_init[] = {
  379. /* set master volume and direct control */
  380. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  381. /* setup audio connections */
  382. { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
  383. { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
  384. { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
  385. /* setup adcs to point to mixer */
  386. { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
  387. { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
  388. { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  389. { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  390. { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  391. /* setup import muxs */
  392. { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
  393. { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
  394. { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
  395. { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
  396. {}
  397. };
  398. static struct hda_verb stac92hd73xx_8ch_core_init[] = {
  399. /* set master volume and direct control */
  400. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  401. /* setup audio connections */
  402. { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
  403. { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
  404. { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
  405. /* connect hp ports to dac3 */
  406. { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
  407. { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
  408. /* setup adcs to point to mixer */
  409. { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
  410. { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
  411. { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  412. { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  413. { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  414. /* setup import muxs */
  415. { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
  416. { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
  417. { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
  418. { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
  419. {}
  420. };
  421. static struct hda_verb stac92hd73xx_10ch_core_init[] = {
  422. /* set master volume and direct control */
  423. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  424. /* setup audio connections */
  425. { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
  426. { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
  427. { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
  428. /* dac3 is connected to import3 mux */
  429. { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
  430. /* connect hp ports to dac4 */
  431. { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
  432. { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
  433. /* setup adcs to point to mixer */
  434. { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
  435. { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
  436. { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  437. { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  438. { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  439. /* setup import muxs */
  440. { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
  441. { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
  442. { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
  443. { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
  444. {}
  445. };
  446. static struct hda_verb stac92hd71bxx_core_init[] = {
  447. /* set master volume and direct control */
  448. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  449. /* connect headphone jack to dac1 */
  450. { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
  451. { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
  452. /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
  453. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  454. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  455. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  456. /* unmute mono out node */
  457. { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  458. };
  459. static struct hda_verb stac92hd71bxx_analog_core_init[] = {
  460. /* set master volume and direct control */
  461. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  462. /* connect headphone jack to dac1 */
  463. { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
  464. /* connect ports 0d and 0f to audio mixer */
  465. { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
  466. { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
  467. { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
  468. /* unmute dac0 input in audio mixer */
  469. { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
  470. /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
  471. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  472. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  473. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  474. /* unmute mono out node */
  475. { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  476. {}
  477. };
  478. static struct hda_verb stac925x_core_init[] = {
  479. /* set dac0mux for dac converter */
  480. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  481. {}
  482. };
  483. static struct hda_verb stac922x_core_init[] = {
  484. /* set master volume and direct control */
  485. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  486. {}
  487. };
  488. static struct hda_verb d965_core_init[] = {
  489. /* set master volume and direct control */
  490. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  491. /* unmute node 0x1b */
  492. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  493. /* select node 0x03 as DAC */
  494. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  495. {}
  496. };
  497. static struct hda_verb stac927x_core_init[] = {
  498. /* set master volume and direct control */
  499. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  500. {}
  501. };
  502. static struct hda_verb stac9205_core_init[] = {
  503. /* set master volume and direct control */
  504. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  505. {}
  506. };
  507. #define STAC_INPUT_SOURCE(cnt) \
  508. { \
  509. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  510. .name = "Input Source", \
  511. .count = cnt, \
  512. .info = stac92xx_mux_enum_info, \
  513. .get = stac92xx_mux_enum_get, \
  514. .put = stac92xx_mux_enum_put, \
  515. }
  516. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  517. { \
  518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  519. .name = "Analog Loopback", \
  520. .count = cnt, \
  521. .info = stac92xx_aloopback_info, \
  522. .get = stac92xx_aloopback_get, \
  523. .put = stac92xx_aloopback_put, \
  524. .private_value = verb_read | (verb_write << 16), \
  525. }
  526. static struct snd_kcontrol_new stac9200_mixer[] = {
  527. HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
  528. HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
  529. STAC_INPUT_SOURCE(1),
  530. HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
  531. HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
  532. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
  533. { } /* end */
  534. };
  535. static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
  536. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
  537. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
  538. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
  539. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
  540. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
  541. HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
  542. HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
  543. HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
  544. HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
  545. HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
  546. HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
  547. HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
  548. HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
  549. HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
  550. HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
  551. { } /* end */
  552. };
  553. static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
  554. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
  555. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
  556. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
  557. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
  558. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
  559. HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
  560. HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
  561. HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
  562. HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
  563. HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
  564. HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
  565. HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
  566. HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
  567. HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
  568. HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
  569. { } /* end */
  570. };
  571. static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
  572. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
  573. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
  574. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
  575. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
  576. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
  577. HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
  578. HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
  579. HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
  580. HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
  581. HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
  582. HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
  583. HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
  584. HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
  585. HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
  586. HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
  587. { } /* end */
  588. };
  589. static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
  590. STAC_INPUT_SOURCE(2),
  591. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
  592. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
  593. HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
  594. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
  595. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
  596. HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
  597. HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
  598. HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
  599. { } /* end */
  600. };
  601. static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
  602. STAC_INPUT_SOURCE(2),
  603. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
  604. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
  605. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
  606. HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
  607. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
  608. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
  609. HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
  610. { } /* end */
  611. };
  612. static struct snd_kcontrol_new stac925x_mixer[] = {
  613. STAC_INPUT_SOURCE(1),
  614. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
  615. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
  616. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
  617. { } /* end */
  618. };
  619. static struct snd_kcontrol_new stac9205_mixer[] = {
  620. STAC_INPUT_SOURCE(2),
  621. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
  622. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
  623. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
  624. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
  625. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
  626. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
  627. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
  628. { } /* end */
  629. };
  630. /* This needs to be generated dynamically based on sequence */
  631. static struct snd_kcontrol_new stac922x_mixer[] = {
  632. STAC_INPUT_SOURCE(2),
  633. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
  634. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
  635. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
  636. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
  637. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
  638. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
  639. { } /* end */
  640. };
  641. static struct snd_kcontrol_new stac927x_mixer[] = {
  642. STAC_INPUT_SOURCE(3),
  643. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
  644. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
  645. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
  646. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
  647. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
  648. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
  649. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
  650. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
  651. HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
  652. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
  653. { } /* end */
  654. };
  655. static struct snd_kcontrol_new stac_dmux_mixer = {
  656. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  657. .name = "Digital Input Source",
  658. /* count set later */
  659. .info = stac92xx_dmux_enum_info,
  660. .get = stac92xx_dmux_enum_get,
  661. .put = stac92xx_dmux_enum_put,
  662. };
  663. static int stac92xx_build_controls(struct hda_codec *codec)
  664. {
  665. struct sigmatel_spec *spec = codec->spec;
  666. int err;
  667. int i;
  668. err = snd_hda_add_new_ctls(codec, spec->mixer);
  669. if (err < 0)
  670. return err;
  671. for (i = 0; i < spec->num_mixers; i++) {
  672. err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
  673. if (err < 0)
  674. return err;
  675. }
  676. if (spec->num_dmuxes > 0) {
  677. stac_dmux_mixer.count = spec->num_dmuxes;
  678. err = snd_ctl_add(codec->bus->card,
  679. snd_ctl_new1(&stac_dmux_mixer, codec));
  680. if (err < 0)
  681. return err;
  682. }
  683. if (spec->multiout.dig_out_nid) {
  684. err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
  685. if (err < 0)
  686. return err;
  687. }
  688. if (spec->dig_in_nid) {
  689. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
  690. if (err < 0)
  691. return err;
  692. }
  693. return 0;
  694. }
  695. static unsigned int ref9200_pin_configs[8] = {
  696. 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
  697. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  698. };
  699. /*
  700. STAC 9200 pin configs for
  701. 102801A8
  702. 102801DE
  703. 102801E8
  704. */
  705. static unsigned int dell9200_d21_pin_configs[8] = {
  706. 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
  707. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  708. };
  709. /*
  710. STAC 9200 pin configs for
  711. 102801C0
  712. 102801C1
  713. */
  714. static unsigned int dell9200_d22_pin_configs[8] = {
  715. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  716. 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
  717. };
  718. /*
  719. STAC 9200 pin configs for
  720. 102801C4 (Dell Dimension E310)
  721. 102801C5
  722. 102801C7
  723. 102801D9
  724. 102801DA
  725. 102801E3
  726. */
  727. static unsigned int dell9200_d23_pin_configs[8] = {
  728. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  729. 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
  730. };
  731. /*
  732. STAC 9200-32 pin configs for
  733. 102801B5 (Dell Inspiron 630m)
  734. 102801D8 (Dell Inspiron 640m)
  735. */
  736. static unsigned int dell9200_m21_pin_configs[8] = {
  737. 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
  738. 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
  739. };
  740. /*
  741. STAC 9200-32 pin configs for
  742. 102801C2 (Dell Latitude D620)
  743. 102801C8
  744. 102801CC (Dell Latitude D820)
  745. 102801D4
  746. 102801D6
  747. */
  748. static unsigned int dell9200_m22_pin_configs[8] = {
  749. 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
  750. 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
  751. };
  752. /*
  753. STAC 9200-32 pin configs for
  754. 102801CE (Dell XPS M1710)
  755. 102801CF (Dell Precision M90)
  756. */
  757. static unsigned int dell9200_m23_pin_configs[8] = {
  758. 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
  759. 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
  760. };
  761. /*
  762. STAC 9200-32 pin configs for
  763. 102801C9
  764. 102801CA
  765. 102801CB (Dell Latitude 120L)
  766. 102801D3
  767. */
  768. static unsigned int dell9200_m24_pin_configs[8] = {
  769. 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
  770. 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
  771. };
  772. /*
  773. STAC 9200-32 pin configs for
  774. 102801BD (Dell Inspiron E1505n)
  775. 102801EE
  776. 102801EF
  777. */
  778. static unsigned int dell9200_m25_pin_configs[8] = {
  779. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  780. 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
  781. };
  782. /*
  783. STAC 9200-32 pin configs for
  784. 102801F5 (Dell Inspiron 1501)
  785. 102801F6
  786. */
  787. static unsigned int dell9200_m26_pin_configs[8] = {
  788. 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
  789. 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
  790. };
  791. /*
  792. STAC 9200-32
  793. 102801CD (Dell Inspiron E1705/9400)
  794. */
  795. static unsigned int dell9200_m27_pin_configs[8] = {
  796. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  797. 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
  798. };
  799. static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
  800. [STAC_REF] = ref9200_pin_configs,
  801. [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
  802. [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
  803. [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
  804. [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
  805. [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
  806. [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
  807. [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
  808. [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
  809. [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
  810. [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
  811. };
  812. static const char *stac9200_models[STAC_9200_MODELS] = {
  813. [STAC_REF] = "ref",
  814. [STAC_9200_DELL_D21] = "dell-d21",
  815. [STAC_9200_DELL_D22] = "dell-d22",
  816. [STAC_9200_DELL_D23] = "dell-d23",
  817. [STAC_9200_DELL_M21] = "dell-m21",
  818. [STAC_9200_DELL_M22] = "dell-m22",
  819. [STAC_9200_DELL_M23] = "dell-m23",
  820. [STAC_9200_DELL_M24] = "dell-m24",
  821. [STAC_9200_DELL_M25] = "dell-m25",
  822. [STAC_9200_DELL_M26] = "dell-m26",
  823. [STAC_9200_DELL_M27] = "dell-m27",
  824. [STAC_9200_GATEWAY] = "gateway",
  825. };
  826. static struct snd_pci_quirk stac9200_cfg_tbl[] = {
  827. /* SigmaTel reference board */
  828. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  829. "DFI LanParty", STAC_REF),
  830. /* Dell laptops have BIOS problem */
  831. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  832. "unknown Dell", STAC_9200_DELL_D21),
  833. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  834. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  835. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  836. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  837. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  838. "unknown Dell", STAC_9200_DELL_D22),
  839. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  840. "unknown Dell", STAC_9200_DELL_D22),
  841. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  842. "Dell Latitude D620", STAC_9200_DELL_M22),
  843. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  844. "unknown Dell", STAC_9200_DELL_D23),
  845. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  846. "unknown Dell", STAC_9200_DELL_D23),
  847. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  848. "unknown Dell", STAC_9200_DELL_M22),
  849. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  850. "unknown Dell", STAC_9200_DELL_M24),
  851. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  852. "unknown Dell", STAC_9200_DELL_M24),
  853. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  854. "Dell Latitude 120L", STAC_9200_DELL_M24),
  855. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  856. "Dell Latitude D820", STAC_9200_DELL_M22),
  857. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  858. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  859. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  860. "Dell XPS M1710", STAC_9200_DELL_M23),
  861. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  862. "Dell Precision M90", STAC_9200_DELL_M23),
  863. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  864. "unknown Dell", STAC_9200_DELL_M22),
  865. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  866. "unknown Dell", STAC_9200_DELL_M22),
  867. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  868. "unknown Dell", STAC_9200_DELL_M22),
  869. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  870. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  871. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  872. "unknown Dell", STAC_9200_DELL_D23),
  873. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  874. "unknown Dell", STAC_9200_DELL_D23),
  875. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  876. "unknown Dell", STAC_9200_DELL_D21),
  877. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  878. "unknown Dell", STAC_9200_DELL_D23),
  879. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  880. "unknown Dell", STAC_9200_DELL_D21),
  881. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  882. "unknown Dell", STAC_9200_DELL_M25),
  883. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  884. "unknown Dell", STAC_9200_DELL_M25),
  885. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  886. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  887. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  888. "unknown Dell", STAC_9200_DELL_M26),
  889. /* Panasonic */
  890. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
  891. /* Gateway machines needs EAPD to be set on resume */
  892. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
  893. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
  894. STAC_9200_GATEWAY),
  895. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
  896. STAC_9200_GATEWAY),
  897. {} /* terminator */
  898. };
  899. static unsigned int ref925x_pin_configs[8] = {
  900. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  901. 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
  902. };
  903. static unsigned int stac925x_MA6_pin_configs[8] = {
  904. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  905. 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
  906. };
  907. static unsigned int stac925x_PA6_pin_configs[8] = {
  908. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  909. 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
  910. };
  911. static unsigned int stac925xM2_2_pin_configs[8] = {
  912. 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
  913. 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
  914. };
  915. static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
  916. [STAC_REF] = ref925x_pin_configs,
  917. [STAC_M2_2] = stac925xM2_2_pin_configs,
  918. [STAC_MA6] = stac925x_MA6_pin_configs,
  919. [STAC_PA6] = stac925x_PA6_pin_configs,
  920. };
  921. static const char *stac925x_models[STAC_925x_MODELS] = {
  922. [STAC_REF] = "ref",
  923. [STAC_M2_2] = "m2-2",
  924. [STAC_MA6] = "m6",
  925. [STAC_PA6] = "pa6",
  926. };
  927. static struct snd_pci_quirk stac925x_cfg_tbl[] = {
  928. /* SigmaTel reference board */
  929. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  930. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  931. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
  932. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
  933. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
  934. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
  935. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
  936. {} /* terminator */
  937. };
  938. static unsigned int ref92hd73xx_pin_configs[12] = {
  939. 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
  940. 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
  941. 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
  942. };
  943. static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
  944. [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
  945. };
  946. static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
  947. [STAC_92HD73XX_REF] = "ref",
  948. };
  949. static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
  950. /* SigmaTel reference board */
  951. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  952. "DFI LanParty", STAC_92HD73XX_REF),
  953. {} /* terminator */
  954. };
  955. static unsigned int ref92hd71bxx_pin_configs[10] = {
  956. 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
  957. 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0,
  958. 0x90a000f0, 0x01452050,
  959. };
  960. static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
  961. [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
  962. };
  963. static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
  964. [STAC_92HD71BXX_REF] = "ref",
  965. };
  966. static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
  967. /* SigmaTel reference board */
  968. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  969. "DFI LanParty", STAC_92HD71BXX_REF),
  970. {} /* terminator */
  971. };
  972. static unsigned int ref922x_pin_configs[10] = {
  973. 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
  974. 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
  975. 0x40000100, 0x40000100,
  976. };
  977. /*
  978. STAC 922X pin configs for
  979. 102801A7
  980. 102801AB
  981. 102801A9
  982. 102801D1
  983. 102801D2
  984. */
  985. static unsigned int dell_922x_d81_pin_configs[10] = {
  986. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  987. 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
  988. 0x01813122, 0x400001f2,
  989. };
  990. /*
  991. STAC 922X pin configs for
  992. 102801AC
  993. 102801D0
  994. */
  995. static unsigned int dell_922x_d82_pin_configs[10] = {
  996. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  997. 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
  998. 0x01813122, 0x400001f1,
  999. };
  1000. /*
  1001. STAC 922X pin configs for
  1002. 102801BF
  1003. */
  1004. static unsigned int dell_922x_m81_pin_configs[10] = {
  1005. 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
  1006. 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
  1007. 0x40C003f1, 0x405003f0,
  1008. };
  1009. /*
  1010. STAC 9221 A1 pin configs for
  1011. 102801D7 (Dell XPS M1210)
  1012. */
  1013. static unsigned int dell_922x_m82_pin_configs[10] = {
  1014. 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
  1015. 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
  1016. 0x508003f3, 0x405003f4,
  1017. };
  1018. static unsigned int d945gtp3_pin_configs[10] = {
  1019. 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
  1020. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  1021. 0x02a19120, 0x40000100,
  1022. };
  1023. static unsigned int d945gtp5_pin_configs[10] = {
  1024. 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
  1025. 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
  1026. 0x02a19320, 0x40000100,
  1027. };
  1028. static unsigned int intel_mac_v1_pin_configs[10] = {
  1029. 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
  1030. 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
  1031. 0x400000fc, 0x400000fb,
  1032. };
  1033. static unsigned int intel_mac_v2_pin_configs[10] = {
  1034. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  1035. 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
  1036. 0x400000fc, 0x400000fb,
  1037. };
  1038. static unsigned int intel_mac_v3_pin_configs[10] = {
  1039. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  1040. 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
  1041. 0x400000fc, 0x400000fb,
  1042. };
  1043. static unsigned int intel_mac_v4_pin_configs[10] = {
  1044. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  1045. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  1046. 0x400000fc, 0x400000fb,
  1047. };
  1048. static unsigned int intel_mac_v5_pin_configs[10] = {
  1049. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  1050. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  1051. 0x400000fc, 0x400000fb,
  1052. };
  1053. static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
  1054. [STAC_D945_REF] = ref922x_pin_configs,
  1055. [STAC_D945GTP3] = d945gtp3_pin_configs,
  1056. [STAC_D945GTP5] = d945gtp5_pin_configs,
  1057. [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
  1058. [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
  1059. [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
  1060. [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
  1061. [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
  1062. /* for backward compatibility */
  1063. [STAC_MACMINI] = intel_mac_v3_pin_configs,
  1064. [STAC_MACBOOK] = intel_mac_v5_pin_configs,
  1065. [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
  1066. [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
  1067. [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
  1068. [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
  1069. [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
  1070. [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
  1071. [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
  1072. [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
  1073. };
  1074. static const char *stac922x_models[STAC_922X_MODELS] = {
  1075. [STAC_D945_REF] = "ref",
  1076. [STAC_D945GTP5] = "5stack",
  1077. [STAC_D945GTP3] = "3stack",
  1078. [STAC_INTEL_MAC_V1] = "intel-mac-v1",
  1079. [STAC_INTEL_MAC_V2] = "intel-mac-v2",
  1080. [STAC_INTEL_MAC_V3] = "intel-mac-v3",
  1081. [STAC_INTEL_MAC_V4] = "intel-mac-v4",
  1082. [STAC_INTEL_MAC_V5] = "intel-mac-v5",
  1083. /* for backward compatibility */
  1084. [STAC_MACMINI] = "macmini",
  1085. [STAC_MACBOOK] = "macbook",
  1086. [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
  1087. [STAC_MACBOOK_PRO_V2] = "macbook-pro",
  1088. [STAC_IMAC_INTEL] = "imac-intel",
  1089. [STAC_IMAC_INTEL_20] = "imac-intel-20",
  1090. [STAC_922X_DELL_D81] = "dell-d81",
  1091. [STAC_922X_DELL_D82] = "dell-d82",
  1092. [STAC_922X_DELL_M81] = "dell-m81",
  1093. [STAC_922X_DELL_M82] = "dell-m82",
  1094. };
  1095. static struct snd_pci_quirk stac922x_cfg_tbl[] = {
  1096. /* SigmaTel reference board */
  1097. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1098. "DFI LanParty", STAC_D945_REF),
  1099. /* Intel 945G based systems */
  1100. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  1101. "Intel D945G", STAC_D945GTP3),
  1102. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  1103. "Intel D945G", STAC_D945GTP3),
  1104. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  1105. "Intel D945G", STAC_D945GTP3),
  1106. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  1107. "Intel D945G", STAC_D945GTP3),
  1108. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  1109. "Intel D945G", STAC_D945GTP3),
  1110. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  1111. "Intel D945G", STAC_D945GTP3),
  1112. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  1113. "Intel D945G", STAC_D945GTP3),
  1114. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  1115. "Intel D945G", STAC_D945GTP3),
  1116. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  1117. "Intel D945G", STAC_D945GTP3),
  1118. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  1119. "Intel D945G", STAC_D945GTP3),
  1120. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  1121. "Intel D945G", STAC_D945GTP3),
  1122. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  1123. "Intel D945G", STAC_D945GTP3),
  1124. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  1125. "Intel D945G", STAC_D945GTP3),
  1126. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  1127. "Intel D945G", STAC_D945GTP3),
  1128. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  1129. "Intel D945G", STAC_D945GTP3),
  1130. /* Intel D945G 5-stack systems */
  1131. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  1132. "Intel D945G", STAC_D945GTP5),
  1133. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  1134. "Intel D945G", STAC_D945GTP5),
  1135. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  1136. "Intel D945G", STAC_D945GTP5),
  1137. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  1138. "Intel D945G", STAC_D945GTP5),
  1139. /* Intel 945P based systems */
  1140. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  1141. "Intel D945P", STAC_D945GTP3),
  1142. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  1143. "Intel D945P", STAC_D945GTP3),
  1144. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  1145. "Intel D945P", STAC_D945GTP3),
  1146. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  1147. "Intel D945P", STAC_D945GTP3),
  1148. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  1149. "Intel D945P", STAC_D945GTP3),
  1150. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  1151. "Intel D945P", STAC_D945GTP5),
  1152. /* other systems */
  1153. /* Apple Mac Mini (early 2006) */
  1154. SND_PCI_QUIRK(0x8384, 0x7680,
  1155. "Mac Mini", STAC_INTEL_MAC_V3),
  1156. /* Dell systems */
  1157. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  1158. "unknown Dell", STAC_922X_DELL_D81),
  1159. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  1160. "unknown Dell", STAC_922X_DELL_D81),
  1161. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  1162. "unknown Dell", STAC_922X_DELL_D81),
  1163. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  1164. "unknown Dell", STAC_922X_DELL_D82),
  1165. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  1166. "unknown Dell", STAC_922X_DELL_M81),
  1167. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  1168. "unknown Dell", STAC_922X_DELL_D82),
  1169. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  1170. "unknown Dell", STAC_922X_DELL_D81),
  1171. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  1172. "unknown Dell", STAC_922X_DELL_D81),
  1173. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  1174. "Dell XPS M1210", STAC_922X_DELL_M82),
  1175. {} /* terminator */
  1176. };
  1177. static unsigned int ref927x_pin_configs[14] = {
  1178. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  1179. 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
  1180. 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
  1181. 0x01c42190, 0x40000100,
  1182. };
  1183. static unsigned int d965_3st_pin_configs[14] = {
  1184. 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
  1185. 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
  1186. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  1187. 0x40000100, 0x40000100
  1188. };
  1189. static unsigned int d965_5st_pin_configs[14] = {
  1190. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  1191. 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
  1192. 0x40000100, 0x40000100, 0x40000100, 0x01442070,
  1193. 0x40000100, 0x40000100
  1194. };
  1195. static unsigned int dell_3st_pin_configs[14] = {
  1196. 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
  1197. 0x01111212, 0x01116211, 0x01813050, 0x01112214,
  1198. 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
  1199. 0x40c003fc, 0x40000100
  1200. };
  1201. static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
  1202. [STAC_D965_REF] = ref927x_pin_configs,
  1203. [STAC_D965_3ST] = d965_3st_pin_configs,
  1204. [STAC_D965_5ST] = d965_5st_pin_configs,
  1205. [STAC_DELL_3ST] = dell_3st_pin_configs,
  1206. [STAC_DELL_BIOS] = NULL,
  1207. };
  1208. static const char *stac927x_models[STAC_927X_MODELS] = {
  1209. [STAC_D965_REF] = "ref",
  1210. [STAC_D965_3ST] = "3stack",
  1211. [STAC_D965_5ST] = "5stack",
  1212. [STAC_DELL_3ST] = "dell-3stack",
  1213. [STAC_DELL_BIOS] = "dell-bios",
  1214. };
  1215. static struct snd_pci_quirk stac927x_cfg_tbl[] = {
  1216. /* SigmaTel reference board */
  1217. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1218. "DFI LanParty", STAC_D965_REF),
  1219. /* Intel 946 based systems */
  1220. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  1221. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  1222. /* 965 based 3 stack systems */
  1223. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
  1224. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
  1225. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
  1226. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
  1227. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
  1228. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
  1229. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
  1230. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
  1231. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
  1232. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
  1233. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
  1234. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
  1235. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
  1236. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
  1237. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
  1238. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
  1239. /* Dell 3 stack systems */
  1240. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_3ST),
  1241. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
  1242. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  1243. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  1244. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  1245. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_3ST),
  1246. /* Dell 3 stack systems with verb table in BIOS */
  1247. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
  1248. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
  1249. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  1250. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  1251. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  1252. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
  1253. /* 965 based 5 stack systems */
  1254. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
  1255. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
  1256. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
  1257. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
  1258. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
  1259. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
  1260. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
  1261. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
  1262. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
  1263. {} /* terminator */
  1264. };
  1265. static unsigned int ref9205_pin_configs[12] = {
  1266. 0x40000100, 0x40000100, 0x01016011, 0x01014010,
  1267. 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
  1268. 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
  1269. };
  1270. /*
  1271. STAC 9205 pin configs for
  1272. 102801F1
  1273. 102801F2
  1274. 102801FC
  1275. 102801FD
  1276. 10280204
  1277. 1028021F
  1278. */
  1279. static unsigned int dell_9205_m42_pin_configs[12] = {
  1280. 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
  1281. 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
  1282. 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
  1283. };
  1284. /*
  1285. STAC 9205 pin configs for
  1286. 102801F9
  1287. 102801FA
  1288. 102801FE
  1289. 102801FF (Dell Precision M4300)
  1290. 10280206
  1291. 10280200
  1292. 10280201
  1293. */
  1294. static unsigned int dell_9205_m43_pin_configs[12] = {
  1295. 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
  1296. 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
  1297. 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
  1298. };
  1299. static unsigned int dell_9205_m44_pin_configs[12] = {
  1300. 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
  1301. 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
  1302. 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
  1303. };
  1304. static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
  1305. [STAC_9205_REF] = ref9205_pin_configs,
  1306. [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
  1307. [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
  1308. [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
  1309. };
  1310. static const char *stac9205_models[STAC_9205_MODELS] = {
  1311. [STAC_9205_REF] = "ref",
  1312. [STAC_9205_DELL_M42] = "dell-m42",
  1313. [STAC_9205_DELL_M43] = "dell-m43",
  1314. [STAC_9205_DELL_M44] = "dell-m44",
  1315. };
  1316. static struct snd_pci_quirk stac9205_cfg_tbl[] = {
  1317. /* SigmaTel reference board */
  1318. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1319. "DFI LanParty", STAC_9205_REF),
  1320. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1321. "unknown Dell", STAC_9205_DELL_M42),
  1322. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1323. "unknown Dell", STAC_9205_DELL_M42),
  1324. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  1325. "Dell Precision", STAC_9205_DELL_M43),
  1326. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  1327. "Dell Precision", STAC_9205_DELL_M43),
  1328. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  1329. "Dell Precision", STAC_9205_DELL_M43),
  1330. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  1331. "Dell Precision", STAC_9205_DELL_M43),
  1332. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  1333. "Dell Precision", STAC_9205_DELL_M43),
  1334. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1335. "unknown Dell", STAC_9205_DELL_M42),
  1336. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1337. "unknown Dell", STAC_9205_DELL_M42),
  1338. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  1339. "Dell Precision", STAC_9205_DELL_M43),
  1340. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  1341. "Dell Precision M4300", STAC_9205_DELL_M43),
  1342. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  1343. "Dell Precision", STAC_9205_DELL_M43),
  1344. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1345. "Dell Inspiron", STAC_9205_DELL_M44),
  1346. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1347. "Dell Inspiron", STAC_9205_DELL_M44),
  1348. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1349. "Dell Inspiron", STAC_9205_DELL_M44),
  1350. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1351. "Dell Inspiron", STAC_9205_DELL_M44),
  1352. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  1353. "unknown Dell", STAC_9205_DELL_M42),
  1354. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  1355. "Dell Inspiron", STAC_9205_DELL_M44),
  1356. {} /* terminator */
  1357. };
  1358. static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
  1359. {
  1360. int i;
  1361. struct sigmatel_spec *spec = codec->spec;
  1362. if (! spec->bios_pin_configs) {
  1363. spec->bios_pin_configs = kcalloc(spec->num_pins,
  1364. sizeof(*spec->bios_pin_configs), GFP_KERNEL);
  1365. if (! spec->bios_pin_configs)
  1366. return -ENOMEM;
  1367. }
  1368. for (i = 0; i < spec->num_pins; i++) {
  1369. hda_nid_t nid = spec->pin_nids[i];
  1370. unsigned int pin_cfg;
  1371. pin_cfg = snd_hda_codec_read(codec, nid, 0,
  1372. AC_VERB_GET_CONFIG_DEFAULT, 0x00);
  1373. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
  1374. nid, pin_cfg);
  1375. spec->bios_pin_configs[i] = pin_cfg;
  1376. }
  1377. return 0;
  1378. }
  1379. static void stac92xx_set_config_reg(struct hda_codec *codec,
  1380. hda_nid_t pin_nid, unsigned int pin_config)
  1381. {
  1382. int i;
  1383. snd_hda_codec_write(codec, pin_nid, 0,
  1384. AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
  1385. pin_config & 0x000000ff);
  1386. snd_hda_codec_write(codec, pin_nid, 0,
  1387. AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
  1388. (pin_config & 0x0000ff00) >> 8);
  1389. snd_hda_codec_write(codec, pin_nid, 0,
  1390. AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
  1391. (pin_config & 0x00ff0000) >> 16);
  1392. snd_hda_codec_write(codec, pin_nid, 0,
  1393. AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
  1394. pin_config >> 24);
  1395. i = snd_hda_codec_read(codec, pin_nid, 0,
  1396. AC_VERB_GET_CONFIG_DEFAULT,
  1397. 0x00);
  1398. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
  1399. pin_nid, i);
  1400. }
  1401. static void stac92xx_set_config_regs(struct hda_codec *codec)
  1402. {
  1403. int i;
  1404. struct sigmatel_spec *spec = codec->spec;
  1405. if (!spec->pin_configs)
  1406. return;
  1407. for (i = 0; i < spec->num_pins; i++)
  1408. stac92xx_set_config_reg(codec, spec->pin_nids[i],
  1409. spec->pin_configs[i]);
  1410. }
  1411. static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
  1412. {
  1413. struct sigmatel_spec *spec = codec->spec;
  1414. /* Configure GPIOx as output */
  1415. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1416. AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
  1417. /* Configure GPIOx as CMOS */
  1418. snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
  1419. /* Assert GPIOx */
  1420. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1421. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  1422. /* Enable GPIOx */
  1423. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1424. AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
  1425. }
  1426. /*
  1427. * Analog playback callbacks
  1428. */
  1429. static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1430. struct hda_codec *codec,
  1431. struct snd_pcm_substream *substream)
  1432. {
  1433. struct sigmatel_spec *spec = codec->spec;
  1434. return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
  1435. }
  1436. static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1437. struct hda_codec *codec,
  1438. unsigned int stream_tag,
  1439. unsigned int format,
  1440. struct snd_pcm_substream *substream)
  1441. {
  1442. struct sigmatel_spec *spec = codec->spec;
  1443. return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
  1444. }
  1445. static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1446. struct hda_codec *codec,
  1447. struct snd_pcm_substream *substream)
  1448. {
  1449. struct sigmatel_spec *spec = codec->spec;
  1450. return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
  1451. }
  1452. /*
  1453. * Digital playback callbacks
  1454. */
  1455. static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1456. struct hda_codec *codec,
  1457. struct snd_pcm_substream *substream)
  1458. {
  1459. struct sigmatel_spec *spec = codec->spec;
  1460. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1461. }
  1462. static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1463. struct hda_codec *codec,
  1464. struct snd_pcm_substream *substream)
  1465. {
  1466. struct sigmatel_spec *spec = codec->spec;
  1467. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1468. }
  1469. static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1470. struct hda_codec *codec,
  1471. unsigned int stream_tag,
  1472. unsigned int format,
  1473. struct snd_pcm_substream *substream)
  1474. {
  1475. struct sigmatel_spec *spec = codec->spec;
  1476. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1477. stream_tag, format, substream);
  1478. }
  1479. /*
  1480. * Analog capture callbacks
  1481. */
  1482. static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  1483. struct hda_codec *codec,
  1484. unsigned int stream_tag,
  1485. unsigned int format,
  1486. struct snd_pcm_substream *substream)
  1487. {
  1488. struct sigmatel_spec *spec = codec->spec;
  1489. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
  1490. stream_tag, 0, format);
  1491. return 0;
  1492. }
  1493. static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1494. struct hda_codec *codec,
  1495. struct snd_pcm_substream *substream)
  1496. {
  1497. struct sigmatel_spec *spec = codec->spec;
  1498. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
  1499. return 0;
  1500. }
  1501. static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
  1502. .substreams = 1,
  1503. .channels_min = 2,
  1504. .channels_max = 2,
  1505. /* NID is set in stac92xx_build_pcms */
  1506. .ops = {
  1507. .open = stac92xx_dig_playback_pcm_open,
  1508. .close = stac92xx_dig_playback_pcm_close,
  1509. .prepare = stac92xx_dig_playback_pcm_prepare
  1510. },
  1511. };
  1512. static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
  1513. .substreams = 1,
  1514. .channels_min = 2,
  1515. .channels_max = 2,
  1516. /* NID is set in stac92xx_build_pcms */
  1517. };
  1518. static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
  1519. .substreams = 1,
  1520. .channels_min = 2,
  1521. .channels_max = 8,
  1522. .nid = 0x02, /* NID to query formats and rates */
  1523. .ops = {
  1524. .open = stac92xx_playback_pcm_open,
  1525. .prepare = stac92xx_playback_pcm_prepare,
  1526. .cleanup = stac92xx_playback_pcm_cleanup
  1527. },
  1528. };
  1529. static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
  1530. .substreams = 1,
  1531. .channels_min = 2,
  1532. .channels_max = 2,
  1533. .nid = 0x06, /* NID to query formats and rates */
  1534. .ops = {
  1535. .open = stac92xx_playback_pcm_open,
  1536. .prepare = stac92xx_playback_pcm_prepare,
  1537. .cleanup = stac92xx_playback_pcm_cleanup
  1538. },
  1539. };
  1540. static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
  1541. .channels_min = 2,
  1542. .channels_max = 2,
  1543. /* NID + .substreams is set in stac92xx_build_pcms */
  1544. .ops = {
  1545. .prepare = stac92xx_capture_pcm_prepare,
  1546. .cleanup = stac92xx_capture_pcm_cleanup
  1547. },
  1548. };
  1549. static int stac92xx_build_pcms(struct hda_codec *codec)
  1550. {
  1551. struct sigmatel_spec *spec = codec->spec;
  1552. struct hda_pcm *info = spec->pcm_rec;
  1553. codec->num_pcms = 1;
  1554. codec->pcm_info = info;
  1555. info->name = "STAC92xx Analog";
  1556. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
  1557. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
  1558. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
  1559. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
  1560. if (spec->alt_switch) {
  1561. codec->num_pcms++;
  1562. info++;
  1563. info->name = "STAC92xx Analog Alt";
  1564. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
  1565. }
  1566. if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
  1567. codec->num_pcms++;
  1568. info++;
  1569. info->name = "STAC92xx Digital";
  1570. if (spec->multiout.dig_out_nid) {
  1571. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
  1572. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
  1573. }
  1574. if (spec->dig_in_nid) {
  1575. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
  1576. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
  1577. }
  1578. }
  1579. return 0;
  1580. }
  1581. static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
  1582. {
  1583. unsigned int pincap = snd_hda_param_read(codec, nid,
  1584. AC_PAR_PIN_CAP);
  1585. pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
  1586. if (pincap & AC_PINCAP_VREF_100)
  1587. return AC_PINCTL_VREF_100;
  1588. if (pincap & AC_PINCAP_VREF_80)
  1589. return AC_PINCTL_VREF_80;
  1590. if (pincap & AC_PINCAP_VREF_50)
  1591. return AC_PINCTL_VREF_50;
  1592. if (pincap & AC_PINCAP_VREF_GRD)
  1593. return AC_PINCTL_VREF_GRD;
  1594. return 0;
  1595. }
  1596. static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
  1597. {
  1598. snd_hda_codec_write_cache(codec, nid, 0,
  1599. AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
  1600. }
  1601. #define stac92xx_io_switch_info snd_ctl_boolean_mono_info
  1602. static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1603. {
  1604. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1605. struct sigmatel_spec *spec = codec->spec;
  1606. int io_idx = kcontrol-> private_value & 0xff;
  1607. ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
  1608. return 0;
  1609. }
  1610. static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1611. {
  1612. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1613. struct sigmatel_spec *spec = codec->spec;
  1614. hda_nid_t nid = kcontrol->private_value >> 8;
  1615. int io_idx = kcontrol-> private_value & 0xff;
  1616. unsigned short val = !!ucontrol->value.integer.value[0];
  1617. spec->io_switch[io_idx] = val;
  1618. if (val)
  1619. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1620. else {
  1621. unsigned int pinctl = AC_PINCTL_IN_EN;
  1622. if (io_idx) /* set VREF for mic */
  1623. pinctl |= stac92xx_get_vref(codec, nid);
  1624. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  1625. }
  1626. /* check the auto-mute again: we need to mute/unmute the speaker
  1627. * appropriately according to the pin direction
  1628. */
  1629. if (spec->hp_detect)
  1630. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  1631. return 1;
  1632. }
  1633. #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
  1634. static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
  1635. struct snd_ctl_elem_value *ucontrol)
  1636. {
  1637. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1638. struct sigmatel_spec *spec = codec->spec;
  1639. ucontrol->value.integer.value[0] = spec->clfe_swap;
  1640. return 0;
  1641. }
  1642. static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
  1643. struct snd_ctl_elem_value *ucontrol)
  1644. {
  1645. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1646. struct sigmatel_spec *spec = codec->spec;
  1647. hda_nid_t nid = kcontrol->private_value & 0xff;
  1648. unsigned int val = !!ucontrol->value.integer.value[0];
  1649. if (spec->clfe_swap == val)
  1650. return 0;
  1651. spec->clfe_swap = val;
  1652. snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
  1653. spec->clfe_swap ? 0x4 : 0x0);
  1654. return 1;
  1655. }
  1656. #define STAC_CODEC_IO_SWITCH(xname, xpval) \
  1657. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1658. .name = xname, \
  1659. .index = 0, \
  1660. .info = stac92xx_io_switch_info, \
  1661. .get = stac92xx_io_switch_get, \
  1662. .put = stac92xx_io_switch_put, \
  1663. .private_value = xpval, \
  1664. }
  1665. #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
  1666. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1667. .name = xname, \
  1668. .index = 0, \
  1669. .info = stac92xx_clfe_switch_info, \
  1670. .get = stac92xx_clfe_switch_get, \
  1671. .put = stac92xx_clfe_switch_put, \
  1672. .private_value = xpval, \
  1673. }
  1674. enum {
  1675. STAC_CTL_WIDGET_VOL,
  1676. STAC_CTL_WIDGET_MUTE,
  1677. STAC_CTL_WIDGET_IO_SWITCH,
  1678. STAC_CTL_WIDGET_CLFE_SWITCH
  1679. };
  1680. static struct snd_kcontrol_new stac92xx_control_templates[] = {
  1681. HDA_CODEC_VOLUME(NULL, 0, 0, 0),
  1682. HDA_CODEC_MUTE(NULL, 0, 0, 0),
  1683. STAC_CODEC_IO_SWITCH(NULL, 0),
  1684. STAC_CODEC_CLFE_SWITCH(NULL, 0),
  1685. };
  1686. /* add dynamic controls */
  1687. static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
  1688. {
  1689. struct snd_kcontrol_new *knew;
  1690. if (spec->num_kctl_used >= spec->num_kctl_alloc) {
  1691. int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
  1692. knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
  1693. if (! knew)
  1694. return -ENOMEM;
  1695. if (spec->kctl_alloc) {
  1696. memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
  1697. kfree(spec->kctl_alloc);
  1698. }
  1699. spec->kctl_alloc = knew;
  1700. spec->num_kctl_alloc = num;
  1701. }
  1702. knew = &spec->kctl_alloc[spec->num_kctl_used];
  1703. *knew = stac92xx_control_templates[type];
  1704. knew->name = kstrdup(name, GFP_KERNEL);
  1705. if (! knew->name)
  1706. return -ENOMEM;
  1707. knew->private_value = val;
  1708. spec->num_kctl_used++;
  1709. return 0;
  1710. }
  1711. /* flag inputs as additional dynamic lineouts */
  1712. static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
  1713. {
  1714. struct sigmatel_spec *spec = codec->spec;
  1715. unsigned int wcaps, wtype;
  1716. int i, num_dacs = 0;
  1717. /* use the wcaps cache to count all DACs available for line-outs */
  1718. for (i = 0; i < codec->num_nodes; i++) {
  1719. wcaps = codec->wcaps[i];
  1720. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1721. if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
  1722. num_dacs++;
  1723. }
  1724. snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
  1725. switch (cfg->line_outs) {
  1726. case 3:
  1727. /* add line-in as side */
  1728. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
  1729. cfg->line_out_pins[cfg->line_outs] =
  1730. cfg->input_pins[AUTO_PIN_LINE];
  1731. spec->line_switch = 1;
  1732. cfg->line_outs++;
  1733. }
  1734. break;
  1735. case 2:
  1736. /* add line-in as clfe and mic as side */
  1737. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
  1738. cfg->line_out_pins[cfg->line_outs] =
  1739. cfg->input_pins[AUTO_PIN_LINE];
  1740. spec->line_switch = 1;
  1741. cfg->line_outs++;
  1742. }
  1743. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
  1744. cfg->line_out_pins[cfg->line_outs] =
  1745. cfg->input_pins[AUTO_PIN_MIC];
  1746. spec->mic_switch = 1;
  1747. cfg->line_outs++;
  1748. }
  1749. break;
  1750. case 1:
  1751. /* add line-in as surr and mic as clfe */
  1752. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
  1753. cfg->line_out_pins[cfg->line_outs] =
  1754. cfg->input_pins[AUTO_PIN_LINE];
  1755. spec->line_switch = 1;
  1756. cfg->line_outs++;
  1757. }
  1758. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
  1759. cfg->line_out_pins[cfg->line_outs] =
  1760. cfg->input_pins[AUTO_PIN_MIC];
  1761. spec->mic_switch = 1;
  1762. cfg->line_outs++;
  1763. }
  1764. break;
  1765. }
  1766. return 0;
  1767. }
  1768. static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1769. {
  1770. int i;
  1771. for (i = 0; i < spec->multiout.num_dacs; i++) {
  1772. if (spec->multiout.dac_nids[i] == nid)
  1773. return 1;
  1774. }
  1775. return 0;
  1776. }
  1777. /*
  1778. * Fill in the dac_nids table from the parsed pin configuration
  1779. * This function only works when every pin in line_out_pins[]
  1780. * contains atleast one DAC in its connection list. Some 92xx
  1781. * codecs are not connected directly to a DAC, such as the 9200
  1782. * and 9202/925x. For those, dac_nids[] must be hard-coded.
  1783. */
  1784. static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
  1785. struct auto_pin_cfg *cfg)
  1786. {
  1787. struct sigmatel_spec *spec = codec->spec;
  1788. int i, j, conn_len = 0;
  1789. hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
  1790. unsigned int wcaps, wtype;
  1791. for (i = 0; i < cfg->line_outs; i++) {
  1792. nid = cfg->line_out_pins[i];
  1793. conn_len = snd_hda_get_connections(codec, nid, conn,
  1794. HDA_MAX_CONNECTIONS);
  1795. for (j = 0; j < conn_len; j++) {
  1796. wcaps = snd_hda_param_read(codec, conn[j],
  1797. AC_PAR_AUDIO_WIDGET_CAP);
  1798. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1799. if (wtype != AC_WID_AUD_OUT ||
  1800. (wcaps & AC_WCAP_DIGITAL))
  1801. continue;
  1802. /* conn[j] is a DAC routed to this line-out */
  1803. if (!is_in_dac_nids(spec, conn[j]))
  1804. break;
  1805. }
  1806. if (j == conn_len) {
  1807. if (spec->multiout.num_dacs > 0) {
  1808. /* we have already working output pins,
  1809. * so let's drop the broken ones again
  1810. */
  1811. cfg->line_outs = spec->multiout.num_dacs;
  1812. break;
  1813. }
  1814. /* error out, no available DAC found */
  1815. snd_printk(KERN_ERR
  1816. "%s: No available DAC for pin 0x%x\n",
  1817. __func__, nid);
  1818. return -ENODEV;
  1819. }
  1820. spec->multiout.dac_nids[i] = conn[j];
  1821. spec->multiout.num_dacs++;
  1822. if (conn_len > 1) {
  1823. /* select this DAC in the pin's input mux */
  1824. snd_hda_codec_write_cache(codec, nid, 0,
  1825. AC_VERB_SET_CONNECT_SEL, j);
  1826. }
  1827. }
  1828. snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
  1829. spec->multiout.num_dacs,
  1830. spec->multiout.dac_nids[0],
  1831. spec->multiout.dac_nids[1],
  1832. spec->multiout.dac_nids[2],
  1833. spec->multiout.dac_nids[3],
  1834. spec->multiout.dac_nids[4]);
  1835. return 0;
  1836. }
  1837. /* create volume control/switch for the given prefx type */
  1838. static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
  1839. {
  1840. char name[32];
  1841. int err;
  1842. sprintf(name, "%s Playback Volume", pfx);
  1843. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
  1844. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1845. if (err < 0)
  1846. return err;
  1847. sprintf(name, "%s Playback Switch", pfx);
  1848. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
  1849. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1850. if (err < 0)
  1851. return err;
  1852. return 0;
  1853. }
  1854. /* add playback controls from the parsed DAC table */
  1855. static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
  1856. const struct auto_pin_cfg *cfg)
  1857. {
  1858. static const char *chname[4] = {
  1859. "Front", "Surround", NULL /*CLFE*/, "Side"
  1860. };
  1861. hda_nid_t nid;
  1862. int i, err;
  1863. struct sigmatel_spec *spec = codec->spec;
  1864. unsigned int wid_caps;
  1865. for (i = 0; i < cfg->line_outs; i++) {
  1866. if (!spec->multiout.dac_nids[i])
  1867. continue;
  1868. nid = spec->multiout.dac_nids[i];
  1869. if (i == 2) {
  1870. /* Center/LFE */
  1871. err = create_controls(spec, "Center", nid, 1);
  1872. if (err < 0)
  1873. return err;
  1874. err = create_controls(spec, "LFE", nid, 2);
  1875. if (err < 0)
  1876. return err;
  1877. wid_caps = get_wcaps(codec, nid);
  1878. if (wid_caps & AC_WCAP_LR_SWAP) {
  1879. err = stac92xx_add_control(spec,
  1880. STAC_CTL_WIDGET_CLFE_SWITCH,
  1881. "Swap Center/LFE Playback Switch", nid);
  1882. if (err < 0)
  1883. return err;
  1884. }
  1885. } else {
  1886. err = create_controls(spec, chname[i], nid, 3);
  1887. if (err < 0)
  1888. return err;
  1889. }
  1890. }
  1891. if (spec->line_switch)
  1892. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
  1893. return err;
  1894. if (spec->mic_switch)
  1895. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
  1896. return err;
  1897. return 0;
  1898. }
  1899. static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1900. {
  1901. if (is_in_dac_nids(spec, nid))
  1902. return 1;
  1903. if (spec->multiout.hp_nid == nid)
  1904. return 1;
  1905. return 0;
  1906. }
  1907. static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
  1908. {
  1909. if (!spec->multiout.hp_nid)
  1910. spec->multiout.hp_nid = nid;
  1911. else if (spec->multiout.num_dacs > 4) {
  1912. printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
  1913. return 1;
  1914. } else {
  1915. spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
  1916. spec->multiout.num_dacs++;
  1917. }
  1918. return 0;
  1919. }
  1920. /* add playback controls for Speaker and HP outputs */
  1921. static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
  1922. struct auto_pin_cfg *cfg)
  1923. {
  1924. struct sigmatel_spec *spec = codec->spec;
  1925. hda_nid_t nid;
  1926. int i, old_num_dacs, err;
  1927. old_num_dacs = spec->multiout.num_dacs;
  1928. for (i = 0; i < cfg->hp_outs; i++) {
  1929. unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
  1930. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1931. spec->hp_detect = 1;
  1932. nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
  1933. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1934. if (check_in_dac_nids(spec, nid))
  1935. nid = 0;
  1936. if (! nid)
  1937. continue;
  1938. add_spec_dacs(spec, nid);
  1939. }
  1940. for (i = 0; i < cfg->speaker_outs; i++) {
  1941. nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
  1942. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1943. if (check_in_dac_nids(spec, nid))
  1944. nid = 0;
  1945. if (! nid)
  1946. continue;
  1947. add_spec_dacs(spec, nid);
  1948. }
  1949. for (i = 0; i < cfg->line_outs; i++) {
  1950. nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
  1951. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1952. if (check_in_dac_nids(spec, nid))
  1953. nid = 0;
  1954. if (! nid)
  1955. continue;
  1956. add_spec_dacs(spec, nid);
  1957. }
  1958. for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
  1959. static const char *pfxs[] = {
  1960. "Speaker", "External Speaker", "Speaker2",
  1961. };
  1962. err = create_controls(spec, pfxs[i - old_num_dacs],
  1963. spec->multiout.dac_nids[i], 3);
  1964. if (err < 0)
  1965. return err;
  1966. }
  1967. if (spec->multiout.hp_nid) {
  1968. const char *pfx;
  1969. if (old_num_dacs == spec->multiout.num_dacs)
  1970. pfx = "Master";
  1971. else
  1972. pfx = "Headphone";
  1973. err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
  1974. if (err < 0)
  1975. return err;
  1976. }
  1977. return 0;
  1978. }
  1979. /* labels for dmic mux inputs */
  1980. static const char *stac92xx_dmic_labels[5] = {
  1981. "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
  1982. "Digital Mic 3", "Digital Mic 4"
  1983. };
  1984. /* create playback/capture controls for input pins on dmic capable codecs */
  1985. static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
  1986. const struct auto_pin_cfg *cfg)
  1987. {
  1988. struct sigmatel_spec *spec = codec->spec;
  1989. struct hda_input_mux *dimux = &spec->private_dimux;
  1990. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1991. int err, i, j;
  1992. char name[32];
  1993. dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
  1994. dimux->items[dimux->num_items].index = 0;
  1995. dimux->num_items++;
  1996. for (i = 0; i < spec->num_dmics; i++) {
  1997. hda_nid_t nid;
  1998. int index;
  1999. int num_cons;
  2000. unsigned int wcaps;
  2001. unsigned int def_conf;
  2002. def_conf = snd_hda_codec_read(codec,
  2003. spec->dmic_nids[i],
  2004. 0,
  2005. AC_VERB_GET_CONFIG_DEFAULT,
  2006. 0);
  2007. if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
  2008. continue;
  2009. nid = spec->dmic_nids[i];
  2010. num_cons = snd_hda_get_connections(codec,
  2011. spec->dmux_nids[0],
  2012. con_lst,
  2013. HDA_MAX_NUM_INPUTS);
  2014. for (j = 0; j < num_cons; j++)
  2015. if (con_lst[j] == nid) {
  2016. index = j;
  2017. goto found;
  2018. }
  2019. continue;
  2020. found:
  2021. wcaps = get_wcaps(codec, nid);
  2022. if (wcaps & AC_WCAP_OUT_AMP) {
  2023. sprintf(name, "%s Capture Volume",
  2024. stac92xx_dmic_labels[dimux->num_items]);
  2025. err = stac92xx_add_control(spec,
  2026. STAC_CTL_WIDGET_VOL,
  2027. name,
  2028. HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
  2029. if (err < 0)
  2030. return err;
  2031. }
  2032. dimux->items[dimux->num_items].label =
  2033. stac92xx_dmic_labels[dimux->num_items];
  2034. dimux->items[dimux->num_items].index = index;
  2035. dimux->num_items++;
  2036. }
  2037. return 0;
  2038. }
  2039. /* create playback/capture controls for input pins */
  2040. static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
  2041. {
  2042. struct sigmatel_spec *spec = codec->spec;
  2043. struct hda_input_mux *imux = &spec->private_imux;
  2044. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  2045. int i, j, k;
  2046. for (i = 0; i < AUTO_PIN_LAST; i++) {
  2047. int index;
  2048. if (!cfg->input_pins[i])
  2049. continue;
  2050. index = -1;
  2051. for (j = 0; j < spec->num_muxes; j++) {
  2052. int num_cons;
  2053. num_cons = snd_hda_get_connections(codec,
  2054. spec->mux_nids[j],
  2055. con_lst,
  2056. HDA_MAX_NUM_INPUTS);
  2057. for (k = 0; k < num_cons; k++)
  2058. if (con_lst[k] == cfg->input_pins[i]) {
  2059. index = k;
  2060. goto found;
  2061. }
  2062. }
  2063. continue;
  2064. found:
  2065. imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
  2066. imux->items[imux->num_items].index = index;
  2067. imux->num_items++;
  2068. }
  2069. if (imux->num_items) {
  2070. /*
  2071. * Set the current input for the muxes.
  2072. * The STAC9221 has two input muxes with identical source
  2073. * NID lists. Hopefully this won't get confused.
  2074. */
  2075. for (i = 0; i < spec->num_muxes; i++) {
  2076. snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
  2077. AC_VERB_SET_CONNECT_SEL,
  2078. imux->items[0].index);
  2079. }
  2080. }
  2081. return 0;
  2082. }
  2083. static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
  2084. {
  2085. struct sigmatel_spec *spec = codec->spec;
  2086. int i;
  2087. for (i = 0; i < spec->autocfg.line_outs; i++) {
  2088. hda_nid_t nid = spec->autocfg.line_out_pins[i];
  2089. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  2090. }
  2091. }
  2092. static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
  2093. {
  2094. struct sigmatel_spec *spec = codec->spec;
  2095. int i;
  2096. for (i = 0; i < spec->autocfg.hp_outs; i++) {
  2097. hda_nid_t pin;
  2098. pin = spec->autocfg.hp_pins[i];
  2099. if (pin) /* connect to front */
  2100. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
  2101. }
  2102. for (i = 0; i < spec->autocfg.speaker_outs; i++) {
  2103. hda_nid_t pin;
  2104. pin = spec->autocfg.speaker_pins[i];
  2105. if (pin) /* connect to front */
  2106. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
  2107. }
  2108. }
  2109. static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
  2110. {
  2111. struct sigmatel_spec *spec = codec->spec;
  2112. int err;
  2113. int hp_speaker_swap = 0;
  2114. if ((err = snd_hda_parse_pin_def_config(codec,
  2115. &spec->autocfg,
  2116. spec->dmic_nids)) < 0)
  2117. return err;
  2118. if (! spec->autocfg.line_outs)
  2119. return 0; /* can't find valid pin config */
  2120. /* If we have no real line-out pin and multiple hp-outs, HPs should
  2121. * be set up as multi-channel outputs.
  2122. */
  2123. if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
  2124. spec->autocfg.hp_outs > 1) {
  2125. /* Copy hp_outs to line_outs, backup line_outs in
  2126. * speaker_outs so that the following routines can handle
  2127. * HP pins as primary outputs.
  2128. */
  2129. memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
  2130. sizeof(spec->autocfg.line_out_pins));
  2131. spec->autocfg.speaker_outs = spec->autocfg.line_outs;
  2132. memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
  2133. sizeof(spec->autocfg.hp_pins));
  2134. spec->autocfg.line_outs = spec->autocfg.hp_outs;
  2135. hp_speaker_swap = 1;
  2136. }
  2137. if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
  2138. return err;
  2139. if (spec->multiout.num_dacs == 0)
  2140. if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
  2141. return err;
  2142. err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
  2143. if (err < 0)
  2144. return err;
  2145. if (hp_speaker_swap == 1) {
  2146. /* Restore the hp_outs and line_outs */
  2147. memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
  2148. sizeof(spec->autocfg.line_out_pins));
  2149. spec->autocfg.hp_outs = spec->autocfg.line_outs;
  2150. memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
  2151. sizeof(spec->autocfg.speaker_pins));
  2152. spec->autocfg.line_outs = spec->autocfg.speaker_outs;
  2153. memset(spec->autocfg.speaker_pins, 0,
  2154. sizeof(spec->autocfg.speaker_pins));
  2155. spec->autocfg.speaker_outs = 0;
  2156. }
  2157. err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
  2158. if (err < 0)
  2159. return err;
  2160. err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
  2161. if (err < 0)
  2162. return err;
  2163. if (spec->num_dmics > 0)
  2164. if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
  2165. &spec->autocfg)) < 0)
  2166. return err;
  2167. spec->multiout.max_channels = spec->multiout.num_dacs * 2;
  2168. if (spec->multiout.max_channels > 2)
  2169. spec->surr_switch = 1;
  2170. if (spec->autocfg.dig_out_pin)
  2171. spec->multiout.dig_out_nid = dig_out;
  2172. if (spec->autocfg.dig_in_pin)
  2173. spec->dig_in_nid = dig_in;
  2174. if (spec->kctl_alloc)
  2175. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  2176. spec->input_mux = &spec->private_imux;
  2177. if (!spec->dinput_mux)
  2178. spec->dinput_mux = &spec->private_dimux;
  2179. return 1;
  2180. }
  2181. /* add playback controls for HP output */
  2182. static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
  2183. struct auto_pin_cfg *cfg)
  2184. {
  2185. struct sigmatel_spec *spec = codec->spec;
  2186. hda_nid_t pin = cfg->hp_pins[0];
  2187. unsigned int wid_caps;
  2188. if (! pin)
  2189. return 0;
  2190. wid_caps = get_wcaps(codec, pin);
  2191. if (wid_caps & AC_WCAP_UNSOL_CAP)
  2192. spec->hp_detect = 1;
  2193. return 0;
  2194. }
  2195. /* add playback controls for LFE output */
  2196. static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
  2197. struct auto_pin_cfg *cfg)
  2198. {
  2199. struct sigmatel_spec *spec = codec->spec;
  2200. int err;
  2201. hda_nid_t lfe_pin = 0x0;
  2202. int i;
  2203. /*
  2204. * search speaker outs and line outs for a mono speaker pin
  2205. * with an amp. If one is found, add LFE controls
  2206. * for it.
  2207. */
  2208. for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
  2209. hda_nid_t pin = spec->autocfg.speaker_pins[i];
  2210. unsigned long wcaps = get_wcaps(codec, pin);
  2211. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  2212. if (wcaps == AC_WCAP_OUT_AMP)
  2213. /* found a mono speaker with an amp, must be lfe */
  2214. lfe_pin = pin;
  2215. }
  2216. /* if speaker_outs is 0, then speakers may be in line_outs */
  2217. if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
  2218. for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
  2219. hda_nid_t pin = spec->autocfg.line_out_pins[i];
  2220. unsigned long cfg;
  2221. cfg = snd_hda_codec_read(codec, pin, 0,
  2222. AC_VERB_GET_CONFIG_DEFAULT,
  2223. 0x00);
  2224. if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
  2225. unsigned long wcaps = get_wcaps(codec, pin);
  2226. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  2227. if (wcaps == AC_WCAP_OUT_AMP)
  2228. /* found a mono speaker with an amp,
  2229. must be lfe */
  2230. lfe_pin = pin;
  2231. }
  2232. }
  2233. }
  2234. if (lfe_pin) {
  2235. err = create_controls(spec, "LFE", lfe_pin, 1);
  2236. if (err < 0)
  2237. return err;
  2238. }
  2239. return 0;
  2240. }
  2241. static int stac9200_parse_auto_config(struct hda_codec *codec)
  2242. {
  2243. struct sigmatel_spec *spec = codec->spec;
  2244. int err;
  2245. if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
  2246. return err;
  2247. if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
  2248. return err;
  2249. if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
  2250. return err;
  2251. if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
  2252. return err;
  2253. if (spec->autocfg.dig_out_pin)
  2254. spec->multiout.dig_out_nid = 0x05;
  2255. if (spec->autocfg.dig_in_pin)
  2256. spec->dig_in_nid = 0x04;
  2257. if (spec->kctl_alloc)
  2258. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  2259. spec->input_mux = &spec->private_imux;
  2260. spec->dinput_mux = &spec->private_dimux;
  2261. return 1;
  2262. }
  2263. /*
  2264. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  2265. * funky external mute control using GPIO pins.
  2266. */
  2267. static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
  2268. {
  2269. unsigned int gpiostate, gpiomask, gpiodir;
  2270. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  2271. AC_VERB_GET_GPIO_DATA, 0);
  2272. if (!muted)
  2273. gpiostate |= (1 << pin);
  2274. else
  2275. gpiostate &= ~(1 << pin);
  2276. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  2277. AC_VERB_GET_GPIO_MASK, 0);
  2278. gpiomask |= (1 << pin);
  2279. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  2280. AC_VERB_GET_GPIO_DIRECTION, 0);
  2281. gpiodir |= (1 << pin);
  2282. /* AppleHDA seems to do this -- WTF is this verb?? */
  2283. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  2284. snd_hda_codec_write(codec, codec->afg, 0,
  2285. AC_VERB_SET_GPIO_MASK, gpiomask);
  2286. snd_hda_codec_write(codec, codec->afg, 0,
  2287. AC_VERB_SET_GPIO_DIRECTION, gpiodir);
  2288. msleep(1);
  2289. snd_hda_codec_write(codec, codec->afg, 0,
  2290. AC_VERB_SET_GPIO_DATA, gpiostate);
  2291. }
  2292. static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
  2293. unsigned int event)
  2294. {
  2295. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
  2296. snd_hda_codec_write_cache(codec, nid, 0,
  2297. AC_VERB_SET_UNSOLICITED_ENABLE,
  2298. (AC_USRSP_EN | event));
  2299. }
  2300. static int stac92xx_init(struct hda_codec *codec)
  2301. {
  2302. struct sigmatel_spec *spec = codec->spec;
  2303. struct auto_pin_cfg *cfg = &spec->autocfg;
  2304. int i;
  2305. snd_hda_sequence_write(codec, spec->init);
  2306. /* set up pins */
  2307. if (spec->hp_detect) {
  2308. /* Enable unsolicited responses on the HP widget */
  2309. for (i = 0; i < cfg->hp_outs; i++)
  2310. enable_pin_detect(codec, cfg->hp_pins[i],
  2311. STAC_HP_EVENT);
  2312. /* force to enable the first line-out; the others are set up
  2313. * in unsol_event
  2314. */
  2315. stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
  2316. AC_PINCTL_OUT_EN);
  2317. stac92xx_auto_init_hp_out(codec);
  2318. /* fake event to set up pins */
  2319. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2320. } else {
  2321. stac92xx_auto_init_multi_out(codec);
  2322. stac92xx_auto_init_hp_out(codec);
  2323. }
  2324. for (i = 0; i < AUTO_PIN_LAST; i++) {
  2325. hda_nid_t nid = cfg->input_pins[i];
  2326. if (nid) {
  2327. unsigned int pinctl = AC_PINCTL_IN_EN;
  2328. if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
  2329. pinctl |= stac92xx_get_vref(codec, nid);
  2330. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  2331. }
  2332. }
  2333. if (spec->num_dmics > 0)
  2334. for (i = 0; i < spec->num_dmics; i++)
  2335. stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
  2336. AC_PINCTL_IN_EN);
  2337. if (cfg->dig_out_pin)
  2338. stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
  2339. AC_PINCTL_OUT_EN);
  2340. if (cfg->dig_in_pin)
  2341. stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
  2342. AC_PINCTL_IN_EN);
  2343. if (spec->gpio_mute) {
  2344. stac922x_gpio_mute(codec, 0, 0);
  2345. stac922x_gpio_mute(codec, 1, 0);
  2346. }
  2347. return 0;
  2348. }
  2349. static void stac92xx_free(struct hda_codec *codec)
  2350. {
  2351. struct sigmatel_spec *spec = codec->spec;
  2352. int i;
  2353. if (! spec)
  2354. return;
  2355. if (spec->kctl_alloc) {
  2356. for (i = 0; i < spec->num_kctl_used; i++)
  2357. kfree(spec->kctl_alloc[i].name);
  2358. kfree(spec->kctl_alloc);
  2359. }
  2360. if (spec->bios_pin_configs)
  2361. kfree(spec->bios_pin_configs);
  2362. kfree(spec);
  2363. }
  2364. static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2365. unsigned int flag)
  2366. {
  2367. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2368. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2369. if (pin_ctl & AC_PINCTL_IN_EN) {
  2370. /*
  2371. * we need to check the current set-up direction of
  2372. * shared input pins since they can be switched via
  2373. * "xxx as Output" mixer switch
  2374. */
  2375. struct sigmatel_spec *spec = codec->spec;
  2376. struct auto_pin_cfg *cfg = &spec->autocfg;
  2377. if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
  2378. spec->line_switch) ||
  2379. (nid == cfg->input_pins[AUTO_PIN_MIC] &&
  2380. spec->mic_switch))
  2381. return;
  2382. }
  2383. /* if setting pin direction bits, clear the current
  2384. direction bits first */
  2385. if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
  2386. pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
  2387. snd_hda_codec_write_cache(codec, nid, 0,
  2388. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2389. pin_ctl | flag);
  2390. }
  2391. static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2392. unsigned int flag)
  2393. {
  2394. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2395. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2396. snd_hda_codec_write_cache(codec, nid, 0,
  2397. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2398. pin_ctl & ~flag);
  2399. }
  2400. static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
  2401. {
  2402. if (!nid)
  2403. return 0;
  2404. if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
  2405. & (1 << 31)) {
  2406. unsigned int pinctl;
  2407. pinctl = snd_hda_codec_read(codec, nid, 0,
  2408. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  2409. if (pinctl & AC_PINCTL_IN_EN)
  2410. return 0; /* mic- or line-input */
  2411. else
  2412. return 1; /* HP-output */
  2413. }
  2414. return 0;
  2415. }
  2416. static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
  2417. {
  2418. struct sigmatel_spec *spec = codec->spec;
  2419. struct auto_pin_cfg *cfg = &spec->autocfg;
  2420. int i, presence;
  2421. presence = 0;
  2422. for (i = 0; i < cfg->hp_outs; i++) {
  2423. presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
  2424. if (presence)
  2425. break;
  2426. }
  2427. if (presence) {
  2428. /* disable lineouts, enable hp */
  2429. for (i = 0; i < cfg->line_outs; i++)
  2430. stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
  2431. AC_PINCTL_OUT_EN);
  2432. for (i = 0; i < cfg->speaker_outs; i++)
  2433. stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
  2434. AC_PINCTL_OUT_EN);
  2435. } else {
  2436. /* enable lineouts, disable hp */
  2437. for (i = 0; i < cfg->line_outs; i++)
  2438. stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
  2439. AC_PINCTL_OUT_EN);
  2440. for (i = 0; i < cfg->speaker_outs; i++)
  2441. stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
  2442. AC_PINCTL_OUT_EN);
  2443. }
  2444. }
  2445. static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
  2446. {
  2447. switch (res >> 26) {
  2448. case STAC_HP_EVENT:
  2449. stac92xx_hp_detect(codec, res);
  2450. break;
  2451. }
  2452. }
  2453. #ifdef SND_HDA_NEEDS_RESUME
  2454. static int stac92xx_resume(struct hda_codec *codec)
  2455. {
  2456. struct sigmatel_spec *spec = codec->spec;
  2457. stac92xx_set_config_regs(codec);
  2458. snd_hda_sequence_write(codec, spec->init);
  2459. if (spec->gpio_mute) {
  2460. stac922x_gpio_mute(codec, 0, 0);
  2461. stac922x_gpio_mute(codec, 1, 0);
  2462. }
  2463. snd_hda_codec_resume_amp(codec);
  2464. snd_hda_codec_resume_cache(codec);
  2465. /* invoke unsolicited event to reset the HP state */
  2466. if (spec->hp_detect)
  2467. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2468. return 0;
  2469. }
  2470. #endif
  2471. static struct hda_codec_ops stac92xx_patch_ops = {
  2472. .build_controls = stac92xx_build_controls,
  2473. .build_pcms = stac92xx_build_pcms,
  2474. .init = stac92xx_init,
  2475. .free = stac92xx_free,
  2476. .unsol_event = stac92xx_unsol_event,
  2477. #ifdef SND_HDA_NEEDS_RESUME
  2478. .resume = stac92xx_resume,
  2479. #endif
  2480. };
  2481. static int patch_stac9200(struct hda_codec *codec)
  2482. {
  2483. struct sigmatel_spec *spec;
  2484. int err;
  2485. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2486. if (spec == NULL)
  2487. return -ENOMEM;
  2488. codec->spec = spec;
  2489. spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
  2490. spec->pin_nids = stac9200_pin_nids;
  2491. spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
  2492. stac9200_models,
  2493. stac9200_cfg_tbl);
  2494. if (spec->board_config < 0) {
  2495. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
  2496. err = stac92xx_save_bios_config_regs(codec);
  2497. if (err < 0) {
  2498. stac92xx_free(codec);
  2499. return err;
  2500. }
  2501. spec->pin_configs = spec->bios_pin_configs;
  2502. } else {
  2503. spec->pin_configs = stac9200_brd_tbl[spec->board_config];
  2504. stac92xx_set_config_regs(codec);
  2505. }
  2506. spec->multiout.max_channels = 2;
  2507. spec->multiout.num_dacs = 1;
  2508. spec->multiout.dac_nids = stac9200_dac_nids;
  2509. spec->adc_nids = stac9200_adc_nids;
  2510. spec->mux_nids = stac9200_mux_nids;
  2511. spec->num_muxes = 1;
  2512. spec->num_dmics = 0;
  2513. spec->num_adcs = 1;
  2514. if (spec->board_config == STAC_9200_GATEWAY)
  2515. spec->init = stac9200_eapd_init;
  2516. else
  2517. spec->init = stac9200_core_init;
  2518. spec->mixer = stac9200_mixer;
  2519. err = stac9200_parse_auto_config(codec);
  2520. if (err < 0) {
  2521. stac92xx_free(codec);
  2522. return err;
  2523. }
  2524. codec->patch_ops = stac92xx_patch_ops;
  2525. return 0;
  2526. }
  2527. static int patch_stac925x(struct hda_codec *codec)
  2528. {
  2529. struct sigmatel_spec *spec;
  2530. int err;
  2531. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2532. if (spec == NULL)
  2533. return -ENOMEM;
  2534. codec->spec = spec;
  2535. spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
  2536. spec->pin_nids = stac925x_pin_nids;
  2537. spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
  2538. stac925x_models,
  2539. stac925x_cfg_tbl);
  2540. again:
  2541. if (spec->board_config < 0) {
  2542. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
  2543. "using BIOS defaults\n");
  2544. err = stac92xx_save_bios_config_regs(codec);
  2545. if (err < 0) {
  2546. stac92xx_free(codec);
  2547. return err;
  2548. }
  2549. spec->pin_configs = spec->bios_pin_configs;
  2550. } else if (stac925x_brd_tbl[spec->board_config] != NULL){
  2551. spec->pin_configs = stac925x_brd_tbl[spec->board_config];
  2552. stac92xx_set_config_regs(codec);
  2553. }
  2554. spec->multiout.max_channels = 2;
  2555. spec->multiout.num_dacs = 1;
  2556. spec->multiout.dac_nids = stac925x_dac_nids;
  2557. spec->adc_nids = stac925x_adc_nids;
  2558. spec->mux_nids = stac925x_mux_nids;
  2559. spec->num_muxes = 1;
  2560. spec->num_adcs = 1;
  2561. switch (codec->vendor_id) {
  2562. case 0x83847632: /* STAC9202 */
  2563. case 0x83847633: /* STAC9202D */
  2564. case 0x83847636: /* STAC9251 */
  2565. case 0x83847637: /* STAC9251D */
  2566. spec->num_dmics = STAC925X_NUM_DMICS;
  2567. spec->dmic_nids = stac925x_dmic_nids;
  2568. spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
  2569. spec->dmux_nids = stac925x_dmux_nids;
  2570. break;
  2571. default:
  2572. spec->num_dmics = 0;
  2573. break;
  2574. }
  2575. spec->init = stac925x_core_init;
  2576. spec->mixer = stac925x_mixer;
  2577. err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
  2578. if (!err) {
  2579. if (spec->board_config < 0) {
  2580. printk(KERN_WARNING "hda_codec: No auto-config is "
  2581. "available, default to model=ref\n");
  2582. spec->board_config = STAC_925x_REF;
  2583. goto again;
  2584. }
  2585. err = -EINVAL;
  2586. }
  2587. if (err < 0) {
  2588. stac92xx_free(codec);
  2589. return err;
  2590. }
  2591. codec->patch_ops = stac92xx_patch_ops;
  2592. return 0;
  2593. }
  2594. static struct hda_input_mux stac92hd73xx_dmux = {
  2595. .num_items = 4,
  2596. .items = {
  2597. { "Analog Inputs", 0x0b },
  2598. { "CD", 0x08 },
  2599. { "Digital Mic 1", 0x09 },
  2600. { "Digital Mic 2", 0x0a },
  2601. }
  2602. };
  2603. static int patch_stac92hd73xx(struct hda_codec *codec)
  2604. {
  2605. struct sigmatel_spec *spec;
  2606. hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
  2607. int err = 0;
  2608. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2609. if (spec == NULL)
  2610. return -ENOMEM;
  2611. codec->spec = spec;
  2612. spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
  2613. spec->pin_nids = stac92hd73xx_pin_nids;
  2614. spec->board_config = snd_hda_check_board_config(codec,
  2615. STAC_92HD73XX_MODELS,
  2616. stac92hd73xx_models,
  2617. stac92hd73xx_cfg_tbl);
  2618. again:
  2619. if (spec->board_config < 0) {
  2620. snd_printdd(KERN_INFO "hda_codec: Unknown model for"
  2621. " STAC92HD73XX, using BIOS defaults\n");
  2622. err = stac92xx_save_bios_config_regs(codec);
  2623. if (err < 0) {
  2624. stac92xx_free(codec);
  2625. return err;
  2626. }
  2627. spec->pin_configs = spec->bios_pin_configs;
  2628. } else {
  2629. spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
  2630. stac92xx_set_config_regs(codec);
  2631. }
  2632. spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
  2633. conn, STAC92HD73_DAC_COUNT + 2) - 1;
  2634. if (spec->multiout.num_dacs < 0) {
  2635. printk(KERN_WARNING "hda_codec: Could not determine "
  2636. "number of channels defaulting to DAC count\n");
  2637. spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
  2638. }
  2639. switch (spec->multiout.num_dacs) {
  2640. case 0x3: /* 6 Channel */
  2641. spec->mixer = stac92hd73xx_6ch_mixer;
  2642. spec->init = stac92hd73xx_6ch_core_init;
  2643. break;
  2644. case 0x4: /* 8 Channel */
  2645. spec->multiout.hp_nid = 0x18;
  2646. spec->mixer = stac92hd73xx_8ch_mixer;
  2647. spec->init = stac92hd73xx_8ch_core_init;
  2648. break;
  2649. case 0x5: /* 10 Channel */
  2650. spec->multiout.hp_nid = 0x19;
  2651. spec->mixer = stac92hd73xx_10ch_mixer;
  2652. spec->init = stac92hd73xx_10ch_core_init;
  2653. };
  2654. spec->multiout.dac_nids = stac92hd73xx_dac_nids;
  2655. spec->aloopback_mask = 0x01;
  2656. spec->aloopback_shift = 8;
  2657. spec->mux_nids = stac92hd73xx_mux_nids;
  2658. spec->adc_nids = stac92hd73xx_adc_nids;
  2659. spec->dmic_nids = stac92hd73xx_dmic_nids;
  2660. spec->dmux_nids = stac92hd73xx_dmux_nids;
  2661. spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
  2662. spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
  2663. spec->num_dmics = STAC92HD73XX_NUM_DMICS;
  2664. spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
  2665. spec->dinput_mux = &stac92hd73xx_dmux;
  2666. /* GPIO0 High = Enable EAPD */
  2667. spec->gpio_mask = spec->gpio_data = 0x000001;
  2668. stac92xx_enable_gpio_mask(codec);
  2669. err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
  2670. if (!err) {
  2671. if (spec->board_config < 0) {
  2672. printk(KERN_WARNING "hda_codec: No auto-config is "
  2673. "available, default to model=ref\n");
  2674. spec->board_config = STAC_92HD73XX_REF;
  2675. goto again;
  2676. }
  2677. err = -EINVAL;
  2678. }
  2679. if (err < 0) {
  2680. stac92xx_free(codec);
  2681. return err;
  2682. }
  2683. codec->patch_ops = stac92xx_patch_ops;
  2684. return 0;
  2685. }
  2686. static int patch_stac92hd71bxx(struct hda_codec *codec)
  2687. {
  2688. struct sigmatel_spec *spec;
  2689. int err = 0;
  2690. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2691. if (spec == NULL)
  2692. return -ENOMEM;
  2693. codec->spec = spec;
  2694. spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
  2695. spec->pin_nids = stac92hd71bxx_pin_nids;
  2696. spec->board_config = snd_hda_check_board_config(codec,
  2697. STAC_92HD71BXX_MODELS,
  2698. stac92hd71bxx_models,
  2699. stac92hd71bxx_cfg_tbl);
  2700. again:
  2701. if (spec->board_config < 0) {
  2702. snd_printdd(KERN_INFO "hda_codec: Unknown model for"
  2703. " STAC92HD71BXX, using BIOS defaults\n");
  2704. err = stac92xx_save_bios_config_regs(codec);
  2705. if (err < 0) {
  2706. stac92xx_free(codec);
  2707. return err;
  2708. }
  2709. spec->pin_configs = spec->bios_pin_configs;
  2710. } else {
  2711. spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
  2712. stac92xx_set_config_regs(codec);
  2713. }
  2714. switch (codec->vendor_id) {
  2715. case 0x111d76b6: /* 4 Port without Analog Mixer */
  2716. case 0x111d76b7:
  2717. case 0x111d76b4: /* 6 Port without Analog Mixer */
  2718. case 0x111d76b5:
  2719. spec->mixer = stac92hd71bxx_mixer;
  2720. spec->init = stac92hd71bxx_core_init;
  2721. break;
  2722. default:
  2723. spec->mixer = stac92hd71bxx_analog_mixer;
  2724. spec->init = stac92hd71bxx_analog_core_init;
  2725. }
  2726. spec->aloopback_mask = 0x20;
  2727. spec->aloopback_shift = 0;
  2728. spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
  2729. stac92xx_enable_gpio_mask(codec);
  2730. spec->mux_nids = stac92hd71bxx_mux_nids;
  2731. spec->adc_nids = stac92hd71bxx_adc_nids;
  2732. spec->dmic_nids = stac92hd71bxx_dmic_nids;
  2733. spec->dmux_nids = stac92hd71bxx_dmux_nids;
  2734. spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
  2735. spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
  2736. spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
  2737. spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
  2738. spec->multiout.num_dacs = 2;
  2739. spec->multiout.hp_nid = 0x11;
  2740. spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
  2741. err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
  2742. if (!err) {
  2743. if (spec->board_config < 0) {
  2744. printk(KERN_WARNING "hda_codec: No auto-config is "
  2745. "available, default to model=ref\n");
  2746. spec->board_config = STAC_92HD71BXX_REF;
  2747. goto again;
  2748. }
  2749. err = -EINVAL;
  2750. }
  2751. if (err < 0) {
  2752. stac92xx_free(codec);
  2753. return err;
  2754. }
  2755. codec->patch_ops = stac92xx_patch_ops;
  2756. return 0;
  2757. };
  2758. static int patch_stac922x(struct hda_codec *codec)
  2759. {
  2760. struct sigmatel_spec *spec;
  2761. int err;
  2762. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2763. if (spec == NULL)
  2764. return -ENOMEM;
  2765. codec->spec = spec;
  2766. spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
  2767. spec->pin_nids = stac922x_pin_nids;
  2768. spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
  2769. stac922x_models,
  2770. stac922x_cfg_tbl);
  2771. if (spec->board_config == STAC_INTEL_MAC_V3) {
  2772. spec->gpio_mute = 1;
  2773. /* Intel Macs have all same PCI SSID, so we need to check
  2774. * codec SSID to distinguish the exact models
  2775. */
  2776. printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
  2777. switch (codec->subsystem_id) {
  2778. case 0x106b0800:
  2779. spec->board_config = STAC_INTEL_MAC_V1;
  2780. break;
  2781. case 0x106b0600:
  2782. case 0x106b0700:
  2783. spec->board_config = STAC_INTEL_MAC_V2;
  2784. break;
  2785. case 0x106b0e00:
  2786. case 0x106b0f00:
  2787. case 0x106b1600:
  2788. case 0x106b1700:
  2789. case 0x106b0200:
  2790. case 0x106b1e00:
  2791. spec->board_config = STAC_INTEL_MAC_V3;
  2792. break;
  2793. case 0x106b1a00:
  2794. case 0x00000100:
  2795. spec->board_config = STAC_INTEL_MAC_V4;
  2796. break;
  2797. case 0x106b0a00:
  2798. case 0x106b2200:
  2799. spec->board_config = STAC_INTEL_MAC_V5;
  2800. break;
  2801. }
  2802. }
  2803. again:
  2804. if (spec->board_config < 0) {
  2805. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
  2806. "using BIOS defaults\n");
  2807. err = stac92xx_save_bios_config_regs(codec);
  2808. if (err < 0) {
  2809. stac92xx_free(codec);
  2810. return err;
  2811. }
  2812. spec->pin_configs = spec->bios_pin_configs;
  2813. } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
  2814. spec->pin_configs = stac922x_brd_tbl[spec->board_config];
  2815. stac92xx_set_config_regs(codec);
  2816. }
  2817. spec->adc_nids = stac922x_adc_nids;
  2818. spec->mux_nids = stac922x_mux_nids;
  2819. spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
  2820. spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
  2821. spec->num_dmics = 0;
  2822. spec->init = stac922x_core_init;
  2823. spec->mixer = stac922x_mixer;
  2824. spec->multiout.dac_nids = spec->dac_nids;
  2825. err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
  2826. if (!err) {
  2827. if (spec->board_config < 0) {
  2828. printk(KERN_WARNING "hda_codec: No auto-config is "
  2829. "available, default to model=ref\n");
  2830. spec->board_config = STAC_D945_REF;
  2831. goto again;
  2832. }
  2833. err = -EINVAL;
  2834. }
  2835. if (err < 0) {
  2836. stac92xx_free(codec);
  2837. return err;
  2838. }
  2839. codec->patch_ops = stac92xx_patch_ops;
  2840. /* Fix Mux capture level; max to 2 */
  2841. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  2842. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  2843. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  2844. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  2845. (0 << AC_AMPCAP_MUTE_SHIFT));
  2846. return 0;
  2847. }
  2848. static int patch_stac927x(struct hda_codec *codec)
  2849. {
  2850. struct sigmatel_spec *spec;
  2851. int err;
  2852. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2853. if (spec == NULL)
  2854. return -ENOMEM;
  2855. codec->spec = spec;
  2856. spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
  2857. spec->pin_nids = stac927x_pin_nids;
  2858. spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
  2859. stac927x_models,
  2860. stac927x_cfg_tbl);
  2861. again:
  2862. if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
  2863. if (spec->board_config < 0)
  2864. snd_printdd(KERN_INFO "hda_codec: Unknown model for"
  2865. "STAC927x, using BIOS defaults\n");
  2866. err = stac92xx_save_bios_config_regs(codec);
  2867. if (err < 0) {
  2868. stac92xx_free(codec);
  2869. return err;
  2870. }
  2871. spec->pin_configs = spec->bios_pin_configs;
  2872. } else {
  2873. spec->pin_configs = stac927x_brd_tbl[spec->board_config];
  2874. stac92xx_set_config_regs(codec);
  2875. }
  2876. spec->adc_nids = stac927x_adc_nids;
  2877. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2878. spec->mux_nids = stac927x_mux_nids;
  2879. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2880. spec->multiout.dac_nids = spec->dac_nids;
  2881. switch (spec->board_config) {
  2882. case STAC_D965_3ST:
  2883. case STAC_D965_5ST:
  2884. /* GPIO0 High = Enable EAPD */
  2885. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2886. spec->num_dmics = 0;
  2887. spec->init = d965_core_init;
  2888. spec->mixer = stac927x_mixer;
  2889. break;
  2890. case STAC_DELL_BIOS:
  2891. /* correct the front input jack as a mic */
  2892. stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
  2893. /* fallthru */
  2894. case STAC_DELL_3ST:
  2895. /* GPIO2 High = Enable EAPD */
  2896. spec->gpio_mask = spec->gpio_data = 0x00000004;
  2897. spec->dmic_nids = stac927x_dmic_nids;
  2898. spec->num_dmics = STAC927X_NUM_DMICS;
  2899. spec->init = d965_core_init;
  2900. spec->mixer = stac927x_mixer;
  2901. spec->dmux_nids = stac927x_dmux_nids;
  2902. spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
  2903. break;
  2904. default:
  2905. /* GPIO0 High = Enable EAPD */
  2906. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2907. spec->num_dmics = 0;
  2908. spec->init = stac927x_core_init;
  2909. spec->mixer = stac927x_mixer;
  2910. }
  2911. spec->aloopback_mask = 0x40;
  2912. spec->aloopback_shift = 0;
  2913. stac92xx_enable_gpio_mask(codec);
  2914. err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
  2915. if (!err) {
  2916. if (spec->board_config < 0) {
  2917. printk(KERN_WARNING "hda_codec: No auto-config is "
  2918. "available, default to model=ref\n");
  2919. spec->board_config = STAC_D965_REF;
  2920. goto again;
  2921. }
  2922. err = -EINVAL;
  2923. }
  2924. if (err < 0) {
  2925. stac92xx_free(codec);
  2926. return err;
  2927. }
  2928. codec->patch_ops = stac92xx_patch_ops;
  2929. return 0;
  2930. }
  2931. static int patch_stac9205(struct hda_codec *codec)
  2932. {
  2933. struct sigmatel_spec *spec;
  2934. int err;
  2935. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2936. if (spec == NULL)
  2937. return -ENOMEM;
  2938. codec->spec = spec;
  2939. spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
  2940. spec->pin_nids = stac9205_pin_nids;
  2941. spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
  2942. stac9205_models,
  2943. stac9205_cfg_tbl);
  2944. again:
  2945. if (spec->board_config < 0) {
  2946. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
  2947. err = stac92xx_save_bios_config_regs(codec);
  2948. if (err < 0) {
  2949. stac92xx_free(codec);
  2950. return err;
  2951. }
  2952. spec->pin_configs = spec->bios_pin_configs;
  2953. } else {
  2954. spec->pin_configs = stac9205_brd_tbl[spec->board_config];
  2955. stac92xx_set_config_regs(codec);
  2956. }
  2957. spec->adc_nids = stac9205_adc_nids;
  2958. spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
  2959. spec->mux_nids = stac9205_mux_nids;
  2960. spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
  2961. spec->dmic_nids = stac9205_dmic_nids;
  2962. spec->num_dmics = STAC9205_NUM_DMICS;
  2963. spec->dmux_nids = stac9205_dmux_nids;
  2964. spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
  2965. spec->init = stac9205_core_init;
  2966. spec->mixer = stac9205_mixer;
  2967. spec->aloopback_mask = 0x40;
  2968. spec->aloopback_shift = 0;
  2969. spec->multiout.dac_nids = spec->dac_nids;
  2970. switch (spec->board_config){
  2971. case STAC_9205_DELL_M43:
  2972. /* Enable SPDIF in/out */
  2973. stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
  2974. stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
  2975. spec->gpio_mask = 0x00000007; /* GPIO0-2 */
  2976. /* GPIO0 High = EAPD, GPIO1 Low = DRM,
  2977. * GPIO2 High = Headphone Mute
  2978. */
  2979. spec->gpio_data = 0x00000005;
  2980. break;
  2981. default:
  2982. /* GPIO0 High = EAPD */
  2983. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2984. break;
  2985. }
  2986. stac92xx_enable_gpio_mask(codec);
  2987. err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
  2988. if (!err) {
  2989. if (spec->board_config < 0) {
  2990. printk(KERN_WARNING "hda_codec: No auto-config is "
  2991. "available, default to model=ref\n");
  2992. spec->board_config = STAC_9205_REF;
  2993. goto again;
  2994. }
  2995. err = -EINVAL;
  2996. }
  2997. if (err < 0) {
  2998. stac92xx_free(codec);
  2999. return err;
  3000. }
  3001. codec->patch_ops = stac92xx_patch_ops;
  3002. return 0;
  3003. }
  3004. /*
  3005. * STAC9872 hack
  3006. */
  3007. /* static config for Sony VAIO FE550G and Sony VAIO AR */
  3008. static hda_nid_t vaio_dacs[] = { 0x2 };
  3009. #define VAIO_HP_DAC 0x5
  3010. static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
  3011. static hda_nid_t vaio_mux_nids[] = { 0x15 };
  3012. static struct hda_input_mux vaio_mux = {
  3013. .num_items = 3,
  3014. .items = {
  3015. /* { "HP", 0x0 }, */
  3016. { "Mic Jack", 0x1 },
  3017. { "Internal Mic", 0x2 },
  3018. { "PCM", 0x3 },
  3019. }
  3020. };
  3021. static struct hda_verb vaio_init[] = {
  3022. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  3023. {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
  3024. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  3025. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  3026. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  3027. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  3028. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  3029. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  3030. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  3031. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  3032. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  3033. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  3034. {}
  3035. };
  3036. static struct hda_verb vaio_ar_init[] = {
  3037. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  3038. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  3039. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  3040. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  3041. /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
  3042. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  3043. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  3044. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  3045. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  3046. /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
  3047. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  3048. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  3049. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  3050. {}
  3051. };
  3052. /* bind volumes of both NID 0x02 and 0x05 */
  3053. static struct hda_bind_ctls vaio_bind_master_vol = {
  3054. .ops = &snd_hda_bind_vol,
  3055. .values = {
  3056. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  3057. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  3058. 0
  3059. },
  3060. };
  3061. /* bind volumes of both NID 0x02 and 0x05 */
  3062. static struct hda_bind_ctls vaio_bind_master_sw = {
  3063. .ops = &snd_hda_bind_sw,
  3064. .values = {
  3065. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  3066. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  3067. 0,
  3068. },
  3069. };
  3070. static struct snd_kcontrol_new vaio_mixer[] = {
  3071. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  3072. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  3073. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  3074. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  3075. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  3076. {
  3077. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  3078. .name = "Capture Source",
  3079. .count = 1,
  3080. .info = stac92xx_mux_enum_info,
  3081. .get = stac92xx_mux_enum_get,
  3082. .put = stac92xx_mux_enum_put,
  3083. },
  3084. {}
  3085. };
  3086. static struct snd_kcontrol_new vaio_ar_mixer[] = {
  3087. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  3088. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  3089. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  3090. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  3091. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  3092. /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
  3093. HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
  3094. {
  3095. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  3096. .name = "Capture Source",
  3097. .count = 1,
  3098. .info = stac92xx_mux_enum_info,
  3099. .get = stac92xx_mux_enum_get,
  3100. .put = stac92xx_mux_enum_put,
  3101. },
  3102. {}
  3103. };
  3104. static struct hda_codec_ops stac9872_patch_ops = {
  3105. .build_controls = stac92xx_build_controls,
  3106. .build_pcms = stac92xx_build_pcms,
  3107. .init = stac92xx_init,
  3108. .free = stac92xx_free,
  3109. #ifdef SND_HDA_NEEDS_RESUME
  3110. .resume = stac92xx_resume,
  3111. #endif
  3112. };
  3113. static int stac9872_vaio_init(struct hda_codec *codec)
  3114. {
  3115. int err;
  3116. err = stac92xx_init(codec);
  3117. if (err < 0)
  3118. return err;
  3119. if (codec->patch_ops.unsol_event)
  3120. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  3121. return 0;
  3122. }
  3123. static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
  3124. {
  3125. if (get_hp_pin_presence(codec, 0x0a)) {
  3126. stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  3127. stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  3128. } else {
  3129. stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  3130. stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  3131. }
  3132. }
  3133. static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
  3134. {
  3135. switch (res >> 26) {
  3136. case STAC_HP_EVENT:
  3137. stac9872_vaio_hp_detect(codec, res);
  3138. break;
  3139. }
  3140. }
  3141. static struct hda_codec_ops stac9872_vaio_patch_ops = {
  3142. .build_controls = stac92xx_build_controls,
  3143. .build_pcms = stac92xx_build_pcms,
  3144. .init = stac9872_vaio_init,
  3145. .free = stac92xx_free,
  3146. .unsol_event = stac9872_vaio_unsol_event,
  3147. #ifdef CONFIG_PM
  3148. .resume = stac92xx_resume,
  3149. #endif
  3150. };
  3151. enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
  3152. CXD9872RD_VAIO,
  3153. /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
  3154. STAC9872AK_VAIO,
  3155. /* Unknown. id=0x83847661 and subsys=0x104D1200. */
  3156. STAC9872K_VAIO,
  3157. /* AR Series. id=0x83847664 and subsys=104D1300 */
  3158. CXD9872AKD_VAIO,
  3159. STAC_9872_MODELS,
  3160. };
  3161. static const char *stac9872_models[STAC_9872_MODELS] = {
  3162. [CXD9872RD_VAIO] = "vaio",
  3163. [CXD9872AKD_VAIO] = "vaio-ar",
  3164. };
  3165. static struct snd_pci_quirk stac9872_cfg_tbl[] = {
  3166. SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
  3167. SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
  3168. SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
  3169. SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
  3170. {}
  3171. };
  3172. static int patch_stac9872(struct hda_codec *codec)
  3173. {
  3174. struct sigmatel_spec *spec;
  3175. int board_config;
  3176. board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
  3177. stac9872_models,
  3178. stac9872_cfg_tbl);
  3179. if (board_config < 0)
  3180. /* unknown config, let generic-parser do its job... */
  3181. return snd_hda_parse_generic_codec(codec);
  3182. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  3183. if (spec == NULL)
  3184. return -ENOMEM;
  3185. codec->spec = spec;
  3186. switch (board_config) {
  3187. case CXD9872RD_VAIO:
  3188. case STAC9872AK_VAIO:
  3189. case STAC9872K_VAIO:
  3190. spec->mixer = vaio_mixer;
  3191. spec->init = vaio_init;
  3192. spec->multiout.max_channels = 2;
  3193. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  3194. spec->multiout.dac_nids = vaio_dacs;
  3195. spec->multiout.hp_nid = VAIO_HP_DAC;
  3196. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  3197. spec->adc_nids = vaio_adcs;
  3198. spec->input_mux = &vaio_mux;
  3199. spec->mux_nids = vaio_mux_nids;
  3200. codec->patch_ops = stac9872_vaio_patch_ops;
  3201. break;
  3202. case CXD9872AKD_VAIO:
  3203. spec->mixer = vaio_ar_mixer;
  3204. spec->init = vaio_ar_init;
  3205. spec->multiout.max_channels = 2;
  3206. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  3207. spec->multiout.dac_nids = vaio_dacs;
  3208. spec->multiout.hp_nid = VAIO_HP_DAC;
  3209. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  3210. spec->adc_nids = vaio_adcs;
  3211. spec->input_mux = &vaio_mux;
  3212. spec->mux_nids = vaio_mux_nids;
  3213. codec->patch_ops = stac9872_patch_ops;
  3214. break;
  3215. }
  3216. return 0;
  3217. }
  3218. /*
  3219. * patch entries
  3220. */
  3221. struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  3222. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  3223. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  3224. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  3225. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  3226. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  3227. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  3228. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  3229. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  3230. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  3231. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  3232. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  3233. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  3234. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  3235. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  3236. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  3237. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  3238. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  3239. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  3240. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  3241. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  3242. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  3243. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  3244. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  3245. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  3246. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  3247. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  3248. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  3249. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  3250. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  3251. /* The following does not take into account .id=0x83847661 when subsys =
  3252. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  3253. * currently not fully supported.
  3254. */
  3255. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  3256. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  3257. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  3258. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  3259. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  3260. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  3261. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  3262. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  3263. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  3264. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  3265. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  3266. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  3267. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  3268. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  3269. { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
  3270. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3271. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3272. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3273. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3274. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3275. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3276. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3277. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3278. {} /* terminator */
  3279. };