iwl4965-base.c 232 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /*
  57. * module name, copyright, version, etc.
  58. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  59. */
  60. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  67. #define VS "s"
  68. #else
  69. #define VS
  70. #endif
  71. #define DRV_VERSION IWLWIFI_VERSION VD VS
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT);
  75. MODULE_LICENSE("GPL");
  76. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  77. {
  78. u16 fc = le16_to_cpu(hdr->frame_control);
  79. int hdr_len = ieee80211_get_hdrlen(fc);
  80. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  81. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  82. return NULL;
  83. }
  84. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  85. struct iwl_priv *priv, enum ieee80211_band band)
  86. {
  87. return priv->hw->wiphy->bands[band];
  88. }
  89. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  90. {
  91. /* Single white space is for Linksys APs */
  92. if (essid_len == 1 && essid[0] == ' ')
  93. return 1;
  94. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  95. while (essid_len) {
  96. essid_len--;
  97. if (essid[essid_len] != '\0')
  98. return 0;
  99. }
  100. return 1;
  101. }
  102. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  103. {
  104. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  105. const char *s = essid;
  106. char *d = escaped;
  107. if (iwl4965_is_empty_essid(essid, essid_len)) {
  108. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  109. return escaped;
  110. }
  111. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  112. while (essid_len--) {
  113. if (*s == '\0') {
  114. *d++ = '\\';
  115. *d++ = '0';
  116. s++;
  117. } else
  118. *d++ = *s++;
  119. }
  120. *d = '\0';
  121. return escaped;
  122. }
  123. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  124. * DMA services
  125. *
  126. * Theory of operation
  127. *
  128. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  129. * of buffer descriptors, each of which points to one or more data buffers for
  130. * the device to read from or fill. Driver and device exchange status of each
  131. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  132. * entries in each circular buffer, to protect against confusing empty and full
  133. * queue states.
  134. *
  135. * The device reads or writes the data in the queues via the device's several
  136. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  137. *
  138. * For Tx queue, there are low mark and high mark limits. If, after queuing
  139. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  140. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  141. * Tx queue resumed.
  142. *
  143. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  144. * queue (#4) for sending commands to the device firmware, and 15 other
  145. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  146. *
  147. * See more detailed info in iwl-4965-hw.h.
  148. ***************************************************/
  149. int iwl4965_queue_space(const struct iwl4965_queue *q)
  150. {
  151. int s = q->read_ptr - q->write_ptr;
  152. if (q->read_ptr > q->write_ptr)
  153. s -= q->n_bd;
  154. if (s <= 0)
  155. s += q->n_window;
  156. /* keep some reserve to not confuse empty and full situations */
  157. s -= 2;
  158. if (s < 0)
  159. s = 0;
  160. return s;
  161. }
  162. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  163. {
  164. return q->write_ptr > q->read_ptr ?
  165. (i >= q->read_ptr && i < q->write_ptr) :
  166. !(i < q->read_ptr && i >= q->write_ptr);
  167. }
  168. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  169. {
  170. /* This is for scan command, the big buffer at end of command array */
  171. if (is_huge)
  172. return q->n_window; /* must be power of 2 */
  173. /* Otherwise, use normal size buffers */
  174. return index & (q->n_window - 1);
  175. }
  176. /**
  177. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  178. */
  179. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  180. int count, int slots_num, u32 id)
  181. {
  182. q->n_bd = count;
  183. q->n_window = slots_num;
  184. q->id = id;
  185. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  186. * and iwl_queue_dec_wrap are broken. */
  187. BUG_ON(!is_power_of_2(count));
  188. /* slots_num must be power-of-two size, otherwise
  189. * get_cmd_index is broken. */
  190. BUG_ON(!is_power_of_2(slots_num));
  191. q->low_mark = q->n_window / 4;
  192. if (q->low_mark < 4)
  193. q->low_mark = 4;
  194. q->high_mark = q->n_window / 8;
  195. if (q->high_mark < 2)
  196. q->high_mark = 2;
  197. q->write_ptr = q->read_ptr = 0;
  198. return 0;
  199. }
  200. /**
  201. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  202. */
  203. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  204. struct iwl4965_tx_queue *txq, u32 id)
  205. {
  206. struct pci_dev *dev = priv->pci_dev;
  207. /* Driver private data, only for Tx (not command) queues,
  208. * not shared with device. */
  209. if (id != IWL_CMD_QUEUE_NUM) {
  210. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  211. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  212. if (!txq->txb) {
  213. IWL_ERROR("kmalloc for auxiliary BD "
  214. "structures failed\n");
  215. goto error;
  216. }
  217. } else
  218. txq->txb = NULL;
  219. /* Circular buffer of transmit frame descriptors (TFDs),
  220. * shared with device */
  221. txq->bd = pci_alloc_consistent(dev,
  222. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  223. &txq->q.dma_addr);
  224. if (!txq->bd) {
  225. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  226. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  227. goto error;
  228. }
  229. txq->q.id = id;
  230. return 0;
  231. error:
  232. if (txq->txb) {
  233. kfree(txq->txb);
  234. txq->txb = NULL;
  235. }
  236. return -ENOMEM;
  237. }
  238. /**
  239. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  240. */
  241. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  242. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  243. {
  244. struct pci_dev *dev = priv->pci_dev;
  245. int len;
  246. int rc = 0;
  247. /*
  248. * Alloc buffer array for commands (Tx or other types of commands).
  249. * For the command queue (#4), allocate command space + one big
  250. * command for scan, since scan command is very huge; the system will
  251. * not have two scans at the same time, so only one is needed.
  252. * For normal Tx queues (all other queues), no super-size command
  253. * space is needed.
  254. */
  255. len = sizeof(struct iwl_cmd) * slots_num;
  256. if (txq_id == IWL_CMD_QUEUE_NUM)
  257. len += IWL_MAX_SCAN_SIZE;
  258. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  259. if (!txq->cmd)
  260. return -ENOMEM;
  261. /* Alloc driver data array and TFD circular buffer */
  262. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  263. if (rc) {
  264. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  265. return -ENOMEM;
  266. }
  267. txq->need_update = 0;
  268. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  269. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  270. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  271. /* Initialize queue's high/low-water marks, and head/tail indexes */
  272. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  273. /* Tell device where to find queue */
  274. iwl4965_hw_tx_queue_init(priv, txq);
  275. return 0;
  276. }
  277. /**
  278. * iwl4965_tx_queue_free - Deallocate DMA queue.
  279. * @txq: Transmit queue to deallocate.
  280. *
  281. * Empty queue by removing and destroying all BD's.
  282. * Free all buffers.
  283. * 0-fill, but do not free "txq" descriptor structure.
  284. */
  285. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  286. {
  287. struct iwl4965_queue *q = &txq->q;
  288. struct pci_dev *dev = priv->pci_dev;
  289. int len;
  290. if (q->n_bd == 0)
  291. return;
  292. /* first, empty all BD's */
  293. for (; q->write_ptr != q->read_ptr;
  294. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  295. iwl4965_hw_txq_free_tfd(priv, txq);
  296. len = sizeof(struct iwl_cmd) * q->n_window;
  297. if (q->id == IWL_CMD_QUEUE_NUM)
  298. len += IWL_MAX_SCAN_SIZE;
  299. /* De-alloc array of command/tx buffers */
  300. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  301. /* De-alloc circular buffer of TFDs */
  302. if (txq->q.n_bd)
  303. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  304. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  305. /* De-alloc array of per-TFD driver data */
  306. if (txq->txb) {
  307. kfree(txq->txb);
  308. txq->txb = NULL;
  309. }
  310. /* 0-fill queue descriptor structure */
  311. memset(txq, 0, sizeof(*txq));
  312. }
  313. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  314. /*************** STATION TABLE MANAGEMENT ****
  315. * mac80211 should be examined to determine if sta_info is duplicating
  316. * the functionality provided here
  317. */
  318. /**************************************************************/
  319. #if 0 /* temporary disable till we add real remove station */
  320. /**
  321. * iwl4965_remove_station - Remove driver's knowledge of station.
  322. *
  323. * NOTE: This does not remove station from device's station table.
  324. */
  325. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  326. {
  327. int index = IWL_INVALID_STATION;
  328. int i;
  329. unsigned long flags;
  330. spin_lock_irqsave(&priv->sta_lock, flags);
  331. if (is_ap)
  332. index = IWL_AP_ID;
  333. else if (is_broadcast_ether_addr(addr))
  334. index = priv->hw_setting.bcast_sta_id;
  335. else
  336. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  337. if (priv->stations[i].used &&
  338. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  339. addr)) {
  340. index = i;
  341. break;
  342. }
  343. if (unlikely(index == IWL_INVALID_STATION))
  344. goto out;
  345. if (priv->stations[index].used) {
  346. priv->stations[index].used = 0;
  347. priv->num_stations--;
  348. }
  349. BUG_ON(priv->num_stations < 0);
  350. out:
  351. spin_unlock_irqrestore(&priv->sta_lock, flags);
  352. return 0;
  353. }
  354. #endif
  355. /**
  356. * iwl4965_add_station_flags - Add station to tables in driver and device
  357. */
  358. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  359. int is_ap, u8 flags, void *ht_data)
  360. {
  361. int i;
  362. int index = IWL_INVALID_STATION;
  363. struct iwl4965_station_entry *station;
  364. unsigned long flags_spin;
  365. DECLARE_MAC_BUF(mac);
  366. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  367. if (is_ap)
  368. index = IWL_AP_ID;
  369. else if (is_broadcast_ether_addr(addr))
  370. index = priv->hw_setting.bcast_sta_id;
  371. else
  372. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  373. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  374. addr)) {
  375. index = i;
  376. break;
  377. }
  378. if (!priv->stations[i].used &&
  379. index == IWL_INVALID_STATION)
  380. index = i;
  381. }
  382. /* These two conditions have the same outcome, but keep them separate
  383. since they have different meanings */
  384. if (unlikely(index == IWL_INVALID_STATION)) {
  385. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  386. return index;
  387. }
  388. if (priv->stations[index].used &&
  389. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  390. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  391. return index;
  392. }
  393. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  394. station = &priv->stations[index];
  395. station->used = 1;
  396. priv->num_stations++;
  397. /* Set up the REPLY_ADD_STA command to send to device */
  398. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  399. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  400. station->sta.mode = 0;
  401. station->sta.sta.sta_id = index;
  402. station->sta.station_flags = 0;
  403. #ifdef CONFIG_IWL4965_HT
  404. /* BCAST station and IBSS stations do not work in HT mode */
  405. if (index != priv->hw_setting.bcast_sta_id &&
  406. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  407. iwl4965_set_ht_add_station(priv, index,
  408. (struct ieee80211_ht_info *) ht_data);
  409. #endif /*CONFIG_IWL4965_HT*/
  410. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  411. /* Add station to device's station table */
  412. iwl4965_send_add_station(priv, &station->sta, flags);
  413. return index;
  414. }
  415. /*************** DRIVER STATUS FUNCTIONS *****/
  416. static inline int iwl4965_is_ready(struct iwl_priv *priv)
  417. {
  418. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  419. * set but EXIT_PENDING is not */
  420. return test_bit(STATUS_READY, &priv->status) &&
  421. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  422. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  423. }
  424. static inline int iwl4965_is_alive(struct iwl_priv *priv)
  425. {
  426. return test_bit(STATUS_ALIVE, &priv->status);
  427. }
  428. static inline int iwl4965_is_init(struct iwl_priv *priv)
  429. {
  430. return test_bit(STATUS_INIT, &priv->status);
  431. }
  432. static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
  433. {
  434. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  435. test_bit(STATUS_RF_KILL_SW, &priv->status);
  436. }
  437. static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
  438. {
  439. if (iwl4965_is_rfkill(priv))
  440. return 0;
  441. return iwl4965_is_ready(priv);
  442. }
  443. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  444. /**
  445. * iwl4965_enqueue_hcmd - enqueue a uCode command
  446. * @priv: device private data point
  447. * @cmd: a point to the ucode command structure
  448. *
  449. * The function returns < 0 values to indicate the operation is
  450. * failed. On success, it turns the index (> 0) of command in the
  451. * command queue.
  452. */
  453. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  454. {
  455. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  456. struct iwl4965_queue *q = &txq->q;
  457. struct iwl4965_tfd_frame *tfd;
  458. u32 *control_flags;
  459. struct iwl_cmd *out_cmd;
  460. u32 idx;
  461. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  462. dma_addr_t phys_addr;
  463. int ret;
  464. unsigned long flags;
  465. /* If any of the command structures end up being larger than
  466. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  467. * we will need to increase the size of the TFD entries */
  468. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  469. !(cmd->meta.flags & CMD_SIZE_HUGE));
  470. if (iwl4965_is_rfkill(priv)) {
  471. IWL_DEBUG_INFO("Not sending command - RF KILL");
  472. return -EIO;
  473. }
  474. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  475. IWL_ERROR("No space for Tx\n");
  476. return -ENOSPC;
  477. }
  478. spin_lock_irqsave(&priv->hcmd_lock, flags);
  479. tfd = &txq->bd[q->write_ptr];
  480. memset(tfd, 0, sizeof(*tfd));
  481. control_flags = (u32 *) tfd;
  482. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  483. out_cmd = &txq->cmd[idx];
  484. out_cmd->hdr.cmd = cmd->id;
  485. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  486. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  487. /* At this point, the out_cmd now has all of the incoming cmd
  488. * information */
  489. out_cmd->hdr.flags = 0;
  490. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  491. INDEX_TO_SEQ(q->write_ptr));
  492. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  493. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  494. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  495. offsetof(struct iwl_cmd, hdr);
  496. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  497. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  498. "%d bytes at %d[%d]:%d\n",
  499. get_cmd_string(out_cmd->hdr.cmd),
  500. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  501. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  502. txq->need_update = 1;
  503. /* Set up entry in queue's byte count circular buffer */
  504. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  505. /* Increment and update queue's write index */
  506. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  507. iwl4965_tx_queue_update_write_ptr(priv, txq);
  508. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  509. return ret ? ret : idx;
  510. }
  511. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  512. {
  513. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  514. if (hw_decrypt)
  515. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  516. else
  517. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  518. }
  519. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  520. {
  521. u32 flags = 0;
  522. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  523. sizeof(flags), &flags);
  524. }
  525. /**
  526. * iwl4965_rxon_add_station - add station into station table.
  527. *
  528. * there is only one AP station with id= IWL_AP_ID
  529. * NOTE: mutex must be held before calling this fnction
  530. */
  531. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  532. const u8 *addr, int is_ap)
  533. {
  534. u8 sta_id;
  535. /* Add station to device's station table */
  536. #ifdef CONFIG_IWL4965_HT
  537. struct ieee80211_conf *conf = &priv->hw->conf;
  538. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  539. if ((is_ap) &&
  540. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  541. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  542. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  543. 0, cur_ht_config);
  544. else
  545. #endif /* CONFIG_IWL4965_HT */
  546. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  547. 0, NULL);
  548. /* Set up default rate scaling table in device's station table */
  549. iwl4965_add_station(priv, addr, is_ap);
  550. return sta_id;
  551. }
  552. /**
  553. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  554. *
  555. * NOTE: This is really only useful during development and can eventually
  556. * be #ifdef'd out once the driver is stable and folks aren't actively
  557. * making changes
  558. */
  559. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  560. {
  561. int error = 0;
  562. int counter = 1;
  563. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  564. error |= le32_to_cpu(rxon->flags &
  565. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  566. RXON_FLG_RADAR_DETECT_MSK));
  567. if (error)
  568. IWL_WARNING("check 24G fields %d | %d\n",
  569. counter++, error);
  570. } else {
  571. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  572. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  573. if (error)
  574. IWL_WARNING("check 52 fields %d | %d\n",
  575. counter++, error);
  576. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  577. if (error)
  578. IWL_WARNING("check 52 CCK %d | %d\n",
  579. counter++, error);
  580. }
  581. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  582. if (error)
  583. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  584. /* make sure basic rates 6Mbps and 1Mbps are supported */
  585. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  586. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  587. if (error)
  588. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  589. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  590. if (error)
  591. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  592. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  593. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  594. if (error)
  595. IWL_WARNING("check CCK and short slot %d | %d\n",
  596. counter++, error);
  597. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  598. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  599. if (error)
  600. IWL_WARNING("check CCK & auto detect %d | %d\n",
  601. counter++, error);
  602. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  603. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  604. if (error)
  605. IWL_WARNING("check TGG and auto detect %d | %d\n",
  606. counter++, error);
  607. if (error)
  608. IWL_WARNING("Tuning to channel %d\n",
  609. le16_to_cpu(rxon->channel));
  610. if (error) {
  611. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  612. return -1;
  613. }
  614. return 0;
  615. }
  616. /**
  617. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  618. * @priv: staging_rxon is compared to active_rxon
  619. *
  620. * If the RXON structure is changing enough to require a new tune,
  621. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  622. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  623. */
  624. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  625. {
  626. /* These items are only settable from the full RXON command */
  627. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  628. compare_ether_addr(priv->staging_rxon.bssid_addr,
  629. priv->active_rxon.bssid_addr) ||
  630. compare_ether_addr(priv->staging_rxon.node_addr,
  631. priv->active_rxon.node_addr) ||
  632. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  633. priv->active_rxon.wlap_bssid_addr) ||
  634. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  635. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  636. (priv->staging_rxon.air_propagation !=
  637. priv->active_rxon.air_propagation) ||
  638. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  639. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  640. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  641. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  642. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  643. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  644. return 1;
  645. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  646. * be updated with the RXON_ASSOC command -- however only some
  647. * flag transitions are allowed using RXON_ASSOC */
  648. /* Check if we are not switching bands */
  649. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  650. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  651. return 1;
  652. /* Check if we are switching association toggle */
  653. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  654. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  655. return 1;
  656. return 0;
  657. }
  658. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  659. {
  660. int rc = 0;
  661. struct iwl4965_rx_packet *res = NULL;
  662. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  663. struct iwl_host_cmd cmd = {
  664. .id = REPLY_RXON_ASSOC,
  665. .len = sizeof(rxon_assoc),
  666. .meta.flags = CMD_WANT_SKB,
  667. .data = &rxon_assoc,
  668. };
  669. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  670. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  671. if ((rxon1->flags == rxon2->flags) &&
  672. (rxon1->filter_flags == rxon2->filter_flags) &&
  673. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  674. (rxon1->ofdm_ht_single_stream_basic_rates ==
  675. rxon2->ofdm_ht_single_stream_basic_rates) &&
  676. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  677. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  678. (rxon1->rx_chain == rxon2->rx_chain) &&
  679. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  680. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  681. return 0;
  682. }
  683. rxon_assoc.flags = priv->staging_rxon.flags;
  684. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  685. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  686. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  687. rxon_assoc.reserved = 0;
  688. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  689. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  690. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  691. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  692. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  693. rc = iwl_send_cmd_sync(priv, &cmd);
  694. if (rc)
  695. return rc;
  696. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  697. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  698. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  699. rc = -EIO;
  700. }
  701. priv->alloc_rxb_skb--;
  702. dev_kfree_skb_any(cmd.meta.u.skb);
  703. return rc;
  704. }
  705. /**
  706. * iwl4965_commit_rxon - commit staging_rxon to hardware
  707. *
  708. * The RXON command in staging_rxon is committed to the hardware and
  709. * the active_rxon structure is updated with the new data. This
  710. * function correctly transitions out of the RXON_ASSOC_MSK state if
  711. * a HW tune is required based on the RXON structure changes.
  712. */
  713. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  714. {
  715. /* cast away the const for active_rxon in this function */
  716. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  717. DECLARE_MAC_BUF(mac);
  718. int rc = 0;
  719. if (!iwl4965_is_alive(priv))
  720. return -1;
  721. /* always get timestamp with Rx frame */
  722. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  723. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  724. if (rc) {
  725. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  726. return -EINVAL;
  727. }
  728. /* If we don't need to send a full RXON, we can use
  729. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  730. * and other flags for the current radio configuration. */
  731. if (!iwl4965_full_rxon_required(priv)) {
  732. rc = iwl4965_send_rxon_assoc(priv);
  733. if (rc) {
  734. IWL_ERROR("Error setting RXON_ASSOC "
  735. "configuration (%d).\n", rc);
  736. return rc;
  737. }
  738. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  739. return 0;
  740. }
  741. /* station table will be cleared */
  742. priv->assoc_station_added = 0;
  743. #ifdef CONFIG_IWL4965_SENSITIVITY
  744. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  745. if (!priv->error_recovering)
  746. priv->start_calib = 0;
  747. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  748. #endif /* CONFIG_IWL4965_SENSITIVITY */
  749. /* If we are currently associated and the new config requires
  750. * an RXON_ASSOC and the new config wants the associated mask enabled,
  751. * we must clear the associated from the active configuration
  752. * before we apply the new config */
  753. if (iwl4965_is_associated(priv) &&
  754. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  755. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  756. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  757. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  758. sizeof(struct iwl4965_rxon_cmd),
  759. &priv->active_rxon);
  760. /* If the mask clearing failed then we set
  761. * active_rxon back to what it was previously */
  762. if (rc) {
  763. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  764. IWL_ERROR("Error clearing ASSOC_MSK on current "
  765. "configuration (%d).\n", rc);
  766. return rc;
  767. }
  768. }
  769. IWL_DEBUG_INFO("Sending RXON\n"
  770. "* with%s RXON_FILTER_ASSOC_MSK\n"
  771. "* channel = %d\n"
  772. "* bssid = %s\n",
  773. ((priv->staging_rxon.filter_flags &
  774. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  775. le16_to_cpu(priv->staging_rxon.channel),
  776. print_mac(mac, priv->staging_rxon.bssid_addr));
  777. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  778. /* Apply the new configuration */
  779. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  780. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  781. if (rc) {
  782. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  783. return rc;
  784. }
  785. iwlcore_clear_stations_table(priv);
  786. #ifdef CONFIG_IWL4965_SENSITIVITY
  787. if (!priv->error_recovering)
  788. priv->start_calib = 0;
  789. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  790. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  791. #endif /* CONFIG_IWL4965_SENSITIVITY */
  792. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  793. /* If we issue a new RXON command which required a tune then we must
  794. * send a new TXPOWER command or we won't be able to Tx any frames */
  795. rc = iwl4965_hw_reg_send_txpower(priv);
  796. if (rc) {
  797. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  798. return rc;
  799. }
  800. /* Add the broadcast address so we can send broadcast frames */
  801. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  802. IWL_INVALID_STATION) {
  803. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  804. return -EIO;
  805. }
  806. /* If we have set the ASSOC_MSK and we are in BSS mode then
  807. * add the IWL_AP_ID to the station rate table */
  808. if (iwl4965_is_associated(priv) &&
  809. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  810. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  811. == IWL_INVALID_STATION) {
  812. IWL_ERROR("Error adding AP address for transmit.\n");
  813. return -EIO;
  814. }
  815. priv->assoc_station_added = 1;
  816. }
  817. return 0;
  818. }
  819. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  820. {
  821. struct iwl4965_bt_cmd bt_cmd = {
  822. .flags = 3,
  823. .lead_time = 0xAA,
  824. .max_kill = 1,
  825. .kill_ack_mask = 0,
  826. .kill_cts_mask = 0,
  827. };
  828. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  829. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  830. }
  831. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  832. {
  833. int rc = 0;
  834. struct iwl4965_rx_packet *res;
  835. struct iwl_host_cmd cmd = {
  836. .id = REPLY_SCAN_ABORT_CMD,
  837. .meta.flags = CMD_WANT_SKB,
  838. };
  839. /* If there isn't a scan actively going on in the hardware
  840. * then we are in between scan bands and not actually
  841. * actively scanning, so don't send the abort command */
  842. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  843. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  844. return 0;
  845. }
  846. rc = iwl_send_cmd_sync(priv, &cmd);
  847. if (rc) {
  848. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  849. return rc;
  850. }
  851. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  852. if (res->u.status != CAN_ABORT_STATUS) {
  853. /* The scan abort will return 1 for success or
  854. * 2 for "failure". A failure condition can be
  855. * due to simply not being in an active scan which
  856. * can occur if we send the scan abort before we
  857. * the microcode has notified us that a scan is
  858. * completed. */
  859. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  860. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  861. clear_bit(STATUS_SCAN_HW, &priv->status);
  862. }
  863. dev_kfree_skb_any(cmd.meta.u.skb);
  864. return rc;
  865. }
  866. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  867. struct iwl_cmd *cmd,
  868. struct sk_buff *skb)
  869. {
  870. return 1;
  871. }
  872. /*
  873. * CARD_STATE_CMD
  874. *
  875. * Use: Sets the device's internal card state to enable, disable, or halt
  876. *
  877. * When in the 'enable' state the card operates as normal.
  878. * When in the 'disable' state, the card enters into a low power mode.
  879. * When in the 'halt' state, the card is shut down and must be fully
  880. * restarted to come back on.
  881. */
  882. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  883. {
  884. struct iwl_host_cmd cmd = {
  885. .id = REPLY_CARD_STATE_CMD,
  886. .len = sizeof(u32),
  887. .data = &flags,
  888. .meta.flags = meta_flag,
  889. };
  890. if (meta_flag & CMD_ASYNC)
  891. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  892. return iwl_send_cmd(priv, &cmd);
  893. }
  894. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  895. struct iwl_cmd *cmd, struct sk_buff *skb)
  896. {
  897. struct iwl4965_rx_packet *res = NULL;
  898. if (!skb) {
  899. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  900. return 1;
  901. }
  902. res = (struct iwl4965_rx_packet *)skb->data;
  903. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  904. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  905. res->hdr.flags);
  906. return 1;
  907. }
  908. switch (res->u.add_sta.status) {
  909. case ADD_STA_SUCCESS_MSK:
  910. break;
  911. default:
  912. break;
  913. }
  914. /* We didn't cache the SKB; let the caller free it */
  915. return 1;
  916. }
  917. int iwl4965_send_add_station(struct iwl_priv *priv,
  918. struct iwl4965_addsta_cmd *sta, u8 flags)
  919. {
  920. struct iwl4965_rx_packet *res = NULL;
  921. int rc = 0;
  922. struct iwl_host_cmd cmd = {
  923. .id = REPLY_ADD_STA,
  924. .len = sizeof(struct iwl4965_addsta_cmd),
  925. .meta.flags = flags,
  926. .data = sta,
  927. };
  928. if (flags & CMD_ASYNC)
  929. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  930. else
  931. cmd.meta.flags |= CMD_WANT_SKB;
  932. rc = iwl_send_cmd(priv, &cmd);
  933. if (rc || (flags & CMD_ASYNC))
  934. return rc;
  935. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  936. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  937. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  938. res->hdr.flags);
  939. rc = -EIO;
  940. }
  941. if (rc == 0) {
  942. switch (res->u.add_sta.status) {
  943. case ADD_STA_SUCCESS_MSK:
  944. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  945. break;
  946. default:
  947. rc = -EIO;
  948. IWL_WARNING("REPLY_ADD_STA failed\n");
  949. break;
  950. }
  951. }
  952. priv->alloc_rxb_skb--;
  953. dev_kfree_skb_any(cmd.meta.u.skb);
  954. return rc;
  955. }
  956. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  957. struct ieee80211_key_conf *keyconf,
  958. u8 sta_id)
  959. {
  960. unsigned long flags;
  961. __le16 key_flags = 0;
  962. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  963. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  964. if (sta_id == priv->hw_setting.bcast_sta_id)
  965. key_flags |= STA_KEY_MULTICAST_MSK;
  966. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  967. keyconf->hw_key_idx = keyconf->keyidx;
  968. key_flags &= ~STA_KEY_FLG_INVALID;
  969. spin_lock_irqsave(&priv->sta_lock, flags);
  970. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  971. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  972. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  973. keyconf->keylen);
  974. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  975. keyconf->keylen);
  976. priv->stations[sta_id].sta.key.key_offset
  977. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  978. priv->stations[sta_id].sta.key.key_flags = key_flags;
  979. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  980. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  981. spin_unlock_irqrestore(&priv->sta_lock, flags);
  982. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  983. return iwl4965_send_add_station(priv,
  984. &priv->stations[sta_id].sta, CMD_ASYNC);
  985. }
  986. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  987. struct ieee80211_key_conf *keyconf,
  988. u8 sta_id)
  989. {
  990. unsigned long flags;
  991. int ret = 0;
  992. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  993. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  994. keyconf->hw_key_idx = keyconf->keyidx;
  995. spin_lock_irqsave(&priv->sta_lock, flags);
  996. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  997. priv->stations[sta_id].keyinfo.conf = keyconf;
  998. priv->stations[sta_id].keyinfo.keylen = 16;
  999. /* This copy is acutally not needed: we get the key with each TX */
  1000. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  1001. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  1002. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1003. return ret;
  1004. }
  1005. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1006. {
  1007. unsigned long flags;
  1008. spin_lock_irqsave(&priv->sta_lock, flags);
  1009. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1010. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1011. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1012. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1013. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1014. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1015. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1016. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1017. return 0;
  1018. }
  1019. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  1020. struct ieee80211_key_conf *key, u8 sta_id)
  1021. {
  1022. int ret;
  1023. switch (key->alg) {
  1024. case ALG_CCMP:
  1025. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1026. break;
  1027. case ALG_TKIP:
  1028. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1029. break;
  1030. case ALG_WEP:
  1031. ret = -EOPNOTSUPP;
  1032. break;
  1033. default:
  1034. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1035. ret = -EINVAL;
  1036. }
  1037. return ret;
  1038. }
  1039. static int iwl4965_remove_static_key(struct iwl_priv *priv)
  1040. {
  1041. int ret = -EOPNOTSUPP;
  1042. return ret;
  1043. }
  1044. static int iwl4965_set_static_key(struct iwl_priv *priv,
  1045. struct ieee80211_key_conf *key)
  1046. {
  1047. if (key->alg == ALG_WEP)
  1048. return -EOPNOTSUPP;
  1049. IWL_ERROR("Static key invalid: alg %d\n", key->alg);
  1050. return -EINVAL;
  1051. }
  1052. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1053. {
  1054. struct list_head *element;
  1055. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1056. priv->frames_count);
  1057. while (!list_empty(&priv->free_frames)) {
  1058. element = priv->free_frames.next;
  1059. list_del(element);
  1060. kfree(list_entry(element, struct iwl4965_frame, list));
  1061. priv->frames_count--;
  1062. }
  1063. if (priv->frames_count) {
  1064. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1065. priv->frames_count);
  1066. priv->frames_count = 0;
  1067. }
  1068. }
  1069. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1070. {
  1071. struct iwl4965_frame *frame;
  1072. struct list_head *element;
  1073. if (list_empty(&priv->free_frames)) {
  1074. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1075. if (!frame) {
  1076. IWL_ERROR("Could not allocate frame!\n");
  1077. return NULL;
  1078. }
  1079. priv->frames_count++;
  1080. return frame;
  1081. }
  1082. element = priv->free_frames.next;
  1083. list_del(element);
  1084. return list_entry(element, struct iwl4965_frame, list);
  1085. }
  1086. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1087. {
  1088. memset(frame, 0, sizeof(*frame));
  1089. list_add(&frame->list, &priv->free_frames);
  1090. }
  1091. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1092. struct ieee80211_hdr *hdr,
  1093. const u8 *dest, int left)
  1094. {
  1095. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1096. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1097. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1098. return 0;
  1099. if (priv->ibss_beacon->len > left)
  1100. return 0;
  1101. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1102. return priv->ibss_beacon->len;
  1103. }
  1104. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1105. {
  1106. u8 i;
  1107. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1108. i = iwl4965_rates[i].next_ieee) {
  1109. if (rate_mask & (1 << i))
  1110. return iwl4965_rates[i].plcp;
  1111. }
  1112. return IWL_RATE_INVALID;
  1113. }
  1114. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1115. {
  1116. struct iwl4965_frame *frame;
  1117. unsigned int frame_size;
  1118. int rc;
  1119. u8 rate;
  1120. frame = iwl4965_get_free_frame(priv);
  1121. if (!frame) {
  1122. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1123. "command.\n");
  1124. return -ENOMEM;
  1125. }
  1126. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1127. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1128. 0xFF0);
  1129. if (rate == IWL_INVALID_RATE)
  1130. rate = IWL_RATE_6M_PLCP;
  1131. } else {
  1132. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1133. if (rate == IWL_INVALID_RATE)
  1134. rate = IWL_RATE_1M_PLCP;
  1135. }
  1136. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1137. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1138. &frame->u.cmd[0]);
  1139. iwl4965_free_frame(priv, frame);
  1140. return rc;
  1141. }
  1142. /******************************************************************************
  1143. *
  1144. * Misc. internal state and helper functions
  1145. *
  1146. ******************************************************************************/
  1147. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1148. {
  1149. if (priv->hw_setting.shared_virt)
  1150. pci_free_consistent(priv->pci_dev,
  1151. sizeof(struct iwl4965_shared),
  1152. priv->hw_setting.shared_virt,
  1153. priv->hw_setting.shared_phys);
  1154. }
  1155. /**
  1156. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1157. *
  1158. * return : set the bit for each supported rate insert in ie
  1159. */
  1160. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1161. u16 basic_rate, int *left)
  1162. {
  1163. u16 ret_rates = 0, bit;
  1164. int i;
  1165. u8 *cnt = ie;
  1166. u8 *rates = ie + 1;
  1167. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1168. if (bit & supported_rate) {
  1169. ret_rates |= bit;
  1170. rates[*cnt] = iwl4965_rates[i].ieee |
  1171. ((bit & basic_rate) ? 0x80 : 0x00);
  1172. (*cnt)++;
  1173. (*left)--;
  1174. if ((*left <= 0) ||
  1175. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1176. break;
  1177. }
  1178. }
  1179. return ret_rates;
  1180. }
  1181. /**
  1182. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1183. */
  1184. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1185. enum ieee80211_band band,
  1186. struct ieee80211_mgmt *frame,
  1187. int left, int is_direct)
  1188. {
  1189. int len = 0;
  1190. u8 *pos = NULL;
  1191. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1192. #ifdef CONFIG_IWL4965_HT
  1193. const struct ieee80211_supported_band *sband =
  1194. iwl4965_get_hw_mode(priv, band);
  1195. #endif /* CONFIG_IWL4965_HT */
  1196. /* Make sure there is enough space for the probe request,
  1197. * two mandatory IEs and the data */
  1198. left -= 24;
  1199. if (left < 0)
  1200. return 0;
  1201. len += 24;
  1202. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1203. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1204. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1205. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1206. frame->seq_ctrl = 0;
  1207. /* fill in our indirect SSID IE */
  1208. /* ...next IE... */
  1209. left -= 2;
  1210. if (left < 0)
  1211. return 0;
  1212. len += 2;
  1213. pos = &(frame->u.probe_req.variable[0]);
  1214. *pos++ = WLAN_EID_SSID;
  1215. *pos++ = 0;
  1216. /* fill in our direct SSID IE... */
  1217. if (is_direct) {
  1218. /* ...next IE... */
  1219. left -= 2 + priv->essid_len;
  1220. if (left < 0)
  1221. return 0;
  1222. /* ... fill it in... */
  1223. *pos++ = WLAN_EID_SSID;
  1224. *pos++ = priv->essid_len;
  1225. memcpy(pos, priv->essid, priv->essid_len);
  1226. pos += priv->essid_len;
  1227. len += 2 + priv->essid_len;
  1228. }
  1229. /* fill in supported rate */
  1230. /* ...next IE... */
  1231. left -= 2;
  1232. if (left < 0)
  1233. return 0;
  1234. /* ... fill it in... */
  1235. *pos++ = WLAN_EID_SUPP_RATES;
  1236. *pos = 0;
  1237. /* exclude 60M rate */
  1238. active_rates = priv->rates_mask;
  1239. active_rates &= ~IWL_RATE_60M_MASK;
  1240. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1241. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1242. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1243. active_rate_basic, &left);
  1244. active_rates &= ~ret_rates;
  1245. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1246. active_rate_basic, &left);
  1247. active_rates &= ~ret_rates;
  1248. len += 2 + *pos;
  1249. pos += (*pos) + 1;
  1250. if (active_rates == 0)
  1251. goto fill_end;
  1252. /* fill in supported extended rate */
  1253. /* ...next IE... */
  1254. left -= 2;
  1255. if (left < 0)
  1256. return 0;
  1257. /* ... fill it in... */
  1258. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1259. *pos = 0;
  1260. iwl4965_supported_rate_to_ie(pos, active_rates,
  1261. active_rate_basic, &left);
  1262. if (*pos > 0)
  1263. len += 2 + *pos;
  1264. #ifdef CONFIG_IWL4965_HT
  1265. if (sband && sband->ht_info.ht_supported) {
  1266. struct ieee80211_ht_cap *ht_cap;
  1267. pos += (*pos) + 1;
  1268. *pos++ = WLAN_EID_HT_CAPABILITY;
  1269. *pos++ = sizeof(struct ieee80211_ht_cap);
  1270. ht_cap = (struct ieee80211_ht_cap *)pos;
  1271. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1272. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1273. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1274. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1275. ((sband->ht_info.ampdu_density << 2) &
  1276. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1277. len += 2 + sizeof(struct ieee80211_ht_cap);
  1278. }
  1279. #endif /*CONFIG_IWL4965_HT */
  1280. fill_end:
  1281. return (u16)len;
  1282. }
  1283. /*
  1284. * QoS support
  1285. */
  1286. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1287. struct iwl4965_qosparam_cmd *qos)
  1288. {
  1289. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1290. sizeof(struct iwl4965_qosparam_cmd), qos);
  1291. }
  1292. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1293. {
  1294. unsigned long flags;
  1295. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1296. return;
  1297. if (!priv->qos_data.qos_enable)
  1298. return;
  1299. spin_lock_irqsave(&priv->lock, flags);
  1300. priv->qos_data.def_qos_parm.qos_flags = 0;
  1301. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1302. !priv->qos_data.qos_cap.q_AP.txop_request)
  1303. priv->qos_data.def_qos_parm.qos_flags |=
  1304. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1305. if (priv->qos_data.qos_active)
  1306. priv->qos_data.def_qos_parm.qos_flags |=
  1307. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1308. #ifdef CONFIG_IWL4965_HT
  1309. if (priv->current_ht_config.is_ht)
  1310. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1311. #endif /* CONFIG_IWL4965_HT */
  1312. spin_unlock_irqrestore(&priv->lock, flags);
  1313. if (force || iwl4965_is_associated(priv)) {
  1314. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1315. priv->qos_data.qos_active,
  1316. priv->qos_data.def_qos_parm.qos_flags);
  1317. iwl4965_send_qos_params_command(priv,
  1318. &(priv->qos_data.def_qos_parm));
  1319. }
  1320. }
  1321. /*
  1322. * Power management (not Tx power!) functions
  1323. */
  1324. #define MSEC_TO_USEC 1024
  1325. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1326. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1327. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1328. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1329. __constant_cpu_to_le32(X1), \
  1330. __constant_cpu_to_le32(X2), \
  1331. __constant_cpu_to_le32(X3), \
  1332. __constant_cpu_to_le32(X4)}
  1333. /* default power management (not Tx power) table values */
  1334. /* for tim 0-10 */
  1335. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1336. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1337. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1338. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1339. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1340. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1341. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1342. };
  1343. /* for tim > 10 */
  1344. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1345. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1346. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1347. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1348. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1349. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1350. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1351. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1352. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1353. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1354. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1355. };
  1356. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1357. {
  1358. int rc = 0, i;
  1359. struct iwl4965_power_mgr *pow_data;
  1360. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1361. u16 pci_pm;
  1362. IWL_DEBUG_POWER("Initialize power \n");
  1363. pow_data = &(priv->power_data);
  1364. memset(pow_data, 0, sizeof(*pow_data));
  1365. pow_data->active_index = IWL_POWER_RANGE_0;
  1366. pow_data->dtim_val = 0xffff;
  1367. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1368. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1369. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1370. if (rc != 0)
  1371. return 0;
  1372. else {
  1373. struct iwl4965_powertable_cmd *cmd;
  1374. IWL_DEBUG_POWER("adjust power command flags\n");
  1375. for (i = 0; i < IWL_POWER_AC; i++) {
  1376. cmd = &pow_data->pwr_range_0[i].cmd;
  1377. if (pci_pm & 0x1)
  1378. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1379. else
  1380. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1381. }
  1382. }
  1383. return rc;
  1384. }
  1385. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1386. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1387. {
  1388. int rc = 0, i;
  1389. u8 skip;
  1390. u32 max_sleep = 0;
  1391. struct iwl4965_power_vec_entry *range;
  1392. u8 period = 0;
  1393. struct iwl4965_power_mgr *pow_data;
  1394. if (mode > IWL_POWER_INDEX_5) {
  1395. IWL_DEBUG_POWER("Error invalid power mode \n");
  1396. return -1;
  1397. }
  1398. pow_data = &(priv->power_data);
  1399. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1400. range = &pow_data->pwr_range_0[0];
  1401. else
  1402. range = &pow_data->pwr_range_1[1];
  1403. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1404. #ifdef IWL_MAC80211_DISABLE
  1405. if (priv->assoc_network != NULL) {
  1406. unsigned long flags;
  1407. period = priv->assoc_network->tim.tim_period;
  1408. }
  1409. #endif /*IWL_MAC80211_DISABLE */
  1410. skip = range[mode].no_dtim;
  1411. if (period == 0) {
  1412. period = 1;
  1413. skip = 0;
  1414. }
  1415. if (skip == 0) {
  1416. max_sleep = period;
  1417. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1418. } else {
  1419. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1420. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1421. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1422. }
  1423. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1424. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1425. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1426. }
  1427. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1428. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1429. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1430. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1431. le32_to_cpu(cmd->sleep_interval[0]),
  1432. le32_to_cpu(cmd->sleep_interval[1]),
  1433. le32_to_cpu(cmd->sleep_interval[2]),
  1434. le32_to_cpu(cmd->sleep_interval[3]),
  1435. le32_to_cpu(cmd->sleep_interval[4]));
  1436. return rc;
  1437. }
  1438. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1439. {
  1440. u32 uninitialized_var(final_mode);
  1441. int rc;
  1442. struct iwl4965_powertable_cmd cmd;
  1443. /* If on battery, set to 3,
  1444. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1445. * else user level */
  1446. switch (mode) {
  1447. case IWL_POWER_BATTERY:
  1448. final_mode = IWL_POWER_INDEX_3;
  1449. break;
  1450. case IWL_POWER_AC:
  1451. final_mode = IWL_POWER_MODE_CAM;
  1452. break;
  1453. default:
  1454. final_mode = mode;
  1455. break;
  1456. }
  1457. cmd.keep_alive_beacons = 0;
  1458. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1459. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1460. if (final_mode == IWL_POWER_MODE_CAM)
  1461. clear_bit(STATUS_POWER_PMI, &priv->status);
  1462. else
  1463. set_bit(STATUS_POWER_PMI, &priv->status);
  1464. return rc;
  1465. }
  1466. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1467. {
  1468. /* Filter incoming packets to determine if they are targeted toward
  1469. * this network, discarding packets coming from ourselves */
  1470. switch (priv->iw_mode) {
  1471. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1472. /* packets from our adapter are dropped (echo) */
  1473. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1474. return 0;
  1475. /* {broad,multi}cast packets to our IBSS go through */
  1476. if (is_multicast_ether_addr(header->addr1))
  1477. return !compare_ether_addr(header->addr3, priv->bssid);
  1478. /* packets to our adapter go through */
  1479. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1480. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1481. /* packets from our adapter are dropped (echo) */
  1482. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1483. return 0;
  1484. /* {broad,multi}cast packets to our BSS go through */
  1485. if (is_multicast_ether_addr(header->addr1))
  1486. return !compare_ether_addr(header->addr2, priv->bssid);
  1487. /* packets to our adapter go through */
  1488. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1489. default:
  1490. break;
  1491. }
  1492. return 1;
  1493. }
  1494. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1495. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1496. {
  1497. switch (status & TX_STATUS_MSK) {
  1498. case TX_STATUS_SUCCESS:
  1499. return "SUCCESS";
  1500. TX_STATUS_ENTRY(SHORT_LIMIT);
  1501. TX_STATUS_ENTRY(LONG_LIMIT);
  1502. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1503. TX_STATUS_ENTRY(MGMNT_ABORT);
  1504. TX_STATUS_ENTRY(NEXT_FRAG);
  1505. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1506. TX_STATUS_ENTRY(DEST_PS);
  1507. TX_STATUS_ENTRY(ABORTED);
  1508. TX_STATUS_ENTRY(BT_RETRY);
  1509. TX_STATUS_ENTRY(STA_INVALID);
  1510. TX_STATUS_ENTRY(FRAG_DROPPED);
  1511. TX_STATUS_ENTRY(TID_DISABLE);
  1512. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1513. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1514. TX_STATUS_ENTRY(TX_LOCKED);
  1515. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1516. }
  1517. return "UNKNOWN";
  1518. }
  1519. /**
  1520. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1521. *
  1522. * NOTE: priv->mutex is not required before calling this function
  1523. */
  1524. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1525. {
  1526. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1527. clear_bit(STATUS_SCANNING, &priv->status);
  1528. return 0;
  1529. }
  1530. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1531. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1532. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1533. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1534. queue_work(priv->workqueue, &priv->abort_scan);
  1535. } else
  1536. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1537. return test_bit(STATUS_SCANNING, &priv->status);
  1538. }
  1539. return 0;
  1540. }
  1541. /**
  1542. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1543. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1544. *
  1545. * NOTE: priv->mutex must be held before calling this function
  1546. */
  1547. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1548. {
  1549. unsigned long now = jiffies;
  1550. int ret;
  1551. ret = iwl4965_scan_cancel(priv);
  1552. if (ret && ms) {
  1553. mutex_unlock(&priv->mutex);
  1554. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1555. test_bit(STATUS_SCANNING, &priv->status))
  1556. msleep(1);
  1557. mutex_lock(&priv->mutex);
  1558. return test_bit(STATUS_SCANNING, &priv->status);
  1559. }
  1560. return ret;
  1561. }
  1562. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1563. {
  1564. /* Reset ieee stats */
  1565. /* We don't reset the net_device_stats (ieee->stats) on
  1566. * re-association */
  1567. priv->last_seq_num = -1;
  1568. priv->last_frag_num = -1;
  1569. priv->last_packet_time = 0;
  1570. iwl4965_scan_cancel(priv);
  1571. }
  1572. #define MAX_UCODE_BEACON_INTERVAL 4096
  1573. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1574. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1575. {
  1576. u16 new_val = 0;
  1577. u16 beacon_factor = 0;
  1578. beacon_factor =
  1579. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1580. / MAX_UCODE_BEACON_INTERVAL;
  1581. new_val = beacon_val / beacon_factor;
  1582. return cpu_to_le16(new_val);
  1583. }
  1584. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1585. {
  1586. u64 interval_tm_unit;
  1587. u64 tsf, result;
  1588. unsigned long flags;
  1589. struct ieee80211_conf *conf = NULL;
  1590. u16 beacon_int = 0;
  1591. conf = ieee80211_get_hw_conf(priv->hw);
  1592. spin_lock_irqsave(&priv->lock, flags);
  1593. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1594. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1595. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1596. tsf = priv->timestamp1;
  1597. tsf = ((tsf << 32) | priv->timestamp0);
  1598. beacon_int = priv->beacon_int;
  1599. spin_unlock_irqrestore(&priv->lock, flags);
  1600. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1601. if (beacon_int == 0) {
  1602. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1603. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1604. } else {
  1605. priv->rxon_timing.beacon_interval =
  1606. cpu_to_le16(beacon_int);
  1607. priv->rxon_timing.beacon_interval =
  1608. iwl4965_adjust_beacon_interval(
  1609. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1610. }
  1611. priv->rxon_timing.atim_window = 0;
  1612. } else {
  1613. priv->rxon_timing.beacon_interval =
  1614. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1615. /* TODO: we need to get atim_window from upper stack
  1616. * for now we set to 0 */
  1617. priv->rxon_timing.atim_window = 0;
  1618. }
  1619. interval_tm_unit =
  1620. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1621. result = do_div(tsf, interval_tm_unit);
  1622. priv->rxon_timing.beacon_init_val =
  1623. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1624. IWL_DEBUG_ASSOC
  1625. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1626. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1627. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1628. le16_to_cpu(priv->rxon_timing.atim_window));
  1629. }
  1630. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1631. {
  1632. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1633. IWL_ERROR("APs don't scan.\n");
  1634. return 0;
  1635. }
  1636. if (!iwl4965_is_ready_rf(priv)) {
  1637. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1638. return -EIO;
  1639. }
  1640. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1641. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1642. return -EAGAIN;
  1643. }
  1644. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1645. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1646. "Queuing.\n");
  1647. return -EAGAIN;
  1648. }
  1649. IWL_DEBUG_INFO("Starting scan...\n");
  1650. priv->scan_bands = 2;
  1651. set_bit(STATUS_SCANNING, &priv->status);
  1652. priv->scan_start = jiffies;
  1653. priv->scan_pass_start = priv->scan_start;
  1654. queue_work(priv->workqueue, &priv->request_scan);
  1655. return 0;
  1656. }
  1657. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1658. enum ieee80211_band band)
  1659. {
  1660. if (band == IEEE80211_BAND_5GHZ) {
  1661. priv->staging_rxon.flags &=
  1662. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1663. | RXON_FLG_CCK_MSK);
  1664. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1665. } else {
  1666. /* Copied from iwl4965_bg_post_associate() */
  1667. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1668. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1669. else
  1670. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1671. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1672. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1673. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1674. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1675. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1676. }
  1677. }
  1678. /*
  1679. * initialize rxon structure with default values from eeprom
  1680. */
  1681. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1682. {
  1683. const struct iwl_channel_info *ch_info;
  1684. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1685. switch (priv->iw_mode) {
  1686. case IEEE80211_IF_TYPE_AP:
  1687. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1688. break;
  1689. case IEEE80211_IF_TYPE_STA:
  1690. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1691. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1692. break;
  1693. case IEEE80211_IF_TYPE_IBSS:
  1694. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1695. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1696. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1697. RXON_FILTER_ACCEPT_GRP_MSK;
  1698. break;
  1699. case IEEE80211_IF_TYPE_MNTR:
  1700. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1701. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1702. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1703. break;
  1704. default:
  1705. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1706. break;
  1707. }
  1708. #if 0
  1709. /* TODO: Figure out when short_preamble would be set and cache from
  1710. * that */
  1711. if (!hw_to_local(priv->hw)->short_preamble)
  1712. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1713. else
  1714. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1715. #endif
  1716. ch_info = iwl_get_channel_info(priv, priv->band,
  1717. le16_to_cpu(priv->staging_rxon.channel));
  1718. if (!ch_info)
  1719. ch_info = &priv->channel_info[0];
  1720. /*
  1721. * in some case A channels are all non IBSS
  1722. * in this case force B/G channel
  1723. */
  1724. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1725. !(is_channel_ibss(ch_info)))
  1726. ch_info = &priv->channel_info[0];
  1727. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1728. priv->band = ch_info->band;
  1729. iwl4965_set_flags_for_phymode(priv, priv->band);
  1730. priv->staging_rxon.ofdm_basic_rates =
  1731. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1732. priv->staging_rxon.cck_basic_rates =
  1733. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1734. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1735. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1736. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1737. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1738. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1739. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1740. iwl4965_set_rxon_chain(priv);
  1741. }
  1742. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1743. {
  1744. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1745. const struct iwl_channel_info *ch_info;
  1746. ch_info = iwl_get_channel_info(priv,
  1747. priv->band,
  1748. le16_to_cpu(priv->staging_rxon.channel));
  1749. if (!ch_info || !is_channel_ibss(ch_info)) {
  1750. IWL_ERROR("channel %d not IBSS channel\n",
  1751. le16_to_cpu(priv->staging_rxon.channel));
  1752. return -EINVAL;
  1753. }
  1754. }
  1755. priv->iw_mode = mode;
  1756. iwl4965_connection_init_rx_config(priv);
  1757. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1758. iwlcore_clear_stations_table(priv);
  1759. /* dont commit rxon if rf-kill is on*/
  1760. if (!iwl4965_is_ready_rf(priv))
  1761. return -EAGAIN;
  1762. cancel_delayed_work(&priv->scan_check);
  1763. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1764. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1765. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1766. return -EAGAIN;
  1767. }
  1768. iwl4965_commit_rxon(priv);
  1769. return 0;
  1770. }
  1771. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1772. struct ieee80211_tx_control *ctl,
  1773. struct iwl_cmd *cmd,
  1774. struct sk_buff *skb_frag,
  1775. int sta_id)
  1776. {
  1777. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1778. switch (keyinfo->alg) {
  1779. case ALG_CCMP:
  1780. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1781. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1782. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1783. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1784. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1785. break;
  1786. case ALG_TKIP:
  1787. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1788. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1789. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1790. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1791. break;
  1792. case ALG_WEP:
  1793. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  1794. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1795. if (keyinfo->keylen == 13)
  1796. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1797. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  1798. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1799. "with key %d\n", ctl->key_idx);
  1800. break;
  1801. default:
  1802. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1803. break;
  1804. }
  1805. }
  1806. /*
  1807. * handle build REPLY_TX command notification.
  1808. */
  1809. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1810. struct iwl_cmd *cmd,
  1811. struct ieee80211_tx_control *ctrl,
  1812. struct ieee80211_hdr *hdr,
  1813. int is_unicast, u8 std_id)
  1814. {
  1815. __le16 *qc;
  1816. u16 fc = le16_to_cpu(hdr->frame_control);
  1817. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1818. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1819. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1820. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1821. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1822. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1823. if (ieee80211_is_probe_response(fc) &&
  1824. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1825. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1826. } else {
  1827. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1828. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1829. }
  1830. if (ieee80211_is_back_request(fc))
  1831. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1832. cmd->cmd.tx.sta_id = std_id;
  1833. if (ieee80211_get_morefrag(hdr))
  1834. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1835. qc = ieee80211_get_qos_ctrl(hdr);
  1836. if (qc) {
  1837. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1838. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1839. } else
  1840. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1841. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1842. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1843. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1844. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1845. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1846. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1847. }
  1848. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1849. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1850. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1851. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1852. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1853. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1854. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1855. else
  1856. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1857. } else {
  1858. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1859. }
  1860. cmd->cmd.tx.driver_txop = 0;
  1861. cmd->cmd.tx.tx_flags = tx_flags;
  1862. cmd->cmd.tx.next_frame_len = 0;
  1863. }
  1864. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1865. {
  1866. /* 0 - mgmt, 1 - cnt, 2 - data */
  1867. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1868. priv->tx_stats[idx].cnt++;
  1869. priv->tx_stats[idx].bytes += len;
  1870. }
  1871. /**
  1872. * iwl4965_get_sta_id - Find station's index within station table
  1873. *
  1874. * If new IBSS station, create new entry in station table
  1875. */
  1876. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1877. struct ieee80211_hdr *hdr)
  1878. {
  1879. int sta_id;
  1880. u16 fc = le16_to_cpu(hdr->frame_control);
  1881. DECLARE_MAC_BUF(mac);
  1882. /* If this frame is broadcast or management, use broadcast station id */
  1883. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1884. is_multicast_ether_addr(hdr->addr1))
  1885. return priv->hw_setting.bcast_sta_id;
  1886. switch (priv->iw_mode) {
  1887. /* If we are a client station in a BSS network, use the special
  1888. * AP station entry (that's the only station we communicate with) */
  1889. case IEEE80211_IF_TYPE_STA:
  1890. return IWL_AP_ID;
  1891. /* If we are an AP, then find the station, or use BCAST */
  1892. case IEEE80211_IF_TYPE_AP:
  1893. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1894. if (sta_id != IWL_INVALID_STATION)
  1895. return sta_id;
  1896. return priv->hw_setting.bcast_sta_id;
  1897. /* If this frame is going out to an IBSS network, find the station,
  1898. * or create a new station table entry */
  1899. case IEEE80211_IF_TYPE_IBSS:
  1900. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1901. if (sta_id != IWL_INVALID_STATION)
  1902. return sta_id;
  1903. /* Create new station table entry */
  1904. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1905. 0, CMD_ASYNC, NULL);
  1906. if (sta_id != IWL_INVALID_STATION)
  1907. return sta_id;
  1908. IWL_DEBUG_DROP("Station %s not in station map. "
  1909. "Defaulting to broadcast...\n",
  1910. print_mac(mac, hdr->addr1));
  1911. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1912. return priv->hw_setting.bcast_sta_id;
  1913. default:
  1914. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1915. return priv->hw_setting.bcast_sta_id;
  1916. }
  1917. }
  1918. /*
  1919. * start REPLY_TX command process
  1920. */
  1921. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1922. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1923. {
  1924. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1925. struct iwl4965_tfd_frame *tfd;
  1926. u32 *control_flags;
  1927. int txq_id = ctl->queue;
  1928. struct iwl4965_tx_queue *txq = NULL;
  1929. struct iwl4965_queue *q = NULL;
  1930. dma_addr_t phys_addr;
  1931. dma_addr_t txcmd_phys;
  1932. dma_addr_t scratch_phys;
  1933. struct iwl_cmd *out_cmd = NULL;
  1934. u16 len, idx, len_org;
  1935. u8 id, hdr_len, unicast;
  1936. u8 sta_id;
  1937. u16 seq_number = 0;
  1938. u16 fc;
  1939. __le16 *qc;
  1940. u8 wait_write_ptr = 0;
  1941. unsigned long flags;
  1942. int rc;
  1943. spin_lock_irqsave(&priv->lock, flags);
  1944. if (iwl4965_is_rfkill(priv)) {
  1945. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1946. goto drop_unlock;
  1947. }
  1948. if (!priv->vif) {
  1949. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1950. goto drop_unlock;
  1951. }
  1952. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1953. IWL_ERROR("ERROR: No TX rate available.\n");
  1954. goto drop_unlock;
  1955. }
  1956. unicast = !is_multicast_ether_addr(hdr->addr1);
  1957. id = 0;
  1958. fc = le16_to_cpu(hdr->frame_control);
  1959. #ifdef CONFIG_IWLWIFI_DEBUG
  1960. if (ieee80211_is_auth(fc))
  1961. IWL_DEBUG_TX("Sending AUTH frame\n");
  1962. else if (ieee80211_is_assoc_request(fc))
  1963. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1964. else if (ieee80211_is_reassoc_request(fc))
  1965. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1966. #endif
  1967. /* drop all data frame if we are not associated */
  1968. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1969. (!iwl4965_is_associated(priv) ||
  1970. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1971. !priv->assoc_station_added)) {
  1972. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  1973. goto drop_unlock;
  1974. }
  1975. spin_unlock_irqrestore(&priv->lock, flags);
  1976. hdr_len = ieee80211_get_hdrlen(fc);
  1977. /* Find (or create) index into station table for destination station */
  1978. sta_id = iwl4965_get_sta_id(priv, hdr);
  1979. if (sta_id == IWL_INVALID_STATION) {
  1980. DECLARE_MAC_BUF(mac);
  1981. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1982. print_mac(mac, hdr->addr1));
  1983. goto drop;
  1984. }
  1985. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1986. qc = ieee80211_get_qos_ctrl(hdr);
  1987. if (qc) {
  1988. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1989. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1990. IEEE80211_SCTL_SEQ;
  1991. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1992. (hdr->seq_ctrl &
  1993. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1994. seq_number += 0x10;
  1995. #ifdef CONFIG_IWL4965_HT
  1996. /* aggregation is on for this <sta,tid> */
  1997. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1998. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1999. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2000. #endif /* CONFIG_IWL4965_HT */
  2001. }
  2002. /* Descriptor for chosen Tx queue */
  2003. txq = &priv->txq[txq_id];
  2004. q = &txq->q;
  2005. spin_lock_irqsave(&priv->lock, flags);
  2006. /* Set up first empty TFD within this queue's circular TFD buffer */
  2007. tfd = &txq->bd[q->write_ptr];
  2008. memset(tfd, 0, sizeof(*tfd));
  2009. control_flags = (u32 *) tfd;
  2010. idx = get_cmd_index(q, q->write_ptr, 0);
  2011. /* Set up driver data for this TFD */
  2012. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2013. txq->txb[q->write_ptr].skb[0] = skb;
  2014. memcpy(&(txq->txb[q->write_ptr].status.control),
  2015. ctl, sizeof(struct ieee80211_tx_control));
  2016. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2017. out_cmd = &txq->cmd[idx];
  2018. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2019. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2020. /*
  2021. * Set up the Tx-command (not MAC!) header.
  2022. * Store the chosen Tx queue and TFD index within the sequence field;
  2023. * after Tx, uCode's Tx response will return this value so driver can
  2024. * locate the frame within the tx queue and do post-tx processing.
  2025. */
  2026. out_cmd->hdr.cmd = REPLY_TX;
  2027. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2028. INDEX_TO_SEQ(q->write_ptr)));
  2029. /* Copy MAC header from skb into command buffer */
  2030. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2031. /*
  2032. * Use the first empty entry in this queue's command buffer array
  2033. * to contain the Tx command and MAC header concatenated together
  2034. * (payload data will be in another buffer).
  2035. * Size of this varies, due to varying MAC header length.
  2036. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2037. * of the MAC header (device reads on dword boundaries).
  2038. * We'll tell device about this padding later.
  2039. */
  2040. len = priv->hw_setting.tx_cmd_len +
  2041. sizeof(struct iwl_cmd_header) + hdr_len;
  2042. len_org = len;
  2043. len = (len + 3) & ~3;
  2044. if (len_org != len)
  2045. len_org = 1;
  2046. else
  2047. len_org = 0;
  2048. /* Physical address of this Tx command's header (not MAC header!),
  2049. * within command buffer array. */
  2050. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2051. offsetof(struct iwl_cmd, hdr);
  2052. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2053. * first entry */
  2054. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2055. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2056. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2057. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2058. * if any (802.11 null frames have no payload). */
  2059. len = skb->len - hdr_len;
  2060. if (len) {
  2061. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2062. len, PCI_DMA_TODEVICE);
  2063. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2064. }
  2065. /* Tell 4965 about any 2-byte padding after MAC header */
  2066. if (len_org)
  2067. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2068. /* Total # bytes to be transmitted */
  2069. len = (u16)skb->len;
  2070. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2071. /* TODO need this for burst mode later on */
  2072. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2073. /* set is_hcca to 0; it probably will never be implemented */
  2074. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2075. iwl_update_tx_stats(priv, fc, len);
  2076. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2077. offsetof(struct iwl4965_tx_cmd, scratch);
  2078. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2079. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2080. if (!ieee80211_get_morefrag(hdr)) {
  2081. txq->need_update = 1;
  2082. if (qc) {
  2083. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2084. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2085. }
  2086. } else {
  2087. wait_write_ptr = 1;
  2088. txq->need_update = 0;
  2089. }
  2090. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2091. sizeof(out_cmd->cmd.tx));
  2092. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2093. ieee80211_get_hdrlen(fc));
  2094. /* Set up entry for this TFD in Tx byte-count array */
  2095. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2096. /* Tell device the write index *just past* this latest filled TFD */
  2097. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2098. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2099. spin_unlock_irqrestore(&priv->lock, flags);
  2100. if (rc)
  2101. return rc;
  2102. if ((iwl4965_queue_space(q) < q->high_mark)
  2103. && priv->mac80211_registered) {
  2104. if (wait_write_ptr) {
  2105. spin_lock_irqsave(&priv->lock, flags);
  2106. txq->need_update = 1;
  2107. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2108. spin_unlock_irqrestore(&priv->lock, flags);
  2109. }
  2110. ieee80211_stop_queue(priv->hw, ctl->queue);
  2111. }
  2112. return 0;
  2113. drop_unlock:
  2114. spin_unlock_irqrestore(&priv->lock, flags);
  2115. drop:
  2116. return -1;
  2117. }
  2118. static void iwl4965_set_rate(struct iwl_priv *priv)
  2119. {
  2120. const struct ieee80211_supported_band *hw = NULL;
  2121. struct ieee80211_rate *rate;
  2122. int i;
  2123. hw = iwl4965_get_hw_mode(priv, priv->band);
  2124. if (!hw) {
  2125. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2126. return;
  2127. }
  2128. priv->active_rate = 0;
  2129. priv->active_rate_basic = 0;
  2130. for (i = 0; i < hw->n_bitrates; i++) {
  2131. rate = &(hw->bitrates[i]);
  2132. if (rate->hw_value < IWL_RATE_COUNT)
  2133. priv->active_rate |= (1 << rate->hw_value);
  2134. }
  2135. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2136. priv->active_rate, priv->active_rate_basic);
  2137. /*
  2138. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2139. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2140. * OFDM
  2141. */
  2142. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2143. priv->staging_rxon.cck_basic_rates =
  2144. ((priv->active_rate_basic &
  2145. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2146. else
  2147. priv->staging_rxon.cck_basic_rates =
  2148. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2149. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2150. priv->staging_rxon.ofdm_basic_rates =
  2151. ((priv->active_rate_basic &
  2152. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2153. IWL_FIRST_OFDM_RATE) & 0xFF;
  2154. else
  2155. priv->staging_rxon.ofdm_basic_rates =
  2156. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2157. }
  2158. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2159. {
  2160. unsigned long flags;
  2161. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2162. return;
  2163. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2164. disable_radio ? "OFF" : "ON");
  2165. if (disable_radio) {
  2166. iwl4965_scan_cancel(priv);
  2167. /* FIXME: This is a workaround for AP */
  2168. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2169. spin_lock_irqsave(&priv->lock, flags);
  2170. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2171. CSR_UCODE_SW_BIT_RFKILL);
  2172. spin_unlock_irqrestore(&priv->lock, flags);
  2173. /* call the host command only if no hw rf-kill set */
  2174. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2175. iwl4965_send_card_state(priv,
  2176. CARD_STATE_CMD_DISABLE,
  2177. 0);
  2178. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2179. /* make sure mac80211 stop sending Tx frame */
  2180. if (priv->mac80211_registered)
  2181. ieee80211_stop_queues(priv->hw);
  2182. }
  2183. return;
  2184. }
  2185. spin_lock_irqsave(&priv->lock, flags);
  2186. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2187. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2188. spin_unlock_irqrestore(&priv->lock, flags);
  2189. /* wake up ucode */
  2190. msleep(10);
  2191. spin_lock_irqsave(&priv->lock, flags);
  2192. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2193. if (!iwl_grab_nic_access(priv))
  2194. iwl_release_nic_access(priv);
  2195. spin_unlock_irqrestore(&priv->lock, flags);
  2196. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2197. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2198. "disabled by HW switch\n");
  2199. return;
  2200. }
  2201. queue_work(priv->workqueue, &priv->restart);
  2202. return;
  2203. }
  2204. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2205. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2206. {
  2207. u16 fc =
  2208. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2209. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2210. return;
  2211. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2212. return;
  2213. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2214. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2215. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2216. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2217. * Decryption will be done in SW. */
  2218. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2219. RX_RES_STATUS_BAD_KEY_TTAK)
  2220. break;
  2221. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2222. RX_RES_STATUS_BAD_ICV_MIC)
  2223. stats->flag |= RX_FLAG_MMIC_ERROR;
  2224. case RX_RES_STATUS_SEC_TYPE_WEP:
  2225. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2226. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2227. RX_RES_STATUS_DECRYPT_OK) {
  2228. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2229. stats->flag |= RX_FLAG_DECRYPTED;
  2230. }
  2231. break;
  2232. default:
  2233. break;
  2234. }
  2235. }
  2236. #define IWL_PACKET_RETRY_TIME HZ
  2237. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2238. {
  2239. u16 sc = le16_to_cpu(header->seq_ctrl);
  2240. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2241. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2242. u16 *last_seq, *last_frag;
  2243. unsigned long *last_time;
  2244. switch (priv->iw_mode) {
  2245. case IEEE80211_IF_TYPE_IBSS:{
  2246. struct list_head *p;
  2247. struct iwl4965_ibss_seq *entry = NULL;
  2248. u8 *mac = header->addr2;
  2249. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2250. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2251. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2252. if (!compare_ether_addr(entry->mac, mac))
  2253. break;
  2254. }
  2255. if (p == &priv->ibss_mac_hash[index]) {
  2256. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2257. if (!entry) {
  2258. IWL_ERROR("Cannot malloc new mac entry\n");
  2259. return 0;
  2260. }
  2261. memcpy(entry->mac, mac, ETH_ALEN);
  2262. entry->seq_num = seq;
  2263. entry->frag_num = frag;
  2264. entry->packet_time = jiffies;
  2265. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2266. return 0;
  2267. }
  2268. last_seq = &entry->seq_num;
  2269. last_frag = &entry->frag_num;
  2270. last_time = &entry->packet_time;
  2271. break;
  2272. }
  2273. case IEEE80211_IF_TYPE_STA:
  2274. last_seq = &priv->last_seq_num;
  2275. last_frag = &priv->last_frag_num;
  2276. last_time = &priv->last_packet_time;
  2277. break;
  2278. default:
  2279. return 0;
  2280. }
  2281. if ((*last_seq == seq) &&
  2282. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2283. if (*last_frag == frag)
  2284. goto drop;
  2285. if (*last_frag + 1 != frag)
  2286. /* out-of-order fragment */
  2287. goto drop;
  2288. } else
  2289. *last_seq = seq;
  2290. *last_frag = frag;
  2291. *last_time = jiffies;
  2292. return 0;
  2293. drop:
  2294. return 1;
  2295. }
  2296. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2297. #include "iwl-spectrum.h"
  2298. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2299. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2300. #define TIME_UNIT 1024
  2301. /*
  2302. * extended beacon time format
  2303. * time in usec will be changed into a 32-bit value in 8:24 format
  2304. * the high 1 byte is the beacon counts
  2305. * the lower 3 bytes is the time in usec within one beacon interval
  2306. */
  2307. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2308. {
  2309. u32 quot;
  2310. u32 rem;
  2311. u32 interval = beacon_interval * 1024;
  2312. if (!interval || !usec)
  2313. return 0;
  2314. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2315. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2316. return (quot << 24) + rem;
  2317. }
  2318. /* base is usually what we get from ucode with each received frame,
  2319. * the same as HW timer counter counting down
  2320. */
  2321. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2322. {
  2323. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2324. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2325. u32 interval = beacon_interval * TIME_UNIT;
  2326. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2327. (addon & BEACON_TIME_MASK_HIGH);
  2328. if (base_low > addon_low)
  2329. res += base_low - addon_low;
  2330. else if (base_low < addon_low) {
  2331. res += interval + base_low - addon_low;
  2332. res += (1 << 24);
  2333. } else
  2334. res += (1 << 24);
  2335. return cpu_to_le32(res);
  2336. }
  2337. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2338. struct ieee80211_measurement_params *params,
  2339. u8 type)
  2340. {
  2341. struct iwl4965_spectrum_cmd spectrum;
  2342. struct iwl4965_rx_packet *res;
  2343. struct iwl_host_cmd cmd = {
  2344. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2345. .data = (void *)&spectrum,
  2346. .meta.flags = CMD_WANT_SKB,
  2347. };
  2348. u32 add_time = le64_to_cpu(params->start_time);
  2349. int rc;
  2350. int spectrum_resp_status;
  2351. int duration = le16_to_cpu(params->duration);
  2352. if (iwl4965_is_associated(priv))
  2353. add_time =
  2354. iwl4965_usecs_to_beacons(
  2355. le64_to_cpu(params->start_time) - priv->last_tsf,
  2356. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2357. memset(&spectrum, 0, sizeof(spectrum));
  2358. spectrum.channel_count = cpu_to_le16(1);
  2359. spectrum.flags =
  2360. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2361. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2362. cmd.len = sizeof(spectrum);
  2363. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2364. if (iwl4965_is_associated(priv))
  2365. spectrum.start_time =
  2366. iwl4965_add_beacon_time(priv->last_beacon_time,
  2367. add_time,
  2368. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2369. else
  2370. spectrum.start_time = 0;
  2371. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2372. spectrum.channels[0].channel = params->channel;
  2373. spectrum.channels[0].type = type;
  2374. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2375. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2376. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2377. rc = iwl_send_cmd_sync(priv, &cmd);
  2378. if (rc)
  2379. return rc;
  2380. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2381. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2382. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2383. rc = -EIO;
  2384. }
  2385. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2386. switch (spectrum_resp_status) {
  2387. case 0: /* Command will be handled */
  2388. if (res->u.spectrum.id != 0xff) {
  2389. IWL_DEBUG_INFO
  2390. ("Replaced existing measurement: %d\n",
  2391. res->u.spectrum.id);
  2392. priv->measurement_status &= ~MEASUREMENT_READY;
  2393. }
  2394. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2395. rc = 0;
  2396. break;
  2397. case 1: /* Command will not be handled */
  2398. rc = -EAGAIN;
  2399. break;
  2400. }
  2401. dev_kfree_skb_any(cmd.meta.u.skb);
  2402. return rc;
  2403. }
  2404. #endif
  2405. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2406. struct iwl4965_tx_info *tx_sta)
  2407. {
  2408. tx_sta->status.ack_signal = 0;
  2409. tx_sta->status.excessive_retries = 0;
  2410. tx_sta->status.queue_length = 0;
  2411. tx_sta->status.queue_number = 0;
  2412. if (in_interrupt())
  2413. ieee80211_tx_status_irqsafe(priv->hw,
  2414. tx_sta->skb[0], &(tx_sta->status));
  2415. else
  2416. ieee80211_tx_status(priv->hw,
  2417. tx_sta->skb[0], &(tx_sta->status));
  2418. tx_sta->skb[0] = NULL;
  2419. }
  2420. /**
  2421. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2422. *
  2423. * When FW advances 'R' index, all entries between old and new 'R' index
  2424. * need to be reclaimed. As result, some free space forms. If there is
  2425. * enough free space (> low mark), wake the stack that feeds us.
  2426. */
  2427. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2428. {
  2429. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2430. struct iwl4965_queue *q = &txq->q;
  2431. int nfreed = 0;
  2432. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2433. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2434. "is out of range [0-%d] %d %d.\n", txq_id,
  2435. index, q->n_bd, q->write_ptr, q->read_ptr);
  2436. return 0;
  2437. }
  2438. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2439. q->read_ptr != index;
  2440. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2441. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2442. iwl4965_txstatus_to_ieee(priv,
  2443. &(txq->txb[txq->q.read_ptr]));
  2444. iwl4965_hw_txq_free_tfd(priv, txq);
  2445. } else if (nfreed > 1) {
  2446. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2447. q->write_ptr, q->read_ptr);
  2448. queue_work(priv->workqueue, &priv->restart);
  2449. }
  2450. nfreed++;
  2451. }
  2452. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2453. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2454. priv->mac80211_registered)
  2455. ieee80211_wake_queue(priv->hw, txq_id); */
  2456. return nfreed;
  2457. }
  2458. static int iwl4965_is_tx_success(u32 status)
  2459. {
  2460. status &= TX_STATUS_MSK;
  2461. return (status == TX_STATUS_SUCCESS)
  2462. || (status == TX_STATUS_DIRECT_DONE);
  2463. }
  2464. /******************************************************************************
  2465. *
  2466. * Generic RX handler implementations
  2467. *
  2468. ******************************************************************************/
  2469. #ifdef CONFIG_IWL4965_HT
  2470. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2471. struct ieee80211_hdr *hdr)
  2472. {
  2473. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2474. return IWL_AP_ID;
  2475. else {
  2476. u8 *da = ieee80211_get_DA(hdr);
  2477. return iwl4965_hw_find_station(priv, da);
  2478. }
  2479. }
  2480. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2481. struct iwl_priv *priv, int txq_id, int idx)
  2482. {
  2483. if (priv->txq[txq_id].txb[idx].skb[0])
  2484. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2485. txb[idx].skb[0]->data;
  2486. return NULL;
  2487. }
  2488. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2489. {
  2490. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2491. tx_resp->frame_count);
  2492. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2493. }
  2494. /**
  2495. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2496. */
  2497. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2498. struct iwl4965_ht_agg *agg,
  2499. struct iwl4965_tx_resp_agg *tx_resp,
  2500. u16 start_idx)
  2501. {
  2502. u16 status;
  2503. struct agg_tx_status *frame_status = &tx_resp->status;
  2504. struct ieee80211_tx_status *tx_status = NULL;
  2505. struct ieee80211_hdr *hdr = NULL;
  2506. int i, sh;
  2507. int txq_id, idx;
  2508. u16 seq;
  2509. if (agg->wait_for_ba)
  2510. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2511. agg->frame_count = tx_resp->frame_count;
  2512. agg->start_idx = start_idx;
  2513. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2514. agg->bitmap = 0;
  2515. /* # frames attempted by Tx command */
  2516. if (agg->frame_count == 1) {
  2517. /* Only one frame was attempted; no block-ack will arrive */
  2518. status = le16_to_cpu(frame_status[0].status);
  2519. seq = le16_to_cpu(frame_status[0].sequence);
  2520. idx = SEQ_TO_INDEX(seq);
  2521. txq_id = SEQ_TO_QUEUE(seq);
  2522. /* FIXME: code repetition */
  2523. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2524. agg->frame_count, agg->start_idx, idx);
  2525. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2526. tx_status->retry_count = tx_resp->failure_frame;
  2527. tx_status->queue_number = status & 0xff;
  2528. tx_status->queue_length = tx_resp->failure_rts;
  2529. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2530. tx_status->flags = iwl4965_is_tx_success(status)?
  2531. IEEE80211_TX_STATUS_ACK : 0;
  2532. iwl4965_hwrate_to_tx_control(priv,
  2533. le32_to_cpu(tx_resp->rate_n_flags),
  2534. &tx_status->control);
  2535. /* FIXME: code repetition end */
  2536. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2537. status & 0xff, tx_resp->failure_frame);
  2538. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2539. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2540. agg->wait_for_ba = 0;
  2541. } else {
  2542. /* Two or more frames were attempted; expect block-ack */
  2543. u64 bitmap = 0;
  2544. int start = agg->start_idx;
  2545. /* Construct bit-map of pending frames within Tx window */
  2546. for (i = 0; i < agg->frame_count; i++) {
  2547. u16 sc;
  2548. status = le16_to_cpu(frame_status[i].status);
  2549. seq = le16_to_cpu(frame_status[i].sequence);
  2550. idx = SEQ_TO_INDEX(seq);
  2551. txq_id = SEQ_TO_QUEUE(seq);
  2552. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2553. AGG_TX_STATE_ABORT_MSK))
  2554. continue;
  2555. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2556. agg->frame_count, txq_id, idx);
  2557. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2558. sc = le16_to_cpu(hdr->seq_ctrl);
  2559. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2560. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2561. " idx=%d, seq_idx=%d, seq=%d\n",
  2562. idx, SEQ_TO_SN(sc),
  2563. hdr->seq_ctrl);
  2564. return -1;
  2565. }
  2566. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2567. i, idx, SEQ_TO_SN(sc));
  2568. sh = idx - start;
  2569. if (sh > 64) {
  2570. sh = (start - idx) + 0xff;
  2571. bitmap = bitmap << sh;
  2572. sh = 0;
  2573. start = idx;
  2574. } else if (sh < -64)
  2575. sh = 0xff - (start - idx);
  2576. else if (sh < 0) {
  2577. sh = start - idx;
  2578. start = idx;
  2579. bitmap = bitmap << sh;
  2580. sh = 0;
  2581. }
  2582. bitmap |= (1 << sh);
  2583. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2584. start, (u32)(bitmap & 0xFFFFFFFF));
  2585. }
  2586. agg->bitmap = bitmap;
  2587. agg->start_idx = start;
  2588. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2589. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2590. agg->frame_count, agg->start_idx,
  2591. (unsigned long long)agg->bitmap);
  2592. if (bitmap)
  2593. agg->wait_for_ba = 1;
  2594. }
  2595. return 0;
  2596. }
  2597. #endif
  2598. /**
  2599. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2600. */
  2601. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2602. struct iwl4965_rx_mem_buffer *rxb)
  2603. {
  2604. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2605. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2606. int txq_id = SEQ_TO_QUEUE(sequence);
  2607. int index = SEQ_TO_INDEX(sequence);
  2608. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2609. struct ieee80211_tx_status *tx_status;
  2610. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2611. u32 status = le32_to_cpu(tx_resp->status);
  2612. #ifdef CONFIG_IWL4965_HT
  2613. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2614. struct ieee80211_hdr *hdr;
  2615. __le16 *qc;
  2616. #endif
  2617. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2618. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2619. "is out of range [0-%d] %d %d\n", txq_id,
  2620. index, txq->q.n_bd, txq->q.write_ptr,
  2621. txq->q.read_ptr);
  2622. return;
  2623. }
  2624. #ifdef CONFIG_IWL4965_HT
  2625. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2626. qc = ieee80211_get_qos_ctrl(hdr);
  2627. if (qc)
  2628. tid = le16_to_cpu(*qc) & 0xf;
  2629. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2630. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2631. IWL_ERROR("Station not known\n");
  2632. return;
  2633. }
  2634. if (txq->sched_retry) {
  2635. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2636. struct iwl4965_ht_agg *agg = NULL;
  2637. if (!qc)
  2638. return;
  2639. agg = &priv->stations[sta_id].tid[tid].agg;
  2640. iwl4965_tx_status_reply_tx(priv, agg,
  2641. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2642. if ((tx_resp->frame_count == 1) &&
  2643. !iwl4965_is_tx_success(status)) {
  2644. /* TODO: send BAR */
  2645. }
  2646. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2647. int freed;
  2648. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2649. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2650. "%d index %d\n", scd_ssn , index);
  2651. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2652. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2653. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2654. txq_id >= 0 && priv->mac80211_registered &&
  2655. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2656. ieee80211_wake_queue(priv->hw, txq_id);
  2657. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2658. }
  2659. } else {
  2660. #endif /* CONFIG_IWL4965_HT */
  2661. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2662. tx_status->retry_count = tx_resp->failure_frame;
  2663. tx_status->queue_number = status;
  2664. tx_status->queue_length = tx_resp->bt_kill_count;
  2665. tx_status->queue_length |= tx_resp->failure_rts;
  2666. tx_status->flags =
  2667. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2668. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2669. &tx_status->control);
  2670. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2671. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2672. status, le32_to_cpu(tx_resp->rate_n_flags),
  2673. tx_resp->failure_frame);
  2674. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2675. if (index != -1) {
  2676. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2677. #ifdef CONFIG_IWL4965_HT
  2678. if (tid != MAX_TID_COUNT)
  2679. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2680. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2681. (txq_id >= 0) &&
  2682. priv->mac80211_registered)
  2683. ieee80211_wake_queue(priv->hw, txq_id);
  2684. if (tid != MAX_TID_COUNT)
  2685. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2686. #endif
  2687. }
  2688. #ifdef CONFIG_IWL4965_HT
  2689. }
  2690. #endif /* CONFIG_IWL4965_HT */
  2691. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2692. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2693. }
  2694. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2695. struct iwl4965_rx_mem_buffer *rxb)
  2696. {
  2697. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2698. struct iwl4965_alive_resp *palive;
  2699. struct delayed_work *pwork;
  2700. palive = &pkt->u.alive_frame;
  2701. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2702. "0x%01X 0x%01X\n",
  2703. palive->is_valid, palive->ver_type,
  2704. palive->ver_subtype);
  2705. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2706. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2707. memcpy(&priv->card_alive_init,
  2708. &pkt->u.alive_frame,
  2709. sizeof(struct iwl4965_init_alive_resp));
  2710. pwork = &priv->init_alive_start;
  2711. } else {
  2712. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2713. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2714. sizeof(struct iwl4965_alive_resp));
  2715. pwork = &priv->alive_start;
  2716. }
  2717. /* We delay the ALIVE response by 5ms to
  2718. * give the HW RF Kill time to activate... */
  2719. if (palive->is_valid == UCODE_VALID_OK)
  2720. queue_delayed_work(priv->workqueue, pwork,
  2721. msecs_to_jiffies(5));
  2722. else
  2723. IWL_WARNING("uCode did not respond OK.\n");
  2724. }
  2725. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2726. struct iwl4965_rx_mem_buffer *rxb)
  2727. {
  2728. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2729. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2730. return;
  2731. }
  2732. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2733. struct iwl4965_rx_mem_buffer *rxb)
  2734. {
  2735. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2736. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2737. "seq 0x%04X ser 0x%08X\n",
  2738. le32_to_cpu(pkt->u.err_resp.error_type),
  2739. get_cmd_string(pkt->u.err_resp.cmd_id),
  2740. pkt->u.err_resp.cmd_id,
  2741. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2742. le32_to_cpu(pkt->u.err_resp.error_info));
  2743. }
  2744. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2745. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2746. {
  2747. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2748. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2749. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2750. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2751. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2752. rxon->channel = csa->channel;
  2753. priv->staging_rxon.channel = csa->channel;
  2754. }
  2755. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2756. struct iwl4965_rx_mem_buffer *rxb)
  2757. {
  2758. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2759. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2760. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2761. if (!report->state) {
  2762. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2763. "Spectrum Measure Notification: Start\n");
  2764. return;
  2765. }
  2766. memcpy(&priv->measure_report, report, sizeof(*report));
  2767. priv->measurement_status |= MEASUREMENT_READY;
  2768. #endif
  2769. }
  2770. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2771. struct iwl4965_rx_mem_buffer *rxb)
  2772. {
  2773. #ifdef CONFIG_IWLWIFI_DEBUG
  2774. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2775. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2776. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2777. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2778. #endif
  2779. }
  2780. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2781. struct iwl4965_rx_mem_buffer *rxb)
  2782. {
  2783. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2784. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2785. "notification for %s:\n",
  2786. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2787. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2788. }
  2789. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2790. {
  2791. struct iwl_priv *priv =
  2792. container_of(work, struct iwl_priv, beacon_update);
  2793. struct sk_buff *beacon;
  2794. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2795. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2796. if (!beacon) {
  2797. IWL_ERROR("update beacon failed\n");
  2798. return;
  2799. }
  2800. mutex_lock(&priv->mutex);
  2801. /* new beacon skb is allocated every time; dispose previous.*/
  2802. if (priv->ibss_beacon)
  2803. dev_kfree_skb(priv->ibss_beacon);
  2804. priv->ibss_beacon = beacon;
  2805. mutex_unlock(&priv->mutex);
  2806. iwl4965_send_beacon_cmd(priv);
  2807. }
  2808. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2809. struct iwl4965_rx_mem_buffer *rxb)
  2810. {
  2811. #ifdef CONFIG_IWLWIFI_DEBUG
  2812. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2813. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2814. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2815. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2816. "tsf %d %d rate %d\n",
  2817. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2818. beacon->beacon_notify_hdr.failure_frame,
  2819. le32_to_cpu(beacon->ibss_mgr_status),
  2820. le32_to_cpu(beacon->high_tsf),
  2821. le32_to_cpu(beacon->low_tsf), rate);
  2822. #endif
  2823. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2824. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2825. queue_work(priv->workqueue, &priv->beacon_update);
  2826. }
  2827. /* Service response to REPLY_SCAN_CMD (0x80) */
  2828. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2829. struct iwl4965_rx_mem_buffer *rxb)
  2830. {
  2831. #ifdef CONFIG_IWLWIFI_DEBUG
  2832. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2833. struct iwl4965_scanreq_notification *notif =
  2834. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2835. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2836. #endif
  2837. }
  2838. /* Service SCAN_START_NOTIFICATION (0x82) */
  2839. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2840. struct iwl4965_rx_mem_buffer *rxb)
  2841. {
  2842. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2843. struct iwl4965_scanstart_notification *notif =
  2844. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2845. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2846. IWL_DEBUG_SCAN("Scan start: "
  2847. "%d [802.11%s] "
  2848. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2849. notif->channel,
  2850. notif->band ? "bg" : "a",
  2851. notif->tsf_high,
  2852. notif->tsf_low, notif->status, notif->beacon_timer);
  2853. }
  2854. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2855. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2856. struct iwl4965_rx_mem_buffer *rxb)
  2857. {
  2858. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2859. struct iwl4965_scanresults_notification *notif =
  2860. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2861. IWL_DEBUG_SCAN("Scan ch.res: "
  2862. "%d [802.11%s] "
  2863. "(TSF: 0x%08X:%08X) - %d "
  2864. "elapsed=%lu usec (%dms since last)\n",
  2865. notif->channel,
  2866. notif->band ? "bg" : "a",
  2867. le32_to_cpu(notif->tsf_high),
  2868. le32_to_cpu(notif->tsf_low),
  2869. le32_to_cpu(notif->statistics[0]),
  2870. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2871. jiffies_to_msecs(elapsed_jiffies
  2872. (priv->last_scan_jiffies, jiffies)));
  2873. priv->last_scan_jiffies = jiffies;
  2874. priv->next_scan_jiffies = 0;
  2875. }
  2876. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2877. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2878. struct iwl4965_rx_mem_buffer *rxb)
  2879. {
  2880. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2881. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2882. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2883. scan_notif->scanned_channels,
  2884. scan_notif->tsf_low,
  2885. scan_notif->tsf_high, scan_notif->status);
  2886. /* The HW is no longer scanning */
  2887. clear_bit(STATUS_SCAN_HW, &priv->status);
  2888. /* The scan completion notification came in, so kill that timer... */
  2889. cancel_delayed_work(&priv->scan_check);
  2890. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2891. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2892. jiffies_to_msecs(elapsed_jiffies
  2893. (priv->scan_pass_start, jiffies)));
  2894. /* Remove this scanned band from the list
  2895. * of pending bands to scan */
  2896. priv->scan_bands--;
  2897. /* If a request to abort was given, or the scan did not succeed
  2898. * then we reset the scan state machine and terminate,
  2899. * re-queuing another scan if one has been requested */
  2900. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2901. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2902. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2903. } else {
  2904. /* If there are more bands on this scan pass reschedule */
  2905. if (priv->scan_bands > 0)
  2906. goto reschedule;
  2907. }
  2908. priv->last_scan_jiffies = jiffies;
  2909. priv->next_scan_jiffies = 0;
  2910. IWL_DEBUG_INFO("Setting scan to off\n");
  2911. clear_bit(STATUS_SCANNING, &priv->status);
  2912. IWL_DEBUG_INFO("Scan took %dms\n",
  2913. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2914. queue_work(priv->workqueue, &priv->scan_completed);
  2915. return;
  2916. reschedule:
  2917. priv->scan_pass_start = jiffies;
  2918. queue_work(priv->workqueue, &priv->request_scan);
  2919. }
  2920. /* Handle notification from uCode that card's power state is changing
  2921. * due to software, hardware, or critical temperature RFKILL */
  2922. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2923. struct iwl4965_rx_mem_buffer *rxb)
  2924. {
  2925. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2926. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2927. unsigned long status = priv->status;
  2928. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2929. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2930. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2931. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2932. RF_CARD_DISABLED)) {
  2933. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2934. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2935. if (!iwl_grab_nic_access(priv)) {
  2936. iwl_write_direct32(
  2937. priv, HBUS_TARG_MBX_C,
  2938. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2939. iwl_release_nic_access(priv);
  2940. }
  2941. if (!(flags & RXON_CARD_DISABLED)) {
  2942. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2943. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2944. if (!iwl_grab_nic_access(priv)) {
  2945. iwl_write_direct32(
  2946. priv, HBUS_TARG_MBX_C,
  2947. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2948. iwl_release_nic_access(priv);
  2949. }
  2950. }
  2951. if (flags & RF_CARD_DISABLED) {
  2952. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2953. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2954. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2955. if (!iwl_grab_nic_access(priv))
  2956. iwl_release_nic_access(priv);
  2957. }
  2958. }
  2959. if (flags & HW_CARD_DISABLED)
  2960. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2961. else
  2962. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2963. if (flags & SW_CARD_DISABLED)
  2964. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2965. else
  2966. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2967. if (!(flags & RXON_CARD_DISABLED))
  2968. iwl4965_scan_cancel(priv);
  2969. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2970. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2971. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2972. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2973. queue_work(priv->workqueue, &priv->rf_kill);
  2974. else
  2975. wake_up_interruptible(&priv->wait_command_queue);
  2976. }
  2977. /**
  2978. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2979. *
  2980. * Setup the RX handlers for each of the reply types sent from the uCode
  2981. * to the host.
  2982. *
  2983. * This function chains into the hardware specific files for them to setup
  2984. * any hardware specific handlers as well.
  2985. */
  2986. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2987. {
  2988. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2989. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2990. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2991. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2992. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2993. iwl4965_rx_spectrum_measure_notif;
  2994. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2995. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2996. iwl4965_rx_pm_debug_statistics_notif;
  2997. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2998. /*
  2999. * The same handler is used for both the REPLY to a discrete
  3000. * statistics request from the host as well as for the periodic
  3001. * statistics notifications (after received beacons) from the uCode.
  3002. */
  3003. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3004. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3005. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3006. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3007. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3008. iwl4965_rx_scan_results_notif;
  3009. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3010. iwl4965_rx_scan_complete_notif;
  3011. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3012. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3013. /* Set up hardware specific Rx handlers */
  3014. iwl4965_hw_rx_handler_setup(priv);
  3015. }
  3016. /**
  3017. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3018. * @rxb: Rx buffer to reclaim
  3019. *
  3020. * If an Rx buffer has an async callback associated with it the callback
  3021. * will be executed. The attached skb (if present) will only be freed
  3022. * if the callback returns 1
  3023. */
  3024. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3025. struct iwl4965_rx_mem_buffer *rxb)
  3026. {
  3027. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3028. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3029. int txq_id = SEQ_TO_QUEUE(sequence);
  3030. int index = SEQ_TO_INDEX(sequence);
  3031. int huge = sequence & SEQ_HUGE_FRAME;
  3032. int cmd_index;
  3033. struct iwl_cmd *cmd;
  3034. /* If a Tx command is being handled and it isn't in the actual
  3035. * command queue then there a command routing bug has been introduced
  3036. * in the queue management code. */
  3037. if (txq_id != IWL_CMD_QUEUE_NUM)
  3038. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3039. txq_id, pkt->hdr.cmd);
  3040. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3041. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3042. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3043. /* Input error checking is done when commands are added to queue. */
  3044. if (cmd->meta.flags & CMD_WANT_SKB) {
  3045. cmd->meta.source->u.skb = rxb->skb;
  3046. rxb->skb = NULL;
  3047. } else if (cmd->meta.u.callback &&
  3048. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3049. rxb->skb = NULL;
  3050. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3051. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3052. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3053. wake_up_interruptible(&priv->wait_command_queue);
  3054. }
  3055. }
  3056. /************************** RX-FUNCTIONS ****************************/
  3057. /*
  3058. * Rx theory of operation
  3059. *
  3060. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3061. * each of which point to Receive Buffers to be filled by 4965. These get
  3062. * used not only for Rx frames, but for any command response or notification
  3063. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3064. * of indexes into the circular buffer.
  3065. *
  3066. * Rx Queue Indexes
  3067. * The host/firmware share two index registers for managing the Rx buffers.
  3068. *
  3069. * The READ index maps to the first position that the firmware may be writing
  3070. * to -- the driver can read up to (but not including) this position and get
  3071. * good data.
  3072. * The READ index is managed by the firmware once the card is enabled.
  3073. *
  3074. * The WRITE index maps to the last position the driver has read from -- the
  3075. * position preceding WRITE is the last slot the firmware can place a packet.
  3076. *
  3077. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3078. * WRITE = READ.
  3079. *
  3080. * During initialization, the host sets up the READ queue position to the first
  3081. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3082. *
  3083. * When the firmware places a packet in a buffer, it will advance the READ index
  3084. * and fire the RX interrupt. The driver can then query the READ index and
  3085. * process as many packets as possible, moving the WRITE index forward as it
  3086. * resets the Rx queue buffers with new memory.
  3087. *
  3088. * The management in the driver is as follows:
  3089. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3090. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3091. * to replenish the iwl->rxq->rx_free.
  3092. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3093. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3094. * 'processed' and 'read' driver indexes as well)
  3095. * + A received packet is processed and handed to the kernel network stack,
  3096. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3097. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3098. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3099. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3100. * were enough free buffers and RX_STALLED is set it is cleared.
  3101. *
  3102. *
  3103. * Driver sequence:
  3104. *
  3105. * iwl4965_rx_queue_alloc() Allocates rx_free
  3106. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3107. * iwl4965_rx_queue_restock
  3108. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3109. * queue, updates firmware pointers, and updates
  3110. * the WRITE index. If insufficient rx_free buffers
  3111. * are available, schedules iwl4965_rx_replenish
  3112. *
  3113. * -- enable interrupts --
  3114. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3115. * READ INDEX, detaching the SKB from the pool.
  3116. * Moves the packet buffer from queue to rx_used.
  3117. * Calls iwl4965_rx_queue_restock to refill any empty
  3118. * slots.
  3119. * ...
  3120. *
  3121. */
  3122. /**
  3123. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3124. */
  3125. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3126. {
  3127. int s = q->read - q->write;
  3128. if (s <= 0)
  3129. s += RX_QUEUE_SIZE;
  3130. /* keep some buffer to not confuse full and empty queue */
  3131. s -= 2;
  3132. if (s < 0)
  3133. s = 0;
  3134. return s;
  3135. }
  3136. /**
  3137. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3138. */
  3139. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3140. {
  3141. u32 reg = 0;
  3142. int rc = 0;
  3143. unsigned long flags;
  3144. spin_lock_irqsave(&q->lock, flags);
  3145. if (q->need_update == 0)
  3146. goto exit_unlock;
  3147. /* If power-saving is in use, make sure device is awake */
  3148. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3149. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3150. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3151. iwl_set_bit(priv, CSR_GP_CNTRL,
  3152. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3153. goto exit_unlock;
  3154. }
  3155. rc = iwl_grab_nic_access(priv);
  3156. if (rc)
  3157. goto exit_unlock;
  3158. /* Device expects a multiple of 8 */
  3159. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3160. q->write & ~0x7);
  3161. iwl_release_nic_access(priv);
  3162. /* Else device is assumed to be awake */
  3163. } else
  3164. /* Device expects a multiple of 8 */
  3165. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3166. q->need_update = 0;
  3167. exit_unlock:
  3168. spin_unlock_irqrestore(&q->lock, flags);
  3169. return rc;
  3170. }
  3171. /**
  3172. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3173. */
  3174. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3175. dma_addr_t dma_addr)
  3176. {
  3177. return cpu_to_le32((u32)(dma_addr >> 8));
  3178. }
  3179. /**
  3180. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3181. *
  3182. * If there are slots in the RX queue that need to be restocked,
  3183. * and we have free pre-allocated buffers, fill the ranks as much
  3184. * as we can, pulling from rx_free.
  3185. *
  3186. * This moves the 'write' index forward to catch up with 'processed', and
  3187. * also updates the memory address in the firmware to reference the new
  3188. * target buffer.
  3189. */
  3190. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3191. {
  3192. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3193. struct list_head *element;
  3194. struct iwl4965_rx_mem_buffer *rxb;
  3195. unsigned long flags;
  3196. int write, rc;
  3197. spin_lock_irqsave(&rxq->lock, flags);
  3198. write = rxq->write & ~0x7;
  3199. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3200. /* Get next free Rx buffer, remove from free list */
  3201. element = rxq->rx_free.next;
  3202. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3203. list_del(element);
  3204. /* Point to Rx buffer via next RBD in circular buffer */
  3205. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3206. rxq->queue[rxq->write] = rxb;
  3207. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3208. rxq->free_count--;
  3209. }
  3210. spin_unlock_irqrestore(&rxq->lock, flags);
  3211. /* If the pre-allocated buffer pool is dropping low, schedule to
  3212. * refill it */
  3213. if (rxq->free_count <= RX_LOW_WATERMARK)
  3214. queue_work(priv->workqueue, &priv->rx_replenish);
  3215. /* If we've added more space for the firmware to place data, tell it.
  3216. * Increment device's write pointer in multiples of 8. */
  3217. if ((write != (rxq->write & ~0x7))
  3218. || (abs(rxq->write - rxq->read) > 7)) {
  3219. spin_lock_irqsave(&rxq->lock, flags);
  3220. rxq->need_update = 1;
  3221. spin_unlock_irqrestore(&rxq->lock, flags);
  3222. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3223. if (rc)
  3224. return rc;
  3225. }
  3226. return 0;
  3227. }
  3228. /**
  3229. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3230. *
  3231. * When moving to rx_free an SKB is allocated for the slot.
  3232. *
  3233. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3234. * This is called as a scheduled work item (except for during initialization)
  3235. */
  3236. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3237. {
  3238. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3239. struct list_head *element;
  3240. struct iwl4965_rx_mem_buffer *rxb;
  3241. unsigned long flags;
  3242. spin_lock_irqsave(&rxq->lock, flags);
  3243. while (!list_empty(&rxq->rx_used)) {
  3244. element = rxq->rx_used.next;
  3245. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3246. /* Alloc a new receive buffer */
  3247. rxb->skb =
  3248. alloc_skb(priv->hw_setting.rx_buf_size,
  3249. __GFP_NOWARN | GFP_ATOMIC);
  3250. if (!rxb->skb) {
  3251. if (net_ratelimit())
  3252. printk(KERN_CRIT DRV_NAME
  3253. ": Can not allocate SKB buffers\n");
  3254. /* We don't reschedule replenish work here -- we will
  3255. * call the restock method and if it still needs
  3256. * more buffers it will schedule replenish */
  3257. break;
  3258. }
  3259. priv->alloc_rxb_skb++;
  3260. list_del(element);
  3261. /* Get physical address of RB/SKB */
  3262. rxb->dma_addr =
  3263. pci_map_single(priv->pci_dev, rxb->skb->data,
  3264. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3265. list_add_tail(&rxb->list, &rxq->rx_free);
  3266. rxq->free_count++;
  3267. }
  3268. spin_unlock_irqrestore(&rxq->lock, flags);
  3269. }
  3270. /*
  3271. * this should be called while priv->lock is locked
  3272. */
  3273. static void __iwl4965_rx_replenish(void *data)
  3274. {
  3275. struct iwl_priv *priv = data;
  3276. iwl4965_rx_allocate(priv);
  3277. iwl4965_rx_queue_restock(priv);
  3278. }
  3279. void iwl4965_rx_replenish(void *data)
  3280. {
  3281. struct iwl_priv *priv = data;
  3282. unsigned long flags;
  3283. iwl4965_rx_allocate(priv);
  3284. spin_lock_irqsave(&priv->lock, flags);
  3285. iwl4965_rx_queue_restock(priv);
  3286. spin_unlock_irqrestore(&priv->lock, flags);
  3287. }
  3288. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3289. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3290. * This free routine walks the list of POOL entries and if SKB is set to
  3291. * non NULL it is unmapped and freed
  3292. */
  3293. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3294. {
  3295. int i;
  3296. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3297. if (rxq->pool[i].skb != NULL) {
  3298. pci_unmap_single(priv->pci_dev,
  3299. rxq->pool[i].dma_addr,
  3300. priv->hw_setting.rx_buf_size,
  3301. PCI_DMA_FROMDEVICE);
  3302. dev_kfree_skb(rxq->pool[i].skb);
  3303. }
  3304. }
  3305. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3306. rxq->dma_addr);
  3307. rxq->bd = NULL;
  3308. }
  3309. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3310. {
  3311. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3312. struct pci_dev *dev = priv->pci_dev;
  3313. int i;
  3314. spin_lock_init(&rxq->lock);
  3315. INIT_LIST_HEAD(&rxq->rx_free);
  3316. INIT_LIST_HEAD(&rxq->rx_used);
  3317. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3318. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3319. if (!rxq->bd)
  3320. return -ENOMEM;
  3321. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3322. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3323. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3324. /* Set us so that we have processed and used all buffers, but have
  3325. * not restocked the Rx queue with fresh buffers */
  3326. rxq->read = rxq->write = 0;
  3327. rxq->free_count = 0;
  3328. rxq->need_update = 0;
  3329. return 0;
  3330. }
  3331. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3332. {
  3333. unsigned long flags;
  3334. int i;
  3335. spin_lock_irqsave(&rxq->lock, flags);
  3336. INIT_LIST_HEAD(&rxq->rx_free);
  3337. INIT_LIST_HEAD(&rxq->rx_used);
  3338. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3339. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3340. /* In the reset function, these buffers may have been allocated
  3341. * to an SKB, so we need to unmap and free potential storage */
  3342. if (rxq->pool[i].skb != NULL) {
  3343. pci_unmap_single(priv->pci_dev,
  3344. rxq->pool[i].dma_addr,
  3345. priv->hw_setting.rx_buf_size,
  3346. PCI_DMA_FROMDEVICE);
  3347. priv->alloc_rxb_skb--;
  3348. dev_kfree_skb(rxq->pool[i].skb);
  3349. rxq->pool[i].skb = NULL;
  3350. }
  3351. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3352. }
  3353. /* Set us so that we have processed and used all buffers, but have
  3354. * not restocked the Rx queue with fresh buffers */
  3355. rxq->read = rxq->write = 0;
  3356. rxq->free_count = 0;
  3357. spin_unlock_irqrestore(&rxq->lock, flags);
  3358. }
  3359. /* Convert linear signal-to-noise ratio into dB */
  3360. static u8 ratio2dB[100] = {
  3361. /* 0 1 2 3 4 5 6 7 8 9 */
  3362. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3363. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3364. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3365. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3366. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3367. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3368. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3369. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3370. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3371. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3372. };
  3373. /* Calculates a relative dB value from a ratio of linear
  3374. * (i.e. not dB) signal levels.
  3375. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3376. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3377. {
  3378. /* 1000:1 or higher just report as 60 dB */
  3379. if (sig_ratio >= 1000)
  3380. return 60;
  3381. /* 100:1 or higher, divide by 10 and use table,
  3382. * add 20 dB to make up for divide by 10 */
  3383. if (sig_ratio >= 100)
  3384. return (20 + (int)ratio2dB[sig_ratio/10]);
  3385. /* We shouldn't see this */
  3386. if (sig_ratio < 1)
  3387. return 0;
  3388. /* Use table for ratios 1:1 - 99:1 */
  3389. return (int)ratio2dB[sig_ratio];
  3390. }
  3391. #define PERFECT_RSSI (-20) /* dBm */
  3392. #define WORST_RSSI (-95) /* dBm */
  3393. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3394. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3395. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3396. * about formulas used below. */
  3397. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3398. {
  3399. int sig_qual;
  3400. int degradation = PERFECT_RSSI - rssi_dbm;
  3401. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3402. * as indicator; formula is (signal dbm - noise dbm).
  3403. * SNR at or above 40 is a great signal (100%).
  3404. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3405. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3406. if (noise_dbm) {
  3407. if (rssi_dbm - noise_dbm >= 40)
  3408. return 100;
  3409. else if (rssi_dbm < noise_dbm)
  3410. return 0;
  3411. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3412. /* Else use just the signal level.
  3413. * This formula is a least squares fit of data points collected and
  3414. * compared with a reference system that had a percentage (%) display
  3415. * for signal quality. */
  3416. } else
  3417. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3418. (15 * RSSI_RANGE + 62 * degradation)) /
  3419. (RSSI_RANGE * RSSI_RANGE);
  3420. if (sig_qual > 100)
  3421. sig_qual = 100;
  3422. else if (sig_qual < 1)
  3423. sig_qual = 0;
  3424. return sig_qual;
  3425. }
  3426. /**
  3427. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3428. *
  3429. * Uses the priv->rx_handlers callback function array to invoke
  3430. * the appropriate handlers, including command responses,
  3431. * frame-received notifications, and other notifications.
  3432. */
  3433. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3434. {
  3435. struct iwl4965_rx_mem_buffer *rxb;
  3436. struct iwl4965_rx_packet *pkt;
  3437. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3438. u32 r, i;
  3439. int reclaim;
  3440. unsigned long flags;
  3441. u8 fill_rx = 0;
  3442. u32 count = 8;
  3443. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3444. * buffer that the driver may process (last buffer filled by ucode). */
  3445. r = iwl4965_hw_get_rx_read(priv);
  3446. i = rxq->read;
  3447. /* Rx interrupt, but nothing sent from uCode */
  3448. if (i == r)
  3449. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3450. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3451. fill_rx = 1;
  3452. while (i != r) {
  3453. rxb = rxq->queue[i];
  3454. /* If an RXB doesn't have a Rx queue slot associated with it,
  3455. * then a bug has been introduced in the queue refilling
  3456. * routines -- catch it here */
  3457. BUG_ON(rxb == NULL);
  3458. rxq->queue[i] = NULL;
  3459. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3460. priv->hw_setting.rx_buf_size,
  3461. PCI_DMA_FROMDEVICE);
  3462. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3463. /* Reclaim a command buffer only if this packet is a response
  3464. * to a (driver-originated) command.
  3465. * If the packet (e.g. Rx frame) originated from uCode,
  3466. * there is no command buffer to reclaim.
  3467. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3468. * but apparently a few don't get set; catch them here. */
  3469. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3470. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3471. (pkt->hdr.cmd != REPLY_RX) &&
  3472. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3473. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3474. (pkt->hdr.cmd != REPLY_TX);
  3475. /* Based on type of command response or notification,
  3476. * handle those that need handling via function in
  3477. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3478. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3479. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3480. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3481. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3482. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3483. } else {
  3484. /* No handling needed */
  3485. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3486. "r %d i %d No handler needed for %s, 0x%02x\n",
  3487. r, i, get_cmd_string(pkt->hdr.cmd),
  3488. pkt->hdr.cmd);
  3489. }
  3490. if (reclaim) {
  3491. /* Invoke any callbacks, transfer the skb to caller, and
  3492. * fire off the (possibly) blocking iwl_send_cmd()
  3493. * as we reclaim the driver command queue */
  3494. if (rxb && rxb->skb)
  3495. iwl4965_tx_cmd_complete(priv, rxb);
  3496. else
  3497. IWL_WARNING("Claim null rxb?\n");
  3498. }
  3499. /* For now we just don't re-use anything. We can tweak this
  3500. * later to try and re-use notification packets and SKBs that
  3501. * fail to Rx correctly */
  3502. if (rxb->skb != NULL) {
  3503. priv->alloc_rxb_skb--;
  3504. dev_kfree_skb_any(rxb->skb);
  3505. rxb->skb = NULL;
  3506. }
  3507. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3508. priv->hw_setting.rx_buf_size,
  3509. PCI_DMA_FROMDEVICE);
  3510. spin_lock_irqsave(&rxq->lock, flags);
  3511. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3512. spin_unlock_irqrestore(&rxq->lock, flags);
  3513. i = (i + 1) & RX_QUEUE_MASK;
  3514. /* If there are a lot of unused frames,
  3515. * restock the Rx queue so ucode wont assert. */
  3516. if (fill_rx) {
  3517. count++;
  3518. if (count >= 8) {
  3519. priv->rxq.read = i;
  3520. __iwl4965_rx_replenish(priv);
  3521. count = 0;
  3522. }
  3523. }
  3524. }
  3525. /* Backtrack one entry */
  3526. priv->rxq.read = i;
  3527. iwl4965_rx_queue_restock(priv);
  3528. }
  3529. /**
  3530. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3531. */
  3532. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3533. struct iwl4965_tx_queue *txq)
  3534. {
  3535. u32 reg = 0;
  3536. int rc = 0;
  3537. int txq_id = txq->q.id;
  3538. if (txq->need_update == 0)
  3539. return rc;
  3540. /* if we're trying to save power */
  3541. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3542. /* wake up nic if it's powered down ...
  3543. * uCode will wake up, and interrupt us again, so next
  3544. * time we'll skip this part. */
  3545. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3546. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3547. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3548. iwl_set_bit(priv, CSR_GP_CNTRL,
  3549. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3550. return rc;
  3551. }
  3552. /* restore this queue's parameters in nic hardware. */
  3553. rc = iwl_grab_nic_access(priv);
  3554. if (rc)
  3555. return rc;
  3556. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3557. txq->q.write_ptr | (txq_id << 8));
  3558. iwl_release_nic_access(priv);
  3559. /* else not in power-save mode, uCode will never sleep when we're
  3560. * trying to tx (during RFKILL, we're not trying to tx). */
  3561. } else
  3562. iwl_write32(priv, HBUS_TARG_WRPTR,
  3563. txq->q.write_ptr | (txq_id << 8));
  3564. txq->need_update = 0;
  3565. return rc;
  3566. }
  3567. #ifdef CONFIG_IWLWIFI_DEBUG
  3568. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3569. {
  3570. DECLARE_MAC_BUF(mac);
  3571. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3572. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3573. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3574. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3575. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3576. le32_to_cpu(rxon->filter_flags));
  3577. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3578. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3579. rxon->ofdm_basic_rates);
  3580. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3581. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3582. print_mac(mac, rxon->node_addr));
  3583. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3584. print_mac(mac, rxon->bssid_addr));
  3585. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3586. }
  3587. #endif
  3588. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3589. {
  3590. IWL_DEBUG_ISR("Enabling interrupts\n");
  3591. set_bit(STATUS_INT_ENABLED, &priv->status);
  3592. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3593. }
  3594. /* call this function to flush any scheduled tasklet */
  3595. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3596. {
  3597. /* wait to make sure we flush pedding tasklet*/
  3598. synchronize_irq(priv->pci_dev->irq);
  3599. tasklet_kill(&priv->irq_tasklet);
  3600. }
  3601. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3602. {
  3603. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3604. /* disable interrupts from uCode/NIC to host */
  3605. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3606. /* acknowledge/clear/reset any interrupts still pending
  3607. * from uCode or flow handler (Rx/Tx DMA) */
  3608. iwl_write32(priv, CSR_INT, 0xffffffff);
  3609. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3610. IWL_DEBUG_ISR("Disabled interrupts\n");
  3611. }
  3612. static const char *desc_lookup(int i)
  3613. {
  3614. switch (i) {
  3615. case 1:
  3616. return "FAIL";
  3617. case 2:
  3618. return "BAD_PARAM";
  3619. case 3:
  3620. return "BAD_CHECKSUM";
  3621. case 4:
  3622. return "NMI_INTERRUPT";
  3623. case 5:
  3624. return "SYSASSERT";
  3625. case 6:
  3626. return "FATAL_ERROR";
  3627. }
  3628. return "UNKNOWN";
  3629. }
  3630. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3631. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3632. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3633. {
  3634. u32 data2, line;
  3635. u32 desc, time, count, base, data1;
  3636. u32 blink1, blink2, ilink1, ilink2;
  3637. int rc;
  3638. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3639. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3640. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3641. return;
  3642. }
  3643. rc = iwl_grab_nic_access(priv);
  3644. if (rc) {
  3645. IWL_WARNING("Can not read from adapter at this time.\n");
  3646. return;
  3647. }
  3648. count = iwl_read_targ_mem(priv, base);
  3649. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3650. IWL_ERROR("Start IWL Error Log Dump:\n");
  3651. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3652. }
  3653. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3654. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3655. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3656. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3657. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3658. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3659. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3660. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3661. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3662. IWL_ERROR("Desc Time "
  3663. "data1 data2 line\n");
  3664. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3665. desc_lookup(desc), desc, time, data1, data2, line);
  3666. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3667. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3668. ilink1, ilink2);
  3669. iwl_release_nic_access(priv);
  3670. }
  3671. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3672. /**
  3673. * iwl4965_print_event_log - Dump error event log to syslog
  3674. *
  3675. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3676. */
  3677. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3678. u32 num_events, u32 mode)
  3679. {
  3680. u32 i;
  3681. u32 base; /* SRAM byte address of event log header */
  3682. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3683. u32 ptr; /* SRAM byte address of log data */
  3684. u32 ev, time, data; /* event log data */
  3685. if (num_events == 0)
  3686. return;
  3687. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3688. if (mode == 0)
  3689. event_size = 2 * sizeof(u32);
  3690. else
  3691. event_size = 3 * sizeof(u32);
  3692. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3693. /* "time" is actually "data" for mode 0 (no timestamp).
  3694. * place event id # at far right for easier visual parsing. */
  3695. for (i = 0; i < num_events; i++) {
  3696. ev = iwl_read_targ_mem(priv, ptr);
  3697. ptr += sizeof(u32);
  3698. time = iwl_read_targ_mem(priv, ptr);
  3699. ptr += sizeof(u32);
  3700. if (mode == 0)
  3701. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3702. else {
  3703. data = iwl_read_targ_mem(priv, ptr);
  3704. ptr += sizeof(u32);
  3705. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3706. }
  3707. }
  3708. }
  3709. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3710. {
  3711. int rc;
  3712. u32 base; /* SRAM byte address of event log header */
  3713. u32 capacity; /* event log capacity in # entries */
  3714. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3715. u32 num_wraps; /* # times uCode wrapped to top of log */
  3716. u32 next_entry; /* index of next entry to be written by uCode */
  3717. u32 size; /* # entries that we'll print */
  3718. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3719. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3720. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3721. return;
  3722. }
  3723. rc = iwl_grab_nic_access(priv);
  3724. if (rc) {
  3725. IWL_WARNING("Can not read from adapter at this time.\n");
  3726. return;
  3727. }
  3728. /* event log header */
  3729. capacity = iwl_read_targ_mem(priv, base);
  3730. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3731. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3732. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3733. size = num_wraps ? capacity : next_entry;
  3734. /* bail out if nothing in log */
  3735. if (size == 0) {
  3736. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3737. iwl_release_nic_access(priv);
  3738. return;
  3739. }
  3740. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3741. size, num_wraps);
  3742. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3743. * i.e the next one that uCode would fill. */
  3744. if (num_wraps)
  3745. iwl4965_print_event_log(priv, next_entry,
  3746. capacity - next_entry, mode);
  3747. /* (then/else) start at top of log */
  3748. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3749. iwl_release_nic_access(priv);
  3750. }
  3751. /**
  3752. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3753. */
  3754. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3755. {
  3756. /* Set the FW error flag -- cleared on iwl4965_down */
  3757. set_bit(STATUS_FW_ERROR, &priv->status);
  3758. /* Cancel currently queued command. */
  3759. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3760. #ifdef CONFIG_IWLWIFI_DEBUG
  3761. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3762. iwl4965_dump_nic_error_log(priv);
  3763. iwl4965_dump_nic_event_log(priv);
  3764. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3765. }
  3766. #endif
  3767. wake_up_interruptible(&priv->wait_command_queue);
  3768. /* Keep the restart process from trying to send host
  3769. * commands by clearing the INIT status bit */
  3770. clear_bit(STATUS_READY, &priv->status);
  3771. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3772. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3773. "Restarting adapter due to uCode error.\n");
  3774. if (iwl4965_is_associated(priv)) {
  3775. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3776. sizeof(priv->recovery_rxon));
  3777. priv->error_recovering = 1;
  3778. }
  3779. queue_work(priv->workqueue, &priv->restart);
  3780. }
  3781. }
  3782. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3783. {
  3784. unsigned long flags;
  3785. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3786. sizeof(priv->staging_rxon));
  3787. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3788. iwl4965_commit_rxon(priv);
  3789. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3790. spin_lock_irqsave(&priv->lock, flags);
  3791. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3792. priv->error_recovering = 0;
  3793. spin_unlock_irqrestore(&priv->lock, flags);
  3794. }
  3795. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3796. {
  3797. u32 inta, handled = 0;
  3798. u32 inta_fh;
  3799. unsigned long flags;
  3800. #ifdef CONFIG_IWLWIFI_DEBUG
  3801. u32 inta_mask;
  3802. #endif
  3803. spin_lock_irqsave(&priv->lock, flags);
  3804. /* Ack/clear/reset pending uCode interrupts.
  3805. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3806. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3807. inta = iwl_read32(priv, CSR_INT);
  3808. iwl_write32(priv, CSR_INT, inta);
  3809. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3810. * Any new interrupts that happen after this, either while we're
  3811. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3812. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3813. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3814. #ifdef CONFIG_IWLWIFI_DEBUG
  3815. if (iwl_debug_level & IWL_DL_ISR) {
  3816. /* just for debug */
  3817. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3818. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3819. inta, inta_mask, inta_fh);
  3820. }
  3821. #endif
  3822. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3823. * atomic, make sure that inta covers all the interrupts that
  3824. * we've discovered, even if FH interrupt came in just after
  3825. * reading CSR_INT. */
  3826. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3827. inta |= CSR_INT_BIT_FH_RX;
  3828. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3829. inta |= CSR_INT_BIT_FH_TX;
  3830. /* Now service all interrupt bits discovered above. */
  3831. if (inta & CSR_INT_BIT_HW_ERR) {
  3832. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3833. /* Tell the device to stop sending interrupts */
  3834. iwl4965_disable_interrupts(priv);
  3835. iwl4965_irq_handle_error(priv);
  3836. handled |= CSR_INT_BIT_HW_ERR;
  3837. spin_unlock_irqrestore(&priv->lock, flags);
  3838. return;
  3839. }
  3840. #ifdef CONFIG_IWLWIFI_DEBUG
  3841. if (iwl_debug_level & (IWL_DL_ISR)) {
  3842. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3843. if (inta & CSR_INT_BIT_SCD)
  3844. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3845. "the frame/frames.\n");
  3846. /* Alive notification via Rx interrupt will do the real work */
  3847. if (inta & CSR_INT_BIT_ALIVE)
  3848. IWL_DEBUG_ISR("Alive interrupt\n");
  3849. }
  3850. #endif
  3851. /* Safely ignore these bits for debug checks below */
  3852. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3853. /* HW RF KILL switch toggled */
  3854. if (inta & CSR_INT_BIT_RF_KILL) {
  3855. int hw_rf_kill = 0;
  3856. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3857. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3858. hw_rf_kill = 1;
  3859. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3860. "RF_KILL bit toggled to %s.\n",
  3861. hw_rf_kill ? "disable radio":"enable radio");
  3862. /* Queue restart only if RF_KILL switch was set to "kill"
  3863. * when we loaded driver, and is now set to "enable".
  3864. * After we're Alive, RF_KILL gets handled by
  3865. * iwl4965_rx_card_state_notif() */
  3866. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3867. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3868. queue_work(priv->workqueue, &priv->restart);
  3869. }
  3870. handled |= CSR_INT_BIT_RF_KILL;
  3871. }
  3872. /* Chip got too hot and stopped itself */
  3873. if (inta & CSR_INT_BIT_CT_KILL) {
  3874. IWL_ERROR("Microcode CT kill error detected.\n");
  3875. handled |= CSR_INT_BIT_CT_KILL;
  3876. }
  3877. /* Error detected by uCode */
  3878. if (inta & CSR_INT_BIT_SW_ERR) {
  3879. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3880. inta);
  3881. iwl4965_irq_handle_error(priv);
  3882. handled |= CSR_INT_BIT_SW_ERR;
  3883. }
  3884. /* uCode wakes up after power-down sleep */
  3885. if (inta & CSR_INT_BIT_WAKEUP) {
  3886. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3887. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3888. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3889. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3890. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3891. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3892. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3893. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3894. handled |= CSR_INT_BIT_WAKEUP;
  3895. }
  3896. /* All uCode command responses, including Tx command responses,
  3897. * Rx "responses" (frame-received notification), and other
  3898. * notifications from uCode come through here*/
  3899. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3900. iwl4965_rx_handle(priv);
  3901. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3902. }
  3903. if (inta & CSR_INT_BIT_FH_TX) {
  3904. IWL_DEBUG_ISR("Tx interrupt\n");
  3905. handled |= CSR_INT_BIT_FH_TX;
  3906. }
  3907. if (inta & ~handled)
  3908. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3909. if (inta & ~CSR_INI_SET_MASK) {
  3910. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3911. inta & ~CSR_INI_SET_MASK);
  3912. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3913. }
  3914. /* Re-enable all interrupts */
  3915. /* only Re-enable if diabled by irq */
  3916. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3917. iwl4965_enable_interrupts(priv);
  3918. #ifdef CONFIG_IWLWIFI_DEBUG
  3919. if (iwl_debug_level & (IWL_DL_ISR)) {
  3920. inta = iwl_read32(priv, CSR_INT);
  3921. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3922. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3923. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3924. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3925. }
  3926. #endif
  3927. spin_unlock_irqrestore(&priv->lock, flags);
  3928. }
  3929. static irqreturn_t iwl4965_isr(int irq, void *data)
  3930. {
  3931. struct iwl_priv *priv = data;
  3932. u32 inta, inta_mask;
  3933. u32 inta_fh;
  3934. if (!priv)
  3935. return IRQ_NONE;
  3936. spin_lock(&priv->lock);
  3937. /* Disable (but don't clear!) interrupts here to avoid
  3938. * back-to-back ISRs and sporadic interrupts from our NIC.
  3939. * If we have something to service, the tasklet will re-enable ints.
  3940. * If we *don't* have something, we'll re-enable before leaving here. */
  3941. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3942. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3943. /* Discover which interrupts are active/pending */
  3944. inta = iwl_read32(priv, CSR_INT);
  3945. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3946. /* Ignore interrupt if there's nothing in NIC to service.
  3947. * This may be due to IRQ shared with another device,
  3948. * or due to sporadic interrupts thrown from our NIC. */
  3949. if (!inta && !inta_fh) {
  3950. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3951. goto none;
  3952. }
  3953. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3954. /* Hardware disappeared. It might have already raised
  3955. * an interrupt */
  3956. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3957. goto unplugged;
  3958. }
  3959. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3960. inta, inta_mask, inta_fh);
  3961. inta &= ~CSR_INT_BIT_SCD;
  3962. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3963. if (likely(inta || inta_fh))
  3964. tasklet_schedule(&priv->irq_tasklet);
  3965. unplugged:
  3966. spin_unlock(&priv->lock);
  3967. return IRQ_HANDLED;
  3968. none:
  3969. /* re-enable interrupts here since we don't have anything to service. */
  3970. /* only Re-enable if diabled by irq */
  3971. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3972. iwl4965_enable_interrupts(priv);
  3973. spin_unlock(&priv->lock);
  3974. return IRQ_NONE;
  3975. }
  3976. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3977. * sending probe req. This should be set long enough to hear probe responses
  3978. * from more than one AP. */
  3979. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3980. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3981. /* For faster active scanning, scan will move to the next channel if fewer than
  3982. * PLCP_QUIET_THRESH packets are heard on this channel within
  3983. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3984. * time if it's a quiet channel (nothing responded to our probe, and there's
  3985. * no other traffic).
  3986. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3987. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3988. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3989. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3990. * Must be set longer than active dwell time.
  3991. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3992. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3993. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3994. #define IWL_PASSIVE_DWELL_BASE (100)
  3995. #define IWL_CHANNEL_TUNE_TIME 5
  3996. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3997. enum ieee80211_band band)
  3998. {
  3999. if (band == IEEE80211_BAND_5GHZ)
  4000. return IWL_ACTIVE_DWELL_TIME_52;
  4001. else
  4002. return IWL_ACTIVE_DWELL_TIME_24;
  4003. }
  4004. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  4005. enum ieee80211_band band)
  4006. {
  4007. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4008. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4009. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4010. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4011. if (iwl4965_is_associated(priv)) {
  4012. /* If we're associated, we clamp the maximum passive
  4013. * dwell time to be 98% of the beacon interval (minus
  4014. * 2 * channel tune time) */
  4015. passive = priv->beacon_int;
  4016. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4017. passive = IWL_PASSIVE_DWELL_BASE;
  4018. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4019. }
  4020. if (passive <= active)
  4021. passive = active + 1;
  4022. return passive;
  4023. }
  4024. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4025. enum ieee80211_band band,
  4026. u8 is_active, u8 direct_mask,
  4027. struct iwl4965_scan_channel *scan_ch)
  4028. {
  4029. const struct ieee80211_channel *channels = NULL;
  4030. const struct ieee80211_supported_band *sband;
  4031. const struct iwl_channel_info *ch_info;
  4032. u16 passive_dwell = 0;
  4033. u16 active_dwell = 0;
  4034. int added, i;
  4035. sband = iwl4965_get_hw_mode(priv, band);
  4036. if (!sband)
  4037. return 0;
  4038. channels = sband->channels;
  4039. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4040. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4041. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4042. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4043. le16_to_cpu(priv->active_rxon.channel)) {
  4044. if (iwl4965_is_associated(priv)) {
  4045. IWL_DEBUG_SCAN
  4046. ("Skipping current channel %d\n",
  4047. le16_to_cpu(priv->active_rxon.channel));
  4048. continue;
  4049. }
  4050. } else if (priv->only_active_channel)
  4051. continue;
  4052. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4053. ch_info = iwl_get_channel_info(priv, band,
  4054. scan_ch->channel);
  4055. if (!is_channel_valid(ch_info)) {
  4056. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4057. scan_ch->channel);
  4058. continue;
  4059. }
  4060. if (!is_active || is_channel_passive(ch_info) ||
  4061. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4062. scan_ch->type = 0; /* passive */
  4063. else
  4064. scan_ch->type = 1; /* active */
  4065. if (scan_ch->type & 1)
  4066. scan_ch->type |= (direct_mask << 1);
  4067. if (is_channel_narrow(ch_info))
  4068. scan_ch->type |= (1 << 7);
  4069. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4070. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4071. /* Set txpower levels to defaults */
  4072. scan_ch->tpc.dsp_atten = 110;
  4073. /* scan_pwr_info->tpc.dsp_atten; */
  4074. /*scan_pwr_info->tpc.tx_gain; */
  4075. if (band == IEEE80211_BAND_5GHZ)
  4076. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4077. else {
  4078. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4079. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4080. * power level:
  4081. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4082. */
  4083. }
  4084. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4085. scan_ch->channel,
  4086. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4087. (scan_ch->type & 1) ?
  4088. active_dwell : passive_dwell);
  4089. scan_ch++;
  4090. added++;
  4091. }
  4092. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4093. return added;
  4094. }
  4095. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4096. struct ieee80211_rate *rates)
  4097. {
  4098. int i;
  4099. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4100. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4101. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4102. rates[i].hw_value_short = i;
  4103. rates[i].flags = 0;
  4104. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4105. /*
  4106. * If CCK != 1M then set short preamble rate flag.
  4107. */
  4108. rates[i].flags |=
  4109. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4110. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4111. }
  4112. }
  4113. }
  4114. /**
  4115. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4116. */
  4117. int iwl4965_init_geos(struct iwl_priv *priv)
  4118. {
  4119. struct iwl_channel_info *ch;
  4120. struct ieee80211_supported_band *sband;
  4121. struct ieee80211_channel *channels;
  4122. struct ieee80211_channel *geo_ch;
  4123. struct ieee80211_rate *rates;
  4124. int i = 0;
  4125. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4126. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4127. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4128. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4129. return 0;
  4130. }
  4131. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4132. priv->channel_count, GFP_KERNEL);
  4133. if (!channels)
  4134. return -ENOMEM;
  4135. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4136. GFP_KERNEL);
  4137. if (!rates) {
  4138. kfree(channels);
  4139. return -ENOMEM;
  4140. }
  4141. /* 5.2GHz channels start after the 2.4GHz channels */
  4142. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4143. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4144. /* just OFDM */
  4145. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4146. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4147. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4148. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4149. sband->channels = channels;
  4150. /* OFDM & CCK */
  4151. sband->bitrates = rates;
  4152. sband->n_bitrates = IWL_RATE_COUNT;
  4153. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4154. priv->ieee_channels = channels;
  4155. priv->ieee_rates = rates;
  4156. iwl4965_init_hw_rates(priv, rates);
  4157. for (i = 0; i < priv->channel_count; i++) {
  4158. ch = &priv->channel_info[i];
  4159. /* FIXME: might be removed if scan is OK */
  4160. if (!is_channel_valid(ch))
  4161. continue;
  4162. if (is_channel_a_band(ch))
  4163. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4164. else
  4165. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4166. geo_ch = &sband->channels[sband->n_channels++];
  4167. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4168. geo_ch->max_power = ch->max_power_avg;
  4169. geo_ch->max_antenna_gain = 0xff;
  4170. geo_ch->hw_value = ch->channel;
  4171. if (is_channel_valid(ch)) {
  4172. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4173. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4174. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4175. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4176. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4177. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4178. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4179. priv->max_channel_txpower_limit =
  4180. ch->max_power_avg;
  4181. } else {
  4182. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4183. }
  4184. /* Save flags for reg domain usage */
  4185. geo_ch->orig_flags = geo_ch->flags;
  4186. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4187. ch->channel, geo_ch->center_freq,
  4188. is_channel_a_band(ch) ? "5.2" : "2.4",
  4189. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4190. "restricted" : "valid",
  4191. geo_ch->flags);
  4192. }
  4193. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4194. priv->cfg->sku & IWL_SKU_A) {
  4195. printk(KERN_INFO DRV_NAME
  4196. ": Incorrectly detected BG card as ABG. Please send "
  4197. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4198. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4199. priv->cfg->sku &= ~IWL_SKU_A;
  4200. }
  4201. printk(KERN_INFO DRV_NAME
  4202. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4203. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4204. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4205. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4206. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4207. &priv->bands[IEEE80211_BAND_2GHZ];
  4208. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4209. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4210. &priv->bands[IEEE80211_BAND_5GHZ];
  4211. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4212. return 0;
  4213. }
  4214. /*
  4215. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4216. */
  4217. void iwl4965_free_geos(struct iwl_priv *priv)
  4218. {
  4219. kfree(priv->ieee_channels);
  4220. kfree(priv->ieee_rates);
  4221. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4222. }
  4223. /******************************************************************************
  4224. *
  4225. * uCode download functions
  4226. *
  4227. ******************************************************************************/
  4228. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4229. {
  4230. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4231. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4232. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4233. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4234. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4235. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4236. }
  4237. /**
  4238. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4239. * looking at all data.
  4240. */
  4241. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4242. u32 len)
  4243. {
  4244. u32 val;
  4245. u32 save_len = len;
  4246. int rc = 0;
  4247. u32 errcnt;
  4248. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4249. rc = iwl_grab_nic_access(priv);
  4250. if (rc)
  4251. return rc;
  4252. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4253. errcnt = 0;
  4254. for (; len > 0; len -= sizeof(u32), image++) {
  4255. /* read data comes through single port, auto-incr addr */
  4256. /* NOTE: Use the debugless read so we don't flood kernel log
  4257. * if IWL_DL_IO is set */
  4258. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4259. if (val != le32_to_cpu(*image)) {
  4260. IWL_ERROR("uCode INST section is invalid at "
  4261. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4262. save_len - len, val, le32_to_cpu(*image));
  4263. rc = -EIO;
  4264. errcnt++;
  4265. if (errcnt >= 20)
  4266. break;
  4267. }
  4268. }
  4269. iwl_release_nic_access(priv);
  4270. if (!errcnt)
  4271. IWL_DEBUG_INFO
  4272. ("ucode image in INSTRUCTION memory is good\n");
  4273. return rc;
  4274. }
  4275. /**
  4276. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4277. * using sample data 100 bytes apart. If these sample points are good,
  4278. * it's a pretty good bet that everything between them is good, too.
  4279. */
  4280. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4281. {
  4282. u32 val;
  4283. int rc = 0;
  4284. u32 errcnt = 0;
  4285. u32 i;
  4286. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4287. rc = iwl_grab_nic_access(priv);
  4288. if (rc)
  4289. return rc;
  4290. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4291. /* read data comes through single port, auto-incr addr */
  4292. /* NOTE: Use the debugless read so we don't flood kernel log
  4293. * if IWL_DL_IO is set */
  4294. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4295. i + RTC_INST_LOWER_BOUND);
  4296. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4297. if (val != le32_to_cpu(*image)) {
  4298. #if 0 /* Enable this if you want to see details */
  4299. IWL_ERROR("uCode INST section is invalid at "
  4300. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4301. i, val, *image);
  4302. #endif
  4303. rc = -EIO;
  4304. errcnt++;
  4305. if (errcnt >= 3)
  4306. break;
  4307. }
  4308. }
  4309. iwl_release_nic_access(priv);
  4310. return rc;
  4311. }
  4312. /**
  4313. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4314. * and verify its contents
  4315. */
  4316. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4317. {
  4318. __le32 *image;
  4319. u32 len;
  4320. int rc = 0;
  4321. /* Try bootstrap */
  4322. image = (__le32 *)priv->ucode_boot.v_addr;
  4323. len = priv->ucode_boot.len;
  4324. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4325. if (rc == 0) {
  4326. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4327. return 0;
  4328. }
  4329. /* Try initialize */
  4330. image = (__le32 *)priv->ucode_init.v_addr;
  4331. len = priv->ucode_init.len;
  4332. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4333. if (rc == 0) {
  4334. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4335. return 0;
  4336. }
  4337. /* Try runtime/protocol */
  4338. image = (__le32 *)priv->ucode_code.v_addr;
  4339. len = priv->ucode_code.len;
  4340. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4341. if (rc == 0) {
  4342. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4343. return 0;
  4344. }
  4345. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4346. /* Since nothing seems to match, show first several data entries in
  4347. * instruction SRAM, so maybe visual inspection will give a clue.
  4348. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4349. image = (__le32 *)priv->ucode_boot.v_addr;
  4350. len = priv->ucode_boot.len;
  4351. rc = iwl4965_verify_inst_full(priv, image, len);
  4352. return rc;
  4353. }
  4354. /* check contents of special bootstrap uCode SRAM */
  4355. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4356. {
  4357. __le32 *image = priv->ucode_boot.v_addr;
  4358. u32 len = priv->ucode_boot.len;
  4359. u32 reg;
  4360. u32 val;
  4361. IWL_DEBUG_INFO("Begin verify bsm\n");
  4362. /* verify BSM SRAM contents */
  4363. val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4364. for (reg = BSM_SRAM_LOWER_BOUND;
  4365. reg < BSM_SRAM_LOWER_BOUND + len;
  4366. reg += sizeof(u32), image ++) {
  4367. val = iwl_read_prph(priv, reg);
  4368. if (val != le32_to_cpu(*image)) {
  4369. IWL_ERROR("BSM uCode verification failed at "
  4370. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4371. BSM_SRAM_LOWER_BOUND,
  4372. reg - BSM_SRAM_LOWER_BOUND, len,
  4373. val, le32_to_cpu(*image));
  4374. return -EIO;
  4375. }
  4376. }
  4377. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4378. return 0;
  4379. }
  4380. /**
  4381. * iwl4965_load_bsm - Load bootstrap instructions
  4382. *
  4383. * BSM operation:
  4384. *
  4385. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4386. * in special SRAM that does not power down during RFKILL. When powering back
  4387. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4388. * the bootstrap program into the on-board processor, and starts it.
  4389. *
  4390. * The bootstrap program loads (via DMA) instructions and data for a new
  4391. * program from host DRAM locations indicated by the host driver in the
  4392. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4393. * automatically.
  4394. *
  4395. * When initializing the NIC, the host driver points the BSM to the
  4396. * "initialize" uCode image. This uCode sets up some internal data, then
  4397. * notifies host via "initialize alive" that it is complete.
  4398. *
  4399. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4400. * normal runtime uCode instructions and a backup uCode data cache buffer
  4401. * (filled initially with starting data values for the on-board processor),
  4402. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4403. * which begins normal operation.
  4404. *
  4405. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4406. * the backup data cache in DRAM before SRAM is powered down.
  4407. *
  4408. * When powering back up, the BSM loads the bootstrap program. This reloads
  4409. * the runtime uCode instructions and the backup data cache into SRAM,
  4410. * and re-launches the runtime uCode from where it left off.
  4411. */
  4412. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4413. {
  4414. __le32 *image = priv->ucode_boot.v_addr;
  4415. u32 len = priv->ucode_boot.len;
  4416. dma_addr_t pinst;
  4417. dma_addr_t pdata;
  4418. u32 inst_len;
  4419. u32 data_len;
  4420. int rc;
  4421. int i;
  4422. u32 done;
  4423. u32 reg_offset;
  4424. IWL_DEBUG_INFO("Begin load bsm\n");
  4425. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4426. if (len > IWL_MAX_BSM_SIZE)
  4427. return -EINVAL;
  4428. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4429. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4430. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4431. * after the "initialize" uCode has run, to point to
  4432. * runtime/protocol instructions and backup data cache. */
  4433. pinst = priv->ucode_init.p_addr >> 4;
  4434. pdata = priv->ucode_init_data.p_addr >> 4;
  4435. inst_len = priv->ucode_init.len;
  4436. data_len = priv->ucode_init_data.len;
  4437. rc = iwl_grab_nic_access(priv);
  4438. if (rc)
  4439. return rc;
  4440. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4441. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4442. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4443. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4444. /* Fill BSM memory with bootstrap instructions */
  4445. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4446. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4447. reg_offset += sizeof(u32), image++)
  4448. _iwl_write_prph(priv, reg_offset,
  4449. le32_to_cpu(*image));
  4450. rc = iwl4965_verify_bsm(priv);
  4451. if (rc) {
  4452. iwl_release_nic_access(priv);
  4453. return rc;
  4454. }
  4455. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4456. iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4457. iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
  4458. RTC_INST_LOWER_BOUND);
  4459. iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4460. /* Load bootstrap code into instruction SRAM now,
  4461. * to prepare to load "initialize" uCode */
  4462. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4463. BSM_WR_CTRL_REG_BIT_START);
  4464. /* Wait for load of bootstrap uCode to finish */
  4465. for (i = 0; i < 100; i++) {
  4466. done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
  4467. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4468. break;
  4469. udelay(10);
  4470. }
  4471. if (i < 100)
  4472. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4473. else {
  4474. IWL_ERROR("BSM write did not complete!\n");
  4475. return -EIO;
  4476. }
  4477. /* Enable future boot loads whenever power management unit triggers it
  4478. * (e.g. when powering back up after power-save shutdown) */
  4479. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4480. BSM_WR_CTRL_REG_BIT_START_EN);
  4481. iwl_release_nic_access(priv);
  4482. return 0;
  4483. }
  4484. static void iwl4965_nic_start(struct iwl_priv *priv)
  4485. {
  4486. /* Remove all resets to allow NIC to operate */
  4487. iwl_write32(priv, CSR_RESET, 0);
  4488. }
  4489. /**
  4490. * iwl4965_read_ucode - Read uCode images from disk file.
  4491. *
  4492. * Copy into buffers for card to fetch via bus-mastering
  4493. */
  4494. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4495. {
  4496. struct iwl4965_ucode *ucode;
  4497. int ret;
  4498. const struct firmware *ucode_raw;
  4499. const char *name = priv->cfg->fw_name;
  4500. u8 *src;
  4501. size_t len;
  4502. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4503. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4504. * request_firmware() is synchronous, file is in memory on return. */
  4505. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4506. if (ret < 0) {
  4507. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4508. name, ret);
  4509. goto error;
  4510. }
  4511. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4512. name, ucode_raw->size);
  4513. /* Make sure that we got at least our header! */
  4514. if (ucode_raw->size < sizeof(*ucode)) {
  4515. IWL_ERROR("File size way too small!\n");
  4516. ret = -EINVAL;
  4517. goto err_release;
  4518. }
  4519. /* Data from ucode file: header followed by uCode images */
  4520. ucode = (void *)ucode_raw->data;
  4521. ver = le32_to_cpu(ucode->ver);
  4522. inst_size = le32_to_cpu(ucode->inst_size);
  4523. data_size = le32_to_cpu(ucode->data_size);
  4524. init_size = le32_to_cpu(ucode->init_size);
  4525. init_data_size = le32_to_cpu(ucode->init_data_size);
  4526. boot_size = le32_to_cpu(ucode->boot_size);
  4527. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4528. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4529. inst_size);
  4530. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4531. data_size);
  4532. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4533. init_size);
  4534. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4535. init_data_size);
  4536. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4537. boot_size);
  4538. /* Verify size of file vs. image size info in file's header */
  4539. if (ucode_raw->size < sizeof(*ucode) +
  4540. inst_size + data_size + init_size +
  4541. init_data_size + boot_size) {
  4542. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4543. (int)ucode_raw->size);
  4544. ret = -EINVAL;
  4545. goto err_release;
  4546. }
  4547. /* Verify that uCode images will fit in card's SRAM */
  4548. if (inst_size > IWL_MAX_INST_SIZE) {
  4549. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4550. inst_size);
  4551. ret = -EINVAL;
  4552. goto err_release;
  4553. }
  4554. if (data_size > IWL_MAX_DATA_SIZE) {
  4555. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4556. data_size);
  4557. ret = -EINVAL;
  4558. goto err_release;
  4559. }
  4560. if (init_size > IWL_MAX_INST_SIZE) {
  4561. IWL_DEBUG_INFO
  4562. ("uCode init instr len %d too large to fit in\n",
  4563. init_size);
  4564. ret = -EINVAL;
  4565. goto err_release;
  4566. }
  4567. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4568. IWL_DEBUG_INFO
  4569. ("uCode init data len %d too large to fit in\n",
  4570. init_data_size);
  4571. ret = -EINVAL;
  4572. goto err_release;
  4573. }
  4574. if (boot_size > IWL_MAX_BSM_SIZE) {
  4575. IWL_DEBUG_INFO
  4576. ("uCode boot instr len %d too large to fit in\n",
  4577. boot_size);
  4578. ret = -EINVAL;
  4579. goto err_release;
  4580. }
  4581. /* Allocate ucode buffers for card's bus-master loading ... */
  4582. /* Runtime instructions and 2 copies of data:
  4583. * 1) unmodified from disk
  4584. * 2) backup cache for save/restore during power-downs */
  4585. priv->ucode_code.len = inst_size;
  4586. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4587. priv->ucode_data.len = data_size;
  4588. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4589. priv->ucode_data_backup.len = data_size;
  4590. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4591. /* Initialization instructions and data */
  4592. if (init_size && init_data_size) {
  4593. priv->ucode_init.len = init_size;
  4594. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4595. priv->ucode_init_data.len = init_data_size;
  4596. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4597. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4598. goto err_pci_alloc;
  4599. }
  4600. /* Bootstrap (instructions only, no data) */
  4601. if (boot_size) {
  4602. priv->ucode_boot.len = boot_size;
  4603. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4604. if (!priv->ucode_boot.v_addr)
  4605. goto err_pci_alloc;
  4606. }
  4607. /* Copy images into buffers for card's bus-master reads ... */
  4608. /* Runtime instructions (first block of data in file) */
  4609. src = &ucode->data[0];
  4610. len = priv->ucode_code.len;
  4611. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4612. memcpy(priv->ucode_code.v_addr, src, len);
  4613. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4614. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4615. /* Runtime data (2nd block)
  4616. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4617. src = &ucode->data[inst_size];
  4618. len = priv->ucode_data.len;
  4619. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4620. memcpy(priv->ucode_data.v_addr, src, len);
  4621. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4622. /* Initialization instructions (3rd block) */
  4623. if (init_size) {
  4624. src = &ucode->data[inst_size + data_size];
  4625. len = priv->ucode_init.len;
  4626. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4627. len);
  4628. memcpy(priv->ucode_init.v_addr, src, len);
  4629. }
  4630. /* Initialization data (4th block) */
  4631. if (init_data_size) {
  4632. src = &ucode->data[inst_size + data_size + init_size];
  4633. len = priv->ucode_init_data.len;
  4634. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4635. len);
  4636. memcpy(priv->ucode_init_data.v_addr, src, len);
  4637. }
  4638. /* Bootstrap instructions (5th block) */
  4639. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4640. len = priv->ucode_boot.len;
  4641. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4642. memcpy(priv->ucode_boot.v_addr, src, len);
  4643. /* We have our copies now, allow OS release its copies */
  4644. release_firmware(ucode_raw);
  4645. return 0;
  4646. err_pci_alloc:
  4647. IWL_ERROR("failed to allocate pci memory\n");
  4648. ret = -ENOMEM;
  4649. iwl4965_dealloc_ucode_pci(priv);
  4650. err_release:
  4651. release_firmware(ucode_raw);
  4652. error:
  4653. return ret;
  4654. }
  4655. /**
  4656. * iwl4965_set_ucode_ptrs - Set uCode address location
  4657. *
  4658. * Tell initialization uCode where to find runtime uCode.
  4659. *
  4660. * BSM registers initially contain pointers to initialization uCode.
  4661. * We need to replace them to load runtime uCode inst and data,
  4662. * and to save runtime data when powering down.
  4663. */
  4664. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4665. {
  4666. dma_addr_t pinst;
  4667. dma_addr_t pdata;
  4668. int rc = 0;
  4669. unsigned long flags;
  4670. /* bits 35:4 for 4965 */
  4671. pinst = priv->ucode_code.p_addr >> 4;
  4672. pdata = priv->ucode_data_backup.p_addr >> 4;
  4673. spin_lock_irqsave(&priv->lock, flags);
  4674. rc = iwl_grab_nic_access(priv);
  4675. if (rc) {
  4676. spin_unlock_irqrestore(&priv->lock, flags);
  4677. return rc;
  4678. }
  4679. /* Tell bootstrap uCode where to find image to load */
  4680. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4681. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4682. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4683. priv->ucode_data.len);
  4684. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4685. * that all new ptr/size info is in place */
  4686. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4687. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4688. iwl_release_nic_access(priv);
  4689. spin_unlock_irqrestore(&priv->lock, flags);
  4690. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4691. return rc;
  4692. }
  4693. /**
  4694. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4695. *
  4696. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4697. *
  4698. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4699. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4700. * (3945 does not contain this data).
  4701. *
  4702. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4703. */
  4704. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4705. {
  4706. /* Check alive response for "valid" sign from uCode */
  4707. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4708. /* We had an error bringing up the hardware, so take it
  4709. * all the way back down so we can try again */
  4710. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4711. goto restart;
  4712. }
  4713. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4714. * This is a paranoid check, because we would not have gotten the
  4715. * "initialize" alive if code weren't properly loaded. */
  4716. if (iwl4965_verify_ucode(priv)) {
  4717. /* Runtime instruction load was bad;
  4718. * take it all the way back down so we can try again */
  4719. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4720. goto restart;
  4721. }
  4722. /* Calculate temperature */
  4723. priv->temperature = iwl4965_get_temperature(priv);
  4724. /* Send pointers to protocol/runtime uCode image ... init code will
  4725. * load and launch runtime uCode, which will send us another "Alive"
  4726. * notification. */
  4727. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4728. if (iwl4965_set_ucode_ptrs(priv)) {
  4729. /* Runtime instruction load won't happen;
  4730. * take it all the way back down so we can try again */
  4731. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4732. goto restart;
  4733. }
  4734. return;
  4735. restart:
  4736. queue_work(priv->workqueue, &priv->restart);
  4737. }
  4738. /**
  4739. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4740. * from protocol/runtime uCode (initialization uCode's
  4741. * Alive gets handled by iwl4965_init_alive_start()).
  4742. */
  4743. static void iwl4965_alive_start(struct iwl_priv *priv)
  4744. {
  4745. int rc = 0;
  4746. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4747. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4748. /* We had an error bringing up the hardware, so take it
  4749. * all the way back down so we can try again */
  4750. IWL_DEBUG_INFO("Alive failed.\n");
  4751. goto restart;
  4752. }
  4753. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4754. * This is a paranoid check, because we would not have gotten the
  4755. * "runtime" alive if code weren't properly loaded. */
  4756. if (iwl4965_verify_ucode(priv)) {
  4757. /* Runtime instruction load was bad;
  4758. * take it all the way back down so we can try again */
  4759. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4760. goto restart;
  4761. }
  4762. iwlcore_clear_stations_table(priv);
  4763. rc = iwl4965_alive_notify(priv);
  4764. if (rc) {
  4765. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4766. rc);
  4767. goto restart;
  4768. }
  4769. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4770. set_bit(STATUS_ALIVE, &priv->status);
  4771. /* Clear out the uCode error bit if it is set */
  4772. clear_bit(STATUS_FW_ERROR, &priv->status);
  4773. if (iwl4965_is_rfkill(priv))
  4774. return;
  4775. ieee80211_start_queues(priv->hw);
  4776. priv->active_rate = priv->rates_mask;
  4777. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4778. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4779. if (iwl4965_is_associated(priv)) {
  4780. struct iwl4965_rxon_cmd *active_rxon =
  4781. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4782. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4783. sizeof(priv->staging_rxon));
  4784. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4785. } else {
  4786. /* Initialize our rx_config data */
  4787. iwl4965_connection_init_rx_config(priv);
  4788. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4789. }
  4790. /* Configure Bluetooth device coexistence support */
  4791. iwl4965_send_bt_config(priv);
  4792. /* Configure the adapter for unassociated operation */
  4793. iwl4965_commit_rxon(priv);
  4794. /* At this point, the NIC is initialized and operational */
  4795. priv->notif_missed_beacons = 0;
  4796. iwl4965_rf_kill_ct_config(priv);
  4797. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4798. set_bit(STATUS_READY, &priv->status);
  4799. wake_up_interruptible(&priv->wait_command_queue);
  4800. iwl_leds_register(priv);
  4801. if (priv->error_recovering)
  4802. iwl4965_error_recovery(priv);
  4803. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4804. return;
  4805. restart:
  4806. queue_work(priv->workqueue, &priv->restart);
  4807. }
  4808. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4809. static void __iwl4965_down(struct iwl_priv *priv)
  4810. {
  4811. unsigned long flags;
  4812. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4813. struct ieee80211_conf *conf = NULL;
  4814. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4815. conf = ieee80211_get_hw_conf(priv->hw);
  4816. if (!exit_pending)
  4817. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4818. iwl_leds_unregister(priv);
  4819. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4820. iwlcore_clear_stations_table(priv);
  4821. /* Unblock any waiting calls */
  4822. wake_up_interruptible_all(&priv->wait_command_queue);
  4823. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4824. * exiting the module */
  4825. if (!exit_pending)
  4826. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4827. /* stop and reset the on-board processor */
  4828. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4829. /* tell the device to stop sending interrupts */
  4830. spin_lock_irqsave(&priv->lock, flags);
  4831. iwl4965_disable_interrupts(priv);
  4832. spin_unlock_irqrestore(&priv->lock, flags);
  4833. iwl_synchronize_irq(priv);
  4834. if (priv->mac80211_registered)
  4835. ieee80211_stop_queues(priv->hw);
  4836. /* If we have not previously called iwl4965_init() then
  4837. * clear all bits but the RF Kill and SUSPEND bits and return */
  4838. if (!iwl4965_is_init(priv)) {
  4839. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4840. STATUS_RF_KILL_HW |
  4841. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4842. STATUS_RF_KILL_SW |
  4843. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4844. STATUS_GEO_CONFIGURED |
  4845. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4846. STATUS_IN_SUSPEND;
  4847. goto exit;
  4848. }
  4849. /* ...otherwise clear out all the status bits but the RF Kill and
  4850. * SUSPEND bits and continue taking the NIC down. */
  4851. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4852. STATUS_RF_KILL_HW |
  4853. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4854. STATUS_RF_KILL_SW |
  4855. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4856. STATUS_GEO_CONFIGURED |
  4857. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4858. STATUS_IN_SUSPEND |
  4859. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4860. STATUS_FW_ERROR;
  4861. spin_lock_irqsave(&priv->lock, flags);
  4862. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4863. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4864. spin_unlock_irqrestore(&priv->lock, flags);
  4865. iwl4965_hw_txq_ctx_stop(priv);
  4866. iwl4965_hw_rxq_stop(priv);
  4867. spin_lock_irqsave(&priv->lock, flags);
  4868. if (!iwl_grab_nic_access(priv)) {
  4869. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4870. APMG_CLK_VAL_DMA_CLK_RQT);
  4871. iwl_release_nic_access(priv);
  4872. }
  4873. spin_unlock_irqrestore(&priv->lock, flags);
  4874. udelay(5);
  4875. iwl4965_hw_nic_stop_master(priv);
  4876. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4877. iwl4965_hw_nic_reset(priv);
  4878. exit:
  4879. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4880. if (priv->ibss_beacon)
  4881. dev_kfree_skb(priv->ibss_beacon);
  4882. priv->ibss_beacon = NULL;
  4883. /* clear out any free frames */
  4884. iwl4965_clear_free_frames(priv);
  4885. }
  4886. static void iwl4965_down(struct iwl_priv *priv)
  4887. {
  4888. mutex_lock(&priv->mutex);
  4889. __iwl4965_down(priv);
  4890. mutex_unlock(&priv->mutex);
  4891. iwl4965_cancel_deferred_work(priv);
  4892. }
  4893. #define MAX_HW_RESTARTS 5
  4894. static int __iwl4965_up(struct iwl_priv *priv)
  4895. {
  4896. int rc, i;
  4897. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4898. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4899. return -EIO;
  4900. }
  4901. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4902. IWL_WARNING("Radio disabled by SW RF kill (module "
  4903. "parameter)\n");
  4904. iwl_rfkill_set_hw_state(priv);
  4905. return -ENODEV;
  4906. }
  4907. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4908. IWL_ERROR("ucode not available for device bringup\n");
  4909. return -EIO;
  4910. }
  4911. /* If platform's RF_KILL switch is NOT set to KILL */
  4912. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4913. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4914. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4915. else {
  4916. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4917. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4918. iwl_rfkill_set_hw_state(priv);
  4919. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4920. return -ENODEV;
  4921. }
  4922. }
  4923. iwl_rfkill_set_hw_state(priv);
  4924. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4925. rc = iwl4965_hw_nic_init(priv);
  4926. if (rc) {
  4927. IWL_ERROR("Unable to int nic\n");
  4928. return rc;
  4929. }
  4930. /* make sure rfkill handshake bits are cleared */
  4931. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4932. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4933. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4934. /* clear (again), then enable host interrupts */
  4935. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4936. iwl4965_enable_interrupts(priv);
  4937. /* really make sure rfkill handshake bits are cleared */
  4938. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4939. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4940. /* Copy original ucode data image from disk into backup cache.
  4941. * This will be used to initialize the on-board processor's
  4942. * data SRAM for a clean start when the runtime program first loads. */
  4943. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4944. priv->ucode_data.len);
  4945. /* We return success when we resume from suspend and rf_kill is on. */
  4946. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4947. return 0;
  4948. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4949. iwlcore_clear_stations_table(priv);
  4950. /* load bootstrap state machine,
  4951. * load bootstrap program into processor's memory,
  4952. * prepare to load the "initialize" uCode */
  4953. rc = iwl4965_load_bsm(priv);
  4954. if (rc) {
  4955. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  4956. continue;
  4957. }
  4958. /* start card; "initialize" will load runtime ucode */
  4959. iwl4965_nic_start(priv);
  4960. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4961. return 0;
  4962. }
  4963. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4964. __iwl4965_down(priv);
  4965. /* tried to restart and config the device for as long as our
  4966. * patience could withstand */
  4967. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4968. return -EIO;
  4969. }
  4970. /*****************************************************************************
  4971. *
  4972. * Workqueue callbacks
  4973. *
  4974. *****************************************************************************/
  4975. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4976. {
  4977. struct iwl_priv *priv =
  4978. container_of(data, struct iwl_priv, init_alive_start.work);
  4979. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4980. return;
  4981. mutex_lock(&priv->mutex);
  4982. iwl4965_init_alive_start(priv);
  4983. mutex_unlock(&priv->mutex);
  4984. }
  4985. static void iwl4965_bg_alive_start(struct work_struct *data)
  4986. {
  4987. struct iwl_priv *priv =
  4988. container_of(data, struct iwl_priv, alive_start.work);
  4989. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4990. return;
  4991. mutex_lock(&priv->mutex);
  4992. iwl4965_alive_start(priv);
  4993. mutex_unlock(&priv->mutex);
  4994. }
  4995. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4996. {
  4997. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4998. wake_up_interruptible(&priv->wait_command_queue);
  4999. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5000. return;
  5001. mutex_lock(&priv->mutex);
  5002. if (!iwl4965_is_rfkill(priv)) {
  5003. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5004. "HW and/or SW RF Kill no longer active, restarting "
  5005. "device\n");
  5006. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5007. queue_work(priv->workqueue, &priv->restart);
  5008. } else {
  5009. /* make sure mac80211 stop sending Tx frame */
  5010. if (priv->mac80211_registered)
  5011. ieee80211_stop_queues(priv->hw);
  5012. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5013. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5014. "disabled by SW switch\n");
  5015. else
  5016. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5017. "Kill switch must be turned off for "
  5018. "wireless networking to work.\n");
  5019. }
  5020. iwl_rfkill_set_hw_state(priv);
  5021. mutex_unlock(&priv->mutex);
  5022. }
  5023. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5024. static void iwl4965_bg_scan_check(struct work_struct *data)
  5025. {
  5026. struct iwl_priv *priv =
  5027. container_of(data, struct iwl_priv, scan_check.work);
  5028. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5029. return;
  5030. mutex_lock(&priv->mutex);
  5031. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5032. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5033. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5034. "Scan completion watchdog resetting adapter (%dms)\n",
  5035. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5036. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5037. iwl4965_send_scan_abort(priv);
  5038. }
  5039. mutex_unlock(&priv->mutex);
  5040. }
  5041. static void iwl4965_bg_request_scan(struct work_struct *data)
  5042. {
  5043. struct iwl_priv *priv =
  5044. container_of(data, struct iwl_priv, request_scan);
  5045. struct iwl_host_cmd cmd = {
  5046. .id = REPLY_SCAN_CMD,
  5047. .len = sizeof(struct iwl4965_scan_cmd),
  5048. .meta.flags = CMD_SIZE_HUGE,
  5049. };
  5050. struct iwl4965_scan_cmd *scan;
  5051. struct ieee80211_conf *conf = NULL;
  5052. u16 cmd_len;
  5053. enum ieee80211_band band;
  5054. u8 direct_mask;
  5055. int ret = 0;
  5056. conf = ieee80211_get_hw_conf(priv->hw);
  5057. mutex_lock(&priv->mutex);
  5058. if (!iwl4965_is_ready(priv)) {
  5059. IWL_WARNING("request scan called when driver not ready.\n");
  5060. goto done;
  5061. }
  5062. /* Make sure the scan wasn't cancelled before this queued work
  5063. * was given the chance to run... */
  5064. if (!test_bit(STATUS_SCANNING, &priv->status))
  5065. goto done;
  5066. /* This should never be called or scheduled if there is currently
  5067. * a scan active in the hardware. */
  5068. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5069. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5070. "Ignoring second request.\n");
  5071. ret = -EIO;
  5072. goto done;
  5073. }
  5074. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5075. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5076. goto done;
  5077. }
  5078. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5079. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5080. goto done;
  5081. }
  5082. if (iwl4965_is_rfkill(priv)) {
  5083. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5084. goto done;
  5085. }
  5086. if (!test_bit(STATUS_READY, &priv->status)) {
  5087. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5088. goto done;
  5089. }
  5090. if (!priv->scan_bands) {
  5091. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5092. goto done;
  5093. }
  5094. if (!priv->scan) {
  5095. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5096. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5097. if (!priv->scan) {
  5098. ret = -ENOMEM;
  5099. goto done;
  5100. }
  5101. }
  5102. scan = priv->scan;
  5103. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5104. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5105. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5106. if (iwl4965_is_associated(priv)) {
  5107. u16 interval = 0;
  5108. u32 extra;
  5109. u32 suspend_time = 100;
  5110. u32 scan_suspend_time = 100;
  5111. unsigned long flags;
  5112. IWL_DEBUG_INFO("Scanning while associated...\n");
  5113. spin_lock_irqsave(&priv->lock, flags);
  5114. interval = priv->beacon_int;
  5115. spin_unlock_irqrestore(&priv->lock, flags);
  5116. scan->suspend_time = 0;
  5117. scan->max_out_time = cpu_to_le32(200 * 1024);
  5118. if (!interval)
  5119. interval = suspend_time;
  5120. extra = (suspend_time / interval) << 22;
  5121. scan_suspend_time = (extra |
  5122. ((suspend_time % interval) * 1024));
  5123. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5124. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5125. scan_suspend_time, interval);
  5126. }
  5127. /* We should add the ability for user to lock to PASSIVE ONLY */
  5128. if (priv->one_direct_scan) {
  5129. IWL_DEBUG_SCAN
  5130. ("Kicking off one direct scan for '%s'\n",
  5131. iwl4965_escape_essid(priv->direct_ssid,
  5132. priv->direct_ssid_len));
  5133. scan->direct_scan[0].id = WLAN_EID_SSID;
  5134. scan->direct_scan[0].len = priv->direct_ssid_len;
  5135. memcpy(scan->direct_scan[0].ssid,
  5136. priv->direct_ssid, priv->direct_ssid_len);
  5137. direct_mask = 1;
  5138. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5139. scan->direct_scan[0].id = WLAN_EID_SSID;
  5140. scan->direct_scan[0].len = priv->essid_len;
  5141. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5142. direct_mask = 1;
  5143. } else {
  5144. direct_mask = 0;
  5145. }
  5146. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5147. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5148. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5149. switch (priv->scan_bands) {
  5150. case 2:
  5151. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5152. scan->tx_cmd.rate_n_flags =
  5153. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5154. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5155. scan->good_CRC_th = 0;
  5156. band = IEEE80211_BAND_2GHZ;
  5157. break;
  5158. case 1:
  5159. scan->tx_cmd.rate_n_flags =
  5160. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5161. RATE_MCS_ANT_B_MSK);
  5162. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5163. band = IEEE80211_BAND_5GHZ;
  5164. break;
  5165. default:
  5166. IWL_WARNING("Invalid scan band count\n");
  5167. goto done;
  5168. }
  5169. /* We don't build a direct scan probe request; the uCode will do
  5170. * that based on the direct_mask added to each channel entry */
  5171. cmd_len = iwl4965_fill_probe_req(priv, band,
  5172. (struct ieee80211_mgmt *)scan->data,
  5173. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5174. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5175. /* select Rx chains */
  5176. /* Force use of chains B and C (0x6) for scan Rx.
  5177. * Avoid A (0x1) because of its off-channel reception on A-band.
  5178. * MIMO is not used here, but value is required to make uCode happy. */
  5179. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5180. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5181. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5182. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5183. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5184. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5185. if (direct_mask) {
  5186. IWL_DEBUG_SCAN
  5187. ("Initiating direct scan for %s.\n",
  5188. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5189. scan->channel_count =
  5190. iwl4965_get_channels_for_scan(
  5191. priv, band, 1, /* active */
  5192. direct_mask,
  5193. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5194. } else {
  5195. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5196. scan->channel_count =
  5197. iwl4965_get_channels_for_scan(
  5198. priv, band, 0, /* passive */
  5199. direct_mask,
  5200. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5201. }
  5202. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5203. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5204. cmd.data = scan;
  5205. scan->len = cpu_to_le16(cmd.len);
  5206. set_bit(STATUS_SCAN_HW, &priv->status);
  5207. ret = iwl_send_cmd_sync(priv, &cmd);
  5208. if (ret)
  5209. goto done;
  5210. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5211. IWL_SCAN_CHECK_WATCHDOG);
  5212. mutex_unlock(&priv->mutex);
  5213. return;
  5214. done:
  5215. /* inform mac80211 scan aborted */
  5216. queue_work(priv->workqueue, &priv->scan_completed);
  5217. mutex_unlock(&priv->mutex);
  5218. }
  5219. static void iwl4965_bg_up(struct work_struct *data)
  5220. {
  5221. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5222. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5223. return;
  5224. mutex_lock(&priv->mutex);
  5225. __iwl4965_up(priv);
  5226. mutex_unlock(&priv->mutex);
  5227. }
  5228. static void iwl4965_bg_restart(struct work_struct *data)
  5229. {
  5230. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5231. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5232. return;
  5233. iwl4965_down(priv);
  5234. queue_work(priv->workqueue, &priv->up);
  5235. }
  5236. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5237. {
  5238. struct iwl_priv *priv =
  5239. container_of(data, struct iwl_priv, rx_replenish);
  5240. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5241. return;
  5242. mutex_lock(&priv->mutex);
  5243. iwl4965_rx_replenish(priv);
  5244. mutex_unlock(&priv->mutex);
  5245. }
  5246. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5247. static void iwl4965_bg_post_associate(struct work_struct *data)
  5248. {
  5249. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5250. post_associate.work);
  5251. struct ieee80211_conf *conf = NULL;
  5252. int ret = 0;
  5253. DECLARE_MAC_BUF(mac);
  5254. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5255. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5256. return;
  5257. }
  5258. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5259. priv->assoc_id,
  5260. print_mac(mac, priv->active_rxon.bssid_addr));
  5261. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5262. return;
  5263. mutex_lock(&priv->mutex);
  5264. if (!priv->vif || !priv->is_open) {
  5265. mutex_unlock(&priv->mutex);
  5266. return;
  5267. }
  5268. iwl4965_scan_cancel_timeout(priv, 200);
  5269. conf = ieee80211_get_hw_conf(priv->hw);
  5270. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5271. iwl4965_commit_rxon(priv);
  5272. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5273. iwl4965_setup_rxon_timing(priv);
  5274. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5275. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5276. if (ret)
  5277. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5278. "Attempting to continue.\n");
  5279. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5280. #ifdef CONFIG_IWL4965_HT
  5281. if (priv->current_ht_config.is_ht)
  5282. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5283. #endif /* CONFIG_IWL4965_HT*/
  5284. iwl4965_set_rxon_chain(priv);
  5285. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5286. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5287. priv->assoc_id, priv->beacon_int);
  5288. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5289. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5290. else
  5291. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5292. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5293. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5294. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5295. else
  5296. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5297. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5298. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5299. }
  5300. iwl4965_commit_rxon(priv);
  5301. switch (priv->iw_mode) {
  5302. case IEEE80211_IF_TYPE_STA:
  5303. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5304. break;
  5305. case IEEE80211_IF_TYPE_IBSS:
  5306. /* clear out the station table */
  5307. iwlcore_clear_stations_table(priv);
  5308. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5309. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5310. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5311. iwl4965_send_beacon_cmd(priv);
  5312. break;
  5313. default:
  5314. IWL_ERROR("%s Should not be called in %d mode\n",
  5315. __FUNCTION__, priv->iw_mode);
  5316. break;
  5317. }
  5318. iwl4965_sequence_reset(priv);
  5319. #ifdef CONFIG_IWL4965_SENSITIVITY
  5320. /* Enable Rx differential gain and sensitivity calibrations */
  5321. iwl4965_chain_noise_reset(priv);
  5322. priv->start_calib = 1;
  5323. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5324. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5325. priv->assoc_station_added = 1;
  5326. iwl4965_activate_qos(priv, 0);
  5327. /* we have just associated, don't start scan too early */
  5328. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5329. mutex_unlock(&priv->mutex);
  5330. }
  5331. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5332. {
  5333. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5334. if (!iwl4965_is_ready(priv))
  5335. return;
  5336. mutex_lock(&priv->mutex);
  5337. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5338. iwl4965_send_scan_abort(priv);
  5339. mutex_unlock(&priv->mutex);
  5340. }
  5341. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5342. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5343. {
  5344. struct iwl_priv *priv =
  5345. container_of(work, struct iwl_priv, scan_completed);
  5346. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5347. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5348. return;
  5349. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5350. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5351. ieee80211_scan_completed(priv->hw);
  5352. /* Since setting the TXPOWER may have been deferred while
  5353. * performing the scan, fire one off */
  5354. mutex_lock(&priv->mutex);
  5355. iwl4965_hw_reg_send_txpower(priv);
  5356. mutex_unlock(&priv->mutex);
  5357. }
  5358. /*****************************************************************************
  5359. *
  5360. * mac80211 entry point functions
  5361. *
  5362. *****************************************************************************/
  5363. #define UCODE_READY_TIMEOUT (2 * HZ)
  5364. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5365. {
  5366. struct iwl_priv *priv = hw->priv;
  5367. int ret;
  5368. IWL_DEBUG_MAC80211("enter\n");
  5369. if (pci_enable_device(priv->pci_dev)) {
  5370. IWL_ERROR("Fail to pci_enable_device\n");
  5371. return -ENODEV;
  5372. }
  5373. pci_restore_state(priv->pci_dev);
  5374. pci_enable_msi(priv->pci_dev);
  5375. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5376. DRV_NAME, priv);
  5377. if (ret) {
  5378. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5379. goto out_disable_msi;
  5380. }
  5381. /* we should be verifying the device is ready to be opened */
  5382. mutex_lock(&priv->mutex);
  5383. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5384. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5385. * ucode filename and max sizes are card-specific. */
  5386. if (!priv->ucode_code.len) {
  5387. ret = iwl4965_read_ucode(priv);
  5388. if (ret) {
  5389. IWL_ERROR("Could not read microcode: %d\n", ret);
  5390. mutex_unlock(&priv->mutex);
  5391. goto out_release_irq;
  5392. }
  5393. }
  5394. ret = __iwl4965_up(priv);
  5395. mutex_unlock(&priv->mutex);
  5396. if (ret)
  5397. goto out_release_irq;
  5398. IWL_DEBUG_INFO("Start UP work done.\n");
  5399. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5400. return 0;
  5401. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5402. * mac80211 will not be run successfully. */
  5403. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5404. test_bit(STATUS_READY, &priv->status),
  5405. UCODE_READY_TIMEOUT);
  5406. if (!ret) {
  5407. if (!test_bit(STATUS_READY, &priv->status)) {
  5408. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5409. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5410. ret = -ETIMEDOUT;
  5411. goto out_release_irq;
  5412. }
  5413. }
  5414. priv->is_open = 1;
  5415. IWL_DEBUG_MAC80211("leave\n");
  5416. return 0;
  5417. out_release_irq:
  5418. free_irq(priv->pci_dev->irq, priv);
  5419. out_disable_msi:
  5420. pci_disable_msi(priv->pci_dev);
  5421. pci_disable_device(priv->pci_dev);
  5422. priv->is_open = 0;
  5423. IWL_DEBUG_MAC80211("leave - failed\n");
  5424. return ret;
  5425. }
  5426. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5427. {
  5428. struct iwl_priv *priv = hw->priv;
  5429. IWL_DEBUG_MAC80211("enter\n");
  5430. if (!priv->is_open) {
  5431. IWL_DEBUG_MAC80211("leave - skip\n");
  5432. return;
  5433. }
  5434. priv->is_open = 0;
  5435. if (iwl4965_is_ready_rf(priv)) {
  5436. /* stop mac, cancel any scan request and clear
  5437. * RXON_FILTER_ASSOC_MSK BIT
  5438. */
  5439. mutex_lock(&priv->mutex);
  5440. iwl4965_scan_cancel_timeout(priv, 100);
  5441. cancel_delayed_work(&priv->post_associate);
  5442. mutex_unlock(&priv->mutex);
  5443. }
  5444. iwl4965_down(priv);
  5445. flush_workqueue(priv->workqueue);
  5446. free_irq(priv->pci_dev->irq, priv);
  5447. pci_disable_msi(priv->pci_dev);
  5448. pci_save_state(priv->pci_dev);
  5449. pci_disable_device(priv->pci_dev);
  5450. IWL_DEBUG_MAC80211("leave\n");
  5451. }
  5452. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5453. struct ieee80211_tx_control *ctl)
  5454. {
  5455. struct iwl_priv *priv = hw->priv;
  5456. IWL_DEBUG_MAC80211("enter\n");
  5457. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5458. IWL_DEBUG_MAC80211("leave - monitor\n");
  5459. return -1;
  5460. }
  5461. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5462. ctl->tx_rate->bitrate);
  5463. if (iwl4965_tx_skb(priv, skb, ctl))
  5464. dev_kfree_skb_any(skb);
  5465. IWL_DEBUG_MAC80211("leave\n");
  5466. return 0;
  5467. }
  5468. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5469. struct ieee80211_if_init_conf *conf)
  5470. {
  5471. struct iwl_priv *priv = hw->priv;
  5472. unsigned long flags;
  5473. DECLARE_MAC_BUF(mac);
  5474. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5475. if (priv->vif) {
  5476. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5477. return -EOPNOTSUPP;
  5478. }
  5479. spin_lock_irqsave(&priv->lock, flags);
  5480. priv->vif = conf->vif;
  5481. spin_unlock_irqrestore(&priv->lock, flags);
  5482. mutex_lock(&priv->mutex);
  5483. if (conf->mac_addr) {
  5484. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5485. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5486. }
  5487. if (iwl4965_is_ready(priv))
  5488. iwl4965_set_mode(priv, conf->type);
  5489. mutex_unlock(&priv->mutex);
  5490. IWL_DEBUG_MAC80211("leave\n");
  5491. return 0;
  5492. }
  5493. /**
  5494. * iwl4965_mac_config - mac80211 config callback
  5495. *
  5496. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5497. * be set inappropriately and the driver currently sets the hardware up to
  5498. * use it whenever needed.
  5499. */
  5500. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5501. {
  5502. struct iwl_priv *priv = hw->priv;
  5503. const struct iwl_channel_info *ch_info;
  5504. unsigned long flags;
  5505. int ret = 0;
  5506. mutex_lock(&priv->mutex);
  5507. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5508. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5509. if (!iwl4965_is_ready(priv)) {
  5510. IWL_DEBUG_MAC80211("leave - not ready\n");
  5511. ret = -EIO;
  5512. goto out;
  5513. }
  5514. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5515. test_bit(STATUS_SCANNING, &priv->status))) {
  5516. IWL_DEBUG_MAC80211("leave - scanning\n");
  5517. set_bit(STATUS_CONF_PENDING, &priv->status);
  5518. mutex_unlock(&priv->mutex);
  5519. return 0;
  5520. }
  5521. spin_lock_irqsave(&priv->lock, flags);
  5522. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5523. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5524. if (!is_channel_valid(ch_info)) {
  5525. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5526. spin_unlock_irqrestore(&priv->lock, flags);
  5527. ret = -EINVAL;
  5528. goto out;
  5529. }
  5530. #ifdef CONFIG_IWL4965_HT
  5531. /* if we are switching from ht to 2.4 clear flags
  5532. * from any ht related info since 2.4 does not
  5533. * support ht */
  5534. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5535. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5536. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5537. #endif
  5538. )
  5539. priv->staging_rxon.flags = 0;
  5540. #endif /* CONFIG_IWL4965_HT */
  5541. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5542. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5543. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5544. /* The list of supported rates and rate mask can be different
  5545. * for each band; since the band may have changed, reset
  5546. * the rate mask to what mac80211 lists */
  5547. iwl4965_set_rate(priv);
  5548. spin_unlock_irqrestore(&priv->lock, flags);
  5549. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5550. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5551. iwl4965_hw_channel_switch(priv, conf->channel);
  5552. goto out;
  5553. }
  5554. #endif
  5555. if (priv->cfg->ops->lib->radio_kill_sw)
  5556. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5557. if (!conf->radio_enabled) {
  5558. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5559. goto out;
  5560. }
  5561. if (iwl4965_is_rfkill(priv)) {
  5562. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5563. ret = -EIO;
  5564. goto out;
  5565. }
  5566. iwl4965_set_rate(priv);
  5567. if (memcmp(&priv->active_rxon,
  5568. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5569. iwl4965_commit_rxon(priv);
  5570. else
  5571. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5572. IWL_DEBUG_MAC80211("leave\n");
  5573. out:
  5574. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5575. mutex_unlock(&priv->mutex);
  5576. return ret;
  5577. }
  5578. static void iwl4965_config_ap(struct iwl_priv *priv)
  5579. {
  5580. int ret = 0;
  5581. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5582. return;
  5583. /* The following should be done only at AP bring up */
  5584. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5585. /* RXON - unassoc (to set timing command) */
  5586. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5587. iwl4965_commit_rxon(priv);
  5588. /* RXON Timing */
  5589. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5590. iwl4965_setup_rxon_timing(priv);
  5591. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5592. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5593. if (ret)
  5594. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5595. "Attempting to continue.\n");
  5596. iwl4965_set_rxon_chain(priv);
  5597. /* FIXME: what should be the assoc_id for AP? */
  5598. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5599. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5600. priv->staging_rxon.flags |=
  5601. RXON_FLG_SHORT_PREAMBLE_MSK;
  5602. else
  5603. priv->staging_rxon.flags &=
  5604. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5605. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5606. if (priv->assoc_capability &
  5607. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5608. priv->staging_rxon.flags |=
  5609. RXON_FLG_SHORT_SLOT_MSK;
  5610. else
  5611. priv->staging_rxon.flags &=
  5612. ~RXON_FLG_SHORT_SLOT_MSK;
  5613. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5614. priv->staging_rxon.flags &=
  5615. ~RXON_FLG_SHORT_SLOT_MSK;
  5616. }
  5617. /* restore RXON assoc */
  5618. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5619. iwl4965_commit_rxon(priv);
  5620. iwl4965_activate_qos(priv, 1);
  5621. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5622. }
  5623. iwl4965_send_beacon_cmd(priv);
  5624. /* FIXME - we need to add code here to detect a totally new
  5625. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5626. * clear sta table, add BCAST sta... */
  5627. }
  5628. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5629. struct ieee80211_vif *vif,
  5630. struct ieee80211_if_conf *conf)
  5631. {
  5632. struct iwl_priv *priv = hw->priv;
  5633. DECLARE_MAC_BUF(mac);
  5634. unsigned long flags;
  5635. int rc;
  5636. if (conf == NULL)
  5637. return -EIO;
  5638. if (priv->vif != vif) {
  5639. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5640. mutex_unlock(&priv->mutex);
  5641. return 0;
  5642. }
  5643. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5644. (!conf->beacon || !conf->ssid_len)) {
  5645. IWL_DEBUG_MAC80211
  5646. ("Leaving in AP mode because HostAPD is not ready.\n");
  5647. return 0;
  5648. }
  5649. if (!iwl4965_is_alive(priv))
  5650. return -EAGAIN;
  5651. mutex_lock(&priv->mutex);
  5652. if (conf->bssid)
  5653. IWL_DEBUG_MAC80211("bssid: %s\n",
  5654. print_mac(mac, conf->bssid));
  5655. /*
  5656. * very dubious code was here; the probe filtering flag is never set:
  5657. *
  5658. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5659. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5660. */
  5661. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5662. if (!conf->bssid) {
  5663. conf->bssid = priv->mac_addr;
  5664. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5665. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5666. print_mac(mac, conf->bssid));
  5667. }
  5668. if (priv->ibss_beacon)
  5669. dev_kfree_skb(priv->ibss_beacon);
  5670. priv->ibss_beacon = conf->beacon;
  5671. }
  5672. if (iwl4965_is_rfkill(priv))
  5673. goto done;
  5674. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5675. !is_multicast_ether_addr(conf->bssid)) {
  5676. /* If there is currently a HW scan going on in the background
  5677. * then we need to cancel it else the RXON below will fail. */
  5678. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5679. IWL_WARNING("Aborted scan still in progress "
  5680. "after 100ms\n");
  5681. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5682. mutex_unlock(&priv->mutex);
  5683. return -EAGAIN;
  5684. }
  5685. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5686. /* TODO: Audit driver for usage of these members and see
  5687. * if mac80211 deprecates them (priv->bssid looks like it
  5688. * shouldn't be there, but I haven't scanned the IBSS code
  5689. * to verify) - jpk */
  5690. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5691. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5692. iwl4965_config_ap(priv);
  5693. else {
  5694. rc = iwl4965_commit_rxon(priv);
  5695. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5696. iwl4965_rxon_add_station(
  5697. priv, priv->active_rxon.bssid_addr, 1);
  5698. }
  5699. } else {
  5700. iwl4965_scan_cancel_timeout(priv, 100);
  5701. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5702. iwl4965_commit_rxon(priv);
  5703. }
  5704. done:
  5705. spin_lock_irqsave(&priv->lock, flags);
  5706. if (!conf->ssid_len)
  5707. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5708. else
  5709. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5710. priv->essid_len = conf->ssid_len;
  5711. spin_unlock_irqrestore(&priv->lock, flags);
  5712. IWL_DEBUG_MAC80211("leave\n");
  5713. mutex_unlock(&priv->mutex);
  5714. return 0;
  5715. }
  5716. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5717. unsigned int changed_flags,
  5718. unsigned int *total_flags,
  5719. int mc_count, struct dev_addr_list *mc_list)
  5720. {
  5721. /*
  5722. * XXX: dummy
  5723. * see also iwl4965_connection_init_rx_config
  5724. */
  5725. *total_flags = 0;
  5726. }
  5727. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5728. struct ieee80211_if_init_conf *conf)
  5729. {
  5730. struct iwl_priv *priv = hw->priv;
  5731. IWL_DEBUG_MAC80211("enter\n");
  5732. mutex_lock(&priv->mutex);
  5733. if (iwl4965_is_ready_rf(priv)) {
  5734. iwl4965_scan_cancel_timeout(priv, 100);
  5735. cancel_delayed_work(&priv->post_associate);
  5736. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5737. iwl4965_commit_rxon(priv);
  5738. }
  5739. if (priv->vif == conf->vif) {
  5740. priv->vif = NULL;
  5741. memset(priv->bssid, 0, ETH_ALEN);
  5742. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5743. priv->essid_len = 0;
  5744. }
  5745. mutex_unlock(&priv->mutex);
  5746. IWL_DEBUG_MAC80211("leave\n");
  5747. }
  5748. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5749. struct ieee80211_vif *vif,
  5750. struct ieee80211_bss_conf *bss_conf,
  5751. u32 changes)
  5752. {
  5753. struct iwl_priv *priv = hw->priv;
  5754. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5755. if (bss_conf->use_short_preamble)
  5756. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5757. else
  5758. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5759. }
  5760. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5761. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5762. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5763. else
  5764. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5765. }
  5766. if (changes & BSS_CHANGED_ASSOC) {
  5767. /*
  5768. * TODO:
  5769. * do stuff instead of sniffing assoc resp
  5770. */
  5771. }
  5772. if (iwl4965_is_associated(priv))
  5773. iwl4965_send_rxon_assoc(priv);
  5774. }
  5775. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5776. {
  5777. int rc = 0;
  5778. unsigned long flags;
  5779. struct iwl_priv *priv = hw->priv;
  5780. IWL_DEBUG_MAC80211("enter\n");
  5781. mutex_lock(&priv->mutex);
  5782. spin_lock_irqsave(&priv->lock, flags);
  5783. if (!iwl4965_is_ready_rf(priv)) {
  5784. rc = -EIO;
  5785. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5786. goto out_unlock;
  5787. }
  5788. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5789. rc = -EIO;
  5790. IWL_ERROR("ERROR: APs don't scan\n");
  5791. goto out_unlock;
  5792. }
  5793. /* we don't schedule scan within next_scan_jiffies period */
  5794. if (priv->next_scan_jiffies &&
  5795. time_after(priv->next_scan_jiffies, jiffies)) {
  5796. rc = -EAGAIN;
  5797. goto out_unlock;
  5798. }
  5799. /* if we just finished scan ask for delay */
  5800. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5801. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5802. rc = -EAGAIN;
  5803. goto out_unlock;
  5804. }
  5805. if (len) {
  5806. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5807. iwl4965_escape_essid(ssid, len), (int)len);
  5808. priv->one_direct_scan = 1;
  5809. priv->direct_ssid_len = (u8)
  5810. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5811. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5812. } else
  5813. priv->one_direct_scan = 0;
  5814. rc = iwl4965_scan_initiate(priv);
  5815. IWL_DEBUG_MAC80211("leave\n");
  5816. out_unlock:
  5817. spin_unlock_irqrestore(&priv->lock, flags);
  5818. mutex_unlock(&priv->mutex);
  5819. return rc;
  5820. }
  5821. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5822. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5823. u32 iv32, u16 *phase1key)
  5824. {
  5825. struct iwl_priv *priv = hw->priv;
  5826. u8 sta_id = IWL_INVALID_STATION;
  5827. unsigned long flags;
  5828. __le16 key_flags = 0;
  5829. int i;
  5830. DECLARE_MAC_BUF(mac);
  5831. IWL_DEBUG_MAC80211("enter\n");
  5832. sta_id = iwl4965_hw_find_station(priv, addr);
  5833. if (sta_id == IWL_INVALID_STATION) {
  5834. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5835. print_mac(mac, addr));
  5836. return;
  5837. }
  5838. iwl4965_scan_cancel_timeout(priv, 100);
  5839. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5840. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5841. key_flags &= ~STA_KEY_FLG_INVALID;
  5842. if (sta_id == priv->hw_setting.bcast_sta_id)
  5843. key_flags |= STA_KEY_MULTICAST_MSK;
  5844. spin_lock_irqsave(&priv->sta_lock, flags);
  5845. priv->stations[sta_id].sta.key.key_offset =
  5846. (sta_id % STA_KEY_MAX_NUM);/* FIXME */
  5847. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5848. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5849. for (i = 0; i < 5; i++)
  5850. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5851. cpu_to_le16(phase1key[i]);
  5852. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5853. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5854. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5855. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5856. IWL_DEBUG_MAC80211("leave\n");
  5857. }
  5858. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5859. const u8 *local_addr, const u8 *addr,
  5860. struct ieee80211_key_conf *key)
  5861. {
  5862. struct iwl_priv *priv = hw->priv;
  5863. DECLARE_MAC_BUF(mac);
  5864. int ret = 0;
  5865. u8 sta_id = IWL_INVALID_STATION;
  5866. u8 static_key;
  5867. IWL_DEBUG_MAC80211("enter\n");
  5868. if (!priv->cfg->mod_params->hw_crypto) {
  5869. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5870. return -EOPNOTSUPP;
  5871. }
  5872. if (is_zero_ether_addr(addr))
  5873. /* only support pairwise keys */
  5874. return -EOPNOTSUPP;
  5875. /* FIXME: need to differenciate between static and dynamic key
  5876. * in the level of mac80211 */
  5877. static_key = !iwl4965_is_associated(priv);
  5878. if (!static_key) {
  5879. sta_id = iwl4965_hw_find_station(priv, addr);
  5880. if (sta_id == IWL_INVALID_STATION) {
  5881. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5882. print_mac(mac, addr));
  5883. return -EINVAL;
  5884. }
  5885. }
  5886. iwl4965_scan_cancel_timeout(priv, 100);
  5887. switch (cmd) {
  5888. case SET_KEY:
  5889. if (static_key)
  5890. ret = iwl4965_set_static_key(priv, key);
  5891. else
  5892. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5893. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5894. break;
  5895. case DISABLE_KEY:
  5896. if (static_key)
  5897. ret = iwl4965_remove_static_key(priv);
  5898. else
  5899. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5900. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5901. break;
  5902. default:
  5903. ret = -EINVAL;
  5904. }
  5905. IWL_DEBUG_MAC80211("leave\n");
  5906. return ret;
  5907. }
  5908. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5909. const struct ieee80211_tx_queue_params *params)
  5910. {
  5911. struct iwl_priv *priv = hw->priv;
  5912. unsigned long flags;
  5913. int q;
  5914. IWL_DEBUG_MAC80211("enter\n");
  5915. if (!iwl4965_is_ready_rf(priv)) {
  5916. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5917. return -EIO;
  5918. }
  5919. if (queue >= AC_NUM) {
  5920. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5921. return 0;
  5922. }
  5923. if (!priv->qos_data.qos_enable) {
  5924. priv->qos_data.qos_active = 0;
  5925. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5926. return 0;
  5927. }
  5928. q = AC_NUM - 1 - queue;
  5929. spin_lock_irqsave(&priv->lock, flags);
  5930. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5931. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5932. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5933. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5934. cpu_to_le16((params->txop * 32));
  5935. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5936. priv->qos_data.qos_active = 1;
  5937. spin_unlock_irqrestore(&priv->lock, flags);
  5938. mutex_lock(&priv->mutex);
  5939. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5940. iwl4965_activate_qos(priv, 1);
  5941. else if (priv->assoc_id && iwl4965_is_associated(priv))
  5942. iwl4965_activate_qos(priv, 0);
  5943. mutex_unlock(&priv->mutex);
  5944. IWL_DEBUG_MAC80211("leave\n");
  5945. return 0;
  5946. }
  5947. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5948. struct ieee80211_tx_queue_stats *stats)
  5949. {
  5950. struct iwl_priv *priv = hw->priv;
  5951. int i, avail;
  5952. struct iwl4965_tx_queue *txq;
  5953. struct iwl4965_queue *q;
  5954. unsigned long flags;
  5955. IWL_DEBUG_MAC80211("enter\n");
  5956. if (!iwl4965_is_ready_rf(priv)) {
  5957. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5958. return -EIO;
  5959. }
  5960. spin_lock_irqsave(&priv->lock, flags);
  5961. for (i = 0; i < AC_NUM; i++) {
  5962. txq = &priv->txq[i];
  5963. q = &txq->q;
  5964. avail = iwl4965_queue_space(q);
  5965. stats->data[i].len = q->n_window - avail;
  5966. stats->data[i].limit = q->n_window - q->high_mark;
  5967. stats->data[i].count = q->n_window;
  5968. }
  5969. spin_unlock_irqrestore(&priv->lock, flags);
  5970. IWL_DEBUG_MAC80211("leave\n");
  5971. return 0;
  5972. }
  5973. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5974. struct ieee80211_low_level_stats *stats)
  5975. {
  5976. IWL_DEBUG_MAC80211("enter\n");
  5977. IWL_DEBUG_MAC80211("leave\n");
  5978. return 0;
  5979. }
  5980. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5981. {
  5982. IWL_DEBUG_MAC80211("enter\n");
  5983. IWL_DEBUG_MAC80211("leave\n");
  5984. return 0;
  5985. }
  5986. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5987. {
  5988. struct iwl_priv *priv = hw->priv;
  5989. unsigned long flags;
  5990. mutex_lock(&priv->mutex);
  5991. IWL_DEBUG_MAC80211("enter\n");
  5992. priv->lq_mngr.lq_ready = 0;
  5993. #ifdef CONFIG_IWL4965_HT
  5994. spin_lock_irqsave(&priv->lock, flags);
  5995. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5996. spin_unlock_irqrestore(&priv->lock, flags);
  5997. #endif /* CONFIG_IWL4965_HT */
  5998. iwlcore_reset_qos(priv);
  5999. cancel_delayed_work(&priv->post_associate);
  6000. spin_lock_irqsave(&priv->lock, flags);
  6001. priv->assoc_id = 0;
  6002. priv->assoc_capability = 0;
  6003. priv->call_post_assoc_from_beacon = 0;
  6004. priv->assoc_station_added = 0;
  6005. /* new association get rid of ibss beacon skb */
  6006. if (priv->ibss_beacon)
  6007. dev_kfree_skb(priv->ibss_beacon);
  6008. priv->ibss_beacon = NULL;
  6009. priv->beacon_int = priv->hw->conf.beacon_int;
  6010. priv->timestamp1 = 0;
  6011. priv->timestamp0 = 0;
  6012. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6013. priv->beacon_int = 0;
  6014. spin_unlock_irqrestore(&priv->lock, flags);
  6015. if (!iwl4965_is_ready_rf(priv)) {
  6016. IWL_DEBUG_MAC80211("leave - not ready\n");
  6017. mutex_unlock(&priv->mutex);
  6018. return;
  6019. }
  6020. /* we are restarting association process
  6021. * clear RXON_FILTER_ASSOC_MSK bit
  6022. */
  6023. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6024. iwl4965_scan_cancel_timeout(priv, 100);
  6025. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6026. iwl4965_commit_rxon(priv);
  6027. }
  6028. /* Per mac80211.h: This is only used in IBSS mode... */
  6029. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6030. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6031. mutex_unlock(&priv->mutex);
  6032. return;
  6033. }
  6034. priv->only_active_channel = 0;
  6035. iwl4965_set_rate(priv);
  6036. mutex_unlock(&priv->mutex);
  6037. IWL_DEBUG_MAC80211("leave\n");
  6038. }
  6039. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6040. struct ieee80211_tx_control *control)
  6041. {
  6042. struct iwl_priv *priv = hw->priv;
  6043. unsigned long flags;
  6044. mutex_lock(&priv->mutex);
  6045. IWL_DEBUG_MAC80211("enter\n");
  6046. if (!iwl4965_is_ready_rf(priv)) {
  6047. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6048. mutex_unlock(&priv->mutex);
  6049. return -EIO;
  6050. }
  6051. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6052. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6053. mutex_unlock(&priv->mutex);
  6054. return -EIO;
  6055. }
  6056. spin_lock_irqsave(&priv->lock, flags);
  6057. if (priv->ibss_beacon)
  6058. dev_kfree_skb(priv->ibss_beacon);
  6059. priv->ibss_beacon = skb;
  6060. priv->assoc_id = 0;
  6061. IWL_DEBUG_MAC80211("leave\n");
  6062. spin_unlock_irqrestore(&priv->lock, flags);
  6063. iwlcore_reset_qos(priv);
  6064. queue_work(priv->workqueue, &priv->post_associate.work);
  6065. mutex_unlock(&priv->mutex);
  6066. return 0;
  6067. }
  6068. #ifdef CONFIG_IWL4965_HT
  6069. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6070. struct iwl_priv *priv)
  6071. {
  6072. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6073. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6074. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6075. IWL_DEBUG_MAC80211("enter: \n");
  6076. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6077. iwl_conf->is_ht = 0;
  6078. return;
  6079. }
  6080. iwl_conf->is_ht = 1;
  6081. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6082. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6083. iwl_conf->sgf |= 0x1;
  6084. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6085. iwl_conf->sgf |= 0x2;
  6086. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6087. iwl_conf->max_amsdu_size =
  6088. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6089. iwl_conf->supported_chan_width =
  6090. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6091. iwl_conf->extension_chan_offset =
  6092. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6093. /* If no above or below channel supplied disable FAT channel */
  6094. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6095. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6096. iwl_conf->supported_chan_width = 0;
  6097. iwl_conf->tx_mimo_ps_mode =
  6098. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6099. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6100. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6101. iwl_conf->tx_chan_width =
  6102. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6103. iwl_conf->ht_protection =
  6104. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6105. iwl_conf->non_GF_STA_present =
  6106. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6107. IWL_DEBUG_MAC80211("control channel %d\n",
  6108. iwl_conf->control_channel);
  6109. IWL_DEBUG_MAC80211("leave\n");
  6110. }
  6111. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6112. struct ieee80211_conf *conf)
  6113. {
  6114. struct iwl_priv *priv = hw->priv;
  6115. IWL_DEBUG_MAC80211("enter: \n");
  6116. iwl4965_ht_info_fill(conf, priv);
  6117. iwl4965_set_rxon_chain(priv);
  6118. if (priv && priv->assoc_id &&
  6119. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6120. unsigned long flags;
  6121. spin_lock_irqsave(&priv->lock, flags);
  6122. if (priv->beacon_int)
  6123. queue_work(priv->workqueue, &priv->post_associate.work);
  6124. else
  6125. priv->call_post_assoc_from_beacon = 1;
  6126. spin_unlock_irqrestore(&priv->lock, flags);
  6127. }
  6128. IWL_DEBUG_MAC80211("leave:\n");
  6129. return 0;
  6130. }
  6131. #endif /*CONFIG_IWL4965_HT*/
  6132. /*****************************************************************************
  6133. *
  6134. * sysfs attributes
  6135. *
  6136. *****************************************************************************/
  6137. #ifdef CONFIG_IWLWIFI_DEBUG
  6138. /*
  6139. * The following adds a new attribute to the sysfs representation
  6140. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6141. * used for controlling the debug level.
  6142. *
  6143. * See the level definitions in iwl for details.
  6144. */
  6145. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6146. {
  6147. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6148. }
  6149. static ssize_t store_debug_level(struct device_driver *d,
  6150. const char *buf, size_t count)
  6151. {
  6152. char *p = (char *)buf;
  6153. u32 val;
  6154. val = simple_strtoul(p, &p, 0);
  6155. if (p == buf)
  6156. printk(KERN_INFO DRV_NAME
  6157. ": %s is not in hex or decimal form.\n", buf);
  6158. else
  6159. iwl_debug_level = val;
  6160. return strnlen(buf, count);
  6161. }
  6162. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6163. show_debug_level, store_debug_level);
  6164. #endif /* CONFIG_IWLWIFI_DEBUG */
  6165. static ssize_t show_temperature(struct device *d,
  6166. struct device_attribute *attr, char *buf)
  6167. {
  6168. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6169. if (!iwl4965_is_alive(priv))
  6170. return -EAGAIN;
  6171. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6172. }
  6173. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6174. static ssize_t show_rs_window(struct device *d,
  6175. struct device_attribute *attr,
  6176. char *buf)
  6177. {
  6178. struct iwl_priv *priv = d->driver_data;
  6179. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6180. }
  6181. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6182. static ssize_t show_tx_power(struct device *d,
  6183. struct device_attribute *attr, char *buf)
  6184. {
  6185. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6186. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6187. }
  6188. static ssize_t store_tx_power(struct device *d,
  6189. struct device_attribute *attr,
  6190. const char *buf, size_t count)
  6191. {
  6192. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6193. char *p = (char *)buf;
  6194. u32 val;
  6195. val = simple_strtoul(p, &p, 10);
  6196. if (p == buf)
  6197. printk(KERN_INFO DRV_NAME
  6198. ": %s is not in decimal form.\n", buf);
  6199. else
  6200. iwl4965_hw_reg_set_txpower(priv, val);
  6201. return count;
  6202. }
  6203. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6204. static ssize_t show_flags(struct device *d,
  6205. struct device_attribute *attr, char *buf)
  6206. {
  6207. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6208. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6209. }
  6210. static ssize_t store_flags(struct device *d,
  6211. struct device_attribute *attr,
  6212. const char *buf, size_t count)
  6213. {
  6214. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6215. u32 flags = simple_strtoul(buf, NULL, 0);
  6216. mutex_lock(&priv->mutex);
  6217. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6218. /* Cancel any currently running scans... */
  6219. if (iwl4965_scan_cancel_timeout(priv, 100))
  6220. IWL_WARNING("Could not cancel scan.\n");
  6221. else {
  6222. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6223. flags);
  6224. priv->staging_rxon.flags = cpu_to_le32(flags);
  6225. iwl4965_commit_rxon(priv);
  6226. }
  6227. }
  6228. mutex_unlock(&priv->mutex);
  6229. return count;
  6230. }
  6231. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6232. static ssize_t show_filter_flags(struct device *d,
  6233. struct device_attribute *attr, char *buf)
  6234. {
  6235. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6236. return sprintf(buf, "0x%04X\n",
  6237. le32_to_cpu(priv->active_rxon.filter_flags));
  6238. }
  6239. static ssize_t store_filter_flags(struct device *d,
  6240. struct device_attribute *attr,
  6241. const char *buf, size_t count)
  6242. {
  6243. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6244. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6245. mutex_lock(&priv->mutex);
  6246. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6247. /* Cancel any currently running scans... */
  6248. if (iwl4965_scan_cancel_timeout(priv, 100))
  6249. IWL_WARNING("Could not cancel scan.\n");
  6250. else {
  6251. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6252. "0x%04X\n", filter_flags);
  6253. priv->staging_rxon.filter_flags =
  6254. cpu_to_le32(filter_flags);
  6255. iwl4965_commit_rxon(priv);
  6256. }
  6257. }
  6258. mutex_unlock(&priv->mutex);
  6259. return count;
  6260. }
  6261. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6262. store_filter_flags);
  6263. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6264. static ssize_t show_measurement(struct device *d,
  6265. struct device_attribute *attr, char *buf)
  6266. {
  6267. struct iwl_priv *priv = dev_get_drvdata(d);
  6268. struct iwl4965_spectrum_notification measure_report;
  6269. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6270. u8 *data = (u8 *) & measure_report;
  6271. unsigned long flags;
  6272. spin_lock_irqsave(&priv->lock, flags);
  6273. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6274. spin_unlock_irqrestore(&priv->lock, flags);
  6275. return 0;
  6276. }
  6277. memcpy(&measure_report, &priv->measure_report, size);
  6278. priv->measurement_status = 0;
  6279. spin_unlock_irqrestore(&priv->lock, flags);
  6280. while (size && (PAGE_SIZE - len)) {
  6281. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6282. PAGE_SIZE - len, 1);
  6283. len = strlen(buf);
  6284. if (PAGE_SIZE - len)
  6285. buf[len++] = '\n';
  6286. ofs += 16;
  6287. size -= min(size, 16U);
  6288. }
  6289. return len;
  6290. }
  6291. static ssize_t store_measurement(struct device *d,
  6292. struct device_attribute *attr,
  6293. const char *buf, size_t count)
  6294. {
  6295. struct iwl_priv *priv = dev_get_drvdata(d);
  6296. struct ieee80211_measurement_params params = {
  6297. .channel = le16_to_cpu(priv->active_rxon.channel),
  6298. .start_time = cpu_to_le64(priv->last_tsf),
  6299. .duration = cpu_to_le16(1),
  6300. };
  6301. u8 type = IWL_MEASURE_BASIC;
  6302. u8 buffer[32];
  6303. u8 channel;
  6304. if (count) {
  6305. char *p = buffer;
  6306. strncpy(buffer, buf, min(sizeof(buffer), count));
  6307. channel = simple_strtoul(p, NULL, 0);
  6308. if (channel)
  6309. params.channel = channel;
  6310. p = buffer;
  6311. while (*p && *p != ' ')
  6312. p++;
  6313. if (*p)
  6314. type = simple_strtoul(p + 1, NULL, 0);
  6315. }
  6316. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6317. "channel %d (for '%s')\n", type, params.channel, buf);
  6318. iwl4965_get_measurement(priv, &params, type);
  6319. return count;
  6320. }
  6321. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6322. show_measurement, store_measurement);
  6323. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6324. static ssize_t store_retry_rate(struct device *d,
  6325. struct device_attribute *attr,
  6326. const char *buf, size_t count)
  6327. {
  6328. struct iwl_priv *priv = dev_get_drvdata(d);
  6329. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6330. if (priv->retry_rate <= 0)
  6331. priv->retry_rate = 1;
  6332. return count;
  6333. }
  6334. static ssize_t show_retry_rate(struct device *d,
  6335. struct device_attribute *attr, char *buf)
  6336. {
  6337. struct iwl_priv *priv = dev_get_drvdata(d);
  6338. return sprintf(buf, "%d", priv->retry_rate);
  6339. }
  6340. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6341. store_retry_rate);
  6342. static ssize_t store_power_level(struct device *d,
  6343. struct device_attribute *attr,
  6344. const char *buf, size_t count)
  6345. {
  6346. struct iwl_priv *priv = dev_get_drvdata(d);
  6347. int rc;
  6348. int mode;
  6349. mode = simple_strtoul(buf, NULL, 0);
  6350. mutex_lock(&priv->mutex);
  6351. if (!iwl4965_is_ready(priv)) {
  6352. rc = -EAGAIN;
  6353. goto out;
  6354. }
  6355. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6356. mode = IWL_POWER_AC;
  6357. else
  6358. mode |= IWL_POWER_ENABLED;
  6359. if (mode != priv->power_mode) {
  6360. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6361. if (rc) {
  6362. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6363. goto out;
  6364. }
  6365. priv->power_mode = mode;
  6366. }
  6367. rc = count;
  6368. out:
  6369. mutex_unlock(&priv->mutex);
  6370. return rc;
  6371. }
  6372. #define MAX_WX_STRING 80
  6373. /* Values are in microsecond */
  6374. static const s32 timeout_duration[] = {
  6375. 350000,
  6376. 250000,
  6377. 75000,
  6378. 37000,
  6379. 25000,
  6380. };
  6381. static const s32 period_duration[] = {
  6382. 400000,
  6383. 700000,
  6384. 1000000,
  6385. 1000000,
  6386. 1000000
  6387. };
  6388. static ssize_t show_power_level(struct device *d,
  6389. struct device_attribute *attr, char *buf)
  6390. {
  6391. struct iwl_priv *priv = dev_get_drvdata(d);
  6392. int level = IWL_POWER_LEVEL(priv->power_mode);
  6393. char *p = buf;
  6394. p += sprintf(p, "%d ", level);
  6395. switch (level) {
  6396. case IWL_POWER_MODE_CAM:
  6397. case IWL_POWER_AC:
  6398. p += sprintf(p, "(AC)");
  6399. break;
  6400. case IWL_POWER_BATTERY:
  6401. p += sprintf(p, "(BATTERY)");
  6402. break;
  6403. default:
  6404. p += sprintf(p,
  6405. "(Timeout %dms, Period %dms)",
  6406. timeout_duration[level - 1] / 1000,
  6407. period_duration[level - 1] / 1000);
  6408. }
  6409. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6410. p += sprintf(p, " OFF\n");
  6411. else
  6412. p += sprintf(p, " \n");
  6413. return (p - buf + 1);
  6414. }
  6415. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6416. store_power_level);
  6417. static ssize_t show_channels(struct device *d,
  6418. struct device_attribute *attr, char *buf)
  6419. {
  6420. /* all this shit doesn't belong into sysfs anyway */
  6421. return 0;
  6422. }
  6423. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6424. static ssize_t show_statistics(struct device *d,
  6425. struct device_attribute *attr, char *buf)
  6426. {
  6427. struct iwl_priv *priv = dev_get_drvdata(d);
  6428. u32 size = sizeof(struct iwl4965_notif_statistics);
  6429. u32 len = 0, ofs = 0;
  6430. u8 *data = (u8 *) & priv->statistics;
  6431. int rc = 0;
  6432. if (!iwl4965_is_alive(priv))
  6433. return -EAGAIN;
  6434. mutex_lock(&priv->mutex);
  6435. rc = iwl4965_send_statistics_request(priv);
  6436. mutex_unlock(&priv->mutex);
  6437. if (rc) {
  6438. len = sprintf(buf,
  6439. "Error sending statistics request: 0x%08X\n", rc);
  6440. return len;
  6441. }
  6442. while (size && (PAGE_SIZE - len)) {
  6443. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6444. PAGE_SIZE - len, 1);
  6445. len = strlen(buf);
  6446. if (PAGE_SIZE - len)
  6447. buf[len++] = '\n';
  6448. ofs += 16;
  6449. size -= min(size, 16U);
  6450. }
  6451. return len;
  6452. }
  6453. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6454. static ssize_t show_antenna(struct device *d,
  6455. struct device_attribute *attr, char *buf)
  6456. {
  6457. struct iwl_priv *priv = dev_get_drvdata(d);
  6458. if (!iwl4965_is_alive(priv))
  6459. return -EAGAIN;
  6460. return sprintf(buf, "%d\n", priv->antenna);
  6461. }
  6462. static ssize_t store_antenna(struct device *d,
  6463. struct device_attribute *attr,
  6464. const char *buf, size_t count)
  6465. {
  6466. int ant;
  6467. struct iwl_priv *priv = dev_get_drvdata(d);
  6468. if (count == 0)
  6469. return 0;
  6470. if (sscanf(buf, "%1i", &ant) != 1) {
  6471. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6472. return count;
  6473. }
  6474. if ((ant >= 0) && (ant <= 2)) {
  6475. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6476. priv->antenna = (enum iwl4965_antenna)ant;
  6477. } else
  6478. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6479. return count;
  6480. }
  6481. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6482. static ssize_t show_status(struct device *d,
  6483. struct device_attribute *attr, char *buf)
  6484. {
  6485. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6486. if (!iwl4965_is_alive(priv))
  6487. return -EAGAIN;
  6488. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6489. }
  6490. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6491. static ssize_t dump_error_log(struct device *d,
  6492. struct device_attribute *attr,
  6493. const char *buf, size_t count)
  6494. {
  6495. char *p = (char *)buf;
  6496. if (p[0] == '1')
  6497. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6498. return strnlen(buf, count);
  6499. }
  6500. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6501. static ssize_t dump_event_log(struct device *d,
  6502. struct device_attribute *attr,
  6503. const char *buf, size_t count)
  6504. {
  6505. char *p = (char *)buf;
  6506. if (p[0] == '1')
  6507. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6508. return strnlen(buf, count);
  6509. }
  6510. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6511. /*****************************************************************************
  6512. *
  6513. * driver setup and teardown
  6514. *
  6515. *****************************************************************************/
  6516. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6517. {
  6518. priv->workqueue = create_workqueue(DRV_NAME);
  6519. init_waitqueue_head(&priv->wait_command_queue);
  6520. INIT_WORK(&priv->up, iwl4965_bg_up);
  6521. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6522. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6523. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6524. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6525. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6526. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6527. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6528. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6529. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6530. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6531. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6532. iwl4965_hw_setup_deferred_work(priv);
  6533. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6534. iwl4965_irq_tasklet, (unsigned long)priv);
  6535. }
  6536. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6537. {
  6538. iwl4965_hw_cancel_deferred_work(priv);
  6539. cancel_delayed_work_sync(&priv->init_alive_start);
  6540. cancel_delayed_work(&priv->scan_check);
  6541. cancel_delayed_work(&priv->alive_start);
  6542. cancel_delayed_work(&priv->post_associate);
  6543. cancel_work_sync(&priv->beacon_update);
  6544. }
  6545. static struct attribute *iwl4965_sysfs_entries[] = {
  6546. &dev_attr_antenna.attr,
  6547. &dev_attr_channels.attr,
  6548. &dev_attr_dump_errors.attr,
  6549. &dev_attr_dump_events.attr,
  6550. &dev_attr_flags.attr,
  6551. &dev_attr_filter_flags.attr,
  6552. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6553. &dev_attr_measurement.attr,
  6554. #endif
  6555. &dev_attr_power_level.attr,
  6556. &dev_attr_retry_rate.attr,
  6557. &dev_attr_rs_window.attr,
  6558. &dev_attr_statistics.attr,
  6559. &dev_attr_status.attr,
  6560. &dev_attr_temperature.attr,
  6561. &dev_attr_tx_power.attr,
  6562. NULL
  6563. };
  6564. static struct attribute_group iwl4965_attribute_group = {
  6565. .name = NULL, /* put in device directory */
  6566. .attrs = iwl4965_sysfs_entries,
  6567. };
  6568. static struct ieee80211_ops iwl4965_hw_ops = {
  6569. .tx = iwl4965_mac_tx,
  6570. .start = iwl4965_mac_start,
  6571. .stop = iwl4965_mac_stop,
  6572. .add_interface = iwl4965_mac_add_interface,
  6573. .remove_interface = iwl4965_mac_remove_interface,
  6574. .config = iwl4965_mac_config,
  6575. .config_interface = iwl4965_mac_config_interface,
  6576. .configure_filter = iwl4965_configure_filter,
  6577. .set_key = iwl4965_mac_set_key,
  6578. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6579. .get_stats = iwl4965_mac_get_stats,
  6580. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6581. .conf_tx = iwl4965_mac_conf_tx,
  6582. .get_tsf = iwl4965_mac_get_tsf,
  6583. .reset_tsf = iwl4965_mac_reset_tsf,
  6584. .beacon_update = iwl4965_mac_beacon_update,
  6585. .bss_info_changed = iwl4965_bss_info_changed,
  6586. #ifdef CONFIG_IWL4965_HT
  6587. .conf_ht = iwl4965_mac_conf_ht,
  6588. .ampdu_action = iwl4965_mac_ampdu_action,
  6589. #endif /* CONFIG_IWL4965_HT */
  6590. .hw_scan = iwl4965_mac_hw_scan
  6591. };
  6592. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6593. {
  6594. int err = 0;
  6595. struct iwl_priv *priv;
  6596. struct ieee80211_hw *hw;
  6597. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6598. unsigned long flags;
  6599. DECLARE_MAC_BUF(mac);
  6600. /************************
  6601. * 1. Allocating HW data
  6602. ************************/
  6603. /* Disabling hardware scan means that mac80211 will perform scans
  6604. * "the hard way", rather than using device's scan. */
  6605. if (cfg->mod_params->disable_hw_scan) {
  6606. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6607. iwl4965_hw_ops.hw_scan = NULL;
  6608. }
  6609. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6610. if (!hw) {
  6611. err = -ENOMEM;
  6612. goto out;
  6613. }
  6614. priv = hw->priv;
  6615. /* At this point both hw and priv are allocated. */
  6616. SET_IEEE80211_DEV(hw, &pdev->dev);
  6617. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6618. priv->cfg = cfg;
  6619. priv->pci_dev = pdev;
  6620. #ifdef CONFIG_IWLWIFI_DEBUG
  6621. iwl_debug_level = priv->cfg->mod_params->debug;
  6622. atomic_set(&priv->restrict_refcnt, 0);
  6623. #endif
  6624. /**************************
  6625. * 2. Initializing PCI bus
  6626. **************************/
  6627. if (pci_enable_device(pdev)) {
  6628. err = -ENODEV;
  6629. goto out_ieee80211_free_hw;
  6630. }
  6631. pci_set_master(pdev);
  6632. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6633. if (!err)
  6634. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6635. if (err) {
  6636. printk(KERN_WARNING DRV_NAME
  6637. ": No suitable DMA available.\n");
  6638. goto out_pci_disable_device;
  6639. }
  6640. err = pci_request_regions(pdev, DRV_NAME);
  6641. if (err)
  6642. goto out_pci_disable_device;
  6643. pci_set_drvdata(pdev, priv);
  6644. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6645. * PCI Tx retries from interfering with C3 CPU state */
  6646. pci_write_config_byte(pdev, 0x41, 0x00);
  6647. /***********************
  6648. * 3. Read REV register
  6649. ***********************/
  6650. priv->hw_base = pci_iomap(pdev, 0, 0);
  6651. if (!priv->hw_base) {
  6652. err = -ENODEV;
  6653. goto out_pci_release_regions;
  6654. }
  6655. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6656. (unsigned long long) pci_resource_len(pdev, 0));
  6657. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6658. printk(KERN_INFO DRV_NAME
  6659. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6660. /*****************
  6661. * 4. Read EEPROM
  6662. *****************/
  6663. /* nic init */
  6664. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6665. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6666. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6667. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6668. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6669. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6670. if (err < 0) {
  6671. IWL_DEBUG_INFO("Failed to init the card\n");
  6672. goto out_iounmap;
  6673. }
  6674. /* Read the EEPROM */
  6675. err = iwl_eeprom_init(priv);
  6676. if (err) {
  6677. IWL_ERROR("Unable to init EEPROM\n");
  6678. goto out_iounmap;
  6679. }
  6680. /* MAC Address location in EEPROM same for 3945/4965 */
  6681. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6682. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6683. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6684. /************************
  6685. * 5. Setup HW constants
  6686. ************************/
  6687. /* Device-specific setup */
  6688. if (iwl4965_hw_set_hw_setting(priv)) {
  6689. IWL_ERROR("failed to set hw settings\n");
  6690. goto out_iounmap;
  6691. }
  6692. /*******************
  6693. * 6. Setup hw/priv
  6694. *******************/
  6695. err = iwl_setup(priv);
  6696. if (err)
  6697. goto out_unset_hw_settings;
  6698. /* At this point both hw and priv are initialized. */
  6699. /**********************************
  6700. * 7. Initialize module parameters
  6701. **********************************/
  6702. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6703. if (priv->cfg->mod_params->disable) {
  6704. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6705. IWL_DEBUG_INFO("Radio disabled.\n");
  6706. }
  6707. if (priv->cfg->mod_params->enable_qos)
  6708. priv->qos_data.qos_enable = 1;
  6709. /********************
  6710. * 8. Setup services
  6711. ********************/
  6712. spin_lock_irqsave(&priv->lock, flags);
  6713. iwl4965_disable_interrupts(priv);
  6714. spin_unlock_irqrestore(&priv->lock, flags);
  6715. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6716. if (err) {
  6717. IWL_ERROR("failed to create sysfs device attributes\n");
  6718. goto out_unset_hw_settings;
  6719. }
  6720. err = iwl_dbgfs_register(priv, DRV_NAME);
  6721. if (err) {
  6722. IWL_ERROR("failed to create debugfs files\n");
  6723. goto out_remove_sysfs;
  6724. }
  6725. iwl4965_setup_deferred_work(priv);
  6726. iwl4965_setup_rx_handlers(priv);
  6727. /********************
  6728. * 9. Conclude
  6729. ********************/
  6730. pci_save_state(pdev);
  6731. pci_disable_device(pdev);
  6732. /* notify iwlcore to init */
  6733. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6734. return 0;
  6735. out_remove_sysfs:
  6736. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6737. out_unset_hw_settings:
  6738. iwl4965_unset_hw_setting(priv);
  6739. out_iounmap:
  6740. pci_iounmap(pdev, priv->hw_base);
  6741. out_pci_release_regions:
  6742. pci_release_regions(pdev);
  6743. pci_set_drvdata(pdev, NULL);
  6744. out_pci_disable_device:
  6745. pci_disable_device(pdev);
  6746. out_ieee80211_free_hw:
  6747. ieee80211_free_hw(priv->hw);
  6748. out:
  6749. return err;
  6750. }
  6751. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6752. {
  6753. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6754. struct list_head *p, *q;
  6755. int i;
  6756. unsigned long flags;
  6757. if (!priv)
  6758. return;
  6759. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6760. if (priv->mac80211_registered) {
  6761. ieee80211_unregister_hw(priv->hw);
  6762. priv->mac80211_registered = 0;
  6763. }
  6764. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6765. iwl4965_down(priv);
  6766. /* make sure we flush any pending irq or
  6767. * tasklet for the driver
  6768. */
  6769. spin_lock_irqsave(&priv->lock, flags);
  6770. iwl4965_disable_interrupts(priv);
  6771. spin_unlock_irqrestore(&priv->lock, flags);
  6772. iwl_synchronize_irq(priv);
  6773. /* Free MAC hash list for ADHOC */
  6774. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6775. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6776. list_del(p);
  6777. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6778. }
  6779. }
  6780. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6781. iwl_dbgfs_unregister(priv);
  6782. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6783. iwl4965_dealloc_ucode_pci(priv);
  6784. if (priv->rxq.bd)
  6785. iwl4965_rx_queue_free(priv, &priv->rxq);
  6786. iwl4965_hw_txq_ctx_free(priv);
  6787. iwl4965_unset_hw_setting(priv);
  6788. iwlcore_clear_stations_table(priv);
  6789. /*netif_stop_queue(dev); */
  6790. flush_workqueue(priv->workqueue);
  6791. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6792. * priv->workqueue... so we can't take down the workqueue
  6793. * until now... */
  6794. destroy_workqueue(priv->workqueue);
  6795. priv->workqueue = NULL;
  6796. pci_iounmap(pdev, priv->hw_base);
  6797. pci_release_regions(pdev);
  6798. pci_disable_device(pdev);
  6799. pci_set_drvdata(pdev, NULL);
  6800. iwl_free_channel_map(priv);
  6801. iwl4965_free_geos(priv);
  6802. if (priv->ibss_beacon)
  6803. dev_kfree_skb(priv->ibss_beacon);
  6804. ieee80211_free_hw(priv->hw);
  6805. }
  6806. #ifdef CONFIG_PM
  6807. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6808. {
  6809. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6810. if (priv->is_open) {
  6811. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6812. iwl4965_mac_stop(priv->hw);
  6813. priv->is_open = 1;
  6814. }
  6815. pci_set_power_state(pdev, PCI_D3hot);
  6816. return 0;
  6817. }
  6818. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6819. {
  6820. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6821. pci_set_power_state(pdev, PCI_D0);
  6822. if (priv->is_open)
  6823. iwl4965_mac_start(priv->hw);
  6824. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6825. return 0;
  6826. }
  6827. #endif /* CONFIG_PM */
  6828. /*****************************************************************************
  6829. *
  6830. * driver and module entry point
  6831. *
  6832. *****************************************************************************/
  6833. static struct pci_driver iwl4965_driver = {
  6834. .name = DRV_NAME,
  6835. .id_table = iwl4965_hw_card_ids,
  6836. .probe = iwl4965_pci_probe,
  6837. .remove = __devexit_p(iwl4965_pci_remove),
  6838. #ifdef CONFIG_PM
  6839. .suspend = iwl4965_pci_suspend,
  6840. .resume = iwl4965_pci_resume,
  6841. #endif
  6842. };
  6843. static int __init iwl4965_init(void)
  6844. {
  6845. int ret;
  6846. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6847. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6848. ret = iwl4965_rate_control_register();
  6849. if (ret) {
  6850. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6851. return ret;
  6852. }
  6853. ret = pci_register_driver(&iwl4965_driver);
  6854. if (ret) {
  6855. IWL_ERROR("Unable to initialize PCI module\n");
  6856. goto error_register;
  6857. }
  6858. #ifdef CONFIG_IWLWIFI_DEBUG
  6859. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6860. if (ret) {
  6861. IWL_ERROR("Unable to create driver sysfs file\n");
  6862. goto error_debug;
  6863. }
  6864. #endif
  6865. return ret;
  6866. #ifdef CONFIG_IWLWIFI_DEBUG
  6867. error_debug:
  6868. pci_unregister_driver(&iwl4965_driver);
  6869. #endif
  6870. error_register:
  6871. iwl4965_rate_control_unregister();
  6872. return ret;
  6873. }
  6874. static void __exit iwl4965_exit(void)
  6875. {
  6876. #ifdef CONFIG_IWLWIFI_DEBUG
  6877. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6878. #endif
  6879. pci_unregister_driver(&iwl4965_driver);
  6880. iwl4965_rate_control_unregister();
  6881. }
  6882. module_exit(iwl4965_exit);
  6883. module_init(iwl4965_init);