book3s_xics.c 27 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130
  1. /*
  2. * Copyright 2012 Michael Ellerman, IBM Corporation.
  3. * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/kvm_host.h>
  11. #include <linux/err.h>
  12. #include <linux/gfp.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/kvm_book3s.h>
  15. #include <asm/kvm_ppc.h>
  16. #include <asm/hvcall.h>
  17. #include <asm/xics.h>
  18. #include <asm/debug.h>
  19. #include <linux/debugfs.h>
  20. #include <linux/seq_file.h>
  21. #include "book3s_xics.h"
  22. #if 1
  23. #define XICS_DBG(fmt...) do { } while (0)
  24. #else
  25. #define XICS_DBG(fmt...) trace_printk(fmt)
  26. #endif
  27. #define ENABLE_REALMODE true
  28. #define DEBUG_REALMODE false
  29. /*
  30. * LOCKING
  31. * =======
  32. *
  33. * Each ICS has a mutex protecting the information about the IRQ
  34. * sources and avoiding simultaneous deliveries if the same interrupt.
  35. *
  36. * ICP operations are done via a single compare & swap transaction
  37. * (most ICP state fits in the union kvmppc_icp_state)
  38. */
  39. /*
  40. * TODO
  41. * ====
  42. *
  43. * - To speed up resends, keep a bitmap of "resend" set bits in the
  44. * ICS
  45. *
  46. * - Speed up server# -> ICP lookup (array ? hash table ?)
  47. *
  48. * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
  49. * locks array to improve scalability
  50. *
  51. * - ioctl's to save/restore the entire state for snapshot & migration
  52. */
  53. /* -- ICS routines -- */
  54. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  55. u32 new_irq);
  56. static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
  57. {
  58. struct ics_irq_state *state;
  59. struct kvmppc_ics *ics;
  60. u16 src;
  61. XICS_DBG("ics deliver %#x (level: %d)\n", irq, level);
  62. ics = kvmppc_xics_find_ics(xics, irq, &src);
  63. if (!ics) {
  64. XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq);
  65. return -EINVAL;
  66. }
  67. state = &ics->irq_state[src];
  68. if (!state->exists)
  69. return -EINVAL;
  70. /*
  71. * We set state->asserted locklessly. This should be fine as
  72. * we are the only setter, thus concurrent access is undefined
  73. * to begin with.
  74. */
  75. if (level == KVM_INTERRUPT_SET_LEVEL)
  76. state->asserted = 1;
  77. else if (level == KVM_INTERRUPT_UNSET) {
  78. state->asserted = 0;
  79. return 0;
  80. }
  81. /* Attempt delivery */
  82. icp_deliver_irq(xics, NULL, irq);
  83. return 0;
  84. }
  85. static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  86. struct kvmppc_icp *icp)
  87. {
  88. int i;
  89. mutex_lock(&ics->lock);
  90. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  91. struct ics_irq_state *state = &ics->irq_state[i];
  92. if (!state->resend)
  93. continue;
  94. XICS_DBG("resend %#x prio %#x\n", state->number,
  95. state->priority);
  96. mutex_unlock(&ics->lock);
  97. icp_deliver_irq(xics, icp, state->number);
  98. mutex_lock(&ics->lock);
  99. }
  100. mutex_unlock(&ics->lock);
  101. }
  102. static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  103. struct ics_irq_state *state,
  104. u32 server, u32 priority, u32 saved_priority)
  105. {
  106. bool deliver;
  107. mutex_lock(&ics->lock);
  108. state->server = server;
  109. state->priority = priority;
  110. state->saved_priority = saved_priority;
  111. deliver = false;
  112. if ((state->masked_pending || state->resend) && priority != MASKED) {
  113. state->masked_pending = 0;
  114. deliver = true;
  115. }
  116. mutex_unlock(&ics->lock);
  117. return deliver;
  118. }
  119. int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority)
  120. {
  121. struct kvmppc_xics *xics = kvm->arch.xics;
  122. struct kvmppc_icp *icp;
  123. struct kvmppc_ics *ics;
  124. struct ics_irq_state *state;
  125. u16 src;
  126. if (!xics)
  127. return -ENODEV;
  128. ics = kvmppc_xics_find_ics(xics, irq, &src);
  129. if (!ics)
  130. return -EINVAL;
  131. state = &ics->irq_state[src];
  132. icp = kvmppc_xics_find_server(kvm, server);
  133. if (!icp)
  134. return -EINVAL;
  135. XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n",
  136. irq, server, priority,
  137. state->masked_pending, state->resend);
  138. if (write_xive(xics, ics, state, server, priority, priority))
  139. icp_deliver_irq(xics, icp, irq);
  140. return 0;
  141. }
  142. int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority)
  143. {
  144. struct kvmppc_xics *xics = kvm->arch.xics;
  145. struct kvmppc_ics *ics;
  146. struct ics_irq_state *state;
  147. u16 src;
  148. if (!xics)
  149. return -ENODEV;
  150. ics = kvmppc_xics_find_ics(xics, irq, &src);
  151. if (!ics)
  152. return -EINVAL;
  153. state = &ics->irq_state[src];
  154. mutex_lock(&ics->lock);
  155. *server = state->server;
  156. *priority = state->priority;
  157. mutex_unlock(&ics->lock);
  158. return 0;
  159. }
  160. int kvmppc_xics_int_on(struct kvm *kvm, u32 irq)
  161. {
  162. struct kvmppc_xics *xics = kvm->arch.xics;
  163. struct kvmppc_icp *icp;
  164. struct kvmppc_ics *ics;
  165. struct ics_irq_state *state;
  166. u16 src;
  167. if (!xics)
  168. return -ENODEV;
  169. ics = kvmppc_xics_find_ics(xics, irq, &src);
  170. if (!ics)
  171. return -EINVAL;
  172. state = &ics->irq_state[src];
  173. icp = kvmppc_xics_find_server(kvm, state->server);
  174. if (!icp)
  175. return -EINVAL;
  176. if (write_xive(xics, ics, state, state->server, state->saved_priority,
  177. state->saved_priority))
  178. icp_deliver_irq(xics, icp, irq);
  179. return 0;
  180. }
  181. int kvmppc_xics_int_off(struct kvm *kvm, u32 irq)
  182. {
  183. struct kvmppc_xics *xics = kvm->arch.xics;
  184. struct kvmppc_ics *ics;
  185. struct ics_irq_state *state;
  186. u16 src;
  187. if (!xics)
  188. return -ENODEV;
  189. ics = kvmppc_xics_find_ics(xics, irq, &src);
  190. if (!ics)
  191. return -EINVAL;
  192. state = &ics->irq_state[src];
  193. write_xive(xics, ics, state, state->server, MASKED, state->priority);
  194. return 0;
  195. }
  196. /* -- ICP routines, including hcalls -- */
  197. static inline bool icp_try_update(struct kvmppc_icp *icp,
  198. union kvmppc_icp_state old,
  199. union kvmppc_icp_state new,
  200. bool change_self)
  201. {
  202. bool success;
  203. /* Calculate new output value */
  204. new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
  205. /* Attempt atomic update */
  206. success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
  207. if (!success)
  208. goto bail;
  209. XICS_DBG("UPD [%04x] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  210. icp->server_num,
  211. old.cppr, old.mfrr, old.pending_pri, old.xisr,
  212. old.need_resend, old.out_ee);
  213. XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  214. new.cppr, new.mfrr, new.pending_pri, new.xisr,
  215. new.need_resend, new.out_ee);
  216. /*
  217. * Check for output state update
  218. *
  219. * Note that this is racy since another processor could be updating
  220. * the state already. This is why we never clear the interrupt output
  221. * here, we only ever set it. The clear only happens prior to doing
  222. * an update and only by the processor itself. Currently we do it
  223. * in Accept (H_XIRR) and Up_Cppr (H_XPPR).
  224. *
  225. * We also do not try to figure out whether the EE state has changed,
  226. * we unconditionally set it if the new state calls for it. The reason
  227. * for that is that we opportunistically remove the pending interrupt
  228. * flag when raising CPPR, so we need to set it back here if an
  229. * interrupt is still pending.
  230. */
  231. if (new.out_ee) {
  232. kvmppc_book3s_queue_irqprio(icp->vcpu,
  233. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  234. if (!change_self)
  235. kvmppc_fast_vcpu_kick(icp->vcpu);
  236. }
  237. bail:
  238. return success;
  239. }
  240. static void icp_check_resend(struct kvmppc_xics *xics,
  241. struct kvmppc_icp *icp)
  242. {
  243. u32 icsid;
  244. /* Order this load with the test for need_resend in the caller */
  245. smp_rmb();
  246. for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
  247. struct kvmppc_ics *ics = xics->ics[icsid];
  248. if (!test_and_clear_bit(icsid, icp->resend_map))
  249. continue;
  250. if (!ics)
  251. continue;
  252. ics_check_resend(xics, ics, icp);
  253. }
  254. }
  255. static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
  256. u32 *reject)
  257. {
  258. union kvmppc_icp_state old_state, new_state;
  259. bool success;
  260. XICS_DBG("try deliver %#x(P:%#x) to server %#x\n", irq, priority,
  261. icp->server_num);
  262. do {
  263. old_state = new_state = ACCESS_ONCE(icp->state);
  264. *reject = 0;
  265. /* See if we can deliver */
  266. success = new_state.cppr > priority &&
  267. new_state.mfrr > priority &&
  268. new_state.pending_pri > priority;
  269. /*
  270. * If we can, check for a rejection and perform the
  271. * delivery
  272. */
  273. if (success) {
  274. *reject = new_state.xisr;
  275. new_state.xisr = irq;
  276. new_state.pending_pri = priority;
  277. } else {
  278. /*
  279. * If we failed to deliver we set need_resend
  280. * so a subsequent CPPR state change causes us
  281. * to try a new delivery.
  282. */
  283. new_state.need_resend = true;
  284. }
  285. } while (!icp_try_update(icp, old_state, new_state, false));
  286. return success;
  287. }
  288. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  289. u32 new_irq)
  290. {
  291. struct ics_irq_state *state;
  292. struct kvmppc_ics *ics;
  293. u32 reject;
  294. u16 src;
  295. /*
  296. * This is used both for initial delivery of an interrupt and
  297. * for subsequent rejection.
  298. *
  299. * Rejection can be racy vs. resends. We have evaluated the
  300. * rejection in an atomic ICP transaction which is now complete,
  301. * so potentially the ICP can already accept the interrupt again.
  302. *
  303. * So we need to retry the delivery. Essentially the reject path
  304. * boils down to a failed delivery. Always.
  305. *
  306. * Now the interrupt could also have moved to a different target,
  307. * thus we may need to re-do the ICP lookup as well
  308. */
  309. again:
  310. /* Get the ICS state and lock it */
  311. ics = kvmppc_xics_find_ics(xics, new_irq, &src);
  312. if (!ics) {
  313. XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq);
  314. return;
  315. }
  316. state = &ics->irq_state[src];
  317. /* Get a lock on the ICS */
  318. mutex_lock(&ics->lock);
  319. /* Get our server */
  320. if (!icp || state->server != icp->server_num) {
  321. icp = kvmppc_xics_find_server(xics->kvm, state->server);
  322. if (!icp) {
  323. pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n",
  324. new_irq, state->server);
  325. goto out;
  326. }
  327. }
  328. /* Clear the resend bit of that interrupt */
  329. state->resend = 0;
  330. /*
  331. * If masked, bail out
  332. *
  333. * Note: PAPR doesn't mention anything about masked pending
  334. * when doing a resend, only when doing a delivery.
  335. *
  336. * However that would have the effect of losing a masked
  337. * interrupt that was rejected and isn't consistent with
  338. * the whole masked_pending business which is about not
  339. * losing interrupts that occur while masked.
  340. *
  341. * I don't differenciate normal deliveries and resends, this
  342. * implementation will differ from PAPR and not lose such
  343. * interrupts.
  344. */
  345. if (state->priority == MASKED) {
  346. XICS_DBG("irq %#x masked pending\n", new_irq);
  347. state->masked_pending = 1;
  348. goto out;
  349. }
  350. /*
  351. * Try the delivery, this will set the need_resend flag
  352. * in the ICP as part of the atomic transaction if the
  353. * delivery is not possible.
  354. *
  355. * Note that if successful, the new delivery might have itself
  356. * rejected an interrupt that was "delivered" before we took the
  357. * icp mutex.
  358. *
  359. * In this case we do the whole sequence all over again for the
  360. * new guy. We cannot assume that the rejected interrupt is less
  361. * favored than the new one, and thus doesn't need to be delivered,
  362. * because by the time we exit icp_try_to_deliver() the target
  363. * processor may well have alrady consumed & completed it, and thus
  364. * the rejected interrupt might actually be already acceptable.
  365. */
  366. if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) {
  367. /*
  368. * Delivery was successful, did we reject somebody else ?
  369. */
  370. if (reject && reject != XICS_IPI) {
  371. mutex_unlock(&ics->lock);
  372. new_irq = reject;
  373. goto again;
  374. }
  375. } else {
  376. /*
  377. * We failed to deliver the interrupt we need to set the
  378. * resend map bit and mark the ICS state as needing a resend
  379. */
  380. set_bit(ics->icsid, icp->resend_map);
  381. state->resend = 1;
  382. /*
  383. * If the need_resend flag got cleared in the ICP some time
  384. * between icp_try_to_deliver() atomic update and now, then
  385. * we know it might have missed the resend_map bit. So we
  386. * retry
  387. */
  388. smp_mb();
  389. if (!icp->state.need_resend) {
  390. mutex_unlock(&ics->lock);
  391. goto again;
  392. }
  393. }
  394. out:
  395. mutex_unlock(&ics->lock);
  396. }
  397. static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  398. u8 new_cppr)
  399. {
  400. union kvmppc_icp_state old_state, new_state;
  401. bool resend;
  402. /*
  403. * This handles several related states in one operation:
  404. *
  405. * ICP State: Down_CPPR
  406. *
  407. * Load CPPR with new value and if the XISR is 0
  408. * then check for resends:
  409. *
  410. * ICP State: Resend
  411. *
  412. * If MFRR is more favored than CPPR, check for IPIs
  413. * and notify ICS of a potential resend. This is done
  414. * asynchronously (when used in real mode, we will have
  415. * to exit here).
  416. *
  417. * We do not handle the complete Check_IPI as documented
  418. * here. In the PAPR, this state will be used for both
  419. * Set_MFRR and Down_CPPR. However, we know that we aren't
  420. * changing the MFRR state here so we don't need to handle
  421. * the case of an MFRR causing a reject of a pending irq,
  422. * this will have been handled when the MFRR was set in the
  423. * first place.
  424. *
  425. * Thus we don't have to handle rejects, only resends.
  426. *
  427. * When implementing real mode for HV KVM, resend will lead to
  428. * a H_TOO_HARD return and the whole transaction will be handled
  429. * in virtual mode.
  430. */
  431. do {
  432. old_state = new_state = ACCESS_ONCE(icp->state);
  433. /* Down_CPPR */
  434. new_state.cppr = new_cppr;
  435. /*
  436. * Cut down Resend / Check_IPI / IPI
  437. *
  438. * The logic is that we cannot have a pending interrupt
  439. * trumped by an IPI at this point (see above), so we
  440. * know that either the pending interrupt is already an
  441. * IPI (in which case we don't care to override it) or
  442. * it's either more favored than us or non existent
  443. */
  444. if (new_state.mfrr < new_cppr &&
  445. new_state.mfrr <= new_state.pending_pri) {
  446. WARN_ON(new_state.xisr != XICS_IPI &&
  447. new_state.xisr != 0);
  448. new_state.pending_pri = new_state.mfrr;
  449. new_state.xisr = XICS_IPI;
  450. }
  451. /* Latch/clear resend bit */
  452. resend = new_state.need_resend;
  453. new_state.need_resend = 0;
  454. } while (!icp_try_update(icp, old_state, new_state, true));
  455. /*
  456. * Now handle resend checks. Those are asynchronous to the ICP
  457. * state update in HW (ie bus transactions) so we can handle them
  458. * separately here too
  459. */
  460. if (resend)
  461. icp_check_resend(xics, icp);
  462. }
  463. static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu)
  464. {
  465. union kvmppc_icp_state old_state, new_state;
  466. struct kvmppc_icp *icp = vcpu->arch.icp;
  467. u32 xirr;
  468. /* First, remove EE from the processor */
  469. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  470. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  471. /*
  472. * ICP State: Accept_Interrupt
  473. *
  474. * Return the pending interrupt (if any) along with the
  475. * current CPPR, then clear the XISR & set CPPR to the
  476. * pending priority
  477. */
  478. do {
  479. old_state = new_state = ACCESS_ONCE(icp->state);
  480. xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
  481. if (!old_state.xisr)
  482. break;
  483. new_state.cppr = new_state.pending_pri;
  484. new_state.pending_pri = 0xff;
  485. new_state.xisr = 0;
  486. } while (!icp_try_update(icp, old_state, new_state, true));
  487. XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr);
  488. return xirr;
  489. }
  490. static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
  491. unsigned long mfrr)
  492. {
  493. union kvmppc_icp_state old_state, new_state;
  494. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  495. struct kvmppc_icp *icp;
  496. u32 reject;
  497. bool resend;
  498. bool local;
  499. XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n",
  500. vcpu->vcpu_id, server, mfrr);
  501. icp = vcpu->arch.icp;
  502. local = icp->server_num == server;
  503. if (!local) {
  504. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  505. if (!icp)
  506. return H_PARAMETER;
  507. }
  508. /*
  509. * ICP state: Set_MFRR
  510. *
  511. * If the CPPR is more favored than the new MFRR, then
  512. * nothing needs to be rejected as there can be no XISR to
  513. * reject. If the MFRR is being made less favored then
  514. * there might be a previously-rejected interrupt needing
  515. * to be resent.
  516. *
  517. * If the CPPR is less favored, then we might be replacing
  518. * an interrupt, and thus need to possibly reject it as in
  519. *
  520. * ICP state: Check_IPI
  521. */
  522. do {
  523. old_state = new_state = ACCESS_ONCE(icp->state);
  524. /* Set_MFRR */
  525. new_state.mfrr = mfrr;
  526. /* Check_IPI */
  527. reject = 0;
  528. resend = false;
  529. if (mfrr < new_state.cppr) {
  530. /* Reject a pending interrupt if not an IPI */
  531. if (mfrr <= new_state.pending_pri)
  532. reject = new_state.xisr;
  533. new_state.pending_pri = mfrr;
  534. new_state.xisr = XICS_IPI;
  535. }
  536. if (mfrr > old_state.mfrr && mfrr > new_state.cppr) {
  537. resend = new_state.need_resend;
  538. new_state.need_resend = 0;
  539. }
  540. } while (!icp_try_update(icp, old_state, new_state, local));
  541. /* Handle reject */
  542. if (reject && reject != XICS_IPI)
  543. icp_deliver_irq(xics, icp, reject);
  544. /* Handle resend */
  545. if (resend)
  546. icp_check_resend(xics, icp);
  547. return H_SUCCESS;
  548. }
  549. static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
  550. {
  551. union kvmppc_icp_state old_state, new_state;
  552. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  553. struct kvmppc_icp *icp = vcpu->arch.icp;
  554. u32 reject;
  555. XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr);
  556. /*
  557. * ICP State: Set_CPPR
  558. *
  559. * We can safely compare the new value with the current
  560. * value outside of the transaction as the CPPR is only
  561. * ever changed by the processor on itself
  562. */
  563. if (cppr > icp->state.cppr)
  564. icp_down_cppr(xics, icp, cppr);
  565. else if (cppr == icp->state.cppr)
  566. return;
  567. /*
  568. * ICP State: Up_CPPR
  569. *
  570. * The processor is raising its priority, this can result
  571. * in a rejection of a pending interrupt:
  572. *
  573. * ICP State: Reject_Current
  574. *
  575. * We can remove EE from the current processor, the update
  576. * transaction will set it again if needed
  577. */
  578. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  579. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  580. do {
  581. old_state = new_state = ACCESS_ONCE(icp->state);
  582. reject = 0;
  583. new_state.cppr = cppr;
  584. if (cppr <= new_state.pending_pri) {
  585. reject = new_state.xisr;
  586. new_state.xisr = 0;
  587. new_state.pending_pri = 0xff;
  588. }
  589. } while (!icp_try_update(icp, old_state, new_state, true));
  590. /*
  591. * Check for rejects. They are handled by doing a new delivery
  592. * attempt (see comments in icp_deliver_irq).
  593. */
  594. if (reject && reject != XICS_IPI)
  595. icp_deliver_irq(xics, icp, reject);
  596. }
  597. static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
  598. {
  599. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  600. struct kvmppc_icp *icp = vcpu->arch.icp;
  601. struct kvmppc_ics *ics;
  602. struct ics_irq_state *state;
  603. u32 irq = xirr & 0x00ffffff;
  604. u16 src;
  605. XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr);
  606. /*
  607. * ICP State: EOI
  608. *
  609. * Note: If EOI is incorrectly used by SW to lower the CPPR
  610. * value (ie more favored), we do not check for rejection of
  611. * a pending interrupt, this is a SW error and PAPR sepcifies
  612. * that we don't have to deal with it.
  613. *
  614. * The sending of an EOI to the ICS is handled after the
  615. * CPPR update
  616. *
  617. * ICP State: Down_CPPR which we handle
  618. * in a separate function as it's shared with H_CPPR.
  619. */
  620. icp_down_cppr(xics, icp, xirr >> 24);
  621. /* IPIs have no EOI */
  622. if (irq == XICS_IPI)
  623. return H_SUCCESS;
  624. /*
  625. * EOI handling: If the interrupt is still asserted, we need to
  626. * resend it. We can take a lockless "peek" at the ICS state here.
  627. *
  628. * "Message" interrupts will never have "asserted" set
  629. */
  630. ics = kvmppc_xics_find_ics(xics, irq, &src);
  631. if (!ics) {
  632. XICS_DBG("h_eoi: IRQ 0x%06x not found !\n", irq);
  633. return H_PARAMETER;
  634. }
  635. state = &ics->irq_state[src];
  636. /* Still asserted, resend it */
  637. if (state->asserted)
  638. icp_deliver_irq(xics, icp, irq);
  639. return H_SUCCESS;
  640. }
  641. static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
  642. {
  643. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  644. struct kvmppc_icp *icp = vcpu->arch.icp;
  645. XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n",
  646. hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt);
  647. if (icp->rm_action & XICS_RM_KICK_VCPU)
  648. kvmppc_fast_vcpu_kick(icp->rm_kick_target);
  649. if (icp->rm_action & XICS_RM_CHECK_RESEND)
  650. icp_check_resend(xics, icp);
  651. if (icp->rm_action & XICS_RM_REJECT)
  652. icp_deliver_irq(xics, icp, icp->rm_reject);
  653. icp->rm_action = 0;
  654. return H_SUCCESS;
  655. }
  656. int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
  657. {
  658. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  659. unsigned long res;
  660. int rc = H_SUCCESS;
  661. /* Check if we have an ICP */
  662. if (!xics || !vcpu->arch.icp)
  663. return H_HARDWARE;
  664. /* Check for real mode returning too hard */
  665. if (xics->real_mode)
  666. return kvmppc_xics_rm_complete(vcpu, req);
  667. switch (req) {
  668. case H_XIRR:
  669. res = kvmppc_h_xirr(vcpu);
  670. kvmppc_set_gpr(vcpu, 4, res);
  671. break;
  672. case H_CPPR:
  673. kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4));
  674. break;
  675. case H_EOI:
  676. rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4));
  677. break;
  678. case H_IPI:
  679. rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4),
  680. kvmppc_get_gpr(vcpu, 5));
  681. break;
  682. }
  683. return rc;
  684. }
  685. /* -- Initialisation code etc. -- */
  686. static int xics_debug_show(struct seq_file *m, void *private)
  687. {
  688. struct kvmppc_xics *xics = m->private;
  689. struct kvm *kvm = xics->kvm;
  690. struct kvm_vcpu *vcpu;
  691. int icsid, i;
  692. if (!kvm)
  693. return 0;
  694. seq_printf(m, "=========\nICP state\n=========\n");
  695. kvm_for_each_vcpu(i, vcpu, kvm) {
  696. struct kvmppc_icp *icp = vcpu->arch.icp;
  697. union kvmppc_icp_state state;
  698. if (!icp)
  699. continue;
  700. state.raw = ACCESS_ONCE(icp->state.raw);
  701. seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n",
  702. icp->server_num, state.xisr,
  703. state.pending_pri, state.cppr, state.mfrr,
  704. state.out_ee, state.need_resend);
  705. }
  706. for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) {
  707. struct kvmppc_ics *ics = xics->ics[icsid];
  708. if (!ics)
  709. continue;
  710. seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n",
  711. icsid);
  712. mutex_lock(&ics->lock);
  713. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  714. struct ics_irq_state *irq = &ics->irq_state[i];
  715. seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x asserted %d resend %d masked pending %d\n",
  716. irq->number, irq->server, irq->priority,
  717. irq->saved_priority, irq->asserted,
  718. irq->resend, irq->masked_pending);
  719. }
  720. mutex_unlock(&ics->lock);
  721. }
  722. return 0;
  723. }
  724. static int xics_debug_open(struct inode *inode, struct file *file)
  725. {
  726. return single_open(file, xics_debug_show, inode->i_private);
  727. }
  728. static const struct file_operations xics_debug_fops = {
  729. .open = xics_debug_open,
  730. .read = seq_read,
  731. .llseek = seq_lseek,
  732. .release = single_release,
  733. };
  734. static void xics_debugfs_init(struct kvmppc_xics *xics)
  735. {
  736. char *name;
  737. name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics);
  738. if (!name) {
  739. pr_err("%s: no memory for name\n", __func__);
  740. return;
  741. }
  742. xics->dentry = debugfs_create_file(name, S_IRUGO, powerpc_debugfs_root,
  743. xics, &xics_debug_fops);
  744. pr_debug("%s: created %s\n", __func__, name);
  745. kfree(name);
  746. }
  747. struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm,
  748. struct kvmppc_xics *xics, int irq)
  749. {
  750. struct kvmppc_ics *ics;
  751. int i, icsid;
  752. icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
  753. mutex_lock(&kvm->lock);
  754. /* ICS already exists - somebody else got here first */
  755. if (xics->ics[icsid])
  756. goto out;
  757. /* Create the ICS */
  758. ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL);
  759. if (!ics)
  760. goto out;
  761. mutex_init(&ics->lock);
  762. ics->icsid = icsid;
  763. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  764. ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i;
  765. ics->irq_state[i].priority = MASKED;
  766. ics->irq_state[i].saved_priority = MASKED;
  767. }
  768. smp_wmb();
  769. xics->ics[icsid] = ics;
  770. if (icsid > xics->max_icsid)
  771. xics->max_icsid = icsid;
  772. out:
  773. mutex_unlock(&kvm->lock);
  774. return xics->ics[icsid];
  775. }
  776. int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num)
  777. {
  778. struct kvmppc_icp *icp;
  779. if (!vcpu->kvm->arch.xics)
  780. return -ENODEV;
  781. if (kvmppc_xics_find_server(vcpu->kvm, server_num))
  782. return -EEXIST;
  783. icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL);
  784. if (!icp)
  785. return -ENOMEM;
  786. icp->vcpu = vcpu;
  787. icp->server_num = server_num;
  788. icp->state.mfrr = MASKED;
  789. icp->state.pending_pri = MASKED;
  790. vcpu->arch.icp = icp;
  791. XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id);
  792. return 0;
  793. }
  794. u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu)
  795. {
  796. struct kvmppc_icp *icp = vcpu->arch.icp;
  797. union kvmppc_icp_state state;
  798. if (!icp)
  799. return 0;
  800. state = icp->state;
  801. return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) |
  802. ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) |
  803. ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
  804. ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT);
  805. }
  806. int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval)
  807. {
  808. struct kvmppc_icp *icp = vcpu->arch.icp;
  809. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  810. union kvmppc_icp_state old_state, new_state;
  811. struct kvmppc_ics *ics;
  812. u8 cppr, mfrr, pending_pri;
  813. u32 xisr;
  814. u16 src;
  815. bool resend;
  816. if (!icp || !xics)
  817. return -ENOENT;
  818. cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT;
  819. xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) &
  820. KVM_REG_PPC_ICP_XISR_MASK;
  821. mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT;
  822. pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT;
  823. /* Require the new state to be internally consistent */
  824. if (xisr == 0) {
  825. if (pending_pri != 0xff)
  826. return -EINVAL;
  827. } else if (xisr == XICS_IPI) {
  828. if (pending_pri != mfrr || pending_pri >= cppr)
  829. return -EINVAL;
  830. } else {
  831. if (pending_pri >= mfrr || pending_pri >= cppr)
  832. return -EINVAL;
  833. ics = kvmppc_xics_find_ics(xics, xisr, &src);
  834. if (!ics)
  835. return -EINVAL;
  836. }
  837. new_state.raw = 0;
  838. new_state.cppr = cppr;
  839. new_state.xisr = xisr;
  840. new_state.mfrr = mfrr;
  841. new_state.pending_pri = pending_pri;
  842. /*
  843. * Deassert the CPU interrupt request.
  844. * icp_try_update will reassert it if necessary.
  845. */
  846. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  847. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  848. /*
  849. * Note that if we displace an interrupt from old_state.xisr,
  850. * we don't mark it as rejected. We expect userspace to set
  851. * the state of the interrupt sources to be consistent with
  852. * the ICP states (either before or afterwards, which doesn't
  853. * matter). We do handle resends due to CPPR becoming less
  854. * favoured because that is necessary to end up with a
  855. * consistent state in the situation where userspace restores
  856. * the ICS states before the ICP states.
  857. */
  858. do {
  859. old_state = ACCESS_ONCE(icp->state);
  860. if (new_state.mfrr <= old_state.mfrr) {
  861. resend = false;
  862. new_state.need_resend = old_state.need_resend;
  863. } else {
  864. resend = old_state.need_resend;
  865. new_state.need_resend = 0;
  866. }
  867. } while (!icp_try_update(icp, old_state, new_state, false));
  868. if (resend)
  869. icp_check_resend(xics, icp);
  870. return 0;
  871. }
  872. /* -- ioctls -- */
  873. int kvm_vm_ioctl_xics_irq(struct kvm *kvm, struct kvm_irq_level *args)
  874. {
  875. struct kvmppc_xics *xics;
  876. int r;
  877. /* locking against multiple callers? */
  878. xics = kvm->arch.xics;
  879. if (!xics)
  880. return -ENODEV;
  881. switch (args->level) {
  882. case KVM_INTERRUPT_SET:
  883. case KVM_INTERRUPT_SET_LEVEL:
  884. case KVM_INTERRUPT_UNSET:
  885. r = ics_deliver_irq(xics, args->irq, args->level);
  886. break;
  887. default:
  888. r = -EINVAL;
  889. }
  890. return r;
  891. }
  892. void kvmppc_xics_free(struct kvmppc_xics *xics)
  893. {
  894. int i;
  895. struct kvm *kvm = xics->kvm;
  896. debugfs_remove(xics->dentry);
  897. if (kvm)
  898. kvm->arch.xics = NULL;
  899. for (i = 0; i <= xics->max_icsid; i++)
  900. kfree(xics->ics[i]);
  901. kfree(xics);
  902. }
  903. int kvm_xics_create(struct kvm *kvm, u32 type)
  904. {
  905. struct kvmppc_xics *xics;
  906. int ret = 0;
  907. xics = kzalloc(sizeof(*xics), GFP_KERNEL);
  908. if (!xics)
  909. return -ENOMEM;
  910. xics->kvm = kvm;
  911. /* Already there ? */
  912. mutex_lock(&kvm->lock);
  913. if (kvm->arch.xics)
  914. ret = -EEXIST;
  915. else
  916. kvm->arch.xics = xics;
  917. mutex_unlock(&kvm->lock);
  918. if (ret)
  919. return ret;
  920. xics_debugfs_init(xics);
  921. #ifdef CONFIG_KVM_BOOK3S_64_HV
  922. if (cpu_has_feature(CPU_FTR_ARCH_206)) {
  923. /* Enable real mode support */
  924. xics->real_mode = ENABLE_REALMODE;
  925. xics->real_mode_dbg = DEBUG_REALMODE;
  926. }
  927. #endif /* CONFIG_KVM_BOOK3S_64_HV */
  928. return 0;
  929. }
  930. void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu)
  931. {
  932. if (!vcpu->arch.icp)
  933. return;
  934. kfree(vcpu->arch.icp);
  935. vcpu->arch.icp = NULL;
  936. vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
  937. }