soc-cache.c 34 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. #if defined(CONFIG_SPI_MASTER)
  21. static int do_spi_write(void *control_data, const void *msg,
  22. int len)
  23. {
  24. struct spi_device *spi = control_data;
  25. struct spi_transfer t;
  26. struct spi_message m;
  27. if (len <= 0)
  28. return 0;
  29. spi_message_init(&m);
  30. memset(&t, 0, sizeof t);
  31. t.tx_buf = msg;
  32. t.len = len;
  33. spi_message_add_tail(&t, &m);
  34. spi_sync(spi, &m);
  35. return len;
  36. }
  37. #endif
  38. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  39. unsigned int value, const void *data, int len)
  40. {
  41. int ret;
  42. if (!snd_soc_codec_volatile_register(codec, reg) &&
  43. reg < codec->driver->reg_cache_size &&
  44. !codec->cache_bypass) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, len);
  54. if (ret == len)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  62. {
  63. int ret;
  64. unsigned int val;
  65. if (reg >= codec->driver->reg_cache_size ||
  66. snd_soc_codec_volatile_register(codec, reg) ||
  67. codec->cache_bypass) {
  68. if (codec->cache_only)
  69. return -1;
  70. BUG_ON(!codec->hw_read);
  71. return codec->hw_read(codec, reg);
  72. }
  73. ret = snd_soc_cache_read(codec, reg, &val);
  74. if (ret < 0)
  75. return -1;
  76. return val;
  77. }
  78. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  79. unsigned int reg)
  80. {
  81. return do_hw_read(codec, reg);
  82. }
  83. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  84. unsigned int value)
  85. {
  86. u16 data;
  87. data = cpu_to_be16((reg << 12) | (value & 0xffffff));
  88. return do_hw_write(codec, reg, value, &data, 2);
  89. }
  90. #if defined(CONFIG_SPI_MASTER)
  91. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  92. int len)
  93. {
  94. u8 msg[2];
  95. msg[0] = data[0];
  96. msg[1] = data[1];
  97. return do_spi_write(control_data, msg, len);
  98. }
  99. #else
  100. #define snd_soc_4_12_spi_write NULL
  101. #endif
  102. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  103. unsigned int reg)
  104. {
  105. return do_hw_read(codec, reg);
  106. }
  107. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  108. unsigned int value)
  109. {
  110. u8 data[2];
  111. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  112. data[1] = value & 0x00ff;
  113. return do_hw_write(codec, reg, value, data, 2);
  114. }
  115. #if defined(CONFIG_SPI_MASTER)
  116. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  117. int len)
  118. {
  119. u8 msg[2];
  120. msg[0] = data[0];
  121. msg[1] = data[1];
  122. return do_spi_write(control_data, msg, len);
  123. }
  124. #else
  125. #define snd_soc_7_9_spi_write NULL
  126. #endif
  127. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  128. unsigned int value)
  129. {
  130. u8 data[2];
  131. reg &= 0xff;
  132. data[0] = reg;
  133. data[1] = value & 0xff;
  134. return do_hw_write(codec, reg, value, data, 2);
  135. }
  136. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  137. unsigned int reg)
  138. {
  139. return do_hw_read(codec, reg);
  140. }
  141. #if defined(CONFIG_SPI_MASTER)
  142. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  143. int len)
  144. {
  145. u8 msg[2];
  146. msg[0] = data[0];
  147. msg[1] = data[1];
  148. return do_spi_write(control_data, msg, len);
  149. }
  150. #else
  151. #define snd_soc_8_8_spi_write NULL
  152. #endif
  153. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  154. unsigned int value)
  155. {
  156. u8 data[3];
  157. data[0] = reg;
  158. data[1] = (value >> 8) & 0xff;
  159. data[2] = value & 0xff;
  160. return do_hw_write(codec, reg, value, data, 3);
  161. }
  162. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  163. unsigned int reg)
  164. {
  165. return do_hw_read(codec, reg);
  166. }
  167. #if defined(CONFIG_SPI_MASTER)
  168. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  169. int len)
  170. {
  171. u8 msg[3];
  172. msg[0] = data[0];
  173. msg[1] = data[1];
  174. msg[2] = data[2];
  175. return do_spi_write(control_data, msg, len);
  176. }
  177. #else
  178. #define snd_soc_8_16_spi_write NULL
  179. #endif
  180. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  181. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  182. void *reg, int reglen,
  183. void *data, int datalen)
  184. {
  185. struct i2c_msg xfer[2];
  186. int ret;
  187. struct i2c_client *client = codec->control_data;
  188. /* Write register */
  189. xfer[0].addr = client->addr;
  190. xfer[0].flags = 0;
  191. xfer[0].len = reglen;
  192. xfer[0].buf = reg;
  193. /* Read data */
  194. xfer[1].addr = client->addr;
  195. xfer[1].flags = I2C_M_RD;
  196. xfer[1].len = datalen;
  197. xfer[1].buf = data;
  198. ret = i2c_transfer(client->adapter, xfer, 2);
  199. if (ret == 2)
  200. return 0;
  201. else if (ret < 0)
  202. return ret;
  203. else
  204. return -EIO;
  205. }
  206. #endif
  207. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  208. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  209. unsigned int r)
  210. {
  211. u8 reg = r;
  212. u8 data;
  213. int ret;
  214. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  215. if (ret < 0)
  216. return 0;
  217. return data;
  218. }
  219. #else
  220. #define snd_soc_8_8_read_i2c NULL
  221. #endif
  222. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  223. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  224. unsigned int r)
  225. {
  226. u8 reg = r;
  227. u16 data;
  228. int ret;
  229. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  230. if (ret < 0)
  231. return 0;
  232. return (data >> 8) | ((data & 0xff) << 8);
  233. }
  234. #else
  235. #define snd_soc_8_16_read_i2c NULL
  236. #endif
  237. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  238. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  239. unsigned int r)
  240. {
  241. u16 reg = r;
  242. u8 data;
  243. int ret;
  244. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  245. if (ret < 0)
  246. return 0;
  247. return data;
  248. }
  249. #else
  250. #define snd_soc_16_8_read_i2c NULL
  251. #endif
  252. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  253. unsigned int reg)
  254. {
  255. return do_hw_read(codec, reg);
  256. }
  257. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  258. unsigned int value)
  259. {
  260. u8 data[3];
  261. data[0] = (reg >> 8) & 0xff;
  262. data[1] = reg & 0xff;
  263. data[2] = value;
  264. return do_hw_write(codec, reg, value, data, 3);
  265. }
  266. #if defined(CONFIG_SPI_MASTER)
  267. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  268. int len)
  269. {
  270. u8 msg[3];
  271. msg[0] = data[0];
  272. msg[1] = data[1];
  273. msg[2] = data[2];
  274. return do_spi_write(control_data, msg, len);
  275. }
  276. #else
  277. #define snd_soc_16_8_spi_write NULL
  278. #endif
  279. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  280. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  281. unsigned int r)
  282. {
  283. u16 reg = cpu_to_be16(r);
  284. u16 data;
  285. int ret;
  286. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  287. if (ret < 0)
  288. return 0;
  289. return be16_to_cpu(data);
  290. }
  291. #else
  292. #define snd_soc_16_16_read_i2c NULL
  293. #endif
  294. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  295. unsigned int reg)
  296. {
  297. return do_hw_read(codec, reg);
  298. }
  299. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  300. unsigned int value)
  301. {
  302. u8 data[4];
  303. data[0] = (reg >> 8) & 0xff;
  304. data[1] = reg & 0xff;
  305. data[2] = (value >> 8) & 0xff;
  306. data[3] = value & 0xff;
  307. return do_hw_write(codec, reg, value, data, 4);
  308. }
  309. #if defined(CONFIG_SPI_MASTER)
  310. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  311. int len)
  312. {
  313. u8 msg[4];
  314. msg[0] = data[0];
  315. msg[1] = data[1];
  316. msg[2] = data[2];
  317. msg[3] = data[3];
  318. return do_spi_write(control_data, msg, len);
  319. }
  320. #else
  321. #define snd_soc_16_16_spi_write NULL
  322. #endif
  323. /* Primitive bulk write support for soc-cache. The data pointed to by
  324. * `data' needs to already be in the form the hardware expects
  325. * including any leading register specific data. Any data written
  326. * through this function will not go through the cache as it only
  327. * handles writing to volatile or out of bounds registers.
  328. */
  329. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  330. const void *data, size_t len)
  331. {
  332. int ret;
  333. /* To ensure that we don't get out of sync with the cache, check
  334. * whether the base register is volatile or if we've directly asked
  335. * to bypass the cache. Out of bounds registers are considered
  336. * volatile.
  337. */
  338. if (!codec->cache_bypass
  339. && !snd_soc_codec_volatile_register(codec, reg)
  340. && reg < codec->driver->reg_cache_size)
  341. return -EINVAL;
  342. switch (codec->control_type) {
  343. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  344. case SND_SOC_I2C:
  345. ret = i2c_master_send(codec->control_data, data, len);
  346. break;
  347. #endif
  348. #if defined(CONFIG_SPI_MASTER)
  349. case SND_SOC_SPI:
  350. ret = do_spi_write(codec->control_data, data, len);
  351. break;
  352. #endif
  353. default:
  354. BUG();
  355. }
  356. if (ret == len)
  357. return 0;
  358. if (ret < 0)
  359. return ret;
  360. else
  361. return -EIO;
  362. }
  363. static struct {
  364. int addr_bits;
  365. int data_bits;
  366. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  367. int (*spi_write)(void *, const char *, int);
  368. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  369. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  370. } io_types[] = {
  371. {
  372. .addr_bits = 4, .data_bits = 12,
  373. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  374. .spi_write = snd_soc_4_12_spi_write,
  375. },
  376. {
  377. .addr_bits = 7, .data_bits = 9,
  378. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  379. .spi_write = snd_soc_7_9_spi_write,
  380. },
  381. {
  382. .addr_bits = 8, .data_bits = 8,
  383. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  384. .i2c_read = snd_soc_8_8_read_i2c,
  385. .spi_write = snd_soc_8_8_spi_write,
  386. },
  387. {
  388. .addr_bits = 8, .data_bits = 16,
  389. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  390. .i2c_read = snd_soc_8_16_read_i2c,
  391. .spi_write = snd_soc_8_16_spi_write,
  392. },
  393. {
  394. .addr_bits = 16, .data_bits = 8,
  395. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  396. .i2c_read = snd_soc_16_8_read_i2c,
  397. .spi_write = snd_soc_16_8_spi_write,
  398. },
  399. {
  400. .addr_bits = 16, .data_bits = 16,
  401. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  402. .i2c_read = snd_soc_16_16_read_i2c,
  403. .spi_write = snd_soc_16_16_spi_write,
  404. },
  405. };
  406. /**
  407. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  408. *
  409. * @codec: CODEC to configure.
  410. * @addr_bits: Number of bits of register address data.
  411. * @data_bits: Number of bits of data per register.
  412. * @control: Control bus used.
  413. *
  414. * Register formats are frequently shared between many I2C and SPI
  415. * devices. In order to promote code reuse the ASoC core provides
  416. * some standard implementations of CODEC read and write operations
  417. * which can be set up using this function.
  418. *
  419. * The caller is responsible for allocating and initialising the
  420. * actual cache.
  421. *
  422. * Note that at present this code cannot be used by CODECs with
  423. * volatile registers.
  424. */
  425. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  426. int addr_bits, int data_bits,
  427. enum snd_soc_control_type control)
  428. {
  429. int i;
  430. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  431. if (io_types[i].addr_bits == addr_bits &&
  432. io_types[i].data_bits == data_bits)
  433. break;
  434. if (i == ARRAY_SIZE(io_types)) {
  435. printk(KERN_ERR
  436. "No I/O functions for %d bit address %d bit data\n",
  437. addr_bits, data_bits);
  438. return -EINVAL;
  439. }
  440. codec->write = io_types[i].write;
  441. codec->read = io_types[i].read;
  442. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  443. switch (control) {
  444. case SND_SOC_CUSTOM:
  445. break;
  446. case SND_SOC_I2C:
  447. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  448. codec->hw_write = (hw_write_t)i2c_master_send;
  449. #endif
  450. if (io_types[i].i2c_read)
  451. codec->hw_read = io_types[i].i2c_read;
  452. codec->control_data = container_of(codec->dev,
  453. struct i2c_client,
  454. dev);
  455. break;
  456. case SND_SOC_SPI:
  457. if (io_types[i].spi_write)
  458. codec->hw_write = io_types[i].spi_write;
  459. codec->control_data = container_of(codec->dev,
  460. struct spi_device,
  461. dev);
  462. break;
  463. }
  464. return 0;
  465. }
  466. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  467. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  468. unsigned int val, unsigned int word_size)
  469. {
  470. switch (word_size) {
  471. case 1: {
  472. u8 *cache = base;
  473. if (cache[idx] == val)
  474. return true;
  475. cache[idx] = val;
  476. break;
  477. }
  478. case 2: {
  479. u16 *cache = base;
  480. if (cache[idx] == val)
  481. return true;
  482. cache[idx] = val;
  483. break;
  484. }
  485. default:
  486. BUG();
  487. }
  488. return false;
  489. }
  490. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  491. unsigned int word_size)
  492. {
  493. switch (word_size) {
  494. case 1: {
  495. const u8 *cache = base;
  496. return cache[idx];
  497. }
  498. case 2: {
  499. const u16 *cache = base;
  500. return cache[idx];
  501. }
  502. default:
  503. BUG();
  504. }
  505. /* unreachable */
  506. return -1;
  507. }
  508. struct snd_soc_rbtree_node {
  509. struct rb_node node;
  510. unsigned int reg;
  511. unsigned int value;
  512. unsigned int defval;
  513. } __attribute__ ((packed));
  514. struct snd_soc_rbtree_ctx {
  515. struct rb_root root;
  516. };
  517. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  518. struct rb_root *root, unsigned int reg)
  519. {
  520. struct rb_node *node;
  521. struct snd_soc_rbtree_node *rbnode;
  522. node = root->rb_node;
  523. while (node) {
  524. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  525. if (rbnode->reg < reg)
  526. node = node->rb_left;
  527. else if (rbnode->reg > reg)
  528. node = node->rb_right;
  529. else
  530. return rbnode;
  531. }
  532. return NULL;
  533. }
  534. static int snd_soc_rbtree_insert(struct rb_root *root,
  535. struct snd_soc_rbtree_node *rbnode)
  536. {
  537. struct rb_node **new, *parent;
  538. struct snd_soc_rbtree_node *rbnode_tmp;
  539. parent = NULL;
  540. new = &root->rb_node;
  541. while (*new) {
  542. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  543. node);
  544. parent = *new;
  545. if (rbnode_tmp->reg < rbnode->reg)
  546. new = &((*new)->rb_left);
  547. else if (rbnode_tmp->reg > rbnode->reg)
  548. new = &((*new)->rb_right);
  549. else
  550. return 0;
  551. }
  552. /* insert the node into the rbtree */
  553. rb_link_node(&rbnode->node, parent, new);
  554. rb_insert_color(&rbnode->node, root);
  555. return 1;
  556. }
  557. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  558. {
  559. struct snd_soc_rbtree_ctx *rbtree_ctx;
  560. struct rb_node *node;
  561. struct snd_soc_rbtree_node *rbnode;
  562. unsigned int val;
  563. int ret;
  564. rbtree_ctx = codec->reg_cache;
  565. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  566. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  567. if (rbnode->value == rbnode->defval)
  568. continue;
  569. WARN_ON(codec->writable_register &&
  570. codec->writable_register(codec, rbnode->reg));
  571. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  572. if (ret)
  573. return ret;
  574. codec->cache_bypass = 1;
  575. ret = snd_soc_write(codec, rbnode->reg, val);
  576. codec->cache_bypass = 0;
  577. if (ret)
  578. return ret;
  579. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  580. rbnode->reg, val);
  581. }
  582. return 0;
  583. }
  584. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  585. unsigned int reg, unsigned int value)
  586. {
  587. struct snd_soc_rbtree_ctx *rbtree_ctx;
  588. struct snd_soc_rbtree_node *rbnode;
  589. rbtree_ctx = codec->reg_cache;
  590. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  591. if (rbnode) {
  592. if (rbnode->value == value)
  593. return 0;
  594. rbnode->value = value;
  595. } else {
  596. /* bail out early, no need to create the rbnode yet */
  597. if (!value)
  598. return 0;
  599. /*
  600. * for uninitialized registers whose value is changed
  601. * from the default zero, create an rbnode and insert
  602. * it into the tree.
  603. */
  604. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  605. if (!rbnode)
  606. return -ENOMEM;
  607. rbnode->reg = reg;
  608. rbnode->value = value;
  609. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  610. }
  611. return 0;
  612. }
  613. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  614. unsigned int reg, unsigned int *value)
  615. {
  616. struct snd_soc_rbtree_ctx *rbtree_ctx;
  617. struct snd_soc_rbtree_node *rbnode;
  618. rbtree_ctx = codec->reg_cache;
  619. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  620. if (rbnode) {
  621. *value = rbnode->value;
  622. } else {
  623. /* uninitialized registers default to 0 */
  624. *value = 0;
  625. }
  626. return 0;
  627. }
  628. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  629. {
  630. struct rb_node *next;
  631. struct snd_soc_rbtree_ctx *rbtree_ctx;
  632. struct snd_soc_rbtree_node *rbtree_node;
  633. /* if we've already been called then just return */
  634. rbtree_ctx = codec->reg_cache;
  635. if (!rbtree_ctx)
  636. return 0;
  637. /* free up the rbtree */
  638. next = rb_first(&rbtree_ctx->root);
  639. while (next) {
  640. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  641. next = rb_next(&rbtree_node->node);
  642. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  643. kfree(rbtree_node);
  644. }
  645. /* release the resources */
  646. kfree(codec->reg_cache);
  647. codec->reg_cache = NULL;
  648. return 0;
  649. }
  650. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  651. {
  652. struct snd_soc_rbtree_node *rbtree_node;
  653. struct snd_soc_rbtree_ctx *rbtree_ctx;
  654. unsigned int val;
  655. unsigned int word_size;
  656. int i;
  657. int ret;
  658. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  659. if (!codec->reg_cache)
  660. return -ENOMEM;
  661. rbtree_ctx = codec->reg_cache;
  662. rbtree_ctx->root = RB_ROOT;
  663. if (!codec->reg_def_copy)
  664. return 0;
  665. /*
  666. * populate the rbtree with the initialized registers. All other
  667. * registers will be inserted when they are first modified.
  668. */
  669. word_size = codec->driver->reg_word_size;
  670. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  671. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  672. if (!val)
  673. continue;
  674. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  675. if (!rbtree_node) {
  676. ret = -ENOMEM;
  677. snd_soc_cache_exit(codec);
  678. break;
  679. }
  680. rbtree_node->reg = i;
  681. rbtree_node->value = val;
  682. rbtree_node->defval = val;
  683. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  684. }
  685. return 0;
  686. }
  687. #ifdef CONFIG_SND_SOC_CACHE_LZO
  688. struct snd_soc_lzo_ctx {
  689. void *wmem;
  690. void *dst;
  691. const void *src;
  692. size_t src_len;
  693. size_t dst_len;
  694. size_t decompressed_size;
  695. unsigned long *sync_bmp;
  696. int sync_bmp_nbits;
  697. };
  698. #define LZO_BLOCK_NUM 8
  699. static int snd_soc_lzo_block_count(void)
  700. {
  701. return LZO_BLOCK_NUM;
  702. }
  703. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  704. {
  705. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  706. if (!lzo_ctx->wmem)
  707. return -ENOMEM;
  708. return 0;
  709. }
  710. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  711. {
  712. size_t compress_size;
  713. int ret;
  714. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  715. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  716. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  717. return -EINVAL;
  718. lzo_ctx->dst_len = compress_size;
  719. return 0;
  720. }
  721. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  722. {
  723. size_t dst_len;
  724. int ret;
  725. dst_len = lzo_ctx->dst_len;
  726. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  727. lzo_ctx->dst, &dst_len);
  728. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  729. return -EINVAL;
  730. return 0;
  731. }
  732. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  733. struct snd_soc_lzo_ctx *lzo_ctx)
  734. {
  735. int ret;
  736. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  737. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  738. if (!lzo_ctx->dst) {
  739. lzo_ctx->dst_len = 0;
  740. return -ENOMEM;
  741. }
  742. ret = snd_soc_lzo_compress(lzo_ctx);
  743. if (ret < 0)
  744. return ret;
  745. return 0;
  746. }
  747. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  748. struct snd_soc_lzo_ctx *lzo_ctx)
  749. {
  750. int ret;
  751. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  752. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  753. if (!lzo_ctx->dst) {
  754. lzo_ctx->dst_len = 0;
  755. return -ENOMEM;
  756. }
  757. ret = snd_soc_lzo_decompress(lzo_ctx);
  758. if (ret < 0)
  759. return ret;
  760. return 0;
  761. }
  762. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  763. unsigned int reg)
  764. {
  765. const struct snd_soc_codec_driver *codec_drv;
  766. codec_drv = codec->driver;
  767. return (reg * codec_drv->reg_word_size) /
  768. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  769. }
  770. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  771. unsigned int reg)
  772. {
  773. const struct snd_soc_codec_driver *codec_drv;
  774. codec_drv = codec->driver;
  775. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  776. codec_drv->reg_word_size);
  777. }
  778. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  779. {
  780. const struct snd_soc_codec_driver *codec_drv;
  781. codec_drv = codec->driver;
  782. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  783. }
  784. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  785. {
  786. struct snd_soc_lzo_ctx **lzo_blocks;
  787. unsigned int val;
  788. int i;
  789. int ret;
  790. lzo_blocks = codec->reg_cache;
  791. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  792. WARN_ON(codec->writable_register &&
  793. codec->writable_register(codec, i));
  794. ret = snd_soc_cache_read(codec, i, &val);
  795. if (ret)
  796. return ret;
  797. codec->cache_bypass = 1;
  798. ret = snd_soc_write(codec, i, val);
  799. codec->cache_bypass = 0;
  800. if (ret)
  801. return ret;
  802. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  803. i, val);
  804. }
  805. return 0;
  806. }
  807. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  808. unsigned int reg, unsigned int value)
  809. {
  810. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  811. int ret, blkindex, blkpos;
  812. size_t blksize, tmp_dst_len;
  813. void *tmp_dst;
  814. /* index of the compressed lzo block */
  815. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  816. /* register index within the decompressed block */
  817. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  818. /* size of the compressed block */
  819. blksize = snd_soc_lzo_get_blksize(codec);
  820. lzo_blocks = codec->reg_cache;
  821. lzo_block = lzo_blocks[blkindex];
  822. /* save the pointer and length of the compressed block */
  823. tmp_dst = lzo_block->dst;
  824. tmp_dst_len = lzo_block->dst_len;
  825. /* prepare the source to be the compressed block */
  826. lzo_block->src = lzo_block->dst;
  827. lzo_block->src_len = lzo_block->dst_len;
  828. /* decompress the block */
  829. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  830. if (ret < 0) {
  831. kfree(lzo_block->dst);
  832. goto out;
  833. }
  834. /* write the new value to the cache */
  835. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  836. codec->driver->reg_word_size)) {
  837. kfree(lzo_block->dst);
  838. goto out;
  839. }
  840. /* prepare the source to be the decompressed block */
  841. lzo_block->src = lzo_block->dst;
  842. lzo_block->src_len = lzo_block->dst_len;
  843. /* compress the block */
  844. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  845. if (ret < 0) {
  846. kfree(lzo_block->dst);
  847. kfree(lzo_block->src);
  848. goto out;
  849. }
  850. /* set the bit so we know we have to sync this register */
  851. set_bit(reg, lzo_block->sync_bmp);
  852. kfree(tmp_dst);
  853. kfree(lzo_block->src);
  854. return 0;
  855. out:
  856. lzo_block->dst = tmp_dst;
  857. lzo_block->dst_len = tmp_dst_len;
  858. return ret;
  859. }
  860. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  861. unsigned int reg, unsigned int *value)
  862. {
  863. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  864. int ret, blkindex, blkpos;
  865. size_t blksize, tmp_dst_len;
  866. void *tmp_dst;
  867. *value = 0;
  868. /* index of the compressed lzo block */
  869. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  870. /* register index within the decompressed block */
  871. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  872. /* size of the compressed block */
  873. blksize = snd_soc_lzo_get_blksize(codec);
  874. lzo_blocks = codec->reg_cache;
  875. lzo_block = lzo_blocks[blkindex];
  876. /* save the pointer and length of the compressed block */
  877. tmp_dst = lzo_block->dst;
  878. tmp_dst_len = lzo_block->dst_len;
  879. /* prepare the source to be the compressed block */
  880. lzo_block->src = lzo_block->dst;
  881. lzo_block->src_len = lzo_block->dst_len;
  882. /* decompress the block */
  883. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  884. if (ret >= 0)
  885. /* fetch the value from the cache */
  886. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  887. codec->driver->reg_word_size);
  888. kfree(lzo_block->dst);
  889. /* restore the pointer and length of the compressed block */
  890. lzo_block->dst = tmp_dst;
  891. lzo_block->dst_len = tmp_dst_len;
  892. return 0;
  893. }
  894. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  895. {
  896. struct snd_soc_lzo_ctx **lzo_blocks;
  897. int i, blkcount;
  898. lzo_blocks = codec->reg_cache;
  899. if (!lzo_blocks)
  900. return 0;
  901. blkcount = snd_soc_lzo_block_count();
  902. /*
  903. * the pointer to the bitmap used for syncing the cache
  904. * is shared amongst all lzo_blocks. Ensure it is freed
  905. * only once.
  906. */
  907. if (lzo_blocks[0])
  908. kfree(lzo_blocks[0]->sync_bmp);
  909. for (i = 0; i < blkcount; ++i) {
  910. if (lzo_blocks[i]) {
  911. kfree(lzo_blocks[i]->wmem);
  912. kfree(lzo_blocks[i]->dst);
  913. }
  914. /* each lzo_block is a pointer returned by kmalloc or NULL */
  915. kfree(lzo_blocks[i]);
  916. }
  917. kfree(lzo_blocks);
  918. codec->reg_cache = NULL;
  919. return 0;
  920. }
  921. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  922. {
  923. struct snd_soc_lzo_ctx **lzo_blocks;
  924. size_t bmp_size;
  925. const struct snd_soc_codec_driver *codec_drv;
  926. int ret, tofree, i, blksize, blkcount;
  927. const char *p, *end;
  928. unsigned long *sync_bmp;
  929. ret = 0;
  930. codec_drv = codec->driver;
  931. /*
  932. * If we have not been given a default register cache
  933. * then allocate a dummy zero-ed out region, compress it
  934. * and remember to free it afterwards.
  935. */
  936. tofree = 0;
  937. if (!codec->reg_def_copy)
  938. tofree = 1;
  939. if (!codec->reg_def_copy) {
  940. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  941. if (!codec->reg_def_copy)
  942. return -ENOMEM;
  943. }
  944. blkcount = snd_soc_lzo_block_count();
  945. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  946. GFP_KERNEL);
  947. if (!codec->reg_cache) {
  948. ret = -ENOMEM;
  949. goto err_tofree;
  950. }
  951. lzo_blocks = codec->reg_cache;
  952. /*
  953. * allocate a bitmap to be used when syncing the cache with
  954. * the hardware. Each time a register is modified, the corresponding
  955. * bit is set in the bitmap, so we know that we have to sync
  956. * that register.
  957. */
  958. bmp_size = codec_drv->reg_cache_size;
  959. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  960. GFP_KERNEL);
  961. if (!sync_bmp) {
  962. ret = -ENOMEM;
  963. goto err;
  964. }
  965. bitmap_zero(sync_bmp, bmp_size);
  966. /* allocate the lzo blocks and initialize them */
  967. for (i = 0; i < blkcount; ++i) {
  968. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  969. GFP_KERNEL);
  970. if (!lzo_blocks[i]) {
  971. kfree(sync_bmp);
  972. ret = -ENOMEM;
  973. goto err;
  974. }
  975. lzo_blocks[i]->sync_bmp = sync_bmp;
  976. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  977. /* alloc the working space for the compressed block */
  978. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  979. if (ret < 0)
  980. goto err;
  981. }
  982. blksize = snd_soc_lzo_get_blksize(codec);
  983. p = codec->reg_def_copy;
  984. end = codec->reg_def_copy + codec->reg_size;
  985. /* compress the register map and fill the lzo blocks */
  986. for (i = 0; i < blkcount; ++i, p += blksize) {
  987. lzo_blocks[i]->src = p;
  988. if (p + blksize > end)
  989. lzo_blocks[i]->src_len = end - p;
  990. else
  991. lzo_blocks[i]->src_len = blksize;
  992. ret = snd_soc_lzo_compress_cache_block(codec,
  993. lzo_blocks[i]);
  994. if (ret < 0)
  995. goto err;
  996. lzo_blocks[i]->decompressed_size =
  997. lzo_blocks[i]->src_len;
  998. }
  999. if (tofree) {
  1000. kfree(codec->reg_def_copy);
  1001. codec->reg_def_copy = NULL;
  1002. }
  1003. return 0;
  1004. err:
  1005. snd_soc_cache_exit(codec);
  1006. err_tofree:
  1007. if (tofree) {
  1008. kfree(codec->reg_def_copy);
  1009. codec->reg_def_copy = NULL;
  1010. }
  1011. return ret;
  1012. }
  1013. #endif
  1014. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1015. {
  1016. int i;
  1017. int ret;
  1018. const struct snd_soc_codec_driver *codec_drv;
  1019. unsigned int val;
  1020. codec_drv = codec->driver;
  1021. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1022. WARN_ON(codec->writable_register &&
  1023. codec->writable_register(codec, i));
  1024. ret = snd_soc_cache_read(codec, i, &val);
  1025. if (ret)
  1026. return ret;
  1027. if (codec->reg_def_copy)
  1028. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1029. i, codec_drv->reg_word_size) == val)
  1030. continue;
  1031. ret = snd_soc_write(codec, i, val);
  1032. if (ret)
  1033. return ret;
  1034. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1035. i, val);
  1036. }
  1037. return 0;
  1038. }
  1039. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1040. unsigned int reg, unsigned int value)
  1041. {
  1042. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1043. codec->driver->reg_word_size);
  1044. return 0;
  1045. }
  1046. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1047. unsigned int reg, unsigned int *value)
  1048. {
  1049. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1050. codec->driver->reg_word_size);
  1051. return 0;
  1052. }
  1053. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1054. {
  1055. if (!codec->reg_cache)
  1056. return 0;
  1057. kfree(codec->reg_cache);
  1058. codec->reg_cache = NULL;
  1059. return 0;
  1060. }
  1061. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1062. {
  1063. const struct snd_soc_codec_driver *codec_drv;
  1064. codec_drv = codec->driver;
  1065. if (codec->reg_def_copy)
  1066. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1067. codec->reg_size, GFP_KERNEL);
  1068. else
  1069. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1070. if (!codec->reg_cache)
  1071. return -ENOMEM;
  1072. return 0;
  1073. }
  1074. /* an array of all supported compression types */
  1075. static const struct snd_soc_cache_ops cache_types[] = {
  1076. /* Flat *must* be the first entry for fallback */
  1077. {
  1078. .id = SND_SOC_FLAT_COMPRESSION,
  1079. .name = "flat",
  1080. .init = snd_soc_flat_cache_init,
  1081. .exit = snd_soc_flat_cache_exit,
  1082. .read = snd_soc_flat_cache_read,
  1083. .write = snd_soc_flat_cache_write,
  1084. .sync = snd_soc_flat_cache_sync
  1085. },
  1086. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1087. {
  1088. .id = SND_SOC_LZO_COMPRESSION,
  1089. .name = "LZO",
  1090. .init = snd_soc_lzo_cache_init,
  1091. .exit = snd_soc_lzo_cache_exit,
  1092. .read = snd_soc_lzo_cache_read,
  1093. .write = snd_soc_lzo_cache_write,
  1094. .sync = snd_soc_lzo_cache_sync
  1095. },
  1096. #endif
  1097. {
  1098. .id = SND_SOC_RBTREE_COMPRESSION,
  1099. .name = "rbtree",
  1100. .init = snd_soc_rbtree_cache_init,
  1101. .exit = snd_soc_rbtree_cache_exit,
  1102. .read = snd_soc_rbtree_cache_read,
  1103. .write = snd_soc_rbtree_cache_write,
  1104. .sync = snd_soc_rbtree_cache_sync
  1105. }
  1106. };
  1107. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1108. {
  1109. int i;
  1110. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1111. if (cache_types[i].id == codec->compress_type)
  1112. break;
  1113. /* Fall back to flat compression */
  1114. if (i == ARRAY_SIZE(cache_types)) {
  1115. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1116. codec->compress_type);
  1117. i = 0;
  1118. }
  1119. mutex_init(&codec->cache_rw_mutex);
  1120. codec->cache_ops = &cache_types[i];
  1121. if (codec->cache_ops->init) {
  1122. if (codec->cache_ops->name)
  1123. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1124. codec->cache_ops->name, codec->name);
  1125. return codec->cache_ops->init(codec);
  1126. }
  1127. return -ENOSYS;
  1128. }
  1129. /*
  1130. * NOTE: keep in mind that this function might be called
  1131. * multiple times.
  1132. */
  1133. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1134. {
  1135. if (codec->cache_ops && codec->cache_ops->exit) {
  1136. if (codec->cache_ops->name)
  1137. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1138. codec->cache_ops->name, codec->name);
  1139. return codec->cache_ops->exit(codec);
  1140. }
  1141. return -ENOSYS;
  1142. }
  1143. /**
  1144. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1145. *
  1146. * @codec: CODEC to configure.
  1147. * @reg: The register index.
  1148. * @value: The value to be returned.
  1149. */
  1150. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1151. unsigned int reg, unsigned int *value)
  1152. {
  1153. int ret;
  1154. mutex_lock(&codec->cache_rw_mutex);
  1155. if (value && codec->cache_ops && codec->cache_ops->read) {
  1156. ret = codec->cache_ops->read(codec, reg, value);
  1157. mutex_unlock(&codec->cache_rw_mutex);
  1158. return ret;
  1159. }
  1160. mutex_unlock(&codec->cache_rw_mutex);
  1161. return -ENOSYS;
  1162. }
  1163. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1164. /**
  1165. * snd_soc_cache_write: Set the value of a given register in the cache.
  1166. *
  1167. * @codec: CODEC to configure.
  1168. * @reg: The register index.
  1169. * @value: The new register value.
  1170. */
  1171. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1172. unsigned int reg, unsigned int value)
  1173. {
  1174. int ret;
  1175. mutex_lock(&codec->cache_rw_mutex);
  1176. if (codec->cache_ops && codec->cache_ops->write) {
  1177. ret = codec->cache_ops->write(codec, reg, value);
  1178. mutex_unlock(&codec->cache_rw_mutex);
  1179. return ret;
  1180. }
  1181. mutex_unlock(&codec->cache_rw_mutex);
  1182. return -ENOSYS;
  1183. }
  1184. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1185. /**
  1186. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1187. *
  1188. * @codec: CODEC to configure.
  1189. *
  1190. * Any registers that should not be synced should be marked as
  1191. * volatile. In general drivers can choose not to use the provided
  1192. * syncing functionality if they so require.
  1193. */
  1194. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1195. {
  1196. int ret;
  1197. const char *name;
  1198. if (!codec->cache_sync) {
  1199. return 0;
  1200. }
  1201. if (!codec->cache_ops || !codec->cache_ops->sync)
  1202. return -ENOSYS;
  1203. if (codec->cache_ops->name)
  1204. name = codec->cache_ops->name;
  1205. else
  1206. name = "unknown";
  1207. if (codec->cache_ops->name)
  1208. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1209. codec->cache_ops->name, codec->name);
  1210. trace_snd_soc_cache_sync(codec, name, "start");
  1211. ret = codec->cache_ops->sync(codec);
  1212. if (!ret)
  1213. codec->cache_sync = 0;
  1214. trace_snd_soc_cache_sync(codec, name, "end");
  1215. return ret;
  1216. }
  1217. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1218. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1219. unsigned int reg)
  1220. {
  1221. const struct snd_soc_codec_driver *codec_drv;
  1222. unsigned int min, max, index;
  1223. codec_drv = codec->driver;
  1224. min = 0;
  1225. max = codec_drv->reg_access_size - 1;
  1226. do {
  1227. index = (min + max) / 2;
  1228. if (codec_drv->reg_access_default[index].reg == reg)
  1229. return index;
  1230. if (codec_drv->reg_access_default[index].reg < reg)
  1231. min = index + 1;
  1232. else
  1233. max = index;
  1234. } while (min <= max);
  1235. return -1;
  1236. }
  1237. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1238. unsigned int reg)
  1239. {
  1240. int index;
  1241. if (reg >= codec->driver->reg_cache_size)
  1242. return 1;
  1243. index = snd_soc_get_reg_access_index(codec, reg);
  1244. if (index < 0)
  1245. return 0;
  1246. return codec->driver->reg_access_default[index].vol;
  1247. }
  1248. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1249. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1250. unsigned int reg)
  1251. {
  1252. int index;
  1253. if (reg >= codec->driver->reg_cache_size)
  1254. return 1;
  1255. index = snd_soc_get_reg_access_index(codec, reg);
  1256. if (index < 0)
  1257. return 0;
  1258. return codec->driver->reg_access_default[index].read;
  1259. }
  1260. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
  1261. int snd_soc_default_writable_register(struct snd_soc_codec *codec,
  1262. unsigned int reg)
  1263. {
  1264. int index;
  1265. if (reg >= codec->driver->reg_cache_size)
  1266. return 1;
  1267. index = snd_soc_get_reg_access_index(codec, reg);
  1268. if (index < 0)
  1269. return 0;
  1270. return codec->driver->reg_access_default[index].write;
  1271. }
  1272. EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);